Thin film transistor, method of manufacturing thin film transistor, and display device including same

Abstract

The invention relates to a thin film transistor, a method of manufacturing the thin film transistor, and a display device including the thin film transistor. Another embodiment of the present invention seeks to provide a thin film transistor comprising: an active layer; and a gate electrode overlapping the active layer, wherein the active layer includes: a channel portion; a first conductive portion disposed on one side of the channel portion; and a second conductive portion disposed on the other side of the channel portion, wherein the first conductive portion includes: a first hydrogen conducting portion; and a first connection portion disposed between the first hydrogen conducting portion and the channel portion, and wherein the second conductive portion includes: a second hydrogen conducting portion; and a second connection portion disposed between the second hydrogen conduction portion and the channel portion, in which a surface resistance of the first hydrogen conduction portion is greater than a surface resistance of the first connection portion, and a surface resistance of the second hydrogen conduction portion is greater than a surface resistance of the second connection portion.

Description

[0001] Cross-references to related applications

[0002] This application claims the benefit of priority to Korean Patent Application No. 10-2024-0119005, filed on September 3, 2024, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] This invention relates to thin-film transistors, methods for manufacturing thin-film transistors, and display devices (or display equipment) including thin-film transistors. Background Technology

[0004] Transistors are widely used as switching or driving devices in the field of electronic devices. In particular, thin-film transistors are widely used as switching devices in display devices such as liquid crystal displays (or liquid crystal display devices) or organic light-emitting display devices (organic light-emitting display devices) because they can be manufactured on glass or plastic substrates.

[0005] Based on the material used to construct the active layer, thin-film transistors can be classified into amorphous silicon thin-film transistors in which amorphous silicon is used as their active layer, polycrystalline silicon thin-film transistors in which polycrystalline silicon is used as their active layer, and oxide semiconductor thin-film transistors in which oxide semiconductor is used as their active layer.

[0006] In the case of oxide semiconductor thin-film transistors, conductive (or conductive) regions can be achieved by dry etching.

[0007] However, in processes involving dry etching of the oxide semiconductor layer to form conductors or in the formation of contact holes, the oxide semiconductor layer (in other words, the thin oxide semiconductor layer) is repeatedly exposed. This can lead to the disappearance of the oxide semiconductor layer, resulting in a decrease in the mobility of oxide semiconductor thin-film transistors.

[0008] Recently, ongoing research has been conducted to reduce the area repeatedly exposed by dry etching processes and to improve the reduced mobility caused by the loss of oxide semiconductor layers. Summary of the Invention

[0009] One embodiment of the present invention provides a thin-film transistor having a reduced area exposed by dry etching.

[0010] One embodiment of the present invention provides a thin-film transistor in which the problem of reduced mobility is improved by using hydrogen as a conductor.

[0011] According to one aspect of this disclosure, the above and other objectives can be achieved by providing a thin-film transistor comprising: an active layer; and a gate electrode overlapping the active layer, wherein the active layer comprises: a channel portion; a first conductive portion disposed on one side of the channel portion; and a second conductive portion disposed on the other side of the channel portion, wherein the first conductive portion comprises: a first hydrogen conducting portion; and a first connection portion disposed between the first hydrogen conducting portion and the channel portion, and wherein the second conductive portion comprises: a second hydrogen conducting portion; and a second connection portion disposed between the second hydrogen conducting portion and the channel portion, wherein the surface resistance of the first hydrogen conducting portion is greater than the surface resistance of the first connection portion, and the surface resistance of the second hydrogen conducting portion is greater than the surface resistance of the second connection portion.

[0012] The thin-film transistor further includes a gate insulating film disposed on the active layer, the gate insulating film exposing the first connection portion and the second connection portion, and the first connection portion and the second connection portion may each be formed by selective conductor formation by means of dry etching.

[0013] The thin-film transistor further includes a gate insulating film disposed on the active layer, the gate insulating film covering the entire upper surface of the active layer, and the first connection portion and the second connection portion can each be formed by selective conductorization by means of doping with a dopant.

[0014] The surface resistivity of the first hydrogen-conducting portion and the second hydrogen-conducting portion is 5 × 10⁻⁶. 3 Up to 15×10 3 Ω / □, and the surface resistance of the first connection portion and the second connection portion is 2×10 Ω / □, respectively. 3 Up to 5×10 3 Ω / □.

[0015] The thin-film transistor further includes a source electrode and a drain electrode spaced apart from each other and respectively connected to the active layer, wherein the source electrode can be connected to the first conductive portion through a first contact hole, and the drain electrode can be connected to the second conductive portion through a second contact hole.

[0016] The thin-film transistor further includes a substrate and a buffer layer disposed between the substrate and the active layer, wherein the first contact hole penetrates the first conductive portion and contacts the buffer layer, and a portion of the first contact hole is surrounded by the buffer layer, and the second contact hole penetrates the second conductive portion and contacts the buffer layer, and a portion of the second contact hole is surrounded by the buffer layer.

[0017] The thin-film transistor further includes a substrate and a buffer layer disposed between the substrate and the active layer, wherein the first contact hole contacts a groove formed in the first conductive portion and does not contact the buffer layer, the second contact hole contacts a groove formed in the second conductive portion and may not contact the buffer layer.

[0018] The thin-film transistor further includes a gate insulating film disposed on the active layer; a hydrogen supply film disposed on the gate insulating film; and a source electrode and a drain electrode spaced apart from each other and respectively connected to the active layer, wherein the hydrogen supply film is disposed between the gate insulating film and the source electrode, and may be disposed between the gate insulating film and the drain electrode.

[0019] The hydrogen supply membrane may include silicon nitride (SiNx).

[0020] The hydrogen supply membrane may not overlap with the gate electrode.

[0021] The hydrogen supply membrane does not overlap with the first connection portion and the second connection portion, and the hydrogen supply membrane may overlap with at least a portion of the first hydrogen conduction portion and at least a portion of the second hydrogen conduction portion.

[0022] The gate electrode, the source electrode, and the drain electrode can be formed using the same materials and the same process.

[0023] Another embodiment of the present invention provides a method for manufacturing a thin-film transistor, comprising the following steps: forming a buffer layer; forming an active layer on the buffer layer; forming a gate insulating film on the active layer; forming a hydrogen supply material layer on the gate insulating film; etching the buffer layer, the gate insulating film, and the hydrogen supply material layer to form a first contact hole, a second contact hole, and a third contact hole; etching the hydrogen supply material layer to form a fourth contact hole and a hydrogen supply film; forming a gate electrode material layer on the hydrogen supply film; etching the gate electrode material layer to form a gate electrode, a source electrode, and a drain electrode; and etching a portion of the gate insulating film to selectively conductor a portion of the active layer.

[0024] The step of etching the gate electrode material layer to form the gate electrode, source electrode, and drain electrode may include the step of patterning the gate electrode material layer using a halftone mask.

[0025] Another embodiment of the present invention provides a display device (or display apparatus) including the thin-film transistor. Attached Figure Description

[0026] The above and other objects, features, and other advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0027] Figure 1 This is a plan view of a thin-film transistor according to an embodiment of the present invention.

[0028] Figure 2 For along Figure 1 A sectional view taken from line I-I'.

[0029] Figure 3 This is a cross-sectional view of a thin-film transistor according to another embodiment of the present invention.

[0030] Figure 4 This is a cross-sectional view of a thin-film transistor according to another embodiment of the present invention.

[0031] Figures 5A to 5D A process (flow) diagram illustrating the manufacturing process of a thin-film transistor according to a comparative example.

[0032] Figures 6A to 6H A process diagram illustrating the manufacturing process of a thin-film transistor according to an embodiment of the present invention is provided.

[0033] Figure 7 This is a schematic diagram of a display device (or display apparatus) according to an embodiment of the present invention.

[0034] Figure 8 for Figure 7 A circuit diagram for one pixel. Detailed Implementation

[0035] The advantages and features of this disclosure and its implementation will be illustrated by the following embodiments described with reference to the accompanying drawings. However, this disclosure may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of this disclosure to those skilled in the art. Furthermore, this disclosure is limited only by the scope of the claims.

[0036] The shapes, dimensions, ratios, angles, and quantities disclosed in the accompanying drawings used to describe embodiments of this disclosure are merely examples, and therefore, this disclosure is not limited to the details shown. Throughout this disclosure, similar reference numerals refer to similar elements. In the following description, detailed descriptions of relevant known functions or configurations will be omitted where they are determined to unnecessarily obscure the focus of this disclosure.

[0037] When using the terms “comprising,” “having,” and “including” as described in this disclosure, an additional part may be added unless “only” is used. Singular terms may include plural forms unless otherwise stated.

[0038] When interpreting an element (or component), it is interpreted as including an error band (or error range), even though there is no explicit description.

[0039] When describing positional relationships, such as when the positional relationship is described as "on ~", "above ~", "below ~", and "near ~", one or more parts may be placed between two other parts unless "only" or "directly" is used.

[0040] Spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” are used herein to readily describe the relationship between one or more elements and another element or more elements as shown in the accompanying drawings. It should be understood that these terms are intended to cover different orientations of the devices other than those depicted in the drawings. For example, if the devices shown in the figures are reversed, a device described as being arranged “below” or “under” another device may be arranged “above” another device. Thus, the exemplary term “below or under” can include both “below or under” and “above” orientations. Similarly, the exemplary term “above” or “upper” can include both “above” and “below or under” orientations.

[0041] When describing temporal relationships, such as when time sequence is described as “after,” “following,” “next,” and “before,” discontinuous cases may be included unless “only” or “directly” is used.

[0042] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element.

[0043] It should be understood that the term "at least one" includes all combinations relating to any one item. For example, "at least one of the first element, the second element, and the third element" can include all combinations of two or more elements selected from the first element, the second element, and the third element, as well as each of the first element, the second element, and the third element.

[0044] As will be fully understood by those skilled in the art, the features of the various embodiments of this disclosure may be coupled or combined with each other in part or in whole, and may interoperate and be technically driven differently from each other. Embodiments of this disclosure may be implemented independently of each other, or may be implemented together in an interdependent relationship.

[0045] Apart from the reference numerals for components in each figure describing embodiments of the present disclosure, the same components may have the same symbols as those that may be shown in other figures.

[0046] In the embodiments of this disclosure, for ease of description, the source electrode and the drain electrode are distinguished, and the source electrode and the drain electrode are interchangeable. The source electrode can be the drain electrode, and vice versa. Furthermore, in another embodiment, the source electrode of any embodiment can be the drain electrode, and in another embodiment, the drain electrode of any embodiment can be the source electrode.

[0047] In some embodiments of this disclosure, for ease of description, the source region is distinguished from the source electrode, and the drain region is distinguished from the drain electrode; however, the embodiments of this disclosure are not limited thereto. The source region can be the source electrode, and the drain region can be the drain electrode. Alternatively, the source region can be the drain electrode, and the drain region can be the source electrode.

[0048] Figure 1 This is a plan view of a thin-film transistor (100) according to an embodiment of the present invention. Figure 2 It is along Figure 1 A sectional view taken from line I-I'.

[0049] refer to Figure 1 and Figure 2 According to an embodiment of the present invention, a thin-film transistor (100) may include an active layer (130) and a gate electrode (150).

[0050] Specifically, refer to Figure 1 and Figure 2 According to an embodiment of the present invention, a thin film transistor (100) includes a substrate (110), a light-shielding layer (111), a buffer layer (120), an active layer (130), a gate insulating film (140), a hydrogen supply film (145), a gate electrode (150), a source electrode (161), and a drain electrode (162).

[0051] The components of a thin-film transistor (100) according to an embodiment of the present invention will now be described in detail.

[0052] The substrate (110) can be made of glass or plastic. A transparent plastic with flexible properties, such as polyimide, can be used.

[0053] When polyimide is used as the material of the substrate (110), a heat-resistant polyimide capable of withstanding high temperatures can be used, taking into account the high-temperature deposition process performed on the substrate (110). In this case, in order to form a thin-film transistor, processes such as deposition and etching can be performed while the polyimide substrate is placed on a carrier substrate made of a highly durable material such as glass.

[0054] The light-shielding layer (111) can be disposed on the substrate (110).

[0055] A light-shielding layer (111) may be disposed between the substrate (110) and the buffer layer (120). The light-shielding layer (111) may overlap with the active layer (130). Specifically, the light-shielding layer (111) may overlap with the channel portion (130n). The light-shielding layer (111) can block light incident from the outside, thereby protecting the channel portion (130n).

[0056] The light-shielding layer (111) can be made of a material with light-shielding properties. The light-shielding layer (111) may contain at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), titanium (Ti), and iron (Fe). According to one embodiment of the invention, the light-shielding layer (111) may be conductive.

[0057] refer to Figure 1 and Figure 2 The buffer layer (120) can be disposed on the substrate (110) and the light-shielding layer (111).

[0058] A buffer layer (120) is formed on a substrate (110) and may be formed of an inorganic or organic material. For example, the buffer layer (120) may contain insulating oxides such as silicon oxide (SiOx) or aluminum oxide (Al2O3).

[0059] The buffer layer (120) protects the active layer (130) by blocking impurities such as moisture and oxygen from flowing in from the substrate (110) and is used to planarize the upper portion of the substrate (110), and can be formed as a single layer or multiple layers.

[0060] When the buffer layer (120) has multiple layers, each layer in the multiple layers can be formed of different materials.

[0061] refer to Figure 1 and Figure 2 The active layer (130) can be set on the buffer layer (120).

[0062] The active layer (130) may include a channel portion (130n), a first conductive portion (130a), and a second conductive portion (130b).

[0063] Specifically, at least a portion of the channel portion (130n) overlaps with the gate electrode (150) in a plan view, a first conductive portion (130a) is disposed on one side of the channel portion (130n), and a second conductive portion (130b) is disposed on the other side of the channel portion (130n). More specifically, the first conductive portion (130a) and the second conductive portion (130b) do not overlap with the gate electrode (150) in a plan view.

[0064] According to one embodiment of the present invention, the first conductive portion (130a) and the second conductive portion (130b) are spaced apart from each other, and a channel portion (130n) is provided between them.

[0065] According to one embodiment of the present invention, the first conductive portion (130a) includes a first hydrogen conductive portion (130a1) and a first connecting portion (130a2).

[0066] Specifically, a first connecting portion (130a2) is disposed between a first hydrogen conducting portion (130a1) and a channel portion (130n). More specifically, the first hydrogen conducting portion (130a1) and the channel portion (130n) are spaced apart from each other, and the first connecting portion (130a2) is present between them.

[0067] According to one embodiment of the present invention, the second conductive portion (130b) includes a second hydrogen conductive portion (130b1) and a second connecting portion (130b2).

[0068] Specifically, the second connecting portion (130b2) is disposed between the second hydrogen conducting portion (130b1) and the channel portion (130n). More specifically, the second hydrogen conducting portion (130b1) and the channel portion (130n) are configured to be spaced apart from each other, with the second connecting portion (130b2) between them.

[0069] According to one embodiment of the present invention, the surface resistance of the first hydrogen conducting portion (130a1) may be greater than the surface resistance of the first connecting portion (130a2).

[0070] According to one embodiment of the present invention, the surface resistance of the second hydrogen conducting portion (130b1) may be greater than the surface resistance of the second connecting portion (130b2).

[0071] According to one embodiment of the present invention, the active layer (130) may be formed of a semiconductor material. The active layer (130) may comprise an oxide semiconductor material.

[0072] The oxide semiconductor material may include, for example, at least one of IZO (InZnO)-based oxide semiconductor materials, IGO (InGaO)-based oxide semiconductor materials, ITO (InSnO)-based oxide semiconductor materials, IGZO (InGaZnO)-based oxide semiconductor materials, IGZTO (InGaZnSnO)-based oxide semiconductor materials, GZTO (GaZnSnO)-based oxide semiconductor materials, GZO (GaZnO)-based oxide semiconductor materials, ITZO (InSnZnO)-based oxide semiconductor materials, and FIZO (FeInZnO)-based oxide semiconductor materials. However, one embodiment of the present invention is not limited thereto, and the active layer (130) may be made of other oxide semiconductor materials known in the art.

[0073] The first connection portion (130a2) and the second connection portion (130b2) can be formed by selectively conductiveizing the active layer (130) made of semiconductor material. According to one embodiment of the invention, selective conductiveizing means imparting conductivity to a specific portion of the active layer (130) so that it can be used as a conductor. The portion imparting conductivity through selective conductiveizing is conductive, while the portion not imparting conductivity is not conductive.

[0074] According to one embodiment of the present invention, selective conductor formation can be achieved by doping with a dopant or by dry etching.

[0075] For example, selective conductor formation of the active layer (130) can be achieved by doping with a dopant using a gate electrode (150), a metal layer, or a photoresist (or photoresist) pattern as a mask. According to one embodiment of the invention, implanting a dopant or dopant ions into a selected region of the active layer (130) is referred to as dopant doping. The dopant may, for example, include at least one of boron (B), phosphorus (P), fluorine (F), and hydrogen (H).

[0076] In the case of selective conductor formation of the active layer (130) by doping with a dopant, the doped regions of the active layer (130) are selectively conductord and become either the first connection portion (130a2) or the second connection portion (130b2). The undoped regions of the active layer (130) are not conductord and can become the channel portion (130n) (see...). Figure 3 ).

[0077] Furthermore, selective conductor formation of the active layer (130) can be achieved through dry etching applied during the patterning of the gate insulating film (140). For example, during the dry etching of the gate insulating film (140), the portion of the active layer (130) exposed by the dry etching can be selectively conductor-formed and can become a first connection portion (130a2) or a second connection portion (130b2). The portion of the active layer (130) protected by the gate insulating film (140) can be left unconducted and can become a channel portion (130n) (see [link]). Figure 2 ).

[0078] However, one embodiment of the present invention is not limited thereto, and the active layer (130) can be selectively conductord by other methods known in the art.

[0079] The first connection portion (130a2) and the second connection portion (130b2) do not overlap with the gate electrode (150). Compared with the channel portion (130n), the first connection portion (130a2) and the second connection portion (130b2) have excellent conductivity and high mobility. Therefore, the first connection portion (130a2) and the second connection portion (130b2) can each be used as wiring.

[0080] According to one embodiment of the present invention, a portion of the first hydrogen conductive portion (130a1) and a portion of the second hydrogen conductive portion (130b1) are formed by conductiveing ​​with hydrogen (H).

[0081] For example, the first hydrogen conductive portion (130a1) is formed by conductiveing ​​with hydrogen (H), and the second hydrogen conductive portion (130b1) is formed by conductiveing ​​with hydrogen (H).

[0082] In order to form the first hydrogen conductive portion (130a1) and the second hydrogen conductive portion (130b1) by using hydrogen to conduct electricity, a hydrogen supply film (145) including hydrogen-containing silicon nitride (SiNx:H) can be formed on the active layer (130).

[0083] Specifically, when a hydrogen supply film (145) comprising hydrogen-containing silicon nitride (SiNx:H) is formed on the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1), the conductivity can be increased by using hydrogen supplied to the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1) to make the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1) conductive.

[0084] According to one embodiment of the present invention, the surface resistivity of the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1) are 5 × 10⁻⁶ respectively.3 Up to 15×10 3 Ω / □ (i.e., ohms / square or Ω / m) 2 According to one embodiment of the present invention, the surface resistivity of the first connecting portion (130a2) and the second connecting portion (130b2) is 2 × 10⁻⁶. 3 Up to 5×10 3 Ω / □.

[0085] According to one embodiment of the present invention, the active layer (130) may have a multi-layer structure. For example, although not shown in the figures, the active layer (130) may include a first active layer and a second active layer.

[0086] The first active layer and the second active layer may contain the same semiconductor material, or they may contain different semiconductor materials.

[0087] According to one embodiment of the present invention, a thin-film transistor (e.g., as...) Figure 2 The thin-film transistor 100 shown or as Figure 3 The thin-film transistor 200 shown may also include a gate insulating film (140) located between the active layer (130) and the gate electrode (150). Specifically, the gate insulating film (140) may cover the entire upper surface of the active layer (130). Figure 3 The configuration in which the gate insulating film (140) covers the entire upper surface of the active layer (130) is shown.

[0088] However, one embodiment of the invention is not limited thereto, and the gate insulating film (140) may expose a portion of the active layer (130). Figure 2 A view showing a portion of the gate insulating film (140) exposing the active layer (130) is shown. Specifically, Figure 2 A view showing a first connection portion (130a2) and a second connection portion (130b2) of the gate insulating film (140) exposing the active layer (130).

[0089] The gate insulating film (140) may include at least one of silicon oxide, silicon nitride, and metal oxide. The gate insulating film (140) may have a single-film structure or a multilayer film structure. The gate insulating film (140) protects the channel portion (130n).

[0090] refer to Figure 1 and Figure 2 The gate electrode (150) is disposed on the gate insulating film (140). The gate electrode (150) overlaps with the channel portion (130n) of the active layer (130).

[0091] The gate electrode (150) is made of an aluminum-based metal such as aluminum (Al) or an aluminum alloy, a silver-based metal such as silver (Ag) or a silver alloy, a copper-based metal such as copper (Cu) or a copper alloy, a molybdenum-based metal such as molybdenum (Mo) or a molybdenum alloy, chromium (Cr), tantalum (Ta), neodymium (Nd), or titanium (Ti). The gate electrode (150) may have a multilayer film structure comprising at least two conductive films with different physical properties.

[0092] According to one embodiment of the present invention, the thin-film transistor (100) further includes a hydrogen supply membrane (145) located on the gate insulating film (140).

[0093] According to one embodiment of the present invention, the hydrogen supply membrane (145) comprises a silicon nitride membrane (SiNx). Specifically, the hydrogen supply membrane (145) may comprise hydrogen-containing silicon nitride (SiNx:H).

[0094] The hydrogen supply membrane (145) comprises hydrogen-containing silicon nitride (SiNx:H) to supply hydrogen (H) to a first hydrogen-conducting portion (130a1) and a second hydrogen-conducting portion (130b1) of the active layer (130), thereby making the first hydrogen-conducting portion (130a1) and the second hydrogen-conducting portion (130b1) conductive. As a result, the conductivity of the first hydrogen-conducting portion (130a1) and the second hydrogen-conducting portion (130b1) can be increased.

[0095] According to one embodiment of the present invention, the hydrogen supply film (145) does not overlap with the gate electrode (150) in a plan view. Specifically, the hydrogen supply film (145) may not overlap with the channel portion (130n), the first connection portion (130a2), and the second connection portion (130b2). More specifically, the hydrogen supply film (145) may overlap with a portion of the first hydrogen conduction portion (130a1) and a portion of the second hydrogen conduction portion (130b1). For example, the hydrogen supply film (145) may be disposed between the gate insulating film (140) and the source electrode (161), and may also be disposed between the gate insulating film (140) and the drain electrode (162).

[0096] As a result, hydrogen conductor formation by means of the hydrogen supply membrane (145) can be carried out in the first hydrogen conduction portion (130a1) and the second hydrogen conduction portion (130b1) of the active layer (130), and hydrogen conductor formation by means of the hydrogen supply membrane (145) can be carried out outside the channel portion (130n), the first connection portion (130a2) and the second connection portion (130b2).

[0097] refer to Figure 1 and Figure 2 The source electrode (161) and the drain electrode (162) are disposed on the hydrogen supply membrane (145).

[0098] The source electrode (161) and drain electrode (162) have the same material as the gate electrode (150) and can be manufactured by the same process.

[0099] The source electrode (161) and drain electrode (162) may each comprise at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti). The source electrode (161) and drain electrode (162) may each have a multilayer film structure comprising at least two conductive films with different physical properties.

[0100] refer to Figure 1 and Figure 2 The source electrode (161) and the drain electrode (162) are connected to the first conductive portion (130a) and the second conductive portion (130b) through the first contact hole (CNT1) and the second contact hole (CNT2), respectively. Specifically, the source electrode (161) and the drain electrode (162) are in contact with the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1), respectively, and are connected to the active layer (130).

[0101] When the buffer layer (120), the gate insulating film (140) and the hydrogen supply film (145) are etched so that the third contact hole (CNT3) can be connected to the light-shielding layer (111), the first contact hole (CNT1) and the second contact hole (CNT2) can penetrate the active layer (130).

[0102] According to one embodiment of the present invention, the first contact hole (CNT1) may penetrate a portion of the first conductive portion (130a) and contact the buffer layer (120).

[0103] Specifically, when the first contact hole (CNT1) is formed, a portion of the buffer layer (120) can be etched. For example, a portion of the first contact hole (CNT1) can be surrounded by the buffer layer (120).

[0104] According to one embodiment of the present invention, the second contact hole (CNT2) penetrates a portion of the second conductive portion (130b) and contacts the buffer layer (120).

[0105] Specifically, when the second contact hole (CNT2) is formed, a portion of the buffer layer (120) can be etched. For example, a portion of the second contact hole (CNT2) can be surrounded by the buffer layer (120).

[0106] refer to Figure 1 and Figure 2The source electrode (161) can be connected to the light-shielding layer (111) through the third contact hole (CNT3).

[0107] The first contact hole (CNT1), the second contact hole (CNT2), and the third contact hole (CNT3) can be formed using the same process. Furthermore, the first contact hole (CNT1), the second contact hole (CNT2), and the third contact hole (CNT3) can penetrate the gate insulating film (140) and the hydrogen supply film (145) to contact the active layer (130) and the light-shielding layer (111), respectively.

[0108] Figure 3 This is a cross-sectional view of a thin-film transistor (200) according to another embodiment of the present invention.

[0109] and Figure 1 and Figure 2 Compared to the thin-film transistor (100) shown, Figure 3 The thin-film transistor (200) shown has a gate insulating film (140) covering the entire upper surface of the active layer (130).

[0110] At this point, selective conductor formation is achieved by doping the active layer (130) with a dopant. The doped regions of the active layer (130) are selectively conductor-formed and become either a first connection portion (130a2) or a second connection portion (130b2). The undoped regions of the active layer (130) are not conductor-formed and can become channel portions (130n).

[0111] Figure 4 This is a cross-sectional view of a thin-film transistor (300) according to another embodiment of the present invention.

[0112] According to one embodiment of the present invention, the first contact hole (CNT1) contacts the first groove (CA1) formed in the first conductive portion (130a1), and the first contact hole (CNT1) may not contact the buffer layer (120).

[0113] According to one embodiment of the present invention, the second contact hole (CNT2) may contact the second groove (CA2) formed in the second conductive portion (130b1), and the second contact hole (CNT2) may not contact the buffer layer (120).

[0114] For example, Figure 4 It is shown that the first contact hole (CNT1) and the second contact hole (CNT2) do not completely penetrate the first conductive portion (130a1) and the second conductive portion (130b1), respectively.

[0115] Figures 5A to 5D This is a process diagram illustrating the manufacturing process of a thin-film transistor according to a comparative example.

[0116] Figures 5A to 5D The thin-film transistor includes a substrate (110a), a buffer layer (120a), an active layer (130a), a gate insulating film (140a), a gate electrode (150a), a source electrode (161a), and a drain electrode (162a).

[0117] The substrate (110a), buffer layer (120a), active layer (130a), gate insulating film (140a), gate electrode (150a), source electrode (161a), and drain electrode (162a) of the thin-film transistor according to the comparative example can be made of the same material as the substrate (110), buffer layer (120), active layer (130), gate insulating film (140), gate electrode (150), source electrode (161), and drain electrode (162) of the thin-film transistor (100, 200) according to an embodiment of the present invention.

[0118] refer to Figure 5A A light-shielding layer (111a), a buffer layer (120a), an active layer (130a), and a gate insulating film (140a) are sequentially formed on a substrate (110a), and the gate insulating film (140a), the active layer (130a), and the buffer layer (120a) are etched to form contact holes (e.g., a first contact hole CNT1a, a second contact hole CNT2a, and a third contact hole CNT3a).

[0119] refer to Figure 5B A gate electrode material layer (150mA) is formed on the gate insulating film (140a).

[0120] refer to Figure 5C The gate electrode material layer (150ma) is patterned to form the gate electrode (150a), source electrode (161a), and drain electrode (162a).

[0121] refer to Figure 5D The gate insulating film (140a) can be etched by dry etching to selectively make the active layer (130a) conductive.

[0122] Reference Figure 5D The thin-film transistor of the comparative example shown can be etched by dry etching of the gate insulating film (140a) and the active layer (130a) so that the source electrode (161a) and the drain electrode (162a) can contact the active layer (130a).

[0123] In addition, to make the active layer (130a) conductive, the gate insulating film (140a) can be etched by dry etching.

[0124] At this point, the source electrode (161a) and the drain electrode (162a) are in contact with the active layer (130a), and the dry etching process is repeated to make the active layer (130a) conductive.

[0125] Specifically, in the region (D) where the source electrode (161a) and drain electrode (162a) contact the active layer (130a), the active layer (130a) may be over-etched, resulting in the problem that almost no active layer (130a) remains in this region.

[0126] Therefore, the loss of the active layer (130a) may lead to an increase in resistance and a decrease in mobility in the active layer (130a).

[0127] Unlike the comparative examples, the thin-film transistors (100, 200) according to an embodiment of the present invention can improve the problem of reduced mobility of the active layer (130) by reducing the area of ​​the active layer (130) exposed by dry etching.

[0128] In addition, by supplying hydrogen to the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1) of the active layer (130) through the hydrogen supply membrane (145), the problem of reduced mobility can be improved by making the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1) conductive.

[0129] Figures 6A to 6H A process diagram illustrating the manufacturing process of a thin-film transistor according to an embodiment of the present invention is provided.

[0130] Figures 6A to 6H The cross-sectional view of the thin-film transistor shown corresponds to Figure 2 A cross-sectional view of the thin-film transistor (100) shown.

[0131] A method for manufacturing a thin-film transistor according to an embodiment of the present invention includes the following steps: forming a buffer layer (120); forming an active layer (130) on the buffer layer (120); forming a gate insulating film (140) on the active layer (130); forming a hydrogen supply material layer (145m) on the gate insulating film (140); and etching the buffer layer (120), the gate insulating film (140), and the hydrogen supply material layer (145m) to form a first contact hole (CNT1) and a second contact hole. (CNT2) and third contact hole (CNT3); etch hydrogen supply material layer (145m) to form fourth contact hole (CNT4) and hydrogen supply film (145); form gate electrode material layer (150m) on hydrogen supply film (145); etch gate electrode material layer (150m) to form gate electrode (150), source electrode (161) and drain electrode; and etch a portion of gate insulating film (140) to selectively conductor a portion of active layer (130).

[0132] refer to Figure 6A A light-shielding layer (111), a buffer layer (120), and an active layer (130) are sequentially formed on a substrate (110).

[0133] refer to Figure 6B A gate insulating film (140) is formed on the buffer layer (120) and the active layer (130). The gate insulating film (140) may cover the entire upper surface of the active layer (130).

[0134] refer to Figure 6C A hydrogen supply material layer (145m) is formed on the gate insulating film (140). The hydrogen supply material layer (145m) can cover the entire upper surface of the gate insulating film (140).

[0135] According to one embodiment of the present invention, the hydrogen supply material layer (145m) may include silicon nitride (SiNx). Specifically, the hydrogen supply material layer (145m) may include hydrogen-containing silicon nitride (SiNx:H).

[0136] refer to Figure 6D The buffer layer (120), the gate insulating film (140), and the hydrogen supply material layer (145m) can be etched to form the first contact hole (CNT1), the second contact hole (CNT2), and the third contact hole (CNT3).

[0137] The first contact hole (CNT1), the second contact hole (CNT2), and the third contact hole (CNT3) are connected to the active layer (130) and the light-shielding layer (111), respectively. Furthermore, when the buffer layer (120), the gate insulating film (140), and the hydrogen supply material layer (145m) are etched to allow the third contact hole (CNT3) to connect to the light-shielding layer (111), the first contact hole (CNT1) and the second contact hole (CNT2) can penetrate the active layer (130).

[0138] refer to Figure 6E The hydrogen supply material layer (145m) can be etched to form the fourth contact hole (CNT4) and the hydrogen supply film (145).

[0139] Figure 6E It is shown that a portion of the gate insulating film (140) is etched while the hydrogen supply material layer (145m) is being etched, but the invention is not limited thereto, and the gate insulating film (140) may not be etched.

[0140] refer to Figure 6F A gate electrode material layer (150m) can be formed on the hydrogen supply membrane (145).

[0141] The gate electrode material layer (150m) may include at least one of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, copper-based metals such as copper (Cu) or copper alloys, molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), neodymium (Nd), and titanium (Ti).

[0142] The gate electrode material layer (150m) can cover the entire upper surface of the hydrogen supply membrane (145) and the entire upper surface of the exposed gate insulating film (140).

[0143] refer to Figure 6G The gate electrode material layer (150m) can be etched to form the gate electrode (150), source electrode (161) and drain electrode (162).

[0144] At this point, the step of etching the gate electrode material layer (150m) to form the gate electrode (150), source electrode (161), and drain electrode (162) may include the step of patterning the gate electrode material layer (150m) using a halftone mask (not shown).

[0145] refer to Figure 6H A portion of the gate insulating film (140) can be etched to selectively make a portion of the active layer (130) conductive.

[0146] The first connection portion (130a2) and the second connection portion (130b2) of the active layer (130) can each be formed by selectively conductiveizing the active layer (130).

[0147] although Figure 6H The illustration shows a portion of the gate insulating film (140) being etched to selectively conductor a portion of the active layer (130), but the invention is not limited thereto. Selective conductor formation of the active layer (130) can also be achieved by doping with a dopant.

[0148] In addition, the first hydrogen conductive portion (130a1) and the second hydrogen conductive portion (130b1) of the active layer (130) can be conductive by hydrogen supplied from a hydrogen supply film (145) comprising hydrogen-containing silicon nitride (SiNx:H).

[0149] According to one embodiment of the present invention, the surface resistivity of the first hydrogen conducting portion (130a1) and the second hydrogen conducting portion (130b1) are 5 × 10⁻⁶ respectively. 3 Up to 15×10 3 Ω / □. The surface resistance of the first connecting part (130a2) and the second connecting part (130b2) is 2×10 Ω / □. 3 Up to 5×10 3 Ω / □.

[0150] Figure 7 A schematic diagram illustrating a display device 1000 according to another embodiment of the present disclosure.

[0151] like Figure 7 As shown, a display device 1000 according to another embodiment of the present disclosure may include a display panel 310, a gate driver 320, a data driver 330, and a controller 340.

[0152] The display panel 310 includes gate lines GL and data lines DL, and a pixel P is disposed in the intersection area of ​​the gate lines GL and data lines DL. An image is displayed by driving the pixel P. The gate lines GL, data lines DL, and pixel P can be disposed on the substrate 110.

[0153] The controller 340 controls the gate driver 320 and the data driver 330.

[0154] The controller 340 outputs a gate control signal GCS for controlling the gate driver 320 and a data control signal DCS for controlling the data driver 330 using signals supplied from an external system (not shown). Furthermore, the controller 340 samples input image data from the external system, re-registers the sampled data, and supplies the re-registered digital image data (RGB) to the data driver 330.

[0155] The gate control signal GCS includes the gate start pulse GSP, the gate shift clock GSC, the gate output enable signal GOE, the start signal Vst, and the gate clock GCLK. Furthermore, control signals for controlling the shift register can be included in the gate control signal GCS.

[0156] The data control signal DCS includes the source start pulse SSP, the source shift clock signal SSC, the source output enable signal SOE, and the polarity control signal POL.

[0157] The data driver 330 supplies data voltage to the data line DL of the display panel 310. Specifically, the data driver 330 converts the image data RGB input from the controller 340 into analog data voltage and supplies the data voltage to the data line DL.

[0158] According to one embodiment of this disclosure, the gate driver 320 can be packaged on the display panel 310. In this way, the structure in which the gate driver 320 is directly packaged on the display panel 310 is referred to as a gate-in-panel (GIP) structure. More specifically, in the gate-in-panel (GIP) structure, the gate driver 320 can be disposed on the substrate 110.

[0159] A display device 1000 according to one embodiment of the present disclosure may include the thin-film transistor 100 described above. According to one embodiment of the present disclosure, a gate driver 320 may include the thin-film transistor 100 described above.

[0160] Gate driver 320 may include shift register 350.

[0161] The shift register 350 sequentially supplies gate pulses to the gate line GL for one frame using a start signal and a gate clock sent from the controller 340. In this case, one frame means a period of time during which an image is output through the display panel 310. The gate pulses have an on-state voltage capable of turning on the switching device (thin-film transistor) located in the pixel P.

[0162] In addition, shift register 350 supplies a gate turn-off signal capable of turning off the switching device to gate line GL for another time period within a frame, during which no gate pulse is supplied. Hereinafter, the gate pulse and the gate turn-off signal will be collectively referred to as the scan signal SS or Scan.

[0163] The shift register 350 may include the thin-film transistor 100 described above.

[0164] Figure 8 To show Figure 7 The circuit diagram of any pixel P.

[0165] Figure 8 The circuit diagram is an equivalent circuit diagram of the pixel P of the display device 1000, which includes an organic light-emitting diode (OLED) as a display element 710.

[0166] refer to Figure 8 Pixel P includes a display element 710 and a pixel driving circuit PDC for driving the display element 710. More specifically, a display device 1000 according to an embodiment of this disclosure may include a pixel driving circuit PDC located on a substrate 110.

[0167] Figure 8 The pixel driving circuit PDC includes a first thin-film transistor TR1 as a switching transistor and a second thin-film transistor TR2 as a driving transistor. A display device 1000 according to another embodiment of this disclosure may include at least one of the aforementioned thin-film transistors 100.

[0168] The first thin-film transistor TR1 is connected to the gate line GL and the data line DL, and is turned on or off by the scan signal SS supplied through the gate line GL.

[0169] The data line DL provides the data voltage Vdata to the pixel driving circuit PDC, and the first thin-film transistor TR1 controls the application of the data voltage Vdata.

[0170] The driving power line PL provides a driving voltage Vdd to the display element 710, and the first thin-film transistor TR1 controls the driving voltage Vdd. The driving voltage Vdd is the pixel driving voltage used to drive the organic light-emitting diode (OLED) that serves as the display element 710.

[0171] When the first thin-film transistor TR1 is turned on by the scan signal SS applied from the gate driver 320 via the gate line GL, the data voltage Vdata supplied via the data line DL is supplied to the gate electrode of the second thin-film transistor TR2 connected to the display element 710. The data voltage Vdata is charged into the storage capacitor C1 formed between the gate electrode and the source electrode of the second thin-film transistor TR2.

[0172] The amount of current supplied to the organic light-emitting diode (OLED) that serves as the display element 710 through the second thin-film transistor TR2 is controlled according to the data voltage Vdata, thereby controlling the grayscale of the light output from the display element 710.

[0173] According to another embodiment of the present invention, the pixel driving circuit (PDC) can be formed in various structures different from those described above. The pixel driving circuit (PDC) may, for example, include three or more thin-film transistors.

[0174] The following advantages can be obtained according to this disclosure.

[0175] According to one embodiment of the present invention, a thin-film transistor can prevent loss of the active layer by reducing the area exposed by dry etching.

[0176] According to one embodiment of the present invention, the thin-film transistor can improve the problem of reduced mobility by using hydrogen as a conductor.

[0177] In addition to the effects described above, other features and advantages of the present invention are described below, or may be clearly understood by those skilled in the art from these descriptions and explanations.

[0178] It will be apparent to those skilled in the art that this disclosure is not limited to the above embodiments and drawings, and that various substitutions, modifications, and variations can be made in this disclosure without departing from the spirit or scope thereof. Therefore, the scope of this disclosure is defined by the appended claims, and all variations or modifications derived from the meaning, scope, and equivalent concepts of the claims should fall within the scope of this disclosure.

Claims

1. A thin film transistor comprising: an active layer; and a gate electrode overlapping the active layer, wherein the active layer includes: a channel portion; a first conductive portion provided on one side of the channel portion; and a second conductive portion provided on the other side of the channel portion, wherein the first conductive portion includes: a first hydrogen-conductive portion; and a first connecting portion provided between the first hydrogen-conductive portion and the channel portion, wherein the second conductive portion includes: a second hydrogen-conductive portion; and a second connecting portion provided between the second hydrogen-conductive portion and the channel portion, wherein a surface resistance of the first hydrogen-conductive portion is greater than a surface resistance of the first connecting portion, and wherein a surface resistance of the second hydrogen-conductive portion is greater than a surface resistance of the second connecting portion.

2. The thin film transistor according to claim 1, further comprising a gate insulating film provided on the active layer, wherein, the gate insulating film exposing the first connecting portion and the second connecting portion.

3. The thin film transistor according to claim 1, further comprising a gate insulating film provided on the active layer, wherein the gate insulating film covering an entire upper surface of the active layer.

4. The thin film transistor according to claim 1, wherein, The surface resistances of the first hydrogen conducting portion and the second hydrogen conducting portion are each 5 x 10 3 to 15 x 10 3 Ω / □, and wherein the surface resistances of the first connection portion and the second connection portion are each 2 x 10 3 to 5 x 10 3 Ω / □.

5. The thin film transistor according to claim 1, further comprising a source electrode and a drain electrode spaced apart from each other and connected to the active layer, respectively, wherein the source electrode connected to the first conductive portion through a first contact hole, and the drain electrode connected to the second conductive portion through a second contact hole.

6. The thin film transistor according to claim 5, further comprising a base substrate and a buffer layer provided between the base substrate and the active layer, wherein the first contact hole penetrating the first conductive portion and contacting the buffer layer, and a portion of the first contact hole surrounded by the buffer layer, and wherein the second contact hole penetrating the second conductive portion and contacting the buffer layer, and a portion of the second contact hole surrounded by the buffer layer.

7. The thin film transistor according to claim 5, further comprising a base substrate and a buffer layer provided between the base substrate and the active layer, wherein, the first contact hole contacting a recess formed in the first conductive portion, and the first contact hole not contacting the buffer layer, wherein the second contact hole contacts a recess formed in the second conductive portion, and the second contact hole not contacting the buffer layer.

8. The thin film transistor according to claim 1, further comprising: a gate insulating film provided on the active layer; a hydrogen supply film provided on the gate insulating film; and a source electrode and a drain electrode spaced apart from each other and connected to the active layer, respectively, wherein the hydrogen supply film is provided between the gate insulating film and the source electrode, and between the gate insulating film and the drain electrode. the hydrogen supply film includes silicon nitride (SiNx).

9. The thin film transistor according to claim 8, wherein, the hydrogen supply film does not overlap the gate electrode.

10. The thin film transistor according to claim 8, wherein, the hydrogen supply film does not overlap the first connecting portion and the second connecting portion, and 11. The thin film transistor according to claim 8, wherein, the hydrogen supply film does not overlap the first connecting portion and the second connecting portion, and The hydrogen supply film overlaps at least a portion of the first hydrogen-conducting portion and at least a portion of the second hydrogen-conducting portion.

12. The thin film transistor according to claim 5, wherein, The gate electrode, the source electrode, and the drain electrode are formed using the same material.

13. A method for manufacturing a thin film transistor, comprising the steps of: forming a buffer layer; forming an active layer over the buffer layer; forming a gate insulating film over the active layer; forming a hydrogen supply material layer over the gate insulating film; etching the buffer layer, the gate insulating film, and the hydrogen supply material layer to form a first contact hole, a second contact hole, and a third contact hole; etching the hydrogen supply material layer to form a fourth contact hole and a hydrogen supply film; forming a gate electrode material layer over the hydrogen supply film; etching the gate electrode material layer to form a gate electrode, a source electrode, and a drain electrode; and etching a portion of the gate insulating film to selectively conductorize a portion of the active layer.

14. The method for manufacturing a thin film transistor according to claim 13, wherein The active layer is formed to include: a channel portion; a first conductive portion provided on one side of the channel portion; and a second conductive portion provided on the other side of the channel portion, wherein the first conductive portion includes: a first hydrogen-conducting portion; and a first connection portion provided between the first hydrogen-conducting portion and the channel portion, wherein the second conductive portion includes: a second hydrogen-conducting portion; and a second connection portion provided between the second hydrogen-conducting portion and the channel portion, wherein a surface resistance of the first hydrogen-conducting portion is greater than a surface resistance of the first connection portion, and wherein a surface resistance of the second hydrogen-conducting portion is greater than a surface resistance of the second connection portion.

15. The method for manufacturing a thin film transistor according to claim 14, wherein The surface resistances of the first hydrogen conducting portion and the second hydrogen conducting portion are each set to 5 x 10 3 Ω / □, and 3 15 x 10 Ω / □. wherein the surface resistances of the first connecting portion and the second connecting portion are each set to 2 x 10 3 to 5 x 10 3 Ω / □.

16. The method for manufacturing a thin film transistor according to claim 13, wherein The step of etching the gate electrode material layer to form a gate electrode, a source electrode, and a drain electrode includes a step of patterning the gate electrode material layer using a half-tone mask.

17. A display device comprising the thin film transistor according to any one of claims 1 to 12.

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