CT detector packaging method and structure

Abstract

The invention provides a CT detector packaging method and structure, and the method comprises the steps: setting a positioning reference mark on a PCB, taking the positioning reference mark as an alignment basis all the time in a packaging process, sequentially completing the fitting of a chip, a high-energy scintillator and a low-energy scintillator, and the assembly of the chip, the high-energy scintillator and the low-energy scintillator with a CT detector structural member, and improving the packaging efficiency. According to the invention, accurate alignment of each part in the whole packaging process is ensured, the fitting success rate, the assembly efficiency and the overall position consistency when multiple chips are cascaded are remarkably improved, and the problem of poor fitting position precision caused by non-uniform positioning reference in the prior art is effectively solved. Meanwhile, according to the method, the complex operation of a traditional customized positioning jig is simplified, error accumulation caused by insufficient machining precision of the jig and increase of the number of rows and position deviation caused by inconsistent positioning reference are reduced, and therefore the production efficiency is remarkably improved, and the production cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to a CT detector packaging method and structure. Background Technology

[0002] In industrial CT applications, the detector module is a key component for achieving high-precision imaging. Due to the diverse materials of the objects being detected, ranging from low-density plastics and ceramics to high-density metals, the detector module must employ a combination of high- and low-energy scintillators to cope with complex operating conditions. Common implementation methods for high- and low-energy scintillators include alternating front-and-back arrangements and single-sided horizontal alternating arrangements.

[0003] Scintillator packaging refers to the process of bonding a scintillator to a photodiode (PD) chip using optical adhesive. This packaging process requires high precision in the bonding of the scintillator. Currently, customized positioning fixtures are mainly used to achieve scintillator bonding. However, in actual operation, the machining accuracy of the positioning fixture affects the bonding accuracy. The more rows of detectors there are, the longer the fixture becomes, and the worse the machining accuracy. Furthermore, the positioning reference for PD chip bonding differs from the positioning reference of the scintillator bonding fixture, resulting in a large positional deviation between the chip and the scintillator. Moreover, the dimensional errors of the scintillator material itself require that the design tolerance of the positioning fixture not be too small; otherwise, the scintillator material may not be able to fit into the fixture. This method of using limiting fixtures also leads to low production efficiency. Summary of the Invention

[0004] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a CT detector packaging method and structure to solve the problems of poor positioning accuracy and low production efficiency in the prior art.

[0005] To achieve the above and other related objectives, the present invention provides a CT detector packaging method, the packaging method comprising:

[0006] S1, a PCB board is provided, the PCB board having opposing first and second sides, and positioning reference marks are provided on the PCB board;

[0007] S2, based on the positioning reference mark, several chips are attached to the first and / or second surface of the PCB board;

[0008] S3, based on the positioning reference mark, attach the required number of high-energy scintillators and number of low-energy scintillators to all the chips respectively;

[0009] S4. Based on the positioning reference mark, the PCB board with the chip, the high-energy scintillator and the low-energy scintillator attached is attached to the CT detector structure.

[0010] Optionally, in step S2, based on the positioning reference mark, a plurality of the chips are attached to the first or second surface of the PCB board;

[0011] In step S3, the method of attaching the required number of high-energy scintillators and the required number of low-energy scintillators to all the chips based on the positioning reference marks includes:

[0012] S31, the PCB board with the chip attached facing upwards is placed on the scintillator mounting track, and UV lamps are provided on both sides of the scintillator mounting track;

[0013] S32, a first UV-thermosetting optical adhesive is coated on the chip surface to which the high-energy scintillator is to be bonded;

[0014] S33, based on the positioning reference mark, the high-energy scintillators arranged at intervals are attached to the chip coated with the first UV-thermosetting optical adhesive;

[0015] S34, the first UV-thermosetting optical adhesive is pre-cured using the UV lamp;

[0016] S35, a second UV-thermosetting optical adhesive is coated on the chip surface to which the low-energy scintillator is to be bonded;

[0017] S36, based on the positioning reference mark, the low-energy scintillators arranged at intervals are bonded to the chip coated with the second UV-thermosetting optical adhesive, and the low-energy scintillators and the high-energy scintillators are arranged alternately.

[0018] S37, the second UV-thermosetting optical adhesive is pre-cured using the UV lamp;

[0019] S38, heating is performed to completely cure the first UV-thermosetting optical adhesive and the second UV-thermosetting optical adhesive.

[0020] Optionally, in step S2, based on the positioning reference mark, a plurality of the chips are attached to the first or second surface of the PCB board;

[0021] In step S3, the method of attaching the required number of high-energy scintillators and the required number of low-energy scintillators to all the chips based on the positioning reference marks includes:

[0022] S31, the PCB board with the chip attached facing upwards is placed on the scintillator mounting track, and UV lamps are provided on both sides of the scintillator mounting track;

[0023] S32, a first UV-thermosetting optical adhesive is coated on the chip surface to which the high-energy scintillator is to be bonded;

[0024] S33, based on the positioning reference mark, the high-energy scintillators arranged at intervals are attached to the chip coated with the first UV-thermosetting optical adhesive;

[0025] S34, the first UV-thermosetting optical adhesive is pre-cured using the UV lamp;

[0026] S35, a second UV-thermosetting optical adhesive is coated on the chip surface to which the low-energy scintillator is to be bonded;

[0027] S36, a suction nozzle is used to pick up one of the low-energy scintillators, and the low-energy scintillator is moved above the chip coated with the second UV-thermosetting optical adhesive based on the positioning reference mark;

[0028] S37, the low-energy scintillator is pressed down by the nozzle, and the second UV-thermosetting optical adhesive is pre-cured by the UV light source integrated into the nozzle until the low-energy scintillator is attached to the chip;

[0029] S38, Repeat steps S36 and S37 until all the low-energy scintillators are attached, with the low-energy scintillators and high-energy scintillators arranged alternately;

[0030] S39, heating to completely cure the first UV-thermosetting optical adhesive and the second UV-thermosetting optical adhesive.

[0031] Optionally, in step S2, based on the positioning reference mark, a plurality of the chips are attached to the first and second surfaces of the PCB board;

[0032] In step S3, the method of attaching the required number of high-energy scintillators and the required number of low-energy scintillators to all the chips based on the positioning reference marks includes:

[0033] S31, the PCB board is placed with its first side facing up on the scintillator bonding track, and UV lamps are provided on both sides of the scintillator bonding track;

[0034] S32, a first UV-thermosetting optical adhesive is coated on the surface of the chip on the first side of the PCB board;

[0035] S33, based on the positioning reference mark, attach the high-energy scintillator to the chip coated with the first UV-thermosetting optical adhesive;

[0036] S34, the first UV-thermosetting optical adhesive is pre-cured using the UV lamp;

[0037] S35, flip the PCB board so that the second side faces up and place it on the scintillator fitting track;

[0038] S36, a second UV-thermosetting optical adhesive is coated on the chip surface on the second side of the PCB board;

[0039] S37, Based on the positioning reference mark, the low-energy scintillator is attached to the chip coated with the second UV-thermosetting optical adhesive;

[0040] S38, the second UV-thermosetting optical adhesive is pre-cured using the UV lamp;

[0041] S39, heating to completely cure the first UV-thermosetting optical adhesive and the second UV-thermosetting optical adhesive.

[0042] Optionally, in step S2, based on the positioning reference mark, a plurality of the chips are attached to the first and second surfaces of the PCB board;

[0043] In step S3, the method of attaching the required number of high-energy scintillators and the required number of low-energy scintillators to all the chips based on the positioning reference marks includes:

[0044] S31, the PCB board is placed with its first side facing up on the scintillator bonding track, and UV lamps are provided on both sides of the scintillator bonding track;

[0045] S32, a first UV-thermosetting optical adhesive is coated on the surface of the chip on the first side of the PCB board;

[0046] S33, based on the positioning reference mark, attach the high-energy scintillator to the chip coated with the first UV-thermosetting optical adhesive;

[0047] S34, the first UV-thermosetting optical adhesive is pre-cured using the UV lamp;

[0048] S35, flip the PCB board so that the second side is facing up and place it on the scintillator fitting track;

[0049] S36, a second UV-thermosetting optical adhesive is coated on the chip surface on the second side of the PCB board;

[0050] S37, a suction nozzle is used to pick up one of the low-energy scintillators, and the low-energy scintillator is moved above the chip coated with the second UV-thermosetting optical adhesive based on the positioning reference mark;

[0051] S38, the low-energy scintillator is pressed down by the nozzle, and the second UV-thermosetting optical adhesive is pre-cured by a UV light source integrated into the nozzle until the low-energy scintillator is attached to the chip;

[0052] S39, Repeat steps S37 and S38 until all the low-energy scintillators are bonded together;

[0053] S40, heating is performed to completely cure the first UV-thermosetting optical adhesive and the second UV-thermosetting optical adhesive.

[0054] Furthermore, in step S3, before attaching the high-energy scintillator to the chip, a step of calibrating the position coordinates of the high-energy scintillator using a bottom camera is also included.

[0055] Optionally, the positioning reference marks include a circular fine positioning mark located at the center of the PCB board and an elliptical coarse positioning mark located at the edge of the PCB board.

[0056] Optionally, the positioning reference mark penetrates the copper layer stack or the copper layer and dielectric layer stack of the PCB board, wherein the surface of the copper layer and dielectric layer stack is a copper layer.

[0057] Optionally, the reference point for creating the positioning reference mark is on the same layer as the chip pads of the PCB board.

[0058] The present invention also provides a CT detector packaging structure, which is obtained by packaging using any of the CT detector packaging methods described above.

[0059] As described above, the CT detector packaging method and structure of the present invention have the following beneficial effects: By setting positioning reference marks on the PCB board and using these positioning reference marks as the alignment basis throughout the packaging process, the bonding of the chip, high-energy scintillator, and low-energy scintillator, as well as the assembly with the CT detector structural components, are completed sequentially. This ensures that each component can be accurately aligned throughout the entire packaging process, significantly improving bonding success rate, assembly efficiency, and overall positional consistency when multiple chips are cascaded. It effectively solves the problem of poor bonding position accuracy caused by inconsistent positioning references in the prior art. Simultaneously, this method simplifies the complex operation of traditional customized positioning fixtures, reduces the accumulation of errors caused by insufficient fixture processing precision and increased number of rows, and reduces positional deviations caused by inconsistent positioning references. This significantly improves production efficiency, reduces production costs, and enhances the overall quality and reliability of the product, providing an innovative solution for high-precision and high-efficiency packaging of industrial CT detector modules. Attached Figure Description

[0060] Figure 1 The diagram shown is a flowchart illustrating the CT detector packaging method of the present invention.

[0061] Figure 2 The diagram shows a planar structure of a PCB board with several chips attached according to the present invention.

[0062] Figure 3 The diagram shows a planar structure of the PCB board of the present invention placed on a track for a scintillator with UV lamps on both sides.

[0063] Figure 4 The diagram shows a planar structure of the present invention, which involves coating the chip surface of a high-energy scintillator to be bonded with a first UV-thermosetting optical adhesive.

[0064] Figure 5 The diagram shows a planar structure of high-energy scintillators arranged at intervals on a chip coated with a first UV-thermosetting optical adhesive, according to the present invention.

[0065] Figure 6 The diagram shows a schematic of the crystal structure of a high-energy scintillator as an example of the present invention.

[0066] Figure 7 The diagram shows a planar structure of the present invention, which involves coating a second UV-thermosetting optical adhesive onto the surface of a chip to which a low-energy scintillator is to be bonded.

[0067] Figure 8 The diagram shows a planar structure of the present invention, in which low-energy scintillators are bonded to a chip coated with a second UV-thermosetting optical adhesive and arranged alternately with high-energy scintillators.

[0068] Figure 9 The diagram shows a cross-sectional view of a PCB board with a high-energy scintillator attached to the first side and a low-energy scintillator attached to the second side, as per the present invention.

[0069] Figure 10 The diagram shows a cross-sectional structure of the CT detector packaged with alternating high-energy and low-energy scintillators on one side, as described in this invention.

[0070] Figure 11 The diagram shows a schematic of the CT detector packaging structure of the present invention, which features a single-sided alternating arrangement of high-energy scintillators and low-energy scintillators.

[0071] Component labeling description: 10 PCB board, 11 oval coarse positioning mark, 12 circular fine positioning mark, 13 chip, 14 UV lamp, 15 first UV-thermosetting optical adhesive, 16 high-energy scintillator, 17 second UV-thermosetting optical adhesive, 18 low-energy scintillator, 19 CT detector structural component, 20 scintillator bonding track, steps S1~S4. Detailed Implementation

[0072] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0073] Please see Figures 1 to 11 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0074] This embodiment provides a CT detector packaging method, such as... Figure 1 As shown, the encapsulation method includes:

[0075] S1, a PCB board is provided, the PCB board having opposing first and second sides, and positioning reference marks are provided on the PCB board;

[0076] S2, based on the positioning reference mark, several chips are attached to the first and / or second surface of the PCB board;

[0077] S3, based on the positioning reference mark, attach the required number of high-energy scintillators and number of low-energy scintillators to all the chips respectively;

[0078] S4. Based on the positioning reference mark, the PCB board with the chip, the high-energy scintillator and the low-energy scintillator attached is attached to the CT detector structure.

[0079] The CT detector packaging method of this embodiment sets positioning reference marks on the PCB board and uses these marks as the alignment basis throughout the packaging process. This sequentially completes the bonding of the chip, high-energy scintillator, and low-energy scintillator, as well as the assembly with the CT detector structural components. This ensures precise alignment of each component throughout the packaging process, significantly improving bonding success rate, assembly efficiency, and overall positional consistency when multiple chips are cascaded. It effectively solves the problem of poor bonding position accuracy caused by inconsistent positioning references in existing technologies. Simultaneously, this method simplifies the complex operation of traditional customized positioning fixtures, reduces error accumulation due to insufficient fixture processing precision and increased row count, and minimizes positional deviations caused by inconsistent positioning references. This significantly improves production efficiency, reduces production costs, and enhances the overall quality and reliability of the product, providing an innovative solution for high-precision and high-efficiency packaging of industrial CT detector modules.

[0080] The CT detector packaging method of this embodiment will be described in detail below with reference to the specific accompanying drawings.

[0081] like Figure 2 As shown, step S1 is performed first, providing a PCB board 10, which has a first side and a second side facing each other, and a positioning reference mark on the PCB board 10.

[0082] As an example, the positioning reference marks include a circular fine positioning mark 12 located at the center of the PCB board 10 and an elliptical coarse positioning mark 11 located at the edge of the PCB board 10. The combination of a central circular fine positioning mark and an edge elliptical coarse positioning mark creates a two-level positioning system in the X / Y directions. The circular fine positioning mark 12 provides a fine positioning reference, ensuring that the chip 13, high-energy scintillator 16, low-energy scintillator 18, and CT detector structure 19 always use the same positioning reference during layer-by-layer stacking, fundamentally eliminating the cumulative error caused by reference conversion. The elliptical mark arranged on the edge of the board reserves an elastic gap, allowing for fine-tuning within this range when there are normal tolerance fluctuations in the materials of the PCB board 10, the CT detector structure 19, or the high-energy scintillator 16 and the low-energy scintillator 18. This avoids jamming or inability to fit due to a rigid "double circle" fit, ensuring high-precision alignment while also considering material tolerances and thermal expansion and contraction during mass production. This significantly improves bonding success rate, assembly efficiency, and overall positional consistency when multiple chips are cascaded. The specific position and shape of the positioning reference mark are not limited to this embodiment.

[0083] As a preferred example, the positioning reference mark penetrates the copper layer stack or the copper layer and dielectric layer stack of the PCB board 10, wherein the surface of the copper layer and dielectric layer stack is a copper layer. Making the positioning reference mark into a "copper pillar penetrating each copper layer" or at least the outermost copper layer and dielectric layer stack retaining a copper surface avoids the burrs and fiber streaks left by traditional FR4 mechanical drilling from affecting the visual recognition accuracy of the equipment, resulting in sharp, hazy visual imaging edges. Furthermore, the copper layer and the underlying black solder resist form a high-contrast black and white target surface, allowing the equipment to further achieve rapid and accurate positioning.

[0084] The drilling accuracy of the PCB board 10 supplier is generally difficult to meet high precision requirements. As a preferred example, when performing secondary drilling to form the positioning reference mark, the reference point for making the positioning reference mark is on the same layer as the chip pad of the PCB board 10 to reduce the cumulative alignment deviation between layers and further ensure the positional accuracy of the chip 13, the high-energy scintillator 16, the low-energy scintillator 18 and the CT detector structure 19 when they are stacked layer by layer.

[0085] Next, in step S2, based on the positioning reference marks, a plurality of chips 13 are attached to the first and / or second surfaces of the PCB board 10. It should be noted here that, as... Figure 2 The image shown is only an example of the chip 13 that is attached to the surface.

[0086] Next, in step S3, based on the positioning reference mark, several high-energy scintillators 16 and several low-energy scintillators 18 are attached to all the chips 13 respectively.

[0087] Common implementation methods for high- and low-energy scintillators mainly include two types: arranging the PCB board 10 on both sides and arranging it horizontally alternately on one side. As an example, when the high- and low-energy scintillators are arranged horizontally alternately on one side, in step S2, based on the positioning reference mark, several chips 13 are attached to the first or second side of the PCB board 10. As a further specific example, in step S3, based on the positioning reference mark, the method for attaching several high-energy scintillators 16 and several low-energy scintillators 18 to all the chips 13 respectively includes:

[0088] S31, such as Figure 3 As shown, the PCB board 10 with the chip 13 attached to it is placed on the scintillator mounting track 20 with the side facing upwards. UV lamps 14 are arranged on both sides of the scintillator mounting track 20.

[0089] S32, as Figure 4 As shown, a first UV-thermosetting optical adhesive 15 is coated on the surface of the chip 13 to which the high-energy scintillator 16 is to be bonded. The method of applying the first UV-thermosetting optical adhesive 15 can be selected according to the equipment capabilities and process conditions. For example, it can be applied by air pressure dotting or spraying. The amount of adhesive needs to be controlled according to the viscosity, thixotropic and other properties of the first UV-thermosetting optical adhesive 15. No excessive restrictions are imposed here.

[0090] S33, such as Figure 5 As shown, based on the positioning reference mark, high-energy scintillators 16 arranged at intervals are bonded to the chip 13 coated with the first UV-thermosetting optical adhesive 15. As a preferred example, before bonding the high-energy scintillators 16 to the chip 13, a step of calibrating the position coordinates of the high-energy scintillators 16 using a bottom camera is included. That is, before bonding the high-energy scintillators 16 to the chip 13, the bottom camera is used to photograph and identify the lattice pattern on the bottom surface of the high-energy scintillators 16, directly obtaining the actual coordinates of each lattice unit, and comparing and compensating with the coordinate system of the positioning reference mark in real time, avoiding the cumulative error caused by only identifying the edges.

[0091] S34, the UV lamp 14 is used to pre-cure the first UV-thermosetting optical adhesive 15. Specifically, the UV lamp 14 irradiates the gap between the chip 13 and the high-energy scintillator 16 to pre-cure the first UV-thermosetting optical adhesive 15. After pre-curing, an adhesive force is formed between the high-energy scintillator 16 and the chip 13, and the high-energy scintillator 16 will not shift during track transportation or product handling.

[0092] S35, such as Figure 7 As shown, a second UV-thermosetting optical adhesive 17 is coated on the surface of the chip 13 to which the low-energy scintillator 18 is to be bonded. The method of applying the second UV-thermosetting optical adhesive 17 can be selected according to the equipment capabilities and process conditions. For example, it can be applied by air pressure dotting or spraying. The amount of adhesive needs to be controlled according to the viscosity, thixotropic and other characteristics of the second UV-thermosetting optical adhesive 17, and no excessive restrictions are imposed here.

[0093] S36, such as Figure 8 As shown, based on the positioning reference mark, the low-energy scintillators 18 are bonded to the chip 13 coated with the second UV-thermosetting optical adhesive 17 at intervals, and the low-energy scintillators 18 and the high-energy scintillators 16 are arranged alternately.

[0094] S37, the UV lamp 14 is used to pre-cure the second UV-thermosetting optical adhesive 17. Specifically, the UV lamp 14 irradiates the gap between the chip 13 and the low-energy scintillator 18 to pre-cure the second UV-thermosetting optical adhesive 17. After pre-curing, an adhesive force is formed between the low-energy scintillator 18 and the chip 13, and the low-energy scintillator 18 will not shift during track transportation or product handling.

[0095] S38, heating is performed to completely cure the first UV-thermosetting optical adhesive 15 and the second UV-thermosetting optical adhesive 17. Specifically, the PCB board 10, to which the chip 13, the high-energy scintillator 16, and the low-energy scintillator 18 are attached, can be placed in an oven for heating.

[0096] When the high- and low-energy scintillators are implemented by alternating horizontal arrangements on a single side, as another further specific example, in step S3, the method of attaching the required number of high-energy scintillators 16 and the required number of low-energy scintillators 18 to all the chips 13 based on the positioning reference mark includes:

[0097] S31, such as Figure 3 As shown, the PCB board with the chip attached is placed face up on the scintillator mounting track, and UV lamps 14 are provided on both sides of the scintillator mounting track.

[0098] S32, as Figure 4 As shown, a first UV-thermosetting optical adhesive 15 is coated on the surface of the chip 13 to which the high-energy scintillator 16 is to be bonded.

[0099] S33, such as Figure 5 As shown, based on the positioning reference mark, high-energy scintillators 16 arranged at intervals are bonded to the chip 13 coated with the first UV-thermosetting optical adhesive 15. Similarly, as a preferred example, before bonding the high-energy scintillators 16 to the chip 13, a step of calibrating the position coordinates of the high-energy scintillators 16 using a bottom camera is included. That is, before bonding the high-energy scintillators 16 to the chip 13, the bottom camera is used to photograph and identify the lattice pattern on the bottom surface of the high-energy scintillators 16, directly obtaining the actual coordinates of each lattice unit, and comparing and compensating with the coordinate system of the positioning reference mark in real time, avoiding the cumulative error caused by only identifying the edges.

[0100] S34, the first UV-thermosetting optical adhesive 15 is pre-cured using the UV lamp 14.

[0101] S35, such as Figure 7 As shown, a second UV-thermosetting optical adhesive 17 is coated on the surface of the chip 13 to which the low-energy scintillator 18 is to be bonded.

[0102] S36, a suction nozzle is used to pick up one of the low-energy scintillators 18, and the low-energy scintillator 18 is moved above the chip 13 coated with the second UV-thermosetting optical adhesive 17 based on the positioning reference mark.

[0103] S37, such as Figure 8 As shown, the low-energy scintillator 18 is pressed down by the suction nozzle, while the second UV-thermosetting optical adhesive 17 is pre-cured using a UV light source integrated into the suction nozzle until the low-energy scintillator 18 is bonded to the chip 13. With the help of the UV light source integrated into the suction nozzle, the second UV-thermosetting optical adhesive 17 is pre-cured in situ while the suction nozzle continuously presses down on the low-energy scintillator 18. The downward pressure forces the warped low-energy scintillator 18 into full contact with the surface of the chip 13, uniformly compressing the thickness of the second UV-thermosetting optical adhesive 17 to the design value and maintaining a uniform thickness after compression. This prevents the low-energy scintillator 18 sheet from springing back or recovering from warping. This process completes flattening, thickness determination, and pre-curing in one step, eliminating the uneven thickness of the second UV-thermosetting optical adhesive 17 caused by the original warping of the low-energy scintillator 18, and eliminating the need for an additional pressure holding step, significantly improving bonding accuracy, adhesive layer consistency, and production efficiency.

[0104] S38. Repeat steps S36 and S37 until all the low-energy scintillators 18 are attached, with the low-energy scintillators 18 and the high-energy scintillators 16 arranged alternately.

[0105] S39, heating is performed to completely cure the first UV-thermosetting optical adhesive 15 and the second UV-thermosetting optical adhesive 17.

[0106] When the high- and low-energy scintillators are arranged in a single-sided horizontal alternating pattern, this embodiment adopts the sequence of first bonding the high-energy scintillator 16, then bonding the low-energy scintillator 18. The high-energy scintillator 16 has a large thickness (>1mm) and a lattice structure, which places stringent requirements on the amount of adhesive and flatness. Bonding it first allows for the use of its own rigidity to obtain a stable adhesive layer. Excess adhesive is squeezed out laterally and pre-cured instantly by ultraviolet light. Then, the low-energy scintillator 18, which has a small thickness (<1mm) and no lattice structure, is bonded. At this time, an appropriate amount of adhesive can be added between the strips to cover the hardened excess adhesive area without affecting the bonding of the low-energy scintillator 18. If the sequence is reversed, after bonding the low-energy scintillator 18 first, its thin adhesive on the side is cured by UV to form a rigid protrusion. During the subsequent high-energy sheet lamination, it will tilt, resulting in misalignment between the lattice of the high-energy scintillator 16 and the chip 13 (pixel). Figure 6 The diagram shows a crystal lattice diagram of one of the high-energy scintillators 16. This embodiment uses one high-energy scintillator 16 with 16 crystal lattices as an example for illustration. The number of crystal lattices in one high-energy scintillator 16 is not limited to this embodiment.

[0107] As an example, when the high and low energy scintillators are implemented in a front-and-back arrangement, such as Figure 9 As shown, in step S2, based on the positioning reference mark, a plurality of chips 13 are attached to the first and second surfaces of the PCB board 10; as a further specific example, in step S3, based on the positioning reference mark, the method of attaching a plurality of high-energy scintillators 16 and a plurality of low-energy scintillators 18 to all the chips 13 respectively includes:

[0108] S31, the PCB board 10 is placed with its first side facing up on the scintillator bonding track 20, and UV lamps 14 are provided on both sides of the scintillator bonding track 20.

[0109] S32, a first UV-thermosetting optical adhesive 15 is coated on the surface of the chip 13 on the first side of the PCB board 10.

[0110] S33, based on the positioning reference mark, the high-energy scintillator 16 is attached to the chip 13 coated with the first UV-thermosetting optical adhesive 15. As a preferred example, before attaching the high-energy scintillator 16 to the chip 13, a step of calibrating the position coordinates of the high-energy scintillator 16 using a bottom camera is included. That is, before attaching the high-energy scintillator 16 to the chip 13, the bottom camera is used to photograph and identify the lattice pattern on the bottom surface of the high-energy scintillator 16, directly obtaining the actual coordinates of each lattice unit, and comparing and compensating with the coordinate system of the positioning reference mark in real time, avoiding the cumulative error caused by only identifying the edges.

[0111] S34, the first UV-thermosetting optical adhesive 15 is pre-cured using the UV lamp 14.

[0112] S35, the PCB board 10 is flipped so that the second side is facing up and placed on the scintillator bonding track 20.

[0113] S36, a second UV-thermosetting optical adhesive 17 is coated on the chip surface on the second side of the PCB board 10.

[0114] S37, based on the positioning reference mark, the low-energy scintillator 18 is attached to the chip 13 coated with the second UV-thermosetting optical adhesive 17.

[0115] S38, the second UV-thermosetting optical adhesive 17 is pre-cured using the UV lamp 14.

[0116] S39, heating is performed to completely cure the first UV-thermosetting optical adhesive 15 and the second UV-thermosetting optical adhesive 17.

[0117] As another example, such as Figure 9 As shown, when the high- and low-energy scintillators are arranged in a front-and-back configuration, step S3, based on the positioning reference mark, involves attaching the required number of high-energy scintillators 16 and low-energy scintillators 18 to all the chips 13 respectively, including:

[0118] S31, the PCB board 10 is placed with its first side facing up on the scintillator bonding track 20, and UV lamps 14 are provided on both sides of the scintillator bonding track 20.

[0119] S32, a first UV-thermosetting optical adhesive 15 is coated on the surface of the chip 13 on the first side of the PCB board 10.

[0120] S33, based on the positioning reference mark, the high-energy scintillator 16 is attached to the chip 13 coated with the first UV-thermosetting optical adhesive 15. As a preferred example, before attaching the high-energy scintillator 16 to the chip 13, a step of calibrating the position coordinates of the high-energy scintillator 16 using a bottom camera is included. That is, before attaching the high-energy scintillator 16 to the chip 13, the bottom camera is used to photograph and identify the lattice pattern on the bottom surface of the high-energy scintillator 16, directly obtaining the actual coordinates of each lattice unit, and comparing and compensating with the coordinate system of the positioning reference mark in real time, avoiding the cumulative error caused by only identifying the edges.

[0121] S34, the first UV-thermosetting optical adhesive 15 is pre-cured using the UV lamp 14.

[0122] S35, flip the PCB board 10 so that the second side is facing up and place it on the scintillator bonding track 20.

[0123] S36, a second UV-thermosetting optical adhesive 17 is coated on the surface of the chip 13 on the second side of the PCB board 10.

[0124] S37, a suction nozzle is used to pick up one of the low-energy scintillators 18, and the low-energy scintillator 18 is moved above the chip 13 coated with the second UV-thermosetting optical adhesive 17 based on the positioning reference mark.

[0125] S38, the low-energy scintillator 16 is pressed down by the nozzle, while the second UV-thermosetting optical adhesive 17 is pre-cured using a UV light source integrated into the nozzle until the low-energy scintillator 18 is bonded to the chip 13. With the help of the UV light source integrated into the nozzle, while the nozzle continuously presses down on the low-energy scintillator 18, the second UV-thermosetting optical adhesive 17 is pre-cured in situ. The downward pressure forces the warped low-energy scintillator 18 into full contact with the surface of the chip 13, uniformly compressing the thickness of the second UV-thermosetting optical adhesive 17 to the design value and maintaining a uniform thickness after compression. This prevents the low-energy scintillator 18 from springing back or recovering from warping. This process completes flattening, thickness determination, and pre-curing in one step, eliminating the uneven thickness of the second UV-thermosetting optical adhesive 17 caused by the original warping of the low-energy scintillator 18, and eliminating the need for an additional pressure-holding station, significantly improving bonding accuracy, adhesive layer consistency, and production efficiency.

[0126] S39. Repeat steps S37 and S38 until all the low-energy scintillators 18 are attached.

[0127] S40, heating is performed to completely cure the first UV-thermosetting optical adhesive 15 and the second UV-thermosetting optical adhesive 17.

[0128] When the high-energy and low-energy scintillators are arranged in a front-back configuration, the high-energy scintillator 16 can be attached first and then the low-energy scintillator 18 can be attached, or the low-energy scintillator 18 can be attached first and then the high-energy scintillator 16 can be attached. The attachment order can be adjusted as needed and is not limited to the specific example above.

[0129] like Figure 10 and Figure 11 As shown, step S4 is then performed, whereby the PCB board 10, which is attached to the chip 13, the high-energy scintillator 16 and the low-energy scintillator 18, is attached to the CT detector structure 19 based on the positioning reference mark.

[0130] This embodiment also provides a CT detector packaging structure, which is obtained by the CT detector packaging method in the above embodiment. The beneficial effects it can achieve can be found in the specific description of the packaging method, and will not be repeated here.

[0131] In summary, the CT detector packaging method and structure of this invention, by setting positioning reference marks on the PCB board and consistently using these markings as alignment criteria throughout the packaging process, sequentially completes the bonding of the chip, high-energy scintillator, and low-energy scintillator, as well as the assembly with the CT detector structural components. This ensures precise alignment of each component throughout the entire packaging process, significantly improving bonding success rate, assembly efficiency, and overall positional consistency when multiple chips are cascaded. It effectively solves the problem of poor bonding position accuracy caused by inconsistent positioning references in existing technologies. Simultaneously, this method simplifies the complex operation of traditional customized positioning fixtures, reduces error accumulation due to insufficient fixture processing precision and increased row count, and minimizes positional deviations caused by inconsistent positioning references. This significantly improves production efficiency, reduces production costs, and enhances the overall quality and reliability of the product, providing an innovative solution for high-precision, high-efficiency packaging of industrial CT detector modules. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and possesses high industrial applicability.

[0132] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method of CT detector packaging, characterized by, The packaging method comprises: S1, providing a PCB board having opposite first and second surfaces, the PCB board having a positioning reference mark thereon; S2, based on the positioning reference mark, bonding a plurality of chips on the first and / or second surface of the PCB board; S3, based on the positioning reference mark, bonding a plurality of high-energy scintillators and a plurality of low-energy scintillators on each of the chips; S4, based on the positioning reference mark, bonding the PCB board with the chips, high-energy scintillators and low-energy scintillators to a CT detector structure.

2. The CT detector packaging method according to claim 1, wherein: in step S2, based on the positioning reference mark, a plurality of chips are bonded on the first or second surface of the PCB board; in step S3, based on the positioning reference mark, a plurality of high-energy scintillators and a plurality of low-energy scintillators are bonded on each of the chips, which comprises: S31, placing the side of the PCB board with the chips upward on a scintillator bonding track, UV lamps being arranged on both sides of the scintillator bonding track; S32, applying first UV-thermosetting optical glue on the surface of the chip to be bonded with the high-energy scintillator; S33, based on the positioning reference mark, bonding the high-energy scintillators arranged at intervals on the chip with the first UV-thermosetting optical glue applied thereon; S34, pre-curing the first UV-thermosetting optical glue by using the UV lamps; S35, applying second UV-thermosetting optical glue on the surface of the chip to be bonded with the low-energy scintillator; S36, based on the positioning reference mark, bonding the low-energy scintillators arranged at intervals on the chip with the second UV-thermosetting optical glue applied thereon, and the low-energy scintillators and the high-energy scintillators are arranged alternately; S37, pre-curing the second UV-thermosetting optical glue by using the UV lamps; S38, heating to completely cure the first and second UV-thermosetting optical glues.

3. The CT detector packaging method according to claim 1, wherein: in step S2, based on the positioning reference mark, a plurality of chips are bonded on the first or second surface of the PCB board; in step S3, based on the positioning reference mark, a plurality of high-energy scintillators and a plurality of low-energy scintillators are bonded on each of the chips, which comprises: S31, placing the side of the PCB board with the chips upward on a scintillator bonding track, UV lamps being arranged on both sides of the scintillator bonding track; S32, applying first UV-thermosetting optical glue on the surface of the chip to be bonded with the high-energy scintillator; S33, based on the positioning reference mark, bonding the high-energy scintillators arranged at intervals on the chip with the first UV-thermosetting optical glue applied thereon; S34, pre-curing the first UV-thermosetting optical glue by using the UV lamps; S35, coating a second UV-thermosetting optical adhesive on the surface of the chip to be attached with the low-energy scintillator; S36, using a suction nozzle to suck a strip of the low-energy scintillator and moving the low-energy scintillator above the chip coated with the second UV-thermosetting optical adhesive based on the positioning reference mark; S37, pressing the low-energy scintillator through the suction nozzle while pre-curing the second UV-thermosetting optical adhesive using a UV light source integrated into the suction nozzle until the low-energy scintillator is attached to the chip; S38, repeating steps S36 and S37 until the attachment of all the low-energy scintillators is completed, and the low-energy scintillators are arranged alternately with the high-energy scintillators; S39, heating to completely cure the first and second UV-thermosetting optical adhesives.

4. The CT detector packaging method of claim 1, wherein: In step S2, based on the positioning reference mark, a plurality of chips are attached on the first and second surfaces of the PCB board; In step S3, based on the positioning reference mark, a plurality of high-energy scintillators and a plurality of low-energy scintillators are attached on all the chips respectively, including: S31, placing the first surface of the PCB board upward on a scintillator attachment track, and UV lamps are arranged on both sides of the scintillator attachment track; S32, coating a first UV-thermosetting optical adhesive on the surface of the chip on the first surface of the PCB board; S33, based on the positioning reference mark, attaching the high-energy scintillators on the chip coated with the first UV-thermosetting optical adhesive; S34, pre-curing the first UV-thermosetting optical adhesive using the UV lamps; S35, turning over the PCB board to place the second surface upward on the scintillator attachment track; S36, coating a second UV-thermosetting optical adhesive on the surface of the chip on the second surface of the PCB board; S37, based on the positioning reference mark, attaching the low-energy scintillators on the chip coated with the second UV-thermosetting optical adhesive; S38, pre-curing the second UV-thermosetting optical adhesive using the UV lamps; S39, heating to completely cure the first and second UV-thermosetting optical adhesives.

5. The CT detector packaging method of claim 1, wherein: In step S2, based on the positioning reference mark, a plurality of chips are attached on the first and second surfaces of the PCB board; In step S3, based on the positioning reference mark, a plurality of high-energy scintillators and a plurality of low-energy scintillators are attached on all the chips respectively, including: S31, placing the first surface of the PCB board upward on a scintillator attachment track, and UV lamps are arranged on both sides of the scintillator attachment track; S32, coating a first UV-thermosetting optical adhesive on the surface of the chip on the first surface of the PCB board; S33, based on the positioning reference mark, adhering the high-energy scintillator to the chip coated with the first UV-thermosetting optical glue; S34, using the UV lamp to pre-cure the first UV-thermosetting optical glue; S35, turning the PCB board to the second surface upward and placing it on the scintillator adhering track; S36, coating the second UV-thermosetting optical glue on the chip surface of the second surface of the PCB board; S37, using a suction nozzle to suck a strip of the low-energy scintillator, and moving the low-energy scintillator above the chip coated with the second UV-thermosetting optical glue based on the positioning reference mark; S38, pressing the low-energy scintillator through the suction nozzle, and using the UV light source integrated into the suction nozzle to pre-cure the second UV-thermosetting optical glue until the low-energy scintillator is adhered to the chip; S39, repeating steps S37 and S38 until the adhesion of all the low-energy scintillators is completed; S40, heating to completely cure the first UV-thermosetting optical glue and the second UV-thermosetting optical glue.

6. The CT detector packaging method of any one of claims 1 to 5, wherein: In step S3, before adhering the high-energy scintillator to the chip, it further includes a step of using a bottom camera to calibrate the position coordinates of the high-energy scintillator.

7. The method of CT detector packaging of claim 1, wherein: The positioning reference mark includes a circular fine positioning mark located at the center of the PCB board and an oval coarse positioning mark located at the edge of the PCB board.

8. The method of CT detector packaging of claim 1, wherein: The positioning reference mark penetrates through the copper layer stack or the stack of copper layer and dielectric layer of the PCB board, wherein the surface of the stack of copper layer and dielectric layer is a copper layer.

9. The method of CT detector packaging of claim 1, wherein: The reference point for making the positioning reference mark is in the same layer as the chip pad of the PCB board.

10. A CT detector package structure, characterized by: Packaged by the CT detector packaging method of any one of claims 1 to 9.

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