Display device

Abstract

A display device is provided in which each of a plurality of sub-pixels includes a first cathode and a second cathode spaced apart from each other, and in which a voltage line supplies a voltage to the first cathode through any one of a plurality of connection lines and supplies a voltage to the second cathode through another one of the plurality of connection lines.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0118366, filed on September 2, 2024, which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to display devices. Background Technology

[0004] In addition to serving as displays for televisions or monitors, display devices are widely used as displays for laptops, tablets, smartphones, portable display devices, and portable information devices. With technological advancements, display devices can offer various imaging or sensing functions beyond image display. Therefore, display devices can include electronic devices such as camera units or sensors.

[0005] In display devices, organic light-emitting diode (OLED) displays are self-emissive and offer superior viewing angles and contrast compared to liquid crystal displays (LCDs). Because they do not require a separate backlight, they are lightweight, thin, and have power efficiency advantages. Furthermore, OLED displays offer advantages such as low-voltage operation, fast response times, and low manufacturing costs.

[0006] During the formation of the light-emitting device in an organic light-emitting display, foreign matter may be introduced. Specifically, the light-emitting device can be formed by sequentially depositing an anode, a light-emitting layer, and a cathode. When a foreign matter introduced from the outside falls onto the anode, the light-emitting layer cannot be stably formed on the anode. Similarly, the cathode cannot be stably formed on the light-emitting layer. In this situation, the cathode and anode come into contact with each other, which may cause a short circuit. Because the light-emitting device that has experienced a short circuit cannot emit light, defective pixels, including dark spots, may appear.

[0007] Recently, in aging processes, a process is being implemented to normalize defective pixels by removing dark spots. However, there is a problem that dark spots reappear in the normalized pixels. Summary of the Invention

[0008] This disclosure was made at least in part in view of the aforementioned problems. In particular, some aspects of this disclosure provide a display device for reducing the occurrence of dark spots.

[0009] According to an aspect of the present disclosure, the above and other technical effects can be achieved by providing a display device including a plurality of pixels each including a circuit region and a transmissive region, each of the plurality of pixels including a plurality of sub-pixels disposed in the circuit region, a voltage line disposed in the circuit region and supplying a voltage, and a plurality of connection lines disposed in the circuit region and electrically connected to the voltage line, wherein each of the plurality of sub-pixels includes a first cathode and a second cathode spaced apart from each other, and wherein the voltage line supplies the voltage to the first cathode through any one of the plurality of connection lines and supplies the voltage to the second cathode through another one of the plurality of connection lines.

[0010] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the subject application as claimed. BRIEF DESCRIPTION OF DRAWINGS

[0011] The accompanying drawings, which are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application, illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0012] Figure 1 is a schematic block diagram of a display device according to an embodiment of the present disclosure.

[0013] Figures 2A-2C is a plan view of a display device according to a first embodiment of the present disclosure.

[0014] Figure 3 is a plan view of a display device according to a second embodiment of the present disclosure.

[0015] Figure 4 is a cross-sectional view taken along line A-A' of Figure 2A .

[0016] Figures 5A-5G is a cross-sectional view taken along line B-B' of Figure 2A .

[0017] Figure 6 is a circuit diagram of a sub-pixel according to an embodiment of the present disclosure.

[0018] Figure 7 is a circuit diagram of a sub-pixel according to another embodiment of the present disclosure.

[0019] Figure 8 is a plan view of a display device according to a third embodiment of the present disclosure.

[0020] Figure 9 is a cross-sectional view taken along line C-C' of Figure 8a cross-sectional view taken along a line C-C' of the display device.

[0021] Figure 10 is a plan view of a display device according to a fourth embodiment of the present disclosure.

[0022] Figure 11 is a plan view of a display device according to a fifth embodiment of the present disclosure.

[0023] Figure 12 is a plan view of a display device according to a sixth embodiment of the present disclosure.

[0024] Figure 13 is a plan view of a display device according to a seventh embodiment of the present disclosure.

[0025] Throughout the drawings and detailed description, unless otherwise described, the same drawing reference numerals should be understood to refer to the same element, feature, and structure. The relative dimensions of these elements can be exaggerated, described, and depicted for clarity, illustration and convenience, in the foregoing description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. However, it will be appreciated that the present disclosure can be practiced in a variety of ways without the specific details (e.g., an appropriate type of hardware, software, firmware, or combinations thereof is used in place of or in combination with the hardware and software described herein), and that the present disclosure can include practices or implementations not specifically described herein. DETAILED DESCRIPTION

[0026] Advantages and features of the present disclosure and methods of accomplishing the same can be more clearly understood from the following examples described with reference to the accompanying drawings. However, the present disclosure can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that the disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Further, the present disclosure is defined only by the scope of the claims.

[0027] The shapes, sizes, ratios, angles, and numbers disclosed in the drawings for describing the embodiments of the present disclosure are only examples, and thus the present disclosure is not limited to the following examples. Like reference numerals refer to like elements throughout the specification. In the following description, detailed descriptions of functions or configurations known to those skilled in the art can be omitted when it is determined that such detailed description can unnecessarily obscure the gist of the present disclosure. In the case of using "include", "have", and "comprise" in the present disclosure, another part can be added unless "only" is used. The singular form can include the plural form unless otherwise stated.

[0028] In interpreting the components, even if not explicitly described, it is interpreted to include an error range.

[0029] In describing the positional relationship, for example, when the positional relationship is described as "on", "above", "below", and "adjacent to", one or more parts can be disposed between two other parts unless "immediately" or "directly" is used.

[0030] In describing the time priority relationship, for example, when the time priority relationship is described as "after", "next", "before", etc., unless "immediately" or "directly" is used, discontinuous cases can also be included.

[0031] First, second, etc. are used to describe various components, but the components are not limited by these terms. These terms are only used to distinguish one component from another component. Therefore, within the technical idea of the disclosure, the first component mentioned below can be the second component.

[0032] The features of various embodiments of the disclosure can be partially or wholly coupled or combined with each other, and can interoperate and technically drive each other in various ways, as can be fully understood by those skilled in the art. Embodiments of the disclosure can be executed independently of each other, or can be executed together in a mutually dependent relationship.

[0033] Hereinafter, one embodiment of the disclosure will be described in detail with reference to the accompanying drawings.

[0034] Figure 1 is a schematic block diagram of a display device according to an embodiment of the disclosure.

[0035] The display device 10 can include a display area DA and a non-display area NDA surrounding the display area DA. The display area DA can be an area in which an image can be displayed, and the non-display area NDA can be an area in which an image is not displayed.

[0036] A plurality of pixels PX can be provided in the display area DA. The plurality of pixels PX can be arranged in a matrix structure along a first direction X and a second direction Y.

[0037] Each of the plurality of pixels PX can include a transmissive area TA and a circuit area CA. The transmissive area TA can be an area through which external light is transmitted. The circuit area CA is an area in which a light emitting device and a circuit for driving the light emitting device are provided. And, the circuit area CA can implement an image. Therefore, when an image is not implemented through the circuit area CA, a user can see an external image of the display device through the transmissive area TA.

[0038] In Figure 1 , a structure in which the transmissive area TA and the circuit area CA are provided in one pixel PX along the first direction X is disclosed, but is not limited thereto.

[0039] Figures 2A-2C is a plan view of the display device 10 according to the first embodiment of the disclosure. Specifically, Figures 2A-2C a planar structure of a plurality of pixels PX is shown.

[0040] Referring to Figure 2A A plurality of pixels PX can be disposed on a substrate SUB including a transmissive area TA and a circuit area CA. A plurality of sub-pixels SP and a low-potential voltage line EVSSL can be disposed in the circuit area CA. The light emitting device and the circuit for driving the light emitting device can not be disposed in the transmissive area TA, and only a transparent material layer can be disposed in the transmissive area TA.

[0041] Referring to Figure 2A One pixel PX can include a plurality of sub-pixels SP. The plurality of sub-pixels SP can be disposed in the circuit area CA. The plurality of sub-pixels SP can be arranged in a matrix structure along a first direction X and a second direction Y, but are not limited thereto. Figure 2A It is disclosed that one pixel PX includes four sub-pixels SP, but is not limited thereto. In addition, each of the plurality of sub-pixels SP can emit any one of red light, green light, blue light, or white light.

[0042] Each of the plurality of sub-pixels SP can include a light emitting area EA, a non-light emitting area NEA, and a contact area CT.

[0043] The light emitting area EA includes a light emitting device and can emit light. The light emitting area EA can have a recessed portion. Referring to Figure 2A It is disclosed that an upper end area and a lower end area of the light emitting area EA have a structure of a recessed shape, but is not limited thereto.

[0044] The contact area CT can be disposed in the recessed portion of the light emitting area EA. That is, the contact area CT can correspond to the recessed shape of the light emitting area EA. The cathode CAT of the light emitting device and the low-potential voltage line EVSSL can be electrically connected through the contact area CT.

[0045] The contact area CT can include a first contact area CT1 and a second contact area CT2. The first contact area CT1 and the second contact area CT2 can be disposed along the second direction Y. The first contact area CT1 can be disposed in an upper area of the sub-pixel SP, and the second contact area CT2 can be disposed in a lower area of the sub-pixel SP, but are not limited thereto. In addition, a contact hole can be disposed in each of the first contact area CT1 and the second contact area CT2.

[0046] The non-light emitting area NEA can surround the light emitting area EA and the contact area CT. Since the contact area CT is disposed in an area corresponding to the recessed shape of the light emitting area EA, a partial area of the contact area CT can be adjacent to the light emitting area EA, and the remaining area of the contact area CT can be adjacent to the non-light emitting area NEA.

[0047] A light emitting device can be provided in each of the plurality of sub-pixels SP. The light emitting device can include an anode, a light emitting layer, and a cathode CAT. Figure 2A Only the cathode CAT is shown.

[0048] The anode and the light emitting layer are provided in the light emitting area EA and can be formed on the entire surface of the light emitting area EA. The anode and the light emitting layer can extend from the light emitting area EA and can also be provided in a partial area of the non-light emitting area NEA. In addition, the anode and the light emitting layer can not be provided in the contact area CT.

[0049] The cathode CAT can be provided in the light emitting area EA. The cathode CAT can include a first cathode CAT1 and a second cathode CAT2. The first cathode CAT1 and the second cathode CAT2 can be provided in the second direction Y. The first cathode CAT1 can be provided in an upper area of the light emitting area EA and the second cathode CAT2 can be provided in a lower area of the light emitting area EA. In addition, the first cathode CAT1 and the second cathode CAT2 can be spaced apart from each other. The first cathode CAT1 and the second cathode CAT2 can be spaced apart from each other and an area provided between the first cathode CAT1 and the second cathode CAT2 can become an opening OP. That is, the first cathode CAT1 and the second cathode CAT2 can be electrically separated from each other. In addition, the opening OP can overlap the light emitting area EA. The opening OP can be parallel to the first direction X, but is not limited thereto.

[0050] Each of the first cathode CAT1 and the second cathode CAT2 can extend from the light emitting area EA and can also be provided in a partial area of the non-light emitting area NEA. However, each of the first cathode CAT1 and the second cathode CAT2 is not provided in the transmissive area TA. In addition, the first cathode CAT1 can overlap the first contact area CT1 and the second cathode CAT1 can overlap the second contact area CT2. In addition, the first cathode CAT1 and the second cathode CAT2 can be formed to have the same size, but are not limited thereto.

[0051] The first cathode CAT1 and the second cathode CAT2 can include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). In addition, the first cathode CAT1 and the second cathode CAT2 can include the same material, but are not limited thereto.

[0052] A low potential voltage line EVSSL can be provided in the circuit area CA adjacent to the transmissive area TA. Figure 2AThe low-potential voltage line EVSSL is shown as being provided adjacent to the right end portion of the circuit region CA, but is not limited thereto. For example, the low-potential voltage line EVSSL can be provided adjacent to the left end portion of the circuit region CA. In addition, the low-potential voltage line EVSSL can be provided in the non-light-emitting region. The low-potential voltage line EVSSL can extend in the second direction Y.

[0053] A plurality of connection lines CL can be provided in the circuit region CA. The plurality of connection lines CL can include a plurality of first connection lines CL1 and a plurality of second connection lines CL2. The plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be spaced apart from each other. In addition, the plurality of first connection lines CL1 can be spaced apart from each other, and the plurality of second connection lines CL2 can be spaced apart from each other.

[0054] The plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be provided under the light-emitting device 400. The plurality of first connection lines CL1 can overlap the first cathodes CAT1, and the plurality of second connection lines CL2 can overlap the second cathodes CAT2. One first connection line CL1 can overlap a plurality of first cathodes CAT1 provided in the first direction X, and one second connection line CL2 can overlap a plurality of second cathodes CAT2 provided in the first direction X.

[0055] The plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be provided in the contact region CT. The plurality of first connection lines CL1 can overlap the first contact regions CT1, and the plurality of second connection lines CL2 can overlap the second contact regions CT2. One first connection line CL1 can overlap a plurality of first contact regions CT1 provided in the first direction X, and one second connection line CL2 can overlap a plurality of second contact regions CT2 provided in the first direction X.

[0056] Since one sub-pixel SP includes at least one first contact region CT1 and at least one second contact region CT2, one sub-pixel SP can overlap one first connection line CL1 and one second connection line CL2. In addition, one first connection line CL1 can be connected to one sub-pixel SP and another sub-pixel adjacent to the sub-pixel SP. Likewise, one second connection line CL2 can be connected to one sub-pixel SP and another sub-pixel adjacent to the sub-pixel SP.

[0057] The plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be electrically connected to the low-potential voltage line EVSSL. Referring to Figure 2BThe plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be formed to extend from one side of the low-potential voltage line EVSSL and can be parallel to the first direction X. That is, the plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be integrally formed with the low-potential line EVSSL, but are not limited thereto. For example, the plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be connected to the low-potential voltage line EVSSL through contact holes.

[0058] When one side of each of the plurality of first connection lines CL1 is connected to the low-potential voltage line EVSSL, an end portion of the other side of each of the plurality of first connection lines CL1 can be disposed in the circuit region CA. That is, the end portion of the other side of each of the plurality of first connection lines CL1 extends to the adjacent sub-pixel SP, but can not extend to the transmissive region TA. Likewise, when one side of each of the plurality of second connection lines CL2 is connected to the low-potential voltage line EVSSL, an end portion of the other side of each of the plurality of second connection lines CL2 can be disposed in the circuit region CA. That is, the end portion of the other side of each of the plurality of second connection lines CL2 extends to the adjacent sub-pixel SP, but can not extend to the transmissive region TA.

[0059] Meanwhile, referring to Figure 2B and Figure 2C , it is further illustrated that the circuit region CA of the plurality of second pixels PX2 adjacent to the plurality of first pixels PX1.

[0060] Referring to Figure 2B , the plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be commonly formed in the circuit regions CA of the plurality of first pixels PX1 and the plurality of second pixels PX2. That is, the low-potential voltage line EVSSL disposed in the plurality of first pixels PX1, the low-potential voltage line EVSSL disposed in the plurality of second pixels PX2, the plurality of first connection lines CL1, and the plurality of second connection lines CL2 can have a mesh structure. In this case, the plurality of first connection lines CL1 and the plurality of second connection lines CL2 can also be disposed in the transmissive regions TA of the plurality of first pixels PX1. Accordingly, there can be a problem in which the transmittance of the transmissive region TA is reduced and the reflectance of the transmissive region TA is increased.

[0061] Therefore, as Figure 2CAs illustrated, the plurality of first connection lines CL1 provided in the plurality of first pixels PX1 can be separated from the plurality of first connection lines CL1 provided in the plurality of second pixels PX2, and it can be preferable that the plurality of first connection lines CL1 are not formed in the transmissive area TA. Likewise, the plurality of second connection lines CL2 provided in the plurality of first pixels PX1 can be separated from the plurality of second connection lines CL2 provided in the plurality of second pixels PX2, and it can be preferable that the plurality of second connection lines CL2 are not formed in the transmissive area TA.

[0062] The low-potential voltage line EVSSL can supply the low-potential voltage EVSS to the plurality of sub-pixels SP through the plurality of first connection lines CL1 and the plurality of second connection lines CL2. Specifically, the first connection line CL1 can be electrically connected to the first cathode CAT1 through the contact hole of the first contact area CT1. In addition, the second connection line CL2 can be electrically connected to the second cathode CAT2 through the contact hole of the second contact area CT2.

[0063] That is, one sub-pixel SP can include the first cathode CAT1 that receives the low-potential voltage EVSS from the first connection line CL1 and the second cathode CAT2 that receives the low-potential voltage EVSS from the second connection line CL2. Accordingly, even in a case where any one of the first cathode CAT1 and the second cathode CAT2 is not normally driven, the sub-pixel SP can emit light through the other cathode of the first cathode CAT1 and the second cathode CAT2.

[0064] Figure 3 is a plan view of a display device 10 according to a second embodiment of the present disclosure.

[0065] As compared with Figure 2A , the structure of the light emitting area EA and the contact area CT is different, Figure 3 As compared with Figure 2A , the structure of the light emitting area EA and the contact area CT is different. Accordingly, the same reference numerals are used for the same parts as those of the display device illustrated in Figure 2A , and a repetitive description thereof is omitted.

[0066] As described above, each of the plurality of sub-pixels SP can include the light emitting area EA, the non-light emitting area NEA, and the contact area CT. As compared with Figure 2A , the light emitting area EA of Figure 3 may not have a recessed shape. That is, as compared with Figure 2A , the light emitting area EA of Figure 3 can ensure a wider light emitting area EA.

[0067] The contact region CT can include a first contact region CT1 and a second contact region CT2. The first contact region CT1 can be adjacent to one side of the light emitting region EA, and the second contact region CT2 can be adjacent to the other side of the light emitting region EA.

[0068] Each of the first and second cathodes CAT1 and CAT2 can extend from the light emitting region EA, and can also be disposed in a partial region of the non-light emitting region NEA. However, each of the first and second cathodes CAT1 and CAT2 is not disposed in the transmission region TA. In addition, the first cathode CAT1 can overlap the first contact region CT1, and the second cathode CAT1 can overlap the second contact region CT2. That is, the first cathode CAT1 can have a shape in which a partial region of the first cathode CAT1 protrudes toward the first contact region CT1, and the second cathode CAT2 can have a shape in which a partial region of the second cathode CAT2 protrudes toward the second contact region CT2.

[0069] As described in Figure 2A , the first connection line CL1 can be electrically connected to the first cathode CAT1 through a contact hole of the first contact region CT1. In addition, the second connection line CL2 can be electrically connected to the second cathode CAT2 through a contact hole of the second contact region CT2.

[0070] Figure 4 is a cross-sectional view taken along a line A-A' of Figure 2A . Specifically, Figure 4 a cross-sectional view of one sub-pixel SP is shown.

[0071] Referring to Figure 4 , one sub-pixel SP according to an embodiment of the disclosure can include a first substrate 100, a thin film transistor 200, a passivation layer 310, a planarization layer 320, a cover layer 330, a protection layer 340, an encapsulation layer 350, a light emitting device 400, a bank 500, a color filter 600, a black matrix 700, and a second substrate 800.

[0072] In this case, the first substrate 100, the thin film transistor 200, the passivation layer 310, the planarization layer 320, the cover layer 330, and the protection layer 340 can be included in a circuit unit 11, and the color filter 600, the black matrix 700, and the second substrate 800 can be included in a filter unit 12. The circuit unit 11 and the filter unit 12 can be bonded together by the encapsulation layer 350.

[0073] The first substrate 100 can be made of glass or plastic, but is not limited thereto. The display device 10 according to an embodiment of the disclosure can be configured as a top emission scheme in which emitted light is emitted upward. Thus, as a material of the first substrate 100, not only a transparent material but also an opaque material can be used.

[0074] The thin film transistor 200 can be disposed on the first substrate 100. The thin film transistor 200 can be disposed in the light emitting area EA or the non-light emitting area NEA. The thin film transistor 200 can include a gate electrode 210, a semiconductor layer 220, a gate insulating layer 230, a source electrode 240, and a drain electrode 250.

[0075] The gate electrode 210 of the thin film transistor 200 can be disposed on the first substrate 100. In addition, the semiconductor layer 220 can be disposed on the gate electrode 210. The semiconductor layer 220 can include a polysilicon semiconductor or an oxide semiconductor. In addition, when the semiconductor layer 220 includes an oxide semiconductor, at least one oxide among indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGO), and indium gallium oxide (IGO) can be included.

[0076] In order to insulate the gate electrode 210 and the semiconductor layer 220, the gate insulating layer 230 can be disposed between the gate electrode 210 and the semiconductor layer 220. The gate insulating layer 230 can be formed of a single layer of silicon nitride (SiN x ) or silicon oxide (SiO x ) or multiple layers thereof. In addition, Figure 4 A bottom gate structure in which the semiconductor layer 220 is formed on the gate electrode 210 is illustrated, but is not limited thereto. For example, a top gate structure in which the gate electrode 210 is formed on the semiconductor layer 220 can be disclosed.

[0077] The source electrode 240 and the drain electrode 250 can be disposed on the semiconductor layer 220 while facing each other. In addition, a connection line CL can be disposed on the same layer as the source electrode 240 and the drain electrode 250. The source electrode 240 and the drain electrode 250 can be formed through the same process as the connection line CL. The first connection line CL1 can be disposed in the first contact area CT1, and the second connection line CL2 can be disposed in the second contact area CT2.

[0078] The passivation layer 310 can be disposed on the thin film transistor 200 and the connection line CL. The passivation layer 310 can include a contact hole that exposes a portion of the drain electrode 250 and a portion of the connection line CL. In addition, the passivation layer 310 can be formed of, for example, silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N yThe inorganic insulating material can be formed of, for example, an inorganic insulating material such as silicon oxide (SiO

[0079] The planarization layer 320 can be provided on the passivation layer 310. The planarization layer 320 is provided in the light emitting area EA, the non-light emitting area NEA, and the contact area CT, and an upper portion of the thin film transistor 200 and the connection line CL can be planarized. In addition, the planarization layer 320 can be formed of an organic insulating material such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, or a polyimide resin.

[0080] The light emitting device 400 can be provided on the planarization layer 320. The light emitting device 400 can include a first light emitting device 401 and a second light emitting device 402.

[0081] The light emitting device 401 can include an anode 410, a light emitting layer 420, and a first cathode 431.

[0082] The anode 410 can be provided on the planarization layer 320. The anode 410 can be provided in the light emitting area EA and the non-light emitting area NEA. In addition, the anode 410 can be electrically connected to the drain electrode 250 of the thin film transistor 200 through a contact hole provided in the passivation layer 310 and the planarization layer 320.

[0083] The anode 410 can include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the anode 410 can include a metal material such as aluminum (Al), silver (Ag), copper (Cu), molybdenum (Mo), titanium (Ti), tungsten (W), or chromium (Cr), or an alloy thereof. Furthermore, the anode 410 is illustrated as a single layer, but can be a multi-layer.

[0084] The bank 500 can be provided on the planarization layer 320 and the anode 410. The bank 500 can define the non-light emitting area NEA. That is, an area in which the bank 500 is not provided can be the light emitting area EA or the contact area CT, and an area in which the bank 500 is provided can be the non-light emitting area NEA.

[0085] The bank 500 can include an organic insulating material such as an acrylic resin, an epoxy resin, a phenol resin, a polyamide resin, a polyimide resin, or the like. Alternatively, the bank 500 can include an inorganic insulating material such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), or the like. In addition, the bank 500 can include a black dye to absorb light incident from the outside.

[0086] The light emitting layer 420 can be disposed on the anode 410. Also, the light emitting layer 420 can be disposed on the upper surface of the bank 500. That is, the light emitting layer 420 can be disposed in the light emitting area EA and the non-light emitting area NEA.

[0087] The light emitting layer 420 can include a hole transport layer, an organic light emitting layer, and an electron transport layer. In this case, when a voltage is applied to the anode 410 and the first cathode 431, holes and electrons move to the organic light emitting layer through the hole transport layer and the electron transport layer, respectively, and the holes and the electrons can combine with each other to emit light in the organic light emitting layer.

[0088] The first cathode 431 can be disposed on the light emitting layer 420. Like the light emitting layer 420, the first cathode 431 can be disposed on the upper surface of the bank 500. Also, the first cathode 431 can extend from the upper surface of the bank 500 and can also be disposed in the first contact area CT1. In this case, the area in which the first cathode 431 is disposed can be referred to as a first cathode area CATA1.

[0089] Since the display apparatus according to the embodiment of the disclosure is configured as a top emission method, the first cathode 431 can include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) to transmit light emitted from the light emitting layer 420 upward.

[0090] Like the first light emitting device 401, the second light emitting device 402 can include the anode 410 and the light emitting layer 420. The anode 410 of the first light emitting device 401 and the anode 410 of the second light emitting device 402 can be continuously formed. That is, the first light emitting device 401 and the second light emitting device 402 can share the anode 410. Alternatively, the anode 410 of the first light emitting device 401 can be separated from the anode 410 of the second light emitting device 402. Also, the light emitting layer 420 of the first light emitting device 401 and the light emitting layer 420 of the second light emitting device 402 can be continuously formed. That is, the first light emitting device 401 and the second light emitting device 402 can share the light emitting layer 420.

[0091] Unlike the first light emitting device 401 including the first cathode 431, the second light emitting device 402 can include a second cathode 432. The first cathode 431 and the second cathode 432 can be spaced apart from each other on the light emitting layer 420 through the opening OP. Thus, the first cathode 431 and the second cathode 432 can be physically separated through the opening OP. Also, the opening OP is disposed in an area overlapping the light emitting layer 420 and can be disposed in the light emitting area EA.

[0092] A second cathode 432 can be disposed on the light emitting layer 420. Like the light emitting layer 420, the second cathode 432 can be disposed on the upper surface of the bank 500. In addition, the second cathode 432 can extend from the upper surface of the bank 500 and can also be disposed in the second contact area CT2. In this case, the area in which the second cathode 432 is disposed can be referred to as a second cathode area CATA2.

[0093] Since the display device according to the embodiment of the disclosure is configured as a top emission method, the second cathode 432 can include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO) to transmit light emitted from the light emitting layer 420 upward. In addition, the first cathode 431 and the second cathode 432 can include the same material, but are not limited thereto.

[0094] A first contact hole CNT1 can be disposed in the first contact area CT1. The first contact hole CNT1 can pass through the passivation layer 310, the planarization layer 320, and the bank 500, and can expose a partial area of the first connection line CL1. The first cathode 431 can also be disposed within the first contact hole CNT1. Accordingly, the first cathode 431 can be electrically connected to the first connection line CL1 through the first contact hole CNT1.

[0095] A second contact hole CNT2 can be disposed in the second contact area CT2. The second contact hole CNT2 can pass through the passivation layer 310, the planarization layer 320, and the bank 500, and can expose a partial area of the second connection line CL2. The second cathode 432 can also be disposed within the second contact hole CNT2. Accordingly, the second cathode 432 can be electrically connected to the second connection line CL2 through the second contact hole CNT2.

[0096] Meanwhile, since the first light emitting device 401 and the second light emitting device 402 share the anode 410, the first light emitting device 401 and the second light emitting device 402 can be electrically connected to the same drain electrode 250 of the thin film transistor 200. In addition, the first cathode 431 of the first light emitting device 401 and the second cathode 432 of the second light emitting device 402 can be spaced apart from each other by the opening OP. Accordingly, the anode 410 of the first light emitting device 401 and the anode 410 of the second light emitting device 402 can be electrically connected, and the first cathode 431 of the first light emitting device 401 and the second cathode 432 of the second light emitting device 402 can not be electrically connected.

[0097] A capping layer 330 can be disposed on the first cathode 431 and the second cathode 432, and can cover the entire surface of the first cathode 431 and the second cathode 432. That is, the capping layer 330 can be disposed in the light-emitting region EA, the non-light-emitting region NEA, and the contact region CT. Furthermore, the capping layer 330 can be spaced apart from the region overlapping with the opening OP. In other words, the capping layer 330 covering the first cathode 431 and the capping layer 330 covering the second cathode 432 can be spaced apart from each other. The capping layer 330 can be made of materials such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiO) x N y Inorganic insulating materials such as ) are formed.

[0098] A protective layer 340 can be disposed on the cover layer 330, and can be disposed in the light-emitting region EA, the non-light-emitting region NEA, and the contact region CT. The protective layer 340 can protect the first light-emitting device 401 and the second light-emitting device 402. Specifically, the protective layer 340 can cover the light-emitting layer 420 exposed by the first cathode 431, the second cathode 432, and the cover layer 330. Furthermore, the protective layer 340 can be made of materials such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiO) x N y Inorganic insulating materials such as ) are formed.

[0099] Color filter 600 and black matrix 700 can be disposed below the second substrate 800. Color filter 600 can be disposed in the light-emitting region EA. Color filter 600 can transmit light of a specific color. For example, when Figure 4 When the sub-pixel SP shown is a red sub-pixel, the color filter 600 can transmit only red light. Additionally, the black matrix 700 can be positioned in the non-emitting region NEA and the contact region CT. The black matrix 700 may include a light-blocking material.

[0100] The encapsulation layer 350 can be disposed between the protective layer 340 and the color filter 600, and between the protective layer 340 and the black matrix 700. The encapsulation layer 350 can fill the interior of the first contact hole CNT1 and the second contact hole CNT2. In addition, the encapsulation layer 350 can include organic insulating materials such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin.

[0101] Figures 5A-5G It is along Figure 2A A cross-sectional view taken along line B-B'. Specifically, it shows the case where a foreign object P is introduced during the formation of the first light-emitting device 401 and the second light-emitting device 402.

[0102] Referring to Figure 5A , a foreign matter P can be located on the anode 410. Due to the foreign matter P, the light emitting layer 420 can not be formed on the entire surface of the anode 410. Specifically, the light emitting layer 420 can not be formed on the upper surface of the anode 410 where the foreign matter P is located and in a partial region of the anode 410 adjacent to the foreign matter P. That is, due to the foreign matter P, a partial region of the anode 410 can be exposed to the outside.

[0103] Referring to Figure 5B , a first cathode 431 and a second cathode 432 can be formed on the light emitting layer 420. The first cathode 431 and the second cathode 432 can be spaced apart from each other by the opening OP. In this case, a region where the first cathode 431 is disposed can be a first cathode region CATA1, and a region where the second cathode 432 is disposed can be a second cathode region CATA2.

[0104] Accordingly, a first light emitting device 401 including the anode 410, the light emitting layer 420, and the first cathode 431 can be formed. In addition, a second light emitting device 402 including the anode 410, the light emitting layer 420, and the second cathode 432 can be formed.

[0105] A cover layer 330 can be formed on the first cathode 431 and the second cathode 432. The cover layer 330 covers the entire surface of the first cathode 431 and the second cathode 432, and can also be disposed in the opening OP.

[0106] Figure 5B A case where the foreign matter P is located in the first cathode region CATA1 is illustrated. Since the first cathode 431 is deposited along the shape of the light emitting layer 420, a partial region of the first cathode 431 can be spaced apart from the foreign matter P. In this case, a partial region of the anode 410 exposed by the foreign matter P can be in contact with the first cathode 431. Accordingly, a short circuit can occur between the anode 410 and the first cathode 431, and the sub-pixel SP can not be normally driven.

[0107] To solve this problem, an aging process can be performed. Specifically, an aging signal can be applied to the first light emitting device 401. The aging signal can be a power source or a signal applied to the first light emitting device 401 such that a predetermined current flows through the first light emitting device 401. When the aging signal is applied to the first light emitting device 401, the current can be concentrated in a region where the anode 410 and the first cathode 431 are in contact with each other. Accordingly, heat can be generated in the region where the anode 410 and the first cathode 431 are in contact with each other by Joule heating. By the generated heat, an end portion of the cover layer 330 and the first cathode 431 is melted, and the first cathode 431 and the anode 410 can be separated from each other.

[0108] That is, as Figure 5CAs shown, the first cathode 431 and the anode 410 can be separated from each other. Also, the foreign matter P can be removed. In addition, the region in which the foreign matter P is removed can be the groove H. A partial region of the anode 410 is exposed, and the end portion of the first cathode 431 and the cover layer 330 after melting is disposed in the groove H.

[0109] Referring to Figure 5D A protective layer 340 can be formed on the cover layer 330. The protective layer 340 can be formed along the shape of the cover layer 330. That is, a partial region of the cover layer 330 can be spaced apart from each other by the groove H. In addition, the thickness of the protective layer 340 can decrease as the protective layer 340 approaches the groove H.

[0110] As described above, in the display device 10 of the present disclosure, the circuit unit 11 and the filter unit 12 can be bonded by the encapsulation layer 350. In the process of bonding the circuit unit 11 and the filter unit 12, as Figure 5E shown, the bonding material 350a constituting the encapsulation layer 350 can exert a pressure on the protective layer 340.

[0111] Since the cover layer 330 and the protective layer 340 are made of inorganic insulating materials such as silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), etc., the adhesion between the cover layer 330 and the protective layer 340 is not high. Therefore, a partial region of the protective layer 340 can be spaced apart from the cover layer 330 by the pressure exerted on the protective layer 340 by the bonding material 350a. In particular, an edge region of the protective layer 340 adjacent to the groove H can be spaced apart from the cover layer 330. Also, the bonding material 350a can be introduced into a region between the cover layer 330 and the protective layer 340 spaced apart from each other.

[0112] Since the bonding material 350a has fluidity, as Figure 5F and Figure 5G shown, the bonding material 350a can be introduced between the cover layer 330 and the protective layer 340. Once introduced, the bonding material 350a can exert a pressure on the cover layer 330. Therefore, the first light emitting device 401 and the second light emitting device 402 can receive the pressure.

[0113] Referring to Figure 5F, a case in which the bonding material 350a exerts pressure on the opening OP is shown. The light-emitting layer 420 made of an organic material can be bent, and the thickness of the light-emitting layer 420 can be reduced by the pressure exerted to the opening OP. The thickness of the light-emitting layer 420 is reduced, and partial regions of the light-emitting layer 420 can be spaced apart in the region overlapping with the opening OP. In this case, since the first cathode 431 and the second cathode 432 are not disposed in the opening OP, the anode 410 can be in contact with the cover layer 330 in the region in which the light-emitting layer 420 is spaced apart from each other. Since the cover layer 330 is made of an inorganic insulating material, even if the cover layer 330 is in contact with the anode 410, the cover layer does not affect the driving of the first light-emitting device 401 and the second light-emitting device 402. Accordingly, the first light-emitting device 401 and the second light-emitting device 402 can be normally driven.

[0114] In addition, referring to Figure 5G , a case in which the bonding material 350a exerts pressure on the first cathode 431 is shown. Due to the pressure exerted to the first cathode 431, the light-emitting layer 420 made of an organic material can be bent, and the thickness of the light-emitting layer 420 can be reduced. The thickness of the light-emitting layer 420 is reduced, and partial regions of the light-emitting layer 420 can be spaced apart from each other. Accordingly, the first cathode 431 can be in contact with the anode 410 in the region in which the light-emitting layer 420 is spaced apart from each other. That is, a short circuit can occur again between the first cathode 431 and the anode 410. Accordingly, the first light-emitting device 401 can not be normally driven.

[0115] However, since the second light-emitting device 402 is normally formed, the second light-emitting device 402 can be normally driven. Accordingly, since the sub-pixel SP can emit light through the second light-emitting device 402, the sub-pixel SP can normally emit light even in the case in which a short circuit occurs again in the sub-pixel SP after the removal of foreign substances and the short circuit through the aging process.

[0116] In summary, even in the case in which a short circuit occurs again in the sub-pixel SP after the removal of foreign substances and the short circuit through the aging process, the present disclosure can normally operate the sub-pixel SP. Specifically, even if any one of the first light-emitting device 401 and the second light-emitting device 402 is not driven, the sub-pixel SP can emit light through the other light-emitting device. Accordingly, an additional repair process can be omitted. In addition, the possibility of occurrence of a dark spot due to a short circuit can be reduced, thereby improving the stability of the display device.

[0117] Figure 6 is a circuit diagram of a sub-pixel SP according to an embodiment of the present disclosure. Specifically, Figure 6 is a circuit diagram of a sub-pixel SP according to a plan view of Figure 2A and Figure 3 .

[0118] The sub-pixel SP can include a driving transistor DT, a first light emitting device OLED1, and a second light emitting device OLED2. In addition, a switching transistor and a capacitor can also be included.

[0119] The driving transistor DT of the sub-pixel SP includes a gate electrode, a source electrode, and a drain electrode. Since the source electrode and the drain electrode are not fixed and can be changed according to a voltage applied to the gate electrode and a current direction, one of the source electrode and the drain electrode can be denoted as a first electrode, and the other of the source electrode and the drain electrode can be denoted as a second electrode.

[0120] The first electrode of the driving transistor DT is supplied with a high potential voltage EVDD, and the second electrode can be connected to the first light emitting device OLED1 and the second light emitting device OLED2. Although Figure 6 The driving transistor DT can control the light emitting intensity of the first light emitting device OLED1 and the second light emitting device OLED2 by controlling a driving current according to a driving voltage of the capacitor, which is not shown in FIG. 1.

[0121] The first light emitting device OLED1 can include an anode connected to the driving transistor DT and a first cathode receiving a low potential voltage EVSS. The second light emitting device OLED2 can include an anode connected to the driving transistor DT and a second cathode receiving the low potential voltage EVSS. That is, the first light emitting device OLED1 and the second light emitting device OLED2 can be controlled by the same driving transistor DT.

[0122] The anode of the first light emitting device OLED1 and the anode of the second light emitting device OLED2 can be connected to the driving transistor DT through a first node N1. On the other hand, the first cathode of the first light emitting device OLED1 and the second cathode of the second light emitting device OLED2 can be connected to the low potential voltage EVSS, respectively. Therefore, even if any one of the first light emitting device OLED1 and the second light emitting device OLED2 is not normally supplied with the low potential voltage EVSS, the other light emitting device can be normally supplied with the low potential voltage EVSS. Thus, the sub-pixel SP can stably emit light.

[0123] Figure 7 is a circuit diagram of a sub-pixel SP according to another embodiment of the disclosure.

[0124] In comparison with the sub-pixel SP of Figure 6 In comparison with the sub-pixel SP of Figure 7 The sub-pixel SP of can further include a third light emitting device OLED3 and a fourth light emitting device OLED4.

[0125] The anodes of the first to fourth light emitting devices OLED1 to OLED4 can be connected to the driving transistor DT through the first node N1. On the other hand, the first cathode of the first light emitting device OLED1, the second cathode of the second light emitting device OLED2, the third cathode of the third light emitting device OLED3, and the fourth cathode of the fourth light emitting device OLED4 can be connected to the low potential voltage EVSS, respectively. Accordingly, even if at least one of the first to fourth light emitting devices OLED1 to OLED4 is not normally supplied with the low potential voltage EVSS, the remaining light emitting devices can be normally supplied with the low potential voltage EVSS.

[0126] Accordingly, compared to the sub-pixel SP of Figure 6 , Figure 7 the sub-pixel SP of

[0127] Figure 8 is a plan view of a display device 10 according to a third embodiment of the present disclosure. In detail, Figure 8 a plan view of a sub-pixel SP according to a circuit diagram of Figure 7 is shown.

[0128] Compared to Figure 2A , in addition to the structure of the light emitting area EA and the contact area CT, Figure 8 shows substantially the same structure as Figure 2A . Accordingly, the same reference numerals are used for the same parts as shown in the display device of Figure 2A , and a repeated description thereof is omitted.

[0129] Each of the plurality of sub-pixels SP can include a light emitting area EA, a non-light emitting area NEA, and a contact area CT.

[0130] The light emitting area EA includes a light emitting device and can emit light. The light emitting area EA can have a recessed portion. With reference to Figure 8 , a structure in which the upper central area and the lower central area of the light emitting area EA have a recessed shape is disclosed, but is not limited thereto.

[0131] The contact area CT can be disposed in the recessed portion of the light emitting area EA. That is, the contact area CT can be disposed to correspond to the recessed area of the light emitting area EA. The cathode CAT of the light emitting device and the low potential voltage line EVSSL can be electrically connected to each other through the contact area CT.

[0132] The contact region CT can include a first contact region CT1 and a second contact region CT2. The first contact region CT1 and the second contact region CT2 can be disposed along the second direction Y. The first contact region CT1 can be disposed in an upper region of the sub-pixel SP, and the second contact region CT2 can be disposed in a lower region of the sub-pixel SP, but is not limited thereto. In addition, a contact hole can be disposed in each of the first contact region CT1 and the second contact region CT2.

[0133] A light emitting device can be disposed in each of the plurality of sub-pixels SP. The light emitting device can include an anode, a light emitting layer, and a cathode CAT. Figure 8 Only the cathode CAT is illustrated.

[0134] The anode and the light emitting layer are disposed in the light emitting region EA, and can be formed on the entire surface of the light emitting region EA. The anode and the light emitting layer can extend from the light emitting region EA, and can also be disposed in a partial region of the non-light emitting region NEA. In addition, the anode and the light emitting layer can not be disposed in the contact region CT. That is, the anode and the light emitting layer can not be disposed in the recessed portion of the light emitting region EA. In addition, the anode can have a recessed shape to correspond to the recessed portion of the light emitting region EA.

[0135] The cathode CAT can be disposed in the light emitting region EA. The cathode CAT can include a first cathode CAT1, a second cathode CAT2, a third cathode CAT3, and a fourth cathode CAT4. The first cathode CAT1 to the fourth cathode CAT4 can be arranged in a matrix structure. Specifically, in one light emitting region EA, the first cathode CAT1 and the second cathode CAT2 can be disposed in an upper region of the light emitting region EA, and the third cathode CAT3 and the fourth cathode CAT4 can be disposed in a lower region of the light emitting region EA. In addition, in one light emitting region EA, the first cathode CAT1 and the third cathode CAT3 can be disposed in a left region of the light emitting region EA, and the second cathode CAT2 and the fourth cathode CAT4 can be disposed in a right region of the light emitting region EA.

[0136] The first cathode CAT1 to the fourth cathode CAT4 can be spaced apart from each other by an opening OP. That is, the first cathode CAT1 to the fourth cathode CAT4 can be electrically separated from each other. In addition, the opening OP can overlap the light emitting region EA. The opening OP can be formed in a shape in which a first opening parallel to the first direction X and a second opening parallel to the second direction Y intersect, but the disclosure is not limited thereto.

[0137] Each of the first to fourth cathodes CAT1 to CAT4 can extend from the light emitting area EA and can also be disposed in a partial area of the non-light emitting area NEA. Also, the first and second cathodes CAT1 and CAT2 can overlap the first contact area CT1, and the third and fourth cathodes CAT3 and CAT4 can overlap the second contact area CT2. Also, the first to fourth cathodes CAT1 to CAT4 can be formed to have the same area, but are not limited thereto.

[0138] The first to fourth cathodes CAT1 to CAT4 can include a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). Also, the first to fourth cathodes CAT1 to CAT4 can include the same material, but are not limited thereto.

[0139] A plurality of first connection lines CL1 and a plurality of second connection lines CL2 can be disposed under the light emitting device. The plurality of first connection lines CL1 can overlap the first and second cathodes CAT1 and CAT2, and the plurality of second connection lines CL2 can overlap the third and fourth cathodes CAT3 and CAT4. One first connection line CL1 can overlap a plurality of first and second cathodes CAT1 and CAT2 disposed in the first direction X, and one second connection line CL2 can overlap a plurality of third and fourth cathodes CAT3 and CAT4 disposed in the first direction X.

[0140] The plurality of first connection lines CL1 and the plurality of second connection lines CL2 can be disposed in the contact area CT. The plurality of first connection lines CL1 can overlap the first contact area CT1, and the plurality of second connection lines CL2 can overlap the second contact area CT2. One first connection line CL1 can overlap a plurality of first contact areas CT1 disposed in the first direction X, and one second connection line CL2 can overlap a plurality of second contact areas CT2 disposed in the first direction X.

[0141] That is, one sub-pixel SP can overlap one first connection line CL1 and one second connection line CL2.

[0142] The low potential voltage line EVSSL can supply the low potential voltage EVSS to the plurality of sub-pixels SP through the plurality of first connection lines CL1 and the plurality of second connection lines CL2. Specifically, the first connection line CL1 can be electrically connected to the first and second cathodes CAT1 and CAT2 through the contact hole of the first contact area CT1. The second connection line CL2 can be electrically connected to the third and fourth cathodes CAT3 and CAT4 through the contact hole of the second contact area CT2.

[0143] In other words, a sub-pixel SP may include a first cathode CAT1 and a second cathode CAT2 that receive a low potential voltage EVSS from the first connection line CL1, and a third cathode CAT3 and a fourth cathode CAT4 that receive a low potential voltage EVSS from the second connection line CL2. Therefore, even if at least one of the first cathodes CAT1 to the fourth cathode CAT4 is not properly driven, the sub-pixel SP can still emit light through the remaining cathodes.

[0144] Figure 9 It is along Figure 8 A cross-sectional view taken along line C-C' is shown. Specifically, the first contact region CT1 between the first cathode 431 and the second cathode 432 is shown.

[0145] and Figure 4 In comparison, apart from the structure of the first cathode 431 and the second cathode 432, Figure 9 It shows the relationship with Figure 4 They are essentially the same structure. Therefore, the same reference numerals are used with... Figure 4 The same components as those in the display device shown are omitted, and repeated descriptions are omitted.

[0146] As described above, the first cathode CAT1 and the second cathode CAT2 can share the contact hole of the first contact area CT1, and the third cathode CAT3 and the fourth cathode CAT4 can share the contact hole of the second contact area CT2.

[0147] Reference Figure 9 A first contact hole CNT1 can be provided in the first contact area CT1. The first contact hole CNT1 can pass through the passivation layer 310, the planarization layer 320, and the dam 500, and can expose a portion of the first connecting line CL1. A first cathode 431 and a second cathode 432 can be provided in the first contact hole CNT1. Therefore, the first cathode 431 and the second cathode 432 can be electrically connected to the first connecting line CL1 through the first contact hole CNT1.

[0148] The first cathode 431 and the second cathode 432 can be spaced apart from each other within the first contact hole CNT1. A cover layer 330 can be disposed on the first cathode 431 and the second cathode 432, and can cover the entire surface of the first cathode 431 and the second cathode 432. In this case, the cover layer 330 can also be disposed in the separated region between the first cathode 431 and the second cathode 432. Therefore, the cover layer 330 can cover the exposed area of ​​the first connecting line CL1 and can stably insulate the first cathode 431 and the second cathode 432.

[0149] Figure 10 This is a plan view of the display device 10 according to the fourth embodiment of the present disclosure.

[0150] and Figure 8 In comparison, aside from the structure of the light-emitting area EA, the contact area CA, and the connecting line CL, Figure 8 It shows the relationship with Figure 8 They are essentially the same structure. Therefore, the same reference numerals are used with... Figure 8 The same components as those in the display device 10 shown are omitted from repeated descriptions.

[0151] Each pixel in a plurality of pixels PX may include a first sub-pixel SP1, a second sub-pixel SP2, a third sub-pixel SP3, and a fourth sub-pixel SP4. The first sub-pixels SP1 to SP4 may be arranged in a matrix structure. Specifically, the first sub-pixel SP1 and the second sub-pixel SP2 may be located in the upper region of pixel PX, and the third sub-pixel SP3 and the fourth sub-pixel SP4 may be located in the lower region of pixel PX. Furthermore, the first sub-pixel SP1 and the third sub-pixel SP3 may be located in the left region of pixel PX, and the second sub-pixel SP2 and the fourth sub-pixel SP4 may be located in the right region of pixel PX.

[0152] As described above, each sub-pixel in the plurality of sub-pixels SP can include a light-emitting region EA, a non-light-emitting region NEA, and a contact region CT. (and) Figure 8 Compared to the luminescent region EA, Figure 10 The luminescent region EA may not have a concave shape. That is, compared with... Figure 8 compared to, Figure 10 This ensures a wider luminous area (EA).

[0153] The contact area CT may include multiple first contact areas CT1 and multiple second contact areas CT2.

[0154] Multiple first contact areas CT1 can be disposed above the first sub-pixel SP1 and the second sub-pixel SP2. That is, multiple first contact areas CT1 can be disposed at the edge of pixel PX. In addition, multiple first contact areas CT1 can be disposed at the position where they intersect with a straight line parallel to the first direction X and passing through the boundary of adjacent sub-pixels SP.

[0155] Multiple second contact areas CT2 can be disposed above the third sub-pixel SP3 and the fourth sub-pixel SP4. That is, the multiple second contact areas CT2 can be disposed along a straight line passing through the center of pixel PX and parallel to the first direction X. In addition, the multiple second contact areas CT2 can be disposed at the position where they intersect with a straight line parallel to the first direction X and passing through the boundaries of adjacent sub-pixels SP.

[0156] In other words, multiple first contact areas CT1 and multiple second contact areas CT2 can be set at points adjacent to the four sub-pixels SP.

[0157] Additionally, the contact area CT can be located at the edge of the sub-pixel SP adjacent to the low-potential voltage line EVSSL. For example, the contact area CT can be located at the edge of the second sub-pixel SP2 adjacent to the low-potential voltage line EVSSL.

[0158] Contact holes can be provided in each of the multiple first contact areas CT1 and multiple second contact areas CT2. The cathode CAT and the low-potential voltage line EVSSL of the light-emitting device can be electrically connected to each other through the contact areas CT.

[0159] A cathode CAT can be placed in the light-emitting region EA. The cathode CAT can include a first cathode CAT1, a second cathode CAT2, a third cathode CAT3, and a fourth cathode CAT4. The first cathode CAT1 to the fourth cathode CAT4 can be arranged in a matrix structure. Specifically, the first cathode CAT1 and the second cathode CAT2 can be located in the upper region of the light-emitting region EA, and the third cathode CAT3 and the fourth cathode CAT4 can be located in the lower region of the light-emitting region EA. Additionally, the first cathode CAT1 and the third cathode CAT3 can be located in the left region of the light-emitting region EA, and the second cathode CAT2 and the fourth cathode CAT4 can be located in the right region of the light-emitting region EA.

[0160] The first cathode CAT1 to the fourth cathode CAT4 can be spaced apart from each other by the opening OP. That is, the first cathode CAT1 to the fourth cathode CAT4 can be electrically separated from each other. In addition, the opening OP can overlap with the light-emitting region EA. The opening OP can be formed in a shape where a first opening parallel to the first direction X intersects with a second opening parallel to the second direction Y, but is not limited to this.

[0161] Each of the first cathodes CAT1 to CAT4 can extend from the light-emitting region EA and can also be disposed in a portion of the non-light-emitting region NEA. Each of the first cathodes CAT1 to CAT4 can overlap with the contact region CT. Furthermore, the first cathodes CAT1 to CAT4 can be formed to have the same area, but are not limited thereto.

[0162] The first cathode CAT1 to the fourth cathode CAT4 may comprise transparent conductive materials such as indium tin oxide (ITO) or indium zinc oxide (IZO). Alternatively, the first cathode CAT1 to the fourth cathode CAT4 may comprise the same materials, but are not limited thereto.

[0163] The connecting line CL may include multiple first connecting lines CL1 and multiple second connecting lines CL2. The multiple first connecting lines CL1 and multiple second connecting lines CL2 may overlap with the first cathode CAT1 to the fourth cathode CAT4. Furthermore, a single first connecting line CL1 may overlap with multiple first cathodes CAT1, multiple second cathodes CAT2, multiple third cathodes CAT3, and multiple fourth cathodes CAT4. Similarly, a single second connecting line CL2 may overlap with multiple first cathodes CAT1, multiple second cathodes CAT2, multiple third cathodes CAT3, and multiple fourth cathodes CAT4.

[0164] Multiple first connecting lines CL1 can be disposed in a first contact area CT1, and multiple second connecting lines CL2 can be disposed in a second contact area CT2. A first connecting line CL1 can overlap with multiple first contact areas CT1 disposed along a first direction X, and a second connecting line CL2 can overlap with multiple second contact areas CT2 disposed along a first direction X.

[0165] In any sub-pixel SP, the first cathode CAT1 and the second cathode CAT2 can overlap with the same connecting line CL, and the third cathode CAT3 and the fourth cathode CAT4 can overlap with the same connecting line CL. For example, in the first sub-pixel SP1, the first cathode CAT1 and the second cathode CAT2 can overlap with the first connecting line CL1, and the third cathode CAT3 and the fourth cathode CAT4 can overlap with the second connecting line CL2. That is, any sub-pixel SP can overlap with at least two connecting lines CL.

[0166] The low-potential voltage line EVSSL can supply a low-potential voltage EVSS to multiple sub-pixels SP via multiple first connection lines CL1 and multiple second connection lines CL2. Specifically, the connection lines CL can be electrically connected to multiple cathodes CAT through contact holes in any contact area CT.

[0167] For example, the first connecting line CL1 can be electrically connected through the contact hole of the first contact area CT1 to the second cathode CAT2 of the first sub-pixel SP1, the first cathode CAT1 of the second sub-pixel SP2, the fourth cathode CAT4 of the third sub-pixel SP3, and the third cathode CAT3 of the fourth sub-pixel SP4. Alternatively, the second connecting line CL2 can be electrically connected to the fourth cathode CAT4 of the first sub-pixel SP1, the third cathode CAT3 of the second sub-pixel SP2, the second cathode CAT2 of the third sub-pixel SP3, and the first cathode CAT1 of the fourth sub-pixel SP4. Alternatively, the second connecting line CL2 can be electrically connected through the contact hole of the second contact area CT2 to the fourth cathode CAT4 of the second sub-pixel SP2 and the second cathode CAT2 of the fourth sub-pixel SP4.

[0168] In other words, a contact area CT can be electrically connected to the cathodes of different sub-pixels SP. Furthermore, the cathodes of different sub-pixels SP can receive a low-potential voltage EVSS from the same connection line CL.

[0169] Therefore, even if at least one of the first cathodes CAT1 to the fourth cathode CAT4 is not driven normally, the sub-pixel SP can still emit light through the remaining cathodes.

[0170] Figure 8 The implementation discloses that each of the multiple contact area CTs supplies a low potential voltage EVSS to two cathode CATs. On the other hand, Figure 10 The disclosed implementation discloses that some of the multiple contact area CTs supply a low potential voltage EVSS to two cathode CATs, while the remaining contact area CTs supply a low potential voltage EVSS to four cathode CATs. Therefore, the number of contact area CTs can be reduced, thereby minimizing the loss of aperture ratio.

[0171] Figure 11 This is a plan view of a display device according to the fifth embodiment of the present disclosure.

[0172] As described above, each sub-pixel in the plurality of sub-pixels SP may include a light-emitting region EA, a non-light-emitting region NEA, and a contact region CT.

[0173] The light-emitting region EA includes a light-emitting device and can emit light. The light-emitting region EA may have a recessed portion. (See reference...) Figure 11 The paper discloses a structure in which the left and right regions of the light-emitting region EA have concave shapes, but is not limited thereto.

[0174] The contact area CT can be disposed within a recessed portion of the light-emitting area EA. That is, the contact area CT can be configured to correspond to the recessed shape of the light-emitting area EA. The contact area CT may include a first contact area CT1, a second contact area CT2, a third contact area CT3, and a fourth contact area CT4. The first contact areas CT1 to the fourth contact areas CT4 can be spaced apart from each other. The first contact area CT1 and the third contact area CT3 are disposed in the left region of a sub-pixel SP, and the second contact area CT2 and the fourth contact area CT4 can be disposed in the right region of a sub-pixel SP, but are not limited thereto. Additionally, a contact hole can be provided in each of the first contact areas CT1 to the fourth contact areas CT4.

[0175] A cathode CAT can be disposed within the light-emitting region EA. The cathode CAT includes a first cathode CAT1, a second cathode CAT2, a third cathode CAT3, and a fourth cathode CAT4. Furthermore, the first cathode CAT1 to the fourth cathode CAT4 can be disposed within one light-emitting region EA. The first cathode CAT1 to the fourth cathode CAT4 can be arranged sequentially along the second direction Y. Specifically, within a light-emitting region EA, the first cathode CAT1 can be disposed in the uppermost region of the light-emitting region EA, and the fourth cathode CAT4 can be disposed in the lowermost region of the light-emitting region EA; however, this disclosure is not limited to this.

[0176] The first cathode CAT1 to the fourth cathode CAT4 can be spaced apart from each other by the opening OP. That is, the first cathode CAT1 to the fourth cathode CAT4 can be electrically separated from each other. In addition, the opening OP can overlap with the light-emitting region EA. The opening OP can be parallel to the first direction X, but is not limited to this.

[0177] Each of the first cathodes CAT1 to CAT4 can extend from the light-emitting region EA and can also be disposed in a portion of the non-light-emitting region NEA. Furthermore, the first cathode CAT1 overlaps with the first contact region CT1, the second cathode CAT2 overlaps with the second contact region CT2, the third cathode CAT3 overlaps with the third contact region CT3, and the fourth cathode CAT4 overlaps with the fourth contact region CT4. Additionally, the first cathodes CAT1 to CAT4 can be formed to have the same area, but are not limited to this.

[0178] The connecting lines CL may include multiple first connecting lines CL1, multiple second connecting lines CL2, multiple third connecting lines CL3, and multiple fourth connecting lines CL4. The multiple first connecting lines CL1 overlap with the first cathode CAT1, the multiple second connecting lines CL2 overlap with the second cathode CAT2, the multiple third connecting lines CL3 overlap with the third cathode CAT3, and the multiple fourth connecting lines CL4 may overlap with the fourth cathode CAT4.

[0179] A first connecting line CL1 may overlap with a plurality of first cathodes CAT1 arranged along the first direction X, a second connecting line CL2 may overlap with a plurality of second cathodes CAT2 arranged along the first direction X, a third connecting line CL3 may overlap with a plurality of third cathodes CAT3 arranged along the first direction X, and a fourth connecting line CL4 may overlap with a plurality of fourth cathodes CAT4 arranged along the first direction X.

[0180] Multiple first connecting lines CL1 can overlap with the first contact area CT1, multiple second connecting lines CL2 can overlap with the second contact area CT2, multiple third connecting lines CL3 can overlap with the third contact area CT3, and multiple fourth connecting lines CL4 can overlap with the fourth contact area CT4.

[0181] In other words, a sub-pixel SP can overlap with a first connection line CL1, a second connection line CL2, a third connection line CL3, and a fourth connection line CL4.

[0182] The low-potential line EVSSL can supply a low-potential voltage EVSS to multiple sub-pixels SP via multiple first connection lines CL1, multiple second connection lines CL2, multiple third connection lines CL3, and multiple fourth connection lines CL4. Specifically, the first connection line CL1 can be electrically connected to the first cathode CAT1 through a contact hole in the first contact area CT1. The second connection line CL2 can be electrically connected to the second cathode CAT2 through a contact hole in the second contact area CT2. The third connection line CL3 can be electrically connected to the third cathode CAT3 through a contact hole in the third contact area CT3. The fourth connection line CL4 can be electrically connected to the fourth cathode CAT4 through a contact hole in the fourth contact area CT4.

[0183] In other words, a sub-pixel SP may include a first cathode CAT1 that receives a low potential voltage EVSS from a first connection line CL1, a second cathode CAT2 that receives a low potential voltage EVSS from a second connection line CL2, a third cathode CAT3 that receives a low potential voltage EVSS from a third connection line CL3, and a fourth cathode CAT4 that receives a low potential voltage EVSS from a fourth connection line CL4.

[0184] Therefore, even if at least one of the first cathodes CAT1 to the fourth cathode CAT4 is not driven normally, the sub-pixel SP can still emit light through the remaining cathodes.

[0185] Figure 12 This is a plan view of the display device 10 according to the sixth embodiment of the present disclosure.

[0186] and Figure 11 Compared to the first cathode CAT1 to the fourth cathode CAT4 arranged along the second direction Y in the embodiment, Figure 12 The embodiment discloses a structure in which the first cathode CAT1 to the fourth cathode CAT4 are arranged along the first direction X.

[0187] Reference Figure 12 The paper discloses a structure in which the upper and lower regions of the light-emitting region EA have concave shapes, but is not limited thereto.

[0188] The contact area CT can be configured as a concave shape corresponding to the light-emitting area EA. The contact area CT may include a first contact area CT1, a second contact area CT2, a third contact area CT3, and a fourth contact area CT4. The first contact areas CT1 to the fourth contact areas CT4 may be spaced apart from each other. The first contact area CT1 and the third contact area CT3 may be located in the upper region of the sub-pixel SP, and the second contact area CT2 and the fourth contact area CT4 may be located in the lower region of the sub-pixel SP, but are not limited thereto. Additionally, a contact hole may be provided in each of the first contact areas CT1 to the fourth contact areas CT4.

[0189] A cathode CAT can be placed in the light-emitting area EA. The cathode CAT may include a first cathode CAT1, a second cathode CAT2, a third cathode CAT3, and a fourth cathode CAT4. The first cathode CAT1 to the fourth cathode CAT4 can be arranged sequentially along a first direction X. Specifically, the first cathode CAT1 can be placed in the left region of the light-emitting area EA, and the fourth cathode CAT4 can be placed in the right region of the light-emitting area EA, but is not limited thereto.

[0190] The first cathode CAT1 to the fourth cathode CAT4 can be spaced apart from each other by the opening OP. That is, the first cathode CAT1 to the fourth cathode CAT4 can be electrically separated from each other. In addition, the opening OP can overlap with the light-emitting region EA. The opening OP can be parallel to the second direction Y, but is not limited to this.

[0191] Each of the first cathodes CAT1 to CAT4 can extend from the light-emitting region EA and can also be disposed in a portion of the non-light-emitting region NEA. Furthermore, the first cathode CAT1 overlaps with the first contact region CT1, the second cathode CAT2 overlaps with the second contact region CT2, the third cathode CAT3 overlaps with the third contact region CT3, and the fourth cathode CAT4 overlaps with the fourth contact region CT4. Additionally, the first cathodes CAT1 to CAT4 can be formed to have the same area, but are not limited to this.

[0192] The connecting line CL may include multiple first connecting lines CL1 and multiple second connecting lines CL2. The multiple first connecting lines CL1 may overlap with the upper regions of the first cathode CAT1 to the fourth cathode CAT4, and the multiple second connecting lines CL2 may overlap with the lower regions of the first cathode CAT1 to the fourth cathode CAT4.

[0193] Multiple first connecting lines CL1 can overlap with the first contact area CT1 and the third contact area CT3, and multiple second connecting lines CL2 can overlap with the second contact area CT2 and the fourth contact area CT4.

[0194] In other words, a subpixel SP can overlap with a first connection line CL1 and a second connection line CL2.

[0195] The low-potential voltage line EVSSL can supply a low-potential voltage EVSS to multiple sub-pixels SP via multiple first connection lines CL1 and multiple second connection lines CL2. Specifically, the first connection line CL1 can be electrically connected to the first cathode CAT1 through a contact hole in the first contact area CT1, and can be electrically connected to the third cathode CAT3 through a contact hole in the third contact area CT3. Additionally, the second connection lines CL2 can be electrically connected to the second cathode CAT2 through a contact hole in the second contact area CT2, and can be electrically connected to the fourth cathode CAT4 through a contact hole in the fourth contact area CT4.

[0196] In other words, a sub-pixel SP may include a first cathode CAT1 and a third cathode CAT3 that receive a low potential voltage EVSS from the first connection line CL1, and a second cathode CAT2 and a fourth cathode CAT4 that receive a low potential voltage EVSS from the second connection line CL2.

[0197] Therefore, even if at least one of the first cathodes CAT1 to the fourth cathode CAT4 is not properly driven, the sub-pixel SP can still emit light through the remaining cathodes. Additionally, with Figure 11 Compared to the implementation method, Figure 12 The implementation method can reduce the number of connecting wires.

[0198] Figure 13 This is a plan view of the display device 10 according to the seventh embodiment of the present disclosure.

[0199] and Figure 2A In comparison, aside from the structure of the anode, Figure 13 It shows the relationship with Figure 2A They are essentially the same structure. Therefore, the same reference numerals are used with... Figure 2A The same components are shown in the display device, and repeated descriptions are omitted.

[0200] As described above, each sub-pixel in the plurality of sub-pixels SP may include a light-emitting region EA, a non-light-emitting region NEA, and a contact region CT. Furthermore, a light-emitting device is disposed in the light-emitting region EA, and the light-emitting device may include an anode ANO, a light-emitting layer, and a cathode CAT. Figure 13 The configuration of the light-emitting layer has been omitted.

[0201] The anode (ANO) may be located in the light-emitting region EA, or it may not be located in the contact region CT. The anode (ANO) may include a first anode (ANO1) and a second anode (ANO2). The first anode (ANO1) may be located in the upper region of the light-emitting region EA, and the second anode (ANO2) may be located in the lower region of the light-emitting region EA. The first anode (ANO1) and the second anode (ANO2) may be spaced apart from each other.

[0202] Sub-contact portions (SCT) and sub-electrodes (SE) can be disposed in the non-light-emitting region (NEA). The sub-contact portions (SCT) and sub-electrodes (SE) may include conductive materials. The sub-electrodes (SE) may include a first sub-electrode (SE1), a second sub-electrode (SE2), and a third sub-electrode (SE3).

[0203] One end of the first sub-electrode SE1 can be connected to the sub-contact portion SCT, and the other end of the first sub-electrode SE1 can be connected to the first anode ANO1. The first sub-electrode SE1 can be formed by extending a portion of the first anode ANO1, but is not limited thereto. In addition, the first anode ANO1 can be electrically connected to the sub-contact portion SCT through the first sub-contact hole SCNT1, but is not limited thereto.

[0204] One end of the second sub-electrode SE2 can be connected to the sub-contact portion SCT, and the other end of the second sub-electrode SE2 can be connected to the second anode electrode ANO2. The second sub-electrode SE2 can be formed by extending a portion of the second anode electrode ANO2, but is not limited thereto. Additionally, the second anode ANO2 can be electrically connected to the sub-contact portion SCT through the second sub-contact hole SCNT2, but is not limited thereto.

[0205] One end of the third sub-electrode SE3 can be connected to the sub-contact portion SCT, and the other end of the second sub-electrode SE2 can be connected to the drain electrode 250 of the thin-film transistor 200. The third sub-electrode SE3 can be formed by extending a portion of the sub-contact portion SCT, but is not limited thereto. In addition, the third sub-electrode SE3 can be electrically connected to the drain electrode 250 through the third sub-contact hole SCNT3, but is not limited thereto.

[0206] In summary, the drain electrode 250 of the thin-film transistor 200 can be electrically connected to the first anode ANO1 and the second anode ANO2 through the sub-contact portion SCT and the sub-electrode SE.

[0207] In other words, a sub-pixel SP can include a first anode ANO1 that receives voltage from a first sub-electrode SE1 and a second anode ANO2 that receives voltage from a second sub-electrode SE2. Therefore, even if either the first anode ANO1 or the second anode ANO2 is not properly driven, the sub-pixel SP can still emit light through the other anode of the first anode ANO1 and the second anode ANO2.

[0208] A cathode CAT can be placed in the light-emitting area EA. The cathode CAT can include a first cathode CAT1 and a second cathode CAT2. The first cathode CAT1 can overlap with the first anode ANO1, but can not overlap with the second anode ANO2. Similarly, the second cathode CAT2 can overlap with the second anode ANO2, but can not overlap with the first anode ANO1.

[0209] The first cathode CAT1 can cover the entire surface of the first anode ANO1, and the second cathode CAT2 can cover the entire surface of the second anode ANO2. Furthermore, the first cathode CAT1 and the second cathode CAT2 can be spaced apart from each other by an opening OP.

[0210] As described above, a sub-pixel SP may include a first cathode CAT1 that receives a low potential voltage EVSS from a first connection line CL1 and a second cathode CAT2 that receives a low potential voltage EVSS from a second connection line CL2. Therefore, even if either the first cathode CAT1 or the second cathode CAT2 is not properly driven, the sub-pixel SP can emit light through the other cathode of the first cathode CAT1 and the second cathode CAT2.

[0211] In short, Figure 13 The disclosed implementation discloses a sub-pixel SP comprising an anode ANO containing a first anode ANO1 and a second anode ANO2, and a cathode CAT containing a first cathode CAT1 and a second cathode CAT2. Therefore, even if one of the anodes, ANO1 and ANO2, or CAT1 and CAT2, is not properly driven, the sub-pixel SP can still emit light through the other anode of ANO1 and ANO2 or CAT1 and CAT2. Thus, the sub-pixel SP can be driven more stably.

[0212] It will be apparent to those skilled in the art that the present disclosure is not limited to the described embodiments and drawings, and that various substitutions, modifications, and variations may be made within the present disclosure without departing from its spirit or scope. Therefore, the scope of the present disclosure is defined by the appended claims, and all variations or modifications derived from the meaning, scope, and equivalent concepts of the claims are intended to fall within the scope of the present disclosure.

Claims

1. A display device comprising: a plurality of pixels each including a circuit region and a transmissive region, each pixel including a plurality of sub-pixels provided in the circuit region; a voltage line provided in the circuit region and supplying a voltage; and a plurality of connection lines provided in the circuit region and electrically connected to the voltage line, wherein each of the plurality of sub-pixels includes a first cathode and a second cathode spaced apart from each other, and wherein the voltage line supplies a voltage to the first cathode through any one of the plurality of connection lines and supplies a voltage to the second cathode through another one of the plurality of connection lines.

2. The display device according to claim 1, each of the plurality of sub-pixels includes: wherein a first cathode region which is a region in which the first cathode is provided; and a second cathode region which is a region in which the second cathode is provided, wherein the first cathode region of each of the plurality of sub-pixels overlaps with the circuit region and does not overlap with the transmissive region, and wherein the second cathode region of each of the plurality of sub-pixels overlaps with the circuit region and does not overlap with the transmissive region. each of the plurality of sub-pixels includes a light-emitting region and a contact region including a contact hole, and 3. The display device according to claim 1, wherein wherein in each sub-pixel, each of the first cathode and the second cathode overlaps with the light-emitting region and the contact region. the contact region includes a first contact region and a second contact region spaced apart from each other, 4. The display device according to claim 3, wherein wherein the first cathode overlaps with the first contact region, and wherein the second cathode overlaps with the second contact region. the plurality of connection lines includes a first connection line and a second connection line spaced apart from each other, 5. The display device of claim 4, wherein, wherein the first connection line contacts the first cathode through a first contact hole in the first contact region, and wherein the second connection line contacts the second cathode through a second contact hole in the second contact region. the light-emitting region includes a recessed portion in which a partial region of the light-emitting region has a recessed shape, and 6. The display device of claim 5, wherein, wherein the contact region is provided in the recessed portion. the first connection line and the second connection line overlap with the light-emitting region.

7. The display device of claim 6, wherein, each of the plurality of sub-pixels further includes a third cathode and a fourth cathode, 8. The display device according to claim 3, wherein wherein the first cathode to the fourth cathode are spaced apart from each other by an opening, and wherein the first cathode to the fourth cathode are electrically isolated from each other. the first cathode and the second cathode are provided in a first region in the light-emitting region, and 9. The display device of claim 8, wherein, wherein the third cathode and the fourth cathode are provided in a second region in the light-emitting region. the contact region includes a first contact region and a second contact region spaced apart from each other, 10. The display device of claim 9, wherein, wherein the first cathode and the second cathode overlap with the first contact region, and wherein the third cathode and the fourth cathode overlap with the second contact region. the plurality of connection lines includes a first connection line and a second connection line spaced apart from each other, 11. The display device of claim 10, wherein, wherein the first connection line contacts the first cathode and the second cathode through a first contact hole in the first contact region, and wherein the second connection line contacts the third cathode and the fourth cathode through a second contact hole in the second contact region. The second connection line contacts the third and fourth cathodes through a second contact hole in the second contact area.

12. The display device of claim 11, wherein, The first and second connection lines overlap the light-emitting area.

13. The display device of claim 9, wherein, The contact area includes a first contact area and a second contact area spaced apart from each other, Each of the plurality of pixels includes a first sub-pixel and a second sub-pixel adjacent to the first sub-pixel in a first direction, Any one of the first to fourth cathodes of the first sub-pixel and any one of the first to fourth cathodes of the second sub-pixel overlap the first contact area, and The other of the first to fourth cathodes of the first sub-pixel and the other of the first to fourth cathodes of the second sub-pixel overlap the second contact area.

14. The display device of claim 8, wherein, The first to fourth cathodes are sequentially arranged from a first side of the light-emitting area to a second side of the light-emitting area.

15. The display device of claim 14, wherein, The contact area includes a first contact area, a second contact area, a third contact area, and a fourth contact area spaced apart from each other, and The first cathode overlaps the first contact area, the second cathode overlaps the second contact area, the third cathode overlaps the third contact area, and the fourth cathode overlaps the fourth contact area.

16. The display device of claim 15, wherein, The plurality of connection lines includes a first connection line and a second connection line spaced apart from each other, The first connection line contacts the first cathode through a first contact hole in the first contact area, and contacts the third cathode through a third contact hole in the third contact area, and The second connection line contacts the second cathode through a second contact hole in the second contact area, and contacts the fourth cathode through a fourth contact hole in the fourth contact area.

17. The display device of claim 15, wherein, The plurality of connection lines includes a first connection line, a second connection line, a third connection line, and a fourth connection line spaced apart from each other, and The first connection line contacts the first cathode through a first contact hole in the first contact area, The second connection line contacts the second cathode through a second contact hole in the second contact area, The third connection line contacts the third cathode through a third contact hole in the third contact area, and The fourth connection line contacts the fourth cathode through a fourth contact hole in the fourth contact area.

18. The display device according to claim 3, further comprising a first light-emitting device and a second light-emitting device in each of the plurality of sub-pixels, the first light-emitting device including the first cathode, the second light-emitting device including the second cathode, wherein, A first anode of the first light-emitting device and a second anode of the second light-emitting device are each electrically connected to a thin film transistor.

19. The display device of claim 18, wherein, The first anode and the second anode are continuously formed.

20. The display device of claim 18, wherein, The first anode and the second anode are spaced apart from each other, The first anode is electrically connected to the thin film transistor through a first sub-electrode, and The second anode is electrically connected to the thin film transistor through a second sub-electrode. The second anode is electrically connected to the thin film transistor through a second sub-electrode spaced apart from the first sub-electrode.

21. The display device of claim 8, wherein, The plurality of connection lines includes a plurality of first connection lines and a plurality of second connection lines spaced apart from each other, One of the plurality of first connection lines overlaps with the plurality of first cathodes, the plurality of second cathodes, the plurality of third cathodes, and the plurality of fourth cathodes, and One of the plurality of second connection lines overlaps with the plurality of first cathodes, the plurality of second cathodes, the plurality of third cathodes, and the plurality of fourth cathodes.

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