Semiconductor discrete device test circuit and device

Abstract

The invention provides a discrete semiconductor device test circuit and device, and relates to the technical field of electronic circuits, and the scheme is that the equivalent resistance value of an adjustable load is adjusted through a controller, and then the current flowing through a tested discrete semiconductor device is adjusted, so that the temperature of the tested discrete semiconductor device is stabilized at a target temperature, and the test accuracy is improved. The simulation of the actual working condition of the tested discrete semiconductor device is realized, so that various faults of the tested discrete semiconductor device in the actual working process can be tested.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and more specifically to a semiconductor discrete device test circuit and apparatus. Background Technology

[0002] Discrete semiconductor devices are independent functional components made of semiconductor materials. Their conductivity lies between that of conductors and insulators, and they mainly include categories such as crystal diodes, transistors, and thyristors. As basic units of electronic systems, they are formed into discrete structures through packaging processes and are widely used in consumer electronics, automotive electronics, energy-saving lighting, and other fields, mainly to realize functions such as rectification, voltage regulation, and switching.

[0003] In practical applications, there are instances where discrete semiconductor devices malfunction during use, but these malfunctions cannot be detected by conventional testing methods. Therefore, it is necessary to design a scheme that can reliably test discrete semiconductor devices. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide a semiconductor discrete device test circuit and apparatus for testing semiconductor discrete devices.

[0005] To achieve the above objectives, the embodiments of the present invention provide the following technical solutions:

[0006] A semiconductor discrete device test circuit, comprising:

[0007] DC power supply, test circuit and controller;

[0008] The test circuit includes the discrete semiconductor device under test, an adjustable load, and a temperature acquisition unit.

[0009] The input terminal of the semiconductor discrete device under test is connected to the positive terminal of the DC power supply;

[0010] One end of the adjustable load is connected to the output terminal of the semiconductor discrete device under test, and the other end is connected to the negative terminal of the DC power supply.

[0011] The temperature acquisition device is used to acquire the temperature of the semiconductor discrete device under test;

[0012] The controller has a drive control signal output interface, a load control interface, and a temperature acquisition interface. The drive control signal output interface is connected to the control terminal of the semiconductor discrete device under test (SDD) and is used to provide a drive control signal to the control terminal of the SDD. The drive control signal is used to control the operating state of the SDD. The temperature acquisition interface is connected to the output terminal of the temperature acquisition device, and the load control interface is connected to the control terminal of the adjustable load. The controller is also used to adjust the resistance value of the adjustable load based on the temperature acquisition signal output by the temperature acquisition device, so that the temperature acquisition signal is stabilized at the target temperature.

[0013] Optionally, the above-mentioned semiconductor discrete device test circuit also includes: an electrical parameter detector;

[0014] The electrical parameter detector is connected to the discrete semiconductor device under test in the test circuit via an electrical parameter test switch.

[0015] The controller is also used to determine whether the semiconductor discrete device under test meets the test conditions. When the semiconductor discrete device under test meets the test conditions, the controller controls the DC power supply to stop supplying power to the semiconductor discrete device under test, controls the electrical parameter test switch to close, and sends a test signal to the electrical parameter detector.

[0016] Optionally, in the above-mentioned semiconductor discrete device test circuit, determining whether the semiconductor discrete device under test meets the test conditions includes:

[0017] When the temperature acquisition signal output by the temperature acquisition device corresponding to the semiconductor discrete device under test stabilizes at the target temperature, the timer is controlled to start timing, and it is determined whether the cumulative timing duration of the current timing cycle has reached the target duration. When the target duration is reached, it is determined that the semiconductor discrete device under test meets the test conditions.

[0018] Optionally, in the above-mentioned semiconductor discrete device test circuit, determining whether the semiconductor discrete device under test meets the test conditions further includes:

[0019] Once the temperature acquisition signal output by the temperature acquisition device corresponding to the semiconductor discrete device under test stabilizes at the target temperature, the temperature acquisition signal output by the temperature acquisition device corresponding to the semiconductor discrete device under test is detected to determine whether the rate of change of the temperature acquisition signal is greater than a preset value. If it is greater than the preset value, the semiconductor discrete device under test is determined to meet the test conditions.

[0020] Optionally, in the above-mentioned semiconductor discrete device test circuit, the controller is further used for:

[0021] The test result of the electrical parameter detector is obtained. When the test result is the first test result, the DC power supply is controlled to supply power to the semiconductor discrete device under test. The resistance value of the adjustable load is adjusted based on the temperature acquisition signal output by the temperature acquisition device so that the temperature acquisition signal is stabilized at the target temperature. The timer is also controlled to continue timing.

[0022] When the test result is the second test result, a test report is generated, and the test report includes at least the target temperature and the timing result of the timer;

[0023] The first test result is used to characterize that the semiconductor discrete device under test is fault-free, and the second test result is used to characterize that the semiconductor discrete device under test is faulty.

[0024] Optionally, in the above-mentioned semiconductor discrete device test circuit, the number of test circuits is N, where N is a positive integer not less than 2.

[0025] Optionally, in the above-mentioned semiconductor discrete device test circuit, the DC power supply is a multi-output power supply or a power supply with adjustable output voltage.

[0026] Optionally, in the above-mentioned semiconductor discrete device test circuit, when the DC power supply is a power supply with adjustable output voltage, the controller also has a voltage control interface, which is used to output a voltage control signal to the DC power supply, and the voltage control signal is used to control the DC power supply to output a voltage of a target amplitude.

[0027] Optionally, in the above-mentioned semiconductor discrete device test circuit, the controller is further configured to obtain the device type of the semiconductor discrete device under test, and obtain the target temperature, target amplitude and duty cycle corresponding to the control signal that match the device type based on a preset mapping relationship.

[0028] A semiconductor discrete device testing apparatus includes a human-computer interaction device and any of the above-mentioned semiconductor discrete device testing circuits. The human-computer interaction device is connected to the controller and is used to interact with the controller for data exchange.

[0029] Based on the above technical solution, the solution provided by the embodiments of the present invention adjusts the equivalent resistance of the adjustable load by the controller, thereby adjusting the current flowing through the semiconductor discrete device under test, so that the temperature of the semiconductor discrete device under test is stabilized at the target temperature, realizing the simulation of the actual working conditions of the semiconductor discrete device under test. Thus, various faults that the semiconductor discrete device under test may produce during actual operation can be tested. Attached Figure Description

[0030] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0031] Figure 1 This is a schematic diagram of the structure of the semiconductor discrete device test circuit disclosed in the embodiments of this application;

[0032] Figure 2 This is a schematic diagram of the process for adjusting the temperature of a discrete semiconductor device as disclosed in an embodiment of this application;

[0033] Figure 3 This is a schematic diagram of the structure of a semiconductor discrete device test circuit disclosed in another embodiment of this application;

[0034] Figure 4 and Figure 5 A schematic diagram showing the test results obtained by using the semiconductor discrete device test circuit described in this application to test semiconductor discrete devices;

[0035] Figure 6 This is a schematic diagram of the structure of a semiconductor discrete device testing apparatus disclosed in an embodiment of this application. Detailed Implementation

[0036] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] The applicant's research revealed that the actual lifespan and operating condition of discrete semiconductor devices are closely related to the stress they experience during operation. Accurately assessing the device's lifespan and operating condition requires experimental design tailored to actual operating conditions. Existing testing methods for conventional lifespan tests are conducted under specified test conditions, not simulating real-world operating conditions. This fails to uncover the various scenarios encountered by discrete semiconductor devices during actual operation, making it difficult to test for the various faults that may occur in discrete semiconductor devices during real-world use.

[0038] This invention aims to provide a lifetime testing solution that can more comprehensively identify problems in discrete semiconductor devices, solving the problem that existing lifetime testing solutions cannot detect all potential issues in products. This solution simulates the actual operating conditions of the discrete semiconductor device under test, recreating its working scenario, and thus can test for various problems that may occur during actual operation.

[0039] See Figure 1 This application discloses a semiconductor discrete device test circuit, which includes a DC power supply DC, a test circuit 100, and a controller 200.

[0040] The DC power supply is used to provide operating power to the electrical components in the circuit. The DC power supply can be a multi-output power supply with multiple output voltages (e.g., 200V, 600V, 1000V, etc.) or a DC power supply with adjustable output voltage. When testing the semiconductor discrete device 201 under test, the voltage output interface of the DC power supply can be selected or the output voltage of the DC power supply can be adjusted according to the rated operating voltage of the semiconductor discrete device. Furthermore, in order to ensure the stability of the output voltage of the DC power supply, the test circuit can also include a voltage stabilizing capacitor C connected in parallel with the DC power supply.

[0041] The test circuit 100 includes a semiconductor discrete device under test 201, an adjustable load 202, and a temperature acquisition device 203;

[0042] The type of the semiconductor discrete device under test 201 can be selected according to the testing requirements. For example, it can be a MOS device, more specifically, a SiC-based or Si-based MOS device. The gate, source, and drain of the MOS device correspond to the control terminal, output terminal, and input terminal of the semiconductor discrete device under test 201, respectively. In this scheme, the input terminal of the semiconductor discrete device under test 201 is connected to the positive terminal of the DC power supply, and the output terminal is connected to the negative terminal of the DC power supply through the adjustable load 202. Its control terminal is connected to the drive control signal output interface of the controller 200. The conduction state of the semiconductor discrete device under test 201 is controlled by the drive control signal output by the drive control signal output interface. By adjusting the duty cycle of the drive control signal, the current flowing through the drive control signal can be adjusted. The higher the duty cycle, the greater the current flowing through the semiconductor discrete device under test 201. In this scheme, in order to reproduce the actual working scenario of the semiconductor discrete device under test 201, the duty cycle of the drive control signal can be set to a fixed value, such as 50% or others. Furthermore, to prevent excessive drive control signal voltage from damaging the control terminal of the semiconductor discrete device under test 201, the circuit may also include a voltage drop resistor R disposed at the control terminal of the semiconductor discrete device under test 201. GS .

[0043] One end of the adjustable load 202 is connected to the output terminal of the semiconductor discrete device, and the other end is connected to the negative terminal of the DC power supply. In this scheme, the adjustable load 202 and the semiconductor discrete device under test 201 are connected in series. The equivalent resistance of the adjustable load 202 is adjustable. The larger the equivalent resistance, the smaller the current flowing through the semiconductor discrete device under test 201, and vice versa. In this scheme, the current flowing through the semiconductor discrete device under test 201 can be adjusted by adjusting the equivalent resistance of the adjustable load 202.

[0044] The temperature acquisition device 203 is used to acquire the temperature of the semiconductor discrete device 201 under test and output a temperature acquisition signal that matches the temperature. The temperature acquisition device 203 can be any type of temperature sensor, such as a contact temperature sensor, a non-contact temperature sensor, etc.

[0045] The controller 200 has a drive control signal output interface, a load control interface, and a temperature acquisition interface. The drive control signal output interface is connected to the control terminal of the semiconductor discrete device under test (SDT) 201 and is used to provide a drive control signal to the control terminal of the SDT 201. The drive control signal is used to control the operating state (conduction state) of the SDT 201, and the specific configuration of the drive control signal can be fixed. The temperature acquisition interface is connected to the output terminal of the temperature acquisition device 203 and is used to acquire the temperature acquisition signal from the temperature acquisition device 203. The load control interface is connected to the control terminal of the adjustable load 202. The controller 200 is also used to adjust the equivalent resistance of the adjustable load 202 based on the temperature acquisition signal output by the temperature acquisition device 203, so that the temperature acquisition signal is stabilized at a target temperature. The target temperature is the temperature at which the SDT 201 operates normally, determined empirically.

[0046] The above-disclosed solution adjusts the equivalent resistance of the adjustable load through a controller, thereby adjusting the current flowing through the semiconductor discrete device under test, so that the temperature of the semiconductor discrete device under test is stabilized at the target temperature, thus simulating the actual working conditions of the semiconductor discrete device under test. As a result, various faults that may occur in the semiconductor discrete device under test during actual operation can be tested.

[0047] See Figure 2 In this solution, the temperature acquisition signal can be stabilized at the target temperature in the following way:

[0048] Step S1: Adjust the current flowing through the semiconductor discrete device under test 201 to a first current by adjusting the equivalent resistance of the adjustable load. The first current can be 0.5A or other.

[0049] The circuit described above may also include a current sensor to measure the current flowing through the semiconductor discrete device 201 under test.

[0050] Step S2: Determine whether the temperature acquisition signal is in a stable state;

[0051] Step S3: When the temperature acquisition signal is in a stable state, determine whether the temperature acquisition signal is the target temperature;

[0052] The target temperature value is matched with the type of the semiconductor discrete device 201 under test. For example, when the semiconductor discrete device 201 under test is a SiCMOS, the target temperature is any value within the range of 175±5℃.

[0053] Step S4: When the temperature acquisition signal is not the target temperature, determine whether the temperature acquisition signal is greater than the target temperature;

[0054] Step S5: When the temperature acquisition signal is greater than the target temperature, increase the equivalent resistance of the adjustable load based on a preset step size;

[0055] In this scheme, for every preset step increase or decrease in the equivalent resistance of the adjustable load 202, the current flowing through the semiconductor discrete device under test 201 changes to a second current, which can be 0.1A.

[0056] Step S6: When the temperature acquisition signal is lower than the target temperature, reduce the equivalent resistance of the adjustable load based on a preset step size.

[0057] The above-described semiconductor discrete device test circuit can simulate the working scenario of the semiconductor discrete device under test 201, that is, simulate the long-term use conditions of the semiconductor discrete device under test 201. In this solution, after simulating the use conditions of the semiconductor discrete device under test 201, an electrical parameter detector 300 can be used to detect the electrical parameters of the semiconductor discrete device under test 201. Specifically, the semiconductor discrete device test circuit also includes an electrical parameter detector 300, see [link to relevant documentation]. Figure 3 The electrical parameter detector 300 is connected to the semiconductor discrete device 201 under test in the test circuit 100 via an electrical parameter test switch. The electrical parameter test switch K can be a switch group, which includes multiple sub-switches. Each sub-switch corresponds to a port of the semiconductor discrete device under test. When the electrical parameter test switch is closed, each port of the semiconductor discrete device under test is electrically connected to the corresponding pin of the electrical parameter detector 300. At this time, the electrical parameters of the semiconductor discrete device under test 201 can be tested by the electrical parameter detector 300 to determine whether the operating condition of the semiconductor discrete device under test 201 is reliable. Therefore, in this embodiment, the controller 200 is also used to determine whether the semiconductor discrete device under test 201 meets the test conditions. When the semiconductor discrete device under test 201 meets the test conditions, the controller controls the DC power supply to stop supplying power to the semiconductor discrete device under test 201, controls the electrical parameter test switch to close, and sends a test signal to the electrical parameter detector 300. After the electrical parameter detector 300 obtains the test signal, it performs electrical parameter testing on the semiconductor discrete device under test 201 and generates a test result.

[0058] In this embodiment, test conditions can be set according to experimental requirements. For example, determining whether the semiconductor discrete device 201 under test meets the test conditions includes: when the temperature acquisition signal output by the temperature acquisition device 203 corresponding to the semiconductor discrete device 201 under test is stable at the target temperature, controlling the timer corresponding to the semiconductor discrete device 201 under test to start timing; after the timer starts timing, determining whether the cumulative timing duration of the timer in the current timing cycle has reached the target duration; when the target duration is reached, determining that the semiconductor discrete device 201 under test meets the test conditions, at which point electrical parameter testing of the semiconductor discrete device 201 under test is required. The target duration is a custom duration, such as 5 hours, 10 hours, or other durations.

[0059] In this embodiment, when the tested semiconductor discrete device 201 is stable at the target temperature, its temperature fluctuation is minimal if no fault occurs. However, as the test duration increases, if the tested semiconductor discrete device 201 fails at a certain moment, its electrical parameters will change. This will cause a significant change in the current flowing through the tested semiconductor discrete device 201, leading to drastic temperature fluctuations. At this time, the rate of change of the temperature acquisition signal detected by the temperature acquisition device 203 in two adjacent temperature sampling cycles will be significant. If the rate of change is greater than normal, it can be directly determined that the semiconductor discrete device 201 under test has a fault and its electrical parameters need to be tested. Therefore, determining whether the semiconductor discrete device under test meets the test conditions also includes: after the temperature acquisition signal output by the temperature acquisition device 203 corresponding to the semiconductor discrete device 201 under test reaches the target temperature, continuing to detect the temperature acquisition signal output by the temperature acquisition device 203 corresponding to the semiconductor discrete device 201 under test, and determining whether the rate of change of the temperature acquisition signal is greater than a preset value. When the rate of change is greater than the preset value, it is determined that the semiconductor discrete device 201 under test meets the test conditions.

[0060] In this embodiment, the lifespan of the semiconductor discrete device under test 201 can be tested using the semiconductor discrete device test circuit. Specifically, the controller 200 is further configured to: obtain the test result of the electrical parameter detector 300 after testing the semiconductor discrete device under test 201 using the electrical parameter detector 300; when the test result is a first test result (the first test result is used to characterize that the semiconductor discrete device under test 201 is fault-free); control the DC power supply to continue supplying power to the semiconductor discrete device under test 201; adjust the resistance value of the adjustable load 202 based on the temperature acquisition signal output by the temperature acquisition device 203, so that the temperature acquisition signal of the temperature acquisition device 203 corresponding to the semiconductor discrete device under test 201 is stabilized at the target temperature; and control the timer to continue timing. At this time, the timer continues to accumulate timing based on the original timing result. For example, if the timing result of the timer in the previous stage is 100 hours, the timing duration continues to accumulate based on 100 hours. The timing duration of the timer can characterize the lifespan of the semiconductor discrete device under test 201. When the test result of the electrical parameter detector 300 is the second test result (the second test result is used to characterize the failure of the semiconductor discrete device 201 under test), it indicates that the semiconductor discrete device 201 under test has failed and its lifespan has reached its upper limit. At this time, the electrical parameter detector 300 generates a test report, which includes at least the target temperature and the timing result of the timer. The user can determine the lifespan of the semiconductor discrete device 201 under test at the target temperature through the timing result of the timer in the test report.

[0061] In this embodiment, considering that if only one semiconductor discrete device 201 under test is subjected to the above test, the test result will be highly random and difficult to represent all semiconductor discrete devices 201 under test. Therefore, in order to improve the reliability of the test result and make the test result representative of all semiconductor discrete devices 201 under test, it is necessary to perform the above test on multiple semiconductor discrete devices 201 under test. In order to reduce the test time, in this solution, the number of test circuits 100 is N, where N is a positive integer not less than 2. Each test circuit 100 corresponds to one semiconductor discrete device 201 under test. At this time, the semiconductor discrete device test circuit can be used to test N semiconductor discrete devices 201 under test at the same time, which can significantly improve the test efficiency compared to a single test circuit.

[0062] In this embodiment, the DC power supply is a multi-output power supply or a power supply with adjustable output voltage. When the DC power supply is a multi-output power supply, the user can select the power output terminal of the multi-output power supply according to the rated input voltage of the semiconductor discrete device 201 under test. When the DC power supply is an adjustable power supply, the output voltage of the DC power supply can be adjusted by the controller 200. At this time, the controller 200 also has a voltage control interface, which is connected to the control terminal of the DC power supply. The controller 200 is used to output a voltage control signal to the DC power supply through the voltage control interface. The voltage control signal is used to control the DC power supply to output a voltage of a target amplitude, which is the amplitude of the rated input voltage corresponding to the semiconductor discrete device 201 under test. In actual testing, the user can input the rated input voltage of the semiconductor discrete device 201 under test to the controller 200. The controller 200 generates a corresponding voltage control signal based on the rated input voltage and sends the voltage control signal to the DC power supply.

[0063] In this embodiment, since the types of semiconductor discrete devices 201 under test are diverse, the rated input voltages corresponding to different types of semiconductor discrete devices 201 under test may be different. In addition to generating voltage control signals based on the rated input voltage input by the user, the controller 200 can also generate voltage control signals based on the type of semiconductor discrete device 201 under test. At this time, the controller 200 is also used to obtain the device type of the semiconductor discrete device 201 under test (input by the user to the controller 200), and obtain the target amplitude matching the device type based on the preset mapping relationship. Of course, in order to configure the target temperature and the duty cycle of the control signal more quickly, the correspondence between the target temperature and the duty cycle of the control signal and the device type can also be added to the preset mapping relationship. At this time, after obtaining the device type of the semiconductor discrete device 201 under test, the correspondence between the target temperature, the target amplitude and the duty cycle of the control signal required in this test can be directly determined based on the device type.

[0064] To verify the experimental effect of the above circuit, the applicant also conducted experimental verification on the circuit. The experimental conditions were as follows: the output voltage of the DC power supply was VDC = 600V, the amplitude of the control signal was VGS = +5 / 0V, the frequency of the control signal was f = 100kHz, the duty cycle was Duty = 50%, and the ID flowing through the semiconductor discrete device under test 201 was adjusted according to the target temperature TA to ensure TA = 175±5℃. The semiconductor discrete device under test 201 was a SiCMOS switch, specifically including SiCMOS switch 1, SiCMOS switch 2, SiCMOS switch 3, and SiCMOS switch 4.

[0065] Experimental Procedure: A 5V and 12V power supply is used to power the controller 200. The controller 200 uses a function generator to generate a 100kHz, +5 / 0V, 50% duty cycle square wave signal (control signal). This square wave signal is applied to the gate of the SiCMOS switch. At this time, a 600V DC voltage is applied to the input terminal of the SiCMOS switch using a DC power supply. The output terminal of the SiCMOS switch is connected to an adjustable load 202. A temperature sensor is fixed to the metal backplate of the SiCMOS switch to measure the temperature signal of the SiCMOS switch. The current flowing through the SiCMOS switch is adjusted by adjusting the equivalent resistance of the adjustable load 202 to stabilize the temperature of the SiCMOS switch measured by the temperature sensor at the target temperature.

[0066] See Figure 4 and Figure 5 , Figure 4 and Figure 5 The horizontal axis represents the cumulative timing duration of the timer, and the vertical axis represents the current flowing through the measured discrete semiconductor device 201. Figure 4 and Figure 5 It was found that before the timer's cumulative timing duration reached 300 hours, SiCMOS switches 1, 2, and 3 experienced triode breakdown. SiCMOS switch 4 experienced triode breakdown when the timer's cumulative timing duration reached 384 hours. Therefore, the circuit disclosed in this application can simulate the actual operating conditions of the semiconductor discrete device 201 under test, thereby identifying the corresponding faults that occur during the actual use of the semiconductor discrete device 201.

[0067] Corresponding to the circuit described above, this application also discloses a semiconductor discrete device testing apparatus. This apparatus may include the semiconductor discrete device testing circuit provided in any of the above embodiments. See [link to relevant documentation]. Figure 6The device may also include a human-computer interaction device 500, which may be a computer, mobile phone or other smart electronic device. The human-computer interaction device is connected to the controller 200 and is used to interact with the controller 200 for data exchange. For example, the user can configure relevant parameters in the controller 200 through the human-computer interaction device. The controller 200 can also send relevant detection data during the test (such as the cumulative duration of the timer, the target temperature, the temperature acquisition signal of the temperature acquisition device 203, etc.) to the human-computer interaction device for display. Of course, when the above circuit also includes an electrical parameter detector 300, the human-computer interaction device can also be connected to the electrical parameter detector 300. The electrical parameter detector 300 is used to send the electrical parameter detection results of the tested semiconductor discrete device 201 to the human-computer interaction device.

[0068] For ease of description, the above system is described by dividing it into various modules based on their functions. Of course, in implementing this invention, the functions of each module can be implemented in one or more software and / or hardware components.

[0069] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on its differences from other embodiments. The systems and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. Components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0070] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0071] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0072] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0073] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A semiconductor discrete device test circuit, characterized in that, include: DC power supply, test circuit and controller; The test circuit includes the discrete semiconductor device under test, an adjustable load, and a temperature acquisition unit. The input terminal of the semiconductor discrete device under test is connected to the positive terminal of the DC power supply; One end of the adjustable load is connected to the output terminal of the semiconductor discrete device under test, and the other end is connected to the negative terminal of the DC power supply. The temperature acquisition device is used to acquire the temperature of the semiconductor discrete device under test; The controller has a drive control signal output interface, a load control interface, and a temperature acquisition interface. The drive control signal output interface is connected to the control terminal of the semiconductor discrete device under test (SDD) and is used to provide a drive control signal to the control terminal of the SDD. The drive control signal is used to control the operating state of the SDD. The temperature acquisition interface is connected to the output terminal of the temperature acquisition device, and the load control interface is connected to the control terminal of the adjustable load. The controller is also used to adjust the resistance value of the adjustable load based on the temperature acquisition signal output by the temperature acquisition device, so that the temperature acquisition signal is stabilized at the target temperature.

2. The semiconductor discrete device test circuit according to claim 1, characterized in that, Also includes: Electrical parameter detector; The electrical parameter detector is connected to the discrete semiconductor device under test in the test circuit via an electrical parameter test switch. The controller is also used to determine whether the semiconductor discrete device under test meets the test conditions. When the semiconductor discrete device under test meets the test conditions, the controller controls the DC power supply to stop supplying power to the semiconductor discrete device under test, controls the electrical parameter test switch to close, and sends a test signal to the electrical parameter detector.

3. The semiconductor discrete device test circuit according to claim 2, characterized in that, Determining whether the tested discrete semiconductor device meets the test conditions includes: When the temperature acquisition signal output by the temperature acquisition device corresponding to the semiconductor discrete device under test stabilizes at the target temperature, the timer is controlled to start timing, and it is determined whether the cumulative timing duration of the current timing cycle has reached the target duration. When the target duration is reached, it is determined that the semiconductor discrete device under test meets the test conditions.

4. The semiconductor discrete device test circuit according to claim 3, characterized in that, Determining whether the tested discrete semiconductor device meets the test conditions further includes: Once the temperature acquisition signal output by the temperature acquisition device corresponding to the semiconductor discrete device under test stabilizes at the target temperature, the temperature acquisition signal output by the temperature acquisition device corresponding to the semiconductor discrete device under test is detected to determine whether the rate of change of the temperature acquisition signal is greater than a preset value. If it is greater than the preset value, the semiconductor discrete device under test is determined to meet the test conditions.

5. The semiconductor discrete device test circuit according to claim 3, characterized in that, The controller is also used for: The test result of the electrical parameter detector is obtained. When the test result is the first test result, the DC power supply is controlled to supply power to the semiconductor discrete device under test. The resistance value of the adjustable load is adjusted based on the temperature acquisition signal output by the temperature acquisition device so that the temperature acquisition signal is stabilized at the target temperature. The timer is also controlled to continue timing. When the test result is the second test result, a test report is generated, and the test report includes at least the target temperature and the timing result of the timer; The first test result is used to characterize that the semiconductor discrete device under test is fault-free, and the second test result is used to characterize that the semiconductor discrete device under test is faulty.

6. The semiconductor discrete device test circuit according to claim 1, characterized in that, The number of test circuits is N, where N is a positive integer not less than 2.

7. The semiconductor discrete device test circuit according to claim 1, characterized in that, The DC power supply is a multi-output power supply or a power supply with adjustable output voltage.

8. The semiconductor discrete device test circuit according to claim 7, characterized in that, When the DC power supply is an adjustable output voltage power supply, the controller also has a voltage control interface, which is used to output a voltage control signal to the DC power supply, and the voltage control signal is used to control the DC power supply to output a voltage of a target amplitude.

9. The semiconductor discrete device test circuit according to claim 8, characterized in that, The controller is also used to obtain the device type of the semiconductor discrete device under test, and obtain the target temperature, target amplitude and duty cycle of the control signal that match the device type based on a preset mapping relationship.

10. A semiconductor discrete device testing apparatus, characterized in that, The device includes a human-computer interaction device and a semiconductor discrete device test circuit as described in any one of claims 1-8, wherein the human-computer interaction device is connected to the controller and is used to interact with the controller for data exchange.

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