Pixel and display device

Abstract

A pixel and a display device are provided. The pixel includes: a first transistor for controlling a driving current for light emission of the light emitting element; a second transistor for controlling a signal applied to a gate terminal of the first transistor by being turned on and off by a scan signal; and a storage capacitor in which a data signal or a first driving voltage is selectively applied.

Description

[0001] Cross-reference to related applications

[0002] This application is based on and claims priority to Korean Patent Application No. 10-2024-0125812, filed with the Korean Intellectual Property Office on September 13, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure relates to pixels, display devices having pixels, and electronic devices including display devices. Background Technology

[0004] Multiple pixels emit light based on data voltage and each includes a transistor (e.g., a thin-film transistor (TFT)) that controls the operation of each pixel. The display device can display an image in a sequential emission method in which pixels emit light in a row-by-row order or in a synchronous emission method in which all pixels emit light simultaneously after the data writing is completed sequentially.

[0005] Meanwhile, as the demand for high resolution and clarity has increased in the field of display device technology, circuit integration has become important, and circuit integration may require the design of small-sized pixels and / or complex microprocessor technology. Summary of the Invention

[0006] According to some embodiments of this disclosure, pixels, display devices having pixels, and electronic devices including display devices are provided. The problems to be solved by this disclosure are not limited to those mentioned above, and other problems and advantages of this disclosure not mentioned herein will be understood from the following description and will become clearer through embodiments of this disclosure. Furthermore, it will be understood that the problems and advantages to be solved by this disclosure can be achieved by the means and combinations thereof indicated in the claims.

[0007] Embodiments of this disclosure provide a pixel comprising: a first transistor having a first terminal connected to a first driving voltage line and a second terminal of the first transistor connected to a second driving voltage line via a light-emitting element; a second transistor connected between a second terminal of the first transistor and a gate terminal of the first transistor; and a storage capacitor wherein one of a data signal and a first driving voltage is selectively supplied from the first driving voltage line.

[0008] In one embodiment, the first terminal of the storage capacitor may be connected to the gate terminal of the first transistor, and the second terminal of the storage capacitor may be connected to the initialization voltage line.

[0009] In this implementation, the initialization voltage is supplied from the initialization voltage line, and the initialization voltage oscillates between a high-level voltage and a low-level voltage.

[0010] In one embodiment, the cathode of the light-emitting element may be connected to a second driving voltage line.

[0011] In this embodiment, the second driving voltage is supplied from the second driving voltage line, and the second driving voltage oscillates between a high-level voltage and a low-level voltage.

[0012] In one implementation, during the data write cycle, a data signal is applied to the first terminal of the first transistor.

[0013] In one implementation, a first drive voltage may be applied to the first terminal of the first transistor during cycles other than the data write cycle.

[0014] Another embodiment of this disclosure provides a display device, comprising: a pixel unit including a plurality of pixels, each of the plurality of pixels being connected to a corresponding scan line among a plurality of scan lines and a corresponding data line among a plurality of data lines; a scan driving unit supplying scan signals to each of the plurality of pixels via the plurality of scan lines; and a data driving unit selectively supplying one of a data signal and a first driving voltage to each of the plurality of pixels via the plurality of data lines, wherein each of the plurality of pixels includes: a first transistor, a first terminal of the first transistor being connected to a first driving voltage line, and a second terminal of the first transistor being connected to a second driving voltage line via a light-emitting element; a second transistor, the second transistor being connected between a second terminal of the first transistor and a gate terminal of the first transistor; and a storage capacitor. One of the data signal and the first driving voltage is selectively supplied from the first driving voltage line.

[0015] In one embodiment, the display device further includes a power supply unit that supplies initialization voltage to each of a plurality of pixels via a plurality of initialization voltage lines, wherein a first terminal of a storage capacitor is connectable to the gate terminal of a first transistor, and a second terminal of the storage capacitor is connectable to a corresponding initialization voltage line.

[0016] In this implementation, the initialization voltage can swing between a high-level voltage and a low-level voltage.

[0017] In one embodiment, the display device further includes a power supply unit that supplies a second driving voltage to each of the plurality of pixels via a plurality of second driving voltage lines, wherein the cathode of the light-emitting element can be connected to the corresponding second driving voltage line.

[0018] In this implementation, the second driving voltage can swing between a high-level voltage and a low-level voltage.

[0019] In one implementation, each of the plurality of data lines is connected to a first terminal of a first transistor of each of the plurality of pixels, and the data driving unit can supply a data signal during a data write cycle.

[0020] In one implementation, the data driving unit may supply the first driving voltage in cycles other than the data writing cycle.

[0021] Another embodiment of this disclosure provides an electronic device including: a processor; and a display device that receives clock signals and image data from the processor. The display device may include: a first transistor, a first terminal of which is connected to a first drive voltage line, and a second terminal of which is connected to a second drive voltage line via a light-emitting element; a second transistor connected between a second terminal of the first transistor and a gate terminal of the first transistor; and a storage capacitor. One of the data signal and the first drive voltage may be selectively supplied from the first drive voltage line.

[0022] In one embodiment, the first terminal of the storage capacitor may be connected to the gate terminal of the first transistor, and the second terminal of the storage capacitor may be connected to the initialization voltage line.

[0023] In this implementation, the initialization voltage can be supplied from the initialization voltage line, and the initialization voltage oscillates between a high-level voltage and a low-level voltage.

[0024] In one embodiment, the cathode of the light-emitting element may be connected to a second driving voltage line that supplies a second driving voltage that swings between a high-level voltage and a low-level voltage.

[0025] In one implementation, a data signal may be applied to the first terminal of the first transistor during a data write cycle.

[0026] In one implementation, the first driving voltage may be applied to the first terminal of the first transistor during a period other than the data write cycle.

[0027] Other aspects, features, and advantages besides those described above will become apparent from the accompanying drawings, claims, and detailed description of the invention. Attached Figure Description

[0028] The above and other aspects, features, and advantages of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0029] Figure 1 This is a block diagram illustrating a display device according to an embodiment of the present disclosure;

[0030] Figure 2This is a circuit diagram illustrating the structure of a pixel PX according to an embodiment of the present disclosure;

[0031] Figure 3 It is used for driving Figure 2 Timing diagram of the signal of pixel PX;

[0032] Figure 4 It is used for explanation Figure 2 A circuit diagram showing the operation of the elements of pixel PX during the initialization cycle;

[0033] Figure 5 It is used for explanation Figure 2 A circuit diagram showing the operation of the elements of a pixel PX during the data write cycle.

[0034] Figure 6 It is used for explanation Figure 2 A circuit diagram showing the operation of the elements of pixel PX during the on-bias cycle;

[0035] Figure 7 It is used for explanation Figure 2 A circuit diagram showing the operation of the elements of pixel PX during the light emission cycle;

[0036] Figure 8 This is a timing diagram of signals for driving a display device according to an embodiment of the present disclosure;

[0037] Figure 9 This is a circuit diagram used to explain the method of driving sub-pixels according to embodiments of the present disclosure; and

[0038] Figure 10 This is a block diagram illustrating an electronic device according to an embodiment. Detailed Implementation

[0039] This disclosure can be modified in various ways and has various implementations. Specific implementations are illustrated in the accompanying drawings and described in detail in the detailed description. Refer to the following and accompanying drawings. Figure 1 The effects and features of this disclosure, as well as the methods for implementing them, will become clear from the detailed description of the embodiments described below. However, this disclosure is not limited to the embodiments disclosed below and can be implemented in various forms.

[0040] In the following implementation, the terms first, second, etc. are used not in a limiting sense, but for the purpose of distinguishing one component from another.

[0041] In the following implementations, unless the context clearly indicates otherwise, singular expressions include plural expressions.

[0042] In the following implementation, terms such as “comprising” or “having” mean that the features or components described in the specification are present, and do not preclude the possibility that one or more other features or components may be added.

[0043] In the following embodiments, when it is said that a part such as a unit, area or component is positioned above or on another part, this includes not only the case where the one part is directly above the other part, but also the case where another unit, area or component is located in between.

[0044] In the following implementation, unless the context clearly indicates otherwise, terms such as connection or combination do not necessarily imply a direct and / or fixed connection or combination of two components, and do not exclude the presence of another component between the two components.

[0045] In the accompanying drawings, components may be enlarged or reduced in size for ease of explanation. In some embodiments, the dimensions and / or thickness of each component shown in the drawings are arbitrarily illustrated for ease of explanation, and therefore this disclosure is not necessarily limited to what is shown.

[0046] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. When describing with reference to the drawings, the same or corresponding parts are given the same reference numerals, and redundant descriptions will be omitted.

[0047] Figure 1 This is a block diagram illustrating a display device 10 according to an embodiment of the present disclosure.

[0048] The display device 10 according to embodiments of the present disclosure can be implemented as an electronic device, such as a smartphone, mobile phone, smartwatch, navigation device, game console, TV, vehicle head unit, notebook computer, laptop computer, tablet computer, personal media player (PMP), personal digital assistant (PDA), wearable device, etc. The electronic device may include a processor, such as an application processor, connected to the display device 10 and supplying clock signals and image data to the display device 10.

[0049] refer to Figure 1 The display device 10 disclosed herein may include a pixel unit 11, a scan driving unit 13, a data driving unit 15, and a control unit 17.

[0050] The pixel unit 11 may be provided with a plurality of scan lines (or gate lines) GL, a plurality of data lines DL, and a plurality of pixels PX connected to the plurality of scan lines GL and the plurality of data lines DL.

[0051] Multiple pixels PX can be arranged in various forms, such as stripe arrangement, pentile arrangement (diamond arrangement), and mosaic arrangement, to display an image. Pixel units 11 can be placed in the display area of ​​the substrate. Each pixel PX may include a light-emitting element, and the light-emitting element may be connected to pixel circuitry. In some embodiments, the light-emitting element may be an organic light-emitting diode (OLED).

[0052] For example, each pixel PX can emit red, green, blue, or white light through a light-emitting element. Each pixel PX can be connected to at least one scan line GL among multiple scan lines GL and a corresponding data line DL among multiple data lines DL.

[0053] Multiple scan lines GL may each extend in a first direction D1 (e.g., the x-direction or the row direction) and connect to multiple pixels PX located in the same row. Each scan line GL can send a scan signal to the multiple pixels PX in the same row. Multiple data lines DL may each extend in a second direction D2 (e.g., in the y-direction or the column direction) and connect to multiple pixels PX located in the same column. Each data line DL can send a data signal DATA (see...). Figure 2 Send to multiple pixels PX in the same column.

[0054] Scan driving unit 13 is connected to multiple scan lines GL, generates scan signals in response to control signals SCS from control unit 17, and sequentially supplies scan signals to scan lines GL. Scan lines GL may be connected to the gates of transistors included in pixel PX. Scan signals may be gate control signals that control the on and off states of transistors whose gates are connected to scan lines GL. Scan signals may be square wave signals including an on-state voltage that turns the transistor on and an off-state voltage that turns it off. In embodiments, the on-state voltage may be a high-level voltage (first-level voltage) or a low-level voltage (second-level voltage). The period during which the on-state voltage is maintained (hereinafter referred to as the "on-state voltage period") and the period during which the off-state voltage is maintained (hereinafter referred to as the "off-state voltage period") may be determined based on the function of the transistors receiving the scan signals within pixel PX.

[0055] The data drive unit 15 is connected to multiple data lines DL and can supply data signals DATA to the data lines DL in response to control signals DCS from the control unit 17. The data signals DATA supplied from the data lines DL can be supplied to pixels PX connected to the active scan lines.

[0056] although Figure 1Although not shown, the display device 10 may include a power supply unit. The power supply unit can generate the voltage required to drive the pixel PX based on the control signal DCS from the control unit 17. In some embodiments, the power supply unit may supply a first driving voltage ELVDD and a second driving voltage ELVSS (see [reference]). Figure 2 In some implementations, the power supply unit can be used to apply an initialization voltage VINT to initialize the transistors within the pixel PX (see [link to relevant documentation]). Figure 2 The power supply unit can supply the first drive voltage ELVDD, the second drive voltage ELVSS, and the initialization voltage VINT (see each of the first drive voltage line, the second drive voltage line, and the initialization voltage line) via each of these. Figure 2 Meanwhile, as will be described later, according to embodiments of this disclosure, the first driving voltage ELVDD and the data signal DATA may be selectively applied to the pixel PX or pixel circuit, and depending on the implementation method, the first driving voltage line may not be provided.

[0057] The control unit 17 can generate control signals SCS and DCS based on signals input from an external source, and supply the control signals SCS and DCS to the scan drive unit 13 and the data drive unit 15, respectively. The control signal SCS supplied to the scan drive unit 13 may include multiple clock signals and a scan start signal. The control signal DCS supplied to the data drive unit 15 may include a source start signal and a clock signal.

[0058] The display device 10 includes a display panel, and the display panel may include a substrate. The display device 10 may include a display area for displaying an image and a peripheral area (or non-display area) surrounding the display area and outside the display area. Pixel units 11 are placed in the display area of ​​the substrate, and scan driving unit 13, data driving unit 15, power supply unit (not shown), etc., may be placed in the peripheral area.

[0059] Figure 2 This is a circuit diagram illustrating the structure of a pixel PX according to an embodiment of the present disclosure.

[0060] refer to Figure 2 A pixel PX according to an embodiment of the present disclosure may include a first transistor T1 and a second transistor T2, a storage capacitor Cst, and a light-emitting element LED. A pixel PX according to an embodiment of the present disclosure may include a first transistor T1 for controlling the drive current for light emission from the light-emitting element LED, a second transistor T2 that turns on and off in response to a scan signal and controls the signal applied to the gate terminal of the first transistor T1, and a storage capacitor Cst.

[0061] One of the data signal DATA and the first driving voltage ELVDD can be selectively applied to the pixel PX of this disclosure. Additionally, the pixel PX of this disclosure can be applied with an initialization voltage VINT and a second driving voltage ELVSS, each having a varying voltage level. That is, in this disclosure, each of the initialization voltage VINT and the second driving voltage ELVSS can swing between a high-level voltage and a low-level voltage, rather than having a constant voltage.

[0062] The pixels PX of this disclosure, which are operated by signals having these characteristics, can be implemented with fewer elements than conventional pixels, and therefore, display devices or display panels including pixels PX of this disclosure can have a high degree of integration.

[0063] refer to Figure 2 The source terminal of the first transistor T1 can be connected to the data signal / first drive voltage line. The data signal DATA or the first drive voltage ELVDD can be supplied to the pixel PX from the data signal / first drive voltage line. Embodiments of this disclosure for generating the data signal DATA or the first drive voltage ELVDD will be described later.

[0064] refer to Figure 2 The drain terminal of the first transistor T1 can be connected to the anode of the light-emitting element LED. Furthermore, the source terminal of the second transistor T2 can be connected to both the drain terminal of the first transistor T1 and the anode of the light-emitting element LED. (Reference) Figure 2 The cathode of the LED can be connected to the second driving voltage line. The second driving voltage ELVSS can be supplied from the second driving voltage line.

[0065] refer to Figure 2 The drain terminal of the second transistor T2 can be connected to the gate terminal of the first transistor T1. Additionally, the first terminal of the storage capacitor Cst can be connected to the gate terminal of the first transistor T1 and the drain terminal of the second transistor T2. (See reference...) Figure 2 The second terminal of the storage capacitor Cst can be connected to the initialization voltage line. The initialization voltage VINT can be supplied from the initialization voltage line.

[0066] refer to Figure 2 The gate terminal of the second transistor T2 can be connected to the scan line GL. The scan signal GW can be applied through the scan line GL.

[0067] The first transistor T1 of the pixel PX disclosed herein can be turned on or off in response to a signal applied to the gate terminal of the first transistor T1, the voltage at the first terminal of the storage capacitor Cst, or the voltage at the drain terminal of the second transistor T2.

[0068] The second transistor T2 of the pixel PX disclosed herein can be turned on or off in response to a signal or scan signal GW applied to the gate terminal of the second transistor T2.

[0069] As described above, in the pixel PX of this disclosure, one of the data signal DATA and the first driving voltage ELVDD can be selectively applied to a terminal or the source terminal of the driving transistor (first transistor T1).

[0070] In the implementation, the data signal DATA and the first drive voltage ELVDD are generated as separate signals, and for example, based on Figure 1 Under the control of the control unit 17, a data signal DATA or a first driving voltage ELVDD can be applied to the pixel PX. In some embodiments, the data signal DATA can be generated and applied by the data driving unit 15, and the first driving voltage ELVDD can be generated and applied by the power supply unit.

[0071] In some implementations, the data signal DATA and the first drive voltage ELVDD may be a single signal. In some implementations, the data signal DATA and the first drive voltage ELVDD are a single signal generated and supplied from the data drive unit 15, and may have different names based on their function. In some implementations, the first drive voltage ELVDD may be a sustaining voltage. In this case, in addition to the data write cycle P2 described later (see...),... Figure 3 In the period other than the first drive voltage ELVDD, the sustaining voltage can be applied to the data signal / first drive voltage line, and in the data write period P2, the data signal DATA for grayscale expression can be applied to the data signal / first drive voltage line.

[0072] Figure 3 It is used for driving Figure 2 The timing diagram of the signal of pixel PX.

[0073] refer to Figure 3 The illustration shows the effect applied to a unit period (e.g., a single frame period) within a single unit period. Figure 2 The changes in the signals of pixel PX (i.e., the second driving voltage ELVSS, the scan signal GW, the initialization voltage VINT, and the data signal DATA or the first driving voltage ELVDD).

[0074] refer to Figure 3 A unit cycle can mainly include the initialization cycle P1, the data writing cycle P2, the conduction bias cycle P3, and the light emission cycle P4.

[0075] The initialization period P1 can be used to activate the driving transistor for pixel PX (e.g., Figure 2The first transistor P1 is initialized during the initialization of its gate terminal. The data write cycle P2 can be the cycle in which the data signal DATA is applied to the gate terminal of the driving transistor of pixel PX and threshold voltage compensation is performed. The conduction bias cycle P3 can be the cycle in which a bias voltage is applied to the driving transistor of pixel PX to apply a drive current to the light-emitting element LED. The emission cycle P4 can be the cycle in which the current flowing through the driving transistor of pixel PX is applied to the light-emitting element LED to cause the LED to emit light or not emit light.

[0076] At the same time, refer to Figure 3 As will be obvious to those skilled in the art, Figure 3 The timing diagram relates to pixels PX connected to the second row (e.g., scan line GL) in the display device 10 or display panel. This can be seen from the fact that when the data signal DATA corresponding to the data signal DATA used for grayscale representation of the second row appears... <2> When this happens, the scan signal GW switches to an active level, for example, a low level.

[0077] In the following text, see references Figures 4 to 7 The description will be based on Figure 2 The diagram illustrates the operation of pixel PX in each cycle of an embodiment of this disclosure. Figures 4 to 7 In the diagram, dashed lines indicate electrical connections and the period through which signals are transmitted.

[0078] Figure 4 It is used for explanation Figure 2 The circuit diagram shows the operation of the elements of pixel PX during the initialization period P1.

[0079] refer to Figure 3 During the initialization cycle P1, the second driving voltage ELVSS applied to the cathode of the light-emitting element LED is a high-level voltage, the scan signal GW applied to the gate terminal of the second transistor T2 is a high-level voltage, the initialization voltage VINT applied to the second terminal of the storage capacitor Cst is a low-level voltage, and the voltage applied to the source terminal of the first transistor T1 is the first driving voltage ELVDD. Here, the first driving voltage ELVDD can be a sustaining voltage.

[0080] Based on these signals, reference Figure 4 The second transistor T2 can be turned off, and the gate terminal voltage V of the first transistor T1 is... T1_G The initialization voltage VINT can be low. Therefore, the gate terminal voltage V of the first transistor T1 is... T1_G It can be initialized to a value corresponding to the low level of the initialization voltage VINT. At the same time, the voltage of the cathode of the light-emitting element LED can be the high level of the second driving voltage ELVSS.

[0081] In summary, in order to write new frame data to pixel PX, a low-level initialization voltage VINT can be applied to the gate terminal of the first transistor T1 during the initialization period P1.

[0082] Simultaneously, the high level of the second driving voltage ELVSS can be appropriately set based on the range of values ​​of the data signal DATA used for grayscale representation. In some embodiments, the high level of the second driving voltage ELVSS can be set to the value at which the light-emitting element LED does not emit light within the range of values ​​of the data signal DATA used for grayscale representation.

[0083] Furthermore, the low level of the initialization voltage VINT can be set to be used to drive the transistor (e.g., Figure 2 The first transistor T1 is initialized with an appropriate value.

[0084] Figure 5 It is used for explanation Figure 2 The circuit diagram shows the operation of the element of pixel PX during the data write cycle P2.

[0085] refer to Figure 3 During the data writing cycle P2, the second driving voltage ELVSS applied to the cathode of the light-emitting element LED is a high-level voltage, the scan signal GW applied to the gate terminal of the second transistor T2 is a low level when the scan line GL has an effective level, the initialization voltage VINT applied to the second terminal of the storage capacitor Cst is a low-level voltage, and the voltage applied to the data signal / first driving voltage line connected to the source terminal of the first transistor T1 has a voltage corresponding to the data signal DATA.

[0086] As mentioned above, Figure 3 The timing diagram may relate to the second row of the display device 10 or the display panel. Figure 3 The data is written in cycle P2, where the scan signal GW has a low level period that can be formed to only receive data that can be applied to... Figure 3 The specific data signal in the data signal DATA corresponding to the n rows of the data write cycle P2, that is, the data signal DATA corresponding to the second row. <2> .

[0087] Based on these signals, reference Figure 5 The second transistor T2 can be turned on during the period when the scan signal GW is low. This is similar to the data signal DATA (e.g., Figure 3 Data signal DATA <2> The corresponding voltage can be applied to the source terminal of the first transistor T1. That is, the source terminal voltage V of the first transistor T1. T1_SThis can be the data signal voltage. Therefore, the drain terminal voltage of the first transistor T1 (or the source terminal voltage of the second transistor T2) can be the data signal voltage - threshold voltage. Additionally, as described above, since the second transistor T2 is turned on, the drain terminal voltage of the second transistor T2 or the gate terminal voltage V of the first transistor T1... T1_G It can also be a data signal voltage-threshold voltage. Threshold voltage compensation can be performed by the relationship between the voltages applied to each of these nodes.

[0088] Meanwhile, the voltage of the cathode of the light-emitting element LED can be a high-level second driving voltage ELVSS, so that no light is emitted from the light-emitting element LED.

[0089] Meanwhile, those skilled in the art will understand that the data signal voltage-threshold voltage is the value applied to the gate terminal of the first transistor T1 to turn on the first transistor T1.

[0090] In summary, when a voltage based on the data signal DATA is applied to the gate terminal of the first transistor T1 during the data write cycle P2, the data of the new frame is written to the pixel PX, and threshold voltage compensation can be performed.

[0091] Figure 6 It is used for explanation Figure 2 The circuit diagram shows the operation of the elements of pixel PX during the conduction bias period P3.

[0092] refer to Figure 3 During the conduction bias period P3, the second driving voltage ELVSS applied to the cathode of the light-emitting element LED is a high-level voltage, the scan signal GW applied to the gate terminal of the second transistor T2 is a high-level voltage, the initialization voltage VINT applied to the second terminal of the storage capacitor Cst is a low-level voltage, and the voltage applied to the data signal / first driving voltage line connected to the source terminal of the first transistor T1 is the first driving voltage ELVDD.

[0093] Based on these signals, reference Figure 6 The second transistor T2 can be turned off, and the gate terminal voltage V of the first transistor T1 is... T1_G This can be the data signal voltage minus the threshold voltage, the same as the data write cycle P2. Simultaneously, since the first drive voltage ELVDD is applied to the source terminal of the first transistor T1, the source terminal voltage V of the first transistor T1... T1_S The first driving voltage can be ELVDD. Additionally, the voltage of the cathode of the light-emitting element LED can be a high-level second driving voltage ELVSS.

[0094] In summary, in order to emit light from the light-emitting element LED, a first driving voltage ELVDD can be applied to the source terminal of the first transistor T1 during the conduction bias period P3.

[0095] Figure 7 It is used for explanation Figure 2 The circuit diagram shows the operation of the elements of pixel PX in the light emission period P4.

[0096] refer to Figure 3 During the light emission cycle P4, the second driving voltage ELVSS applied to the cathode of the light-emitting element LED is a low level voltage, the scan signal GW applied to the gate terminal of the second transistor T2 is a high level, the initialization voltage VINT applied to the second terminal of the storage capacitor Cst is a high level voltage, and the voltage applied to the data signal / first driving voltage line connected to the source terminal of the first transistor T1 is the first driving voltage ELVDD.

[0097] Based on these signals, reference Figure 7 The second transistor T2 is turned off, and the source terminal voltage V of the first transistor T1 is reduced. T1_S This can be the first drive voltage ELVDD. Furthermore, when the initialization voltage VINT applied to the second terminal of the storage capacitor Cst changes from a low level to a high level, the change in the initialization voltage (i.e., the difference (offset) between the high and low levels of the initialization voltage VINT) can be added as a boost voltage to the gate terminal of the first transistor T1 (or the first terminal of the storage capacitor Cst). Therefore, the gate terminal voltage V of the first transistor T1... T1_G It can be the data signal voltage - threshold voltage + ΔVINT. The voltage value when the initialization voltage VINT is high can be set based on the voltage value when the initialization voltage VINT is low and the offset value.

[0098] Meanwhile, when a low-level second driving voltage ELVSS is applied to the cathode of the light-emitting element LED, current can flow through the source terminal of the first transistor T1, the drain terminal of the first transistor T1 (or the anode of the light-emitting element LED), and the cathode of the light-emitting element LED, and the light-emitting element LED can emit light through this current.

[0099] In summary, during the light-emitting cycle P4, the LED emits light because current flows through it.

[0100] Meanwhile, considering the characteristics of the LED light-emitting element, the voltage value when the second driving voltage ELVSS is at a low level can be appropriately set. In some embodiments, the voltage value when the second driving voltage ELVSS is at a low level can be set to an optimized value to achieve a target brightness based on the characteristics of the LED light-emitting element.

[0101] Meanwhile, in embodiments, the display device 10 or display panel of this disclosure, including pixels PX, according to embodiments of this disclosure, may have a sequential data writing and synchronous light emission scheme. Specifically, in the display device 10 or display panel of this disclosure, multiple pixels PX can be simultaneously controlled during the initialization period P1, the conduction bias period P3, and the light emission period P4, and are controlled sequentially line by line during the data writing period P2.

[0102] Figure 8 This is a timing diagram of signals for driving the display device 10 according to an embodiment of the present disclosure.

[0103] Figure 8 The timing diagram shown in the figure may involve signals applied to n pixels PX connected to any one of the multiple data lines DL.

[0104] As described above, multiple pixels PX can be controlled simultaneously during the initialization period P1. That is, even if multiple pixels PX are located in different rows, the above reference can be applied to multiple pixels PX simultaneously. Figure 4 The control described in the initialization cycle P1.

[0105] As described above, multiple pixels PX can be controlled sequentially during the data write cycle P2. That is, for each of the multiple pixels PX, the control can be based on the scan signal GW. <1> GW <2> ...GW <n>The corresponding scan signal is used to write the data signal DATA for the corresponding grayscale expression.

[0106] As described above, multiple pixels PX can be controlled simultaneously during the conduction bias period P3. That is, even if multiple pixels PX are located in different rows, the above reference can be applied to multiple pixels PX simultaneously. Figure 6 The control during the conduction bias period P3 is described.

[0107] As described above, multiple pixels PX can be controlled simultaneously during the emission period P4. That is, even if multiple pixels PX are located in different rows, the above reference can be applied to multiple pixels PX simultaneously. Figure 7 The control in the described emission cycle P4.

[0108] Figure 9 This is a circuit diagram used to explain the method of driving sub-pixels according to embodiments of the present disclosure.

[0109] Depending on the design of the display device 10 or the display panel, a pixel PX may include multiple sub-pixels, and the multiple sub-pixels can be controlled together by sharing some signals. The light emitted by the light-emitting elements (LEDs) included in each of the multiple sub-pixels may be different or the same color.

[0110] Despite Figure 9 The present invention describes an instance in which one pixel PX comprises four subpixels, but the method according to the present disclosure can also be applied to cases in which one pixel PX comprises any number of subpixels.

[0111] refer to Figure 9 One of multiple pixel PX pq It can include four sub-pixels PX pq11 PX pq12 PX pq21 and PX pq22 .

[0112] In the implementation, all four sub-pixels PX pq11 PX pq12 PX pq21 and PX pq22 The initialization voltage VINT and the second driving voltage ELVSS can be shared. As described above, the pixel PX of this disclosure can be applied with an initialization voltage VINT and a second driving voltage ELVSS whose voltage amounts change. In this embodiment, the pixel PX pq The system provides an initialization voltage VINT and a second drive voltage ELVSS, and can supply the initialization voltage VINT and the second drive voltage ELVSS to four sub-pixels PX. pq11 PX pq12 PX pq21 and PX pq22 .

[0113] refer to Figure 9 The diagram illustrates the initialization voltage VINT and the second driving voltage ELVSS applied to pixel PX. pq All four sub-pixels PX pq11 PX pq12 PX pq21 and PX pq22 .

[0114] Meanwhile, in the implementation method, the four sub-pixels PX pq11 PX pq12 PX pq21 and PX pq22 Some of the subpixels can be connected to one scan line GL, and some or all of the remaining subpixels can be connected to another scan line GL. In some implementations, different scan lines GL can be connected to pixels PX separately. pq Each line within.

[0115] refer to Figure 9 The illustration shows the sub-pixel PX. pq11 and sub-pixel PX pq12 They are connected together to a scan line GL, and subpixels PX. pq21 and sub-pixel PX pq22 Together they connect to another scan line GL. Therefore, subpixel PX pq11 and sub-pixel PX pq12 It can be controlled by a scan signal GW(pq1) applied from a scan line GL, and sub-pixels PX pq21 and sub-pixel PX pq22 It can be controlled by the scan signal GW(pq2) applied from another scan line GL.

[0116] Furthermore, in the implementation, the four sub-pixels PX pq11 PX pq12 PX pq21 and PX pq22 Some of the pixels can be connected to one data signal / first driving voltage line, and some or all of the remaining sub-pixels can be connected to another data signal / first driving voltage line. In some embodiments, different data signals / first driving voltage lines can be connected to pixels PX respectively. pq Each column within.

[0117] refer to Figure 9 The illustration shows the sub-pixel PX. pq11 and sub-pixel PX pq21 They are connected together to a data signal / first drive voltage line, and the sub-pixel PX pq12 and sub-pixel PX pq22 Together they are connected to another data signal / first drive voltage line. Therefore, sub-pixel PX pq11 and sub-pixel PX pq21 It can be controlled by a data signal or a first drive voltage DATA / ELVDD(pq1) applied from a data signal / first drive voltage line, and the sub-pixel PX pq12 and sub-pixel PX pq22 It can be controlled by a data signal or a first drive voltage DATA / ELVDD(pq2) applied from another data signal / first drive voltage line.

[0118] Meanwhile, the transistors included in the pixels according to the various embodiments of this disclosure as discussed above have been described based on P-type metal-oxide-semiconductor field-effect transistors (MOSFETs), but designs in which the transistors are changed to N-type MOSFETs are also included in the various embodiments described in this disclosure, and such design changes will be readily understood by those skilled in the art.

[0119] Figure 10 This is a block diagram illustrating an electronic device 1000 according to an embodiment. Specifically, Figure 10 An electronic device 1000 is described, comprising a display module 1100, a processor 1200, a memory 1300, and a power module 1400. The electronic device 1000 may also include multiple ports capable of communicating with video cards, sound cards, memory cards, USB devices, or other systems.

[0120] The display module 1100 may be the display panel or display device 10 described above.

[0121] Processor 1200 can perform specific calculations or tasks. According to embodiments, processor 1200 can be a microprocessor, central processing unit (CPU), etc. Processor 1200 can be connected to other components via address bus, control bus, data bus, etc. According to embodiments, processor 1200 can also be connected to an expansion bus, such as a peripheral component interconnect (PCI) bus. Processor 1200 can control display module 1100.

[0122] The processor 1200 can control the display module 1100. In one embodiment, the processor 1200 can provide... Figure 1 The image data, control signals SCS and DCS of the control unit 17 are distributed to the display module 1100.

[0123] The memory 1300 may store data required for the operation of the electronic device 1000. For example, the memory 1300 may include non-volatile memory devices such as erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, phase-change random access memory (PRAM), resistive random access memory (RRAM), nano-floating gate memory (NFGM), polymer random access memory (PoRAM), magnetic random access memory (MRAM), or ferroelectric random access memory (FRAM) and / or volatile memory devices such as dynamic random access memory (DRAM), static random access memory (SRAM), or mobile DRAM.

[0124] Each of the above embodiments can be implemented independently, but the structure of each embodiment can be combined with other embodiments.

[0125] It should be understood that the embodiments described herein should be considered descriptively only and not for limiting purposes. Descriptions of features or aspects within each embodiment should generally be considered as applicable to other similar features or aspects in other embodiments. While one or more embodiments have been described with reference to the figures, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope defined by the appended claims.

[0126] The specific implementations described in the embodiments are examples and do not limit the scope of the embodiments. Furthermore, unless specifically mentioned as "necessary" or "important," they may not be essential components for the application of this disclosure.

[0127] The display devices and pixels disclosed herein can be used in a variety of products, such as portable electronic devices including mobile phones, smartphones, tablet PCs, mobile communication terminals, e-notebooks, e-book readers, portable multimedia players (PMPs), navigators, and ultra-mobile PCs (UMPCs), as well as televisions (TVs), laptops, monitors, billboards, Internet of Things (IoT) devices, etc. According to embodiments, the display devices and pixels of this disclosure can also be used in wearable devices, such as smartwatches, smartphones, glasses-type displays, or head-mounted displays (HMDs). According to embodiments, the display devices and pixels of this disclosure can also be used in vehicle dashboards, vehicle center instrument panels or dashboard central information displays (CIDs), mirror displays replacing vehicle side mirrors, and displays arranged on the rear side of the front seats of a vehicle for use as entertainment devices for rear-seat passengers.

[0128] In the description of the embodiments (particularly in the claims), the term "the" and similar reference terms may refer to both the singular and the plural. Furthermore, when a scope is described in the embodiments, this disclosure includes the application of individual values ​​within that scope (unless there is a statement to the contrary), and is identical to the description of each individual value constituting that scope in the detailed description. Finally, unless explicitly stated that the order of operations according to the method of construction of the embodiments is not reversed, the operations may be performed in an appropriate order. The embodiments are not necessarily limited to the order of the operations described above. All illustrative or explanatory terms used in the embodiments are for the purpose of explaining the embodiments in detail only, and the scope of the embodiments is not limited by the illustrative or explanatory terms unless limited by the claims. Furthermore, those skilled in the art will recognize that various modifications, combinations, and variations can be made according to design conditions and factors within the scope of the appended claims or their equivalents.

[0129] According to various embodiments of this disclosure, pixels can be implemented with fewer elements than conventional pixels, and display devices or display panels including these pixels can have a high degree of integration.

[0130] Each of the above-described embodiments is an independently implementable implementation, but it goes without saying that the structure of each embodiment can be combined with other embodiments.

[0131] Although this disclosure has been described with reference to embodiments shown in the accompanying drawings, these are merely exemplary, and those skilled in the art will understand that various modifications and other equivalent embodiments are possible. Therefore, the true scope of protection of this disclosure should be determined by the technical concept of the appended claims.

[0132] The specific implementations described in the embodiments are merely examples and do not limit the scope of the embodiments in any way. Additionally, unless specifically mentioned as "necessary" or "important," they may not be components absolutely essential to the application of this disclosure.

[0133] The use of the term "the" and similar reference terms in the description of embodiments (particularly in the claims) may refer to both the singular and the plural. Furthermore, when a scope is described in an embodiment, the invention is considered to include any single value falling within that scope (unless otherwise stated), and this is identical to each single value constituting the scope as described in the detailed description. Finally, unless there is an explicit description of the order or sequence of steps of the method of construction according to an embodiment, the steps may be performed in any suitable order. Embodiments are not necessarily limited to the steps in the order they are described. Unless otherwise defined in the claims, any use of example or exemplary terminology in embodiments is intended only to describe the embodiments in detail and is not intended to limit the scope of the embodiments. Furthermore, those skilled in the art will understand that various modifications, combinations, and variations may be made according to design conditions and factors within the scope of the appended claims or their equivalents.< / n>

Claims

1. A pixel, comprising: A first transistor, wherein a first terminal of the first transistor is connected to a first driving voltage line, and a second terminal of the first transistor is connected to a second driving voltage line via a light-emitting element; The second transistor is connected between the second terminal of the first transistor and the gate terminal of the first transistor; as well as Storage capacitors, In this process, one of the data signal and the first driving voltage is selectively supplied from the first driving voltage line.

2. The pixel according to claim 1, wherein, The first terminal of the storage capacitor is connected to the gate terminal of the first transistor, and The second terminal of the storage capacitor is connected to the initialization voltage line.

3. The pixel according to claim 2, wherein, The initialization voltage is supplied from the initialization voltage line, and the initialization voltage oscillates between a high-level voltage and a low-level voltage.

4. The pixel according to claim 1, wherein, The cathode of the light-emitting element is connected to the second driving voltage line, and The second driving voltage is supplied from the second driving voltage line, and the second driving voltage oscillates between a high-level voltage and a low-level voltage.

5. The pixel according to claim 1, wherein, During the data write cycle, the data signal is applied to the first terminal of the first transistor, and In cycles other than the data write cycle, the first drive voltage is applied to the first terminal of the first transistor.

6. A display device, comprising: A pixel unit, the pixel unit comprising a plurality of pixels, each of the plurality of pixels being connected to a corresponding scan line among a plurality of scan lines and a corresponding data line among a plurality of data lines; A scan driving unit that supplies scan signals to each of the plurality of pixels through the plurality of scan lines; as well as A data driving unit selectively supplies one of a data signal and a first driving voltage to each of the plurality of pixels via the plurality of data lines. Each of the plurality of pixels includes: A first transistor, wherein a first terminal of the first transistor is connected to a first driving voltage line, and a second terminal of the first transistor is connected to a second driving voltage line via a light-emitting element; A second transistor, the second transistor being connected between the second terminal of the first transistor and the gate terminal of the first transistor; and Storage capacitors, In this process, one of the data signal and the first driving voltage is selectively supplied from the first driving voltage line.

7. The display device according to claim 6, further comprising: A power supply unit supplies initialization voltage to each of the plurality of pixels via multiple initialization voltage lines. Wherein, the first terminal of the storage capacitor is connected to the gate terminal of the first transistor, and The second terminal of the storage capacitor is connected to the corresponding initialization voltage line.

8. The display device according to claim 7, wherein, The initialization voltage oscillates between a high-level voltage and a low-level voltage.

9. The display device according to claim 6, further comprising: A power supply unit supplies a second driving voltage to each of the plurality of pixels via a plurality of second driving voltage lines. The cathode of the light-emitting element is connected to the corresponding second driving voltage line, and The second driving voltage oscillates between a high-level voltage and a low-level voltage.

10. The display device according to claim 6, wherein, Each of the plurality of data lines is connected to the first terminal of the first transistor of each of the plurality of pixels, and the data driving unit supplies the data signal during the data write cycle. The data driving unit supplies the first driving voltage in cycles other than the data writing cycle.

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