Connector and electronic device

Abstract

The invention relates to a connector and an electronic device. The connector includes: a housing; a plurality of first pins each having a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion; and a plurality of second pins each having a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion. The height of the first contact portion is different from the height of the second contact portion.

Description

Technical Field

[0001] Various aspects of embodiments of this disclosure relate to connectors, display devices, and electronic devices. Background Technology

[0002] Because of the recent increase in interest in information display, research and development of display devices are ongoing. Summary of the Invention

[0003] Embodiments of this disclosure provide a connector exhibiting improved bending performance and a display device including said connector.

[0004] The aspects and features of this disclosure are not limited to those described, and other aspects and features not explicitly described will be clearly understood by those skilled in the art from the following description.

[0005] According to embodiments of this disclosure, the connector includes a housing, a plurality of first pins, and a plurality of second pins. Each of the plurality of first pins has a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion, and each of the plurality of second pins has a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion. The height of the first contact portion is different from the height of the second contact portion.

[0006] The height of the first contact portion can be greater than the height of the second contact portion.

[0007] The height difference between the first contact portion and the second contact portion can be 80 μm or less.

[0008] The width of the first contact portion can be greater than the width of the second contact portion.

[0009] The width of the first coupling portion can be greater than the width of the second coupling portion.

[0010] Multiple second pins can be placed between adjacent pins of multiple first pins.

[0011] Multiple first pins can be located on the outside of the connector.

[0012] Multiple second pins can be located at the center of the connector.

[0013] According to embodiments of this disclosure, the connector includes a housing, a plurality of first pins, and a plurality of second pins. Each of the plurality of first pins has a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion, and each of the plurality of second pins has a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion. The number of first contact portions differs from the number of second contact portions.

[0014] The number of first contact parts can be greater than the number of second contact parts.

[0015] The area of ​​the first contact portion can be larger than the area of ​​the second contact portion.

[0016] The width of the first coupling portion can be greater than the width of the second coupling portion.

[0017] Multiple second pins can be placed between adjacent pins of multiple first pins.

[0018] Multiple first pins can be located on the outside of the connector.

[0019] Multiple second pins can be located at the center of the connector.

[0020] According to embodiments of this disclosure, a display device includes a display panel, a circuit board electrically connected to the display panel, and a connector. The connector includes a housing, a plurality of first pins, and a plurality of second pins. The plurality of first pins and the plurality of second pins are electrically connected to the circuit board. Each of the plurality of first pins has a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion, and each of the plurality of second pins has a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion. The height of the first contact portion is different from the height of the second contact portion.

[0021] The height of the first contact portion can be greater than the height of the second contact portion.

[0022] The circuit board may include a first pad electrically connected to a first contact portion and a second pad electrically connected to a second contact portion.

[0023] The width of the first pad can be greater than the width of the second pad.

[0024] The distance between the first pad and the first contact portion can be greater than the distance between the second pad and the second contact portion.

[0025] According to embodiments of this disclosure, an electronic device includes a processor that provides input image data and a display device that displays an image based on the input image data. The display device includes a display panel, a circuit board electrically connected to the display panel, and a connector. The connector includes a housing, a plurality of first pins, and a plurality of second pins. The plurality of first pins and the plurality of second pins are electrically connected to the circuit board. Each of the plurality of first pins has a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion, and each of the plurality of second pins has a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion. The height of the first contact portion is different from the height of the second contact portion.

[0026] Other aspects, features, and details of the embodiments are included in the detailed description and accompanying drawings.

[0027] According to embodiments of this disclosure, even if a solder thickness step occurs due to the difference in pad size between the first and second pins of the connector, the connector will not bend by adjusting the height (or length) of the first pin.

[0028] The aspects and features of the embodiments are not limited to those described above, and various other aspects and features are also included in this specification. Attached Figure Description

[0029] The above and other aspects and features of this disclosure will become more apparent from the accompanying drawings, which describe embodiments of the present disclosure in more detail, in which:

[0030] Figure 1 This is a perspective view of a display device according to an embodiment;

[0031] Figure 2 This is a side view of the display device according to an embodiment;

[0032] Figure 3 This is a perspective view of the connector according to an embodiment;

[0033] Figure 4 This is an exploded perspective view of the connector according to an embodiment;

[0034] Figure 5 This is a bottom view of the connector according to an embodiment;

[0035] Figure 6 This is a perspective view of the first pin according to an embodiment;

[0036] Figure 7 This is a perspective view of the second pin according to an embodiment;

[0037] Figures 8 to 11 This is a side view of the first and second pins according to an embodiment;

[0038] Figure 12 This is a plan view of the display panel according to an embodiment;

[0039] Figure 13 It is a planar view of the sub-pixels according to the embodiment;

[0040] Figure 14 It is along Figure 13 A cross-sectional view taken from line I-I' in the diagram;

[0041] Figure 15 This is a block diagram describing an electronic device according to an embodiment; and

[0042] Figure 16Schematic diagrams of various embodiments of the electronic device are shown. Detailed Implementation

[0043] In the following description, embodiments of the present disclosure are described in detail with reference to the accompanying drawings. It should be noted that in the following description, only the parts necessary for understanding operation according to the present disclosure are described, and descriptions of other parts are omitted or only briefly described so as not to obscure the subject matter of the disclosure. Furthermore, the present disclosure may be implemented in other forms and is not limited to the embodiments described herein. The embodiments described herein provide a detailed description for those skilled in the art to readily implement the technical spirit of the present disclosure.

[0044] It will be understood that when an element or layer is referred to as being "on" another element or layer, "connected to," or "coupled to" another element or layer, the element may be directly on, directly connected to, or directly coupled to the other element or layer, or one or more intermediary elements or intermediary layers may be present. When an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly coupled to" another element or layer, no intermediary element or intermediary layer is present. For example, when a first element is described as being "coupled" or "connected" to a second element, the first element may be directly coupled to or connected to the second element, or the first element may be indirectly coupled to or connected to the second element via one or more intermediary elements.

[0045] In the accompanying drawings, the dimensions of various elements, layers, etc., may be exaggerated for clarity. The same reference numerals denote the same elements. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Furthermore, when describing embodiments of this disclosure, the use of "may" means "one or more embodiments of this disclosure." Expressions such as "at least one of..." and "any one of..." modify the entire list of elements when following it, and do not modify individual elements within the list. For example, the expression "at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized." As used herein, the terms "substantially," "approximately," and similar terms are used as approximate terms rather than terms of degree and are intended to describe inherent deviations in measurements or calculations that will be recognized by those skilled in the art.

[0046] It will be understood that although the terms “first,” “second,” “third,” etc., may be used herein to describe various elements, components, areas, layers, and / or segments, these elements, components, areas, layers, and / or segments should not be limited by these terms. These terms are used to distinguish one element, component, area, layer, or segment from another element, component, area, layer, or segment. Therefore, without departing from the teachings of the exemplary embodiments, the first element, first component, first area, first layer, or first segment discussed below may be referred to as a second element, second component, second area, second layer, or second segment.

[0047] For ease of description, spatial relative terms such as “below,” “under,” “down,” “above,” and “above” may be used herein to describe the relationship of one element or feature to another element (or feature) or feature (or feature) as shown in the accompanying drawings. It will be understood that, in addition to the orientations depicted in the drawings, the spatial relative terms are also intended to cover different orientations of the device in use or operation. For example, if the device in the drawings is flipped, an element described as “below” or “under” other elements or features will subsequently be oriented “above” or “above” other elements or features. Therefore, the term “below” can encompass both above and below orientations. The device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative terms used herein should be interpreted accordingly.

[0048] The terminology used herein is for the purpose of describing embodiments of this disclosure and is not intended to be limiting of this disclosure. Unless the context clearly indicates otherwise, the singular forms “a” and “an” as used herein are intended to also include the plural forms. It will be further understood that, when used in this specification, the terms “comprising” and / or “including” indicate the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0049] In view of the entire disclosure, those skilled in the art will understand that, unless otherwise stated or implied, each suitable feature of the various embodiments of the present disclosure may be combined or combined with each other in part or in whole, and may be technically interlocked and operated in a variety of suitable ways, and each embodiment may be implemented independently of each other or in combination with each other in any suitable way.

[0050] Furthermore, any numerical ranges disclosed and / or enumerated herein are intended to include all subranges with the same numerical precision contained within the enumerated ranges. For example, the range “1.0 to 10.0” is intended to include all subranges between (and including) the enumerated minimum value of 1.0 and the enumerated maximum value of 10.0, i.e., having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as 2.4 to 7.6. Any maximum numerical limit enumerated herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit described herein is intended to include all higher numerical limits contained therein. Therefore, the applicant reserves the right to amend this specification, including the claims, to expressly enumerate any subranges contained within the ranges expressly described herein.

[0051] Various embodiments are described with reference to the accompanying drawings, which schematically illustrate preferred embodiments. Therefore, it will be anticipated that the shape may vary, for example, depending on tolerances and / or manufacturing techniques. Consequently, the embodiments disclosed herein should not be construed as limited to the specific shapes shown, and should be interpreted as including variations in shape, for example, due to manufacturing processes. As described above, the shapes shown in the drawings may not represent the actual shape of areas of the device, and this embodiment is not limited thereto.

[0052] In the following, embodiments of the present disclosure are described in detail with reference to the accompanying drawings.

[0053] Figure 1 This is a perspective view of a display device according to an embodiment. Figure 2 This is a side view of the display device according to an embodiment.

[0054] Reference Figure 1 and Figure 2 The display device DD may have a display area DD_DA for displaying images and a non-display area DD_NDA for not displaying images. The non-display area DD_NDA may be provided on at least one side of the display area DD_DA. For example, the non-display area DD_NDA may be provided to surround the edge of the display area DD_DA (e.g., extend around the edge of the display area DD_DA).

[0055] The display device DD can have various planar shapes. The display device DD can have a closed loop shape including sides with straight and / or curved shapes. For example, the display device DD can have various planar shapes such as other polygons, circles, semicircles, and ellipses.

[0056] Display device DD can be applied to electronic devices with image display capabilities, such as portable computers, mobile phones, smartphones, tablet PCs, smartwatches, and navigation devices. Furthermore, display device DD can be applied to electronic devices with display surfaces applied to at least one surface, such as head-mounted displays (HMDs), virtual reality (VR) devices, mixed reality (MR) devices, and augmented reality (AR) devices.

[0057] In one embodiment, the display device DD may have a flat display surface. In another embodiment, the display device DD may have a display surface that is at least partially arcuate (or curved). In another embodiment, the display device DD may be bendable, foldable, or rollable. In such an embodiment, the display device DD may include a material with flexible properties.

[0058] The display device DD may include a display panel DP. The display panel DP may be an organic light-emitting display panel (OLED panel) using organic light-emitting diodes as light-emitting elements, an ultra-small light-emitting diode display panel (micro-LED or nano-LED display panel) using ultra-small light-emitting diodes as light-emitting elements, or a quantum dot organic light-emitting display panel (QD OLED panel) using quantum dots and organic light-emitting diodes, etc., but is not limited thereto. See below for reference. Figures 12 to 14 A detailed description of the Display Panel (DP) is provided.

[0059] One end of the flexible film FF can be electrically connected to the display panel DP, and the other end of the flexible film FF can be electrically connected to the first circuit board CB1. The flexible film FF can be a chip-on-film (COF) on which a driver integrated circuit is mounted, but is not limited to this. The display panel DP can receive voltages and signals for (e.g., to enable) panel operation through the flexible film FF.

[0060] The first circuit board CB1 can be disposed below the display panel DP. The first circuit board CB1 can be fixed to the rear surface of the display panel DP. One side of the first circuit board CB1 can be electrically connected to the flexible film FF, and the other side of the first circuit board CB1 can be electrically connected to the first connector CN1.

[0061] The first connector CN1 can be located below the display panel DP. One side of the first connector CN1 can be electrically connected to the first circuit board CB1, and the other side of the first connector CN1 can be electrically connected to the flexible cable FC. The first connector CN1 can be a connector for a flexible cable mounted on the surface of a circuit board. See below. Figures 3 to 11 A detailed description of the first connector CN1 is provided.

[0062] One end of the flexible cable FC can be electrically connected to the first connector CN1, and the other end of the flexible cable FC can be electrically connected to the second connector CN2. The flexible cable FC can be a flexible flat cable (FFC), but is not limited to this.

[0063] The second connector CN2 can be located below the display panel DP. One side of the second connector CN2 can be electrically connected to the flexible cable FC, and the other side of the second connector CN2 can be electrically connected to the second circuit board CB2. The second connector CN2 can be a connector for a flexible cable mounted on the surface of a circuit board. See below. Figures 3 to 11 A detailed description of the second connector CN2 is provided. The second circuit board CB2 can be disposed below the display panel DP. The second circuit board CB2 can be fixed to the rear surface of the display panel DP.

[0064] Figure 3 This is a perspective view of the connector according to an embodiment. Figure 4 This is an exploded perspective view of the connector according to an embodiment. Figure 5 This is a bottom view of the connector according to an embodiment.

[0065] Reference Figures 3 to 5 Connector CN (e.g., Figure 2 The first connector CN1 and the second connector CN2 in the circuit can be used to connect the flexible cable FC to the circuit board (e.g., Figure 2 The first circuit board CB1 and the second circuit board CB2 are electrically connected. The connector CN may include a housing 100 for receiving (e.g., accommodating) a flexible cable FC. The housing 100 may be coupled to the actuator 400. Pins 300 and 350 for electrical connection between the flexible cable FC and the circuit board may be coupled to the housing 100.

[0066] Pins 300 and 350 may include a first pin (e.g., power pin 300) and a second pin (e.g., signal pin 350). See below. Figures 6 to 11 A detailed description of the first pin 300 and the second pin 350 is provided.

[0067] In an embodiment, the connector CN may include a fixing portion 200 for securing the housing 100 to a circuit board. The fixing portion 200 may include a first fixing portion 200a located at one end of the housing 100 and a second fixing portion 200b located at the other end of the housing 100. The first fixing portion 200a and the second fixing portion 200b may be mounted on the circuit board to secure the housing 100 to the circuit board.

[0068] Actuator 400 may be rotatably coupled to housing 100. For example, actuator 400 may be opened to an open position, allowing flexible cable FC to be inserted into actuator 400. Connector CN may then be moved to a closed position to apply pressure to the inserted flexible cable FC to secure it. Actuator 400 may have a recess, and pins 300 and 350 may be received (e.g., accommodated) in the recess.

[0069] Pins 300 and 500 may be spaced apart from each other in the first direction DR1. The first pin 300 may be located outside the connector CN. For example, the first pin 300 may include a first power terminal 300a and a second power terminal 300b spaced apart from each other. The first power terminal 300a may be located on one outside of the connector CN, and the second power terminal 300b may be located on the other outside of the connector CN. The first power terminal 300a and the second power terminal 300b may be spaced apart, and a second pin 350 is located between the first power terminal 300a and the second power terminal 300b.

[0070] The second pin 350 can be located at the center of the connector CN. The second pin 350 can be located between the first pins 300 that are spaced apart from each other. The second pin 350 can be located between the first power terminal 300a and the second power terminal 300b that are spaced apart from each other.

[0071] Pins 300 and 350 can electrically connect the flexible cable FC to the circuit board. Pins 300 and 350 can be connected to the flexible cable FC inserted into the actuator 400 for electrical connection. Pins 300 and 350 can be mounted externally to the circuit board for electrical connection. Pins 300 and 350 can be electrically connected to the flexible cable FC inserted into the actuator 400 while mounted on the circuit board, to electrically connect the flexible cable FC to the circuit board. Pins 300 and 350 can be mounted on the circuit board using surface mount technology. Pins 300 and 350 can be formed of a conductive material.

[0072] The first pin 300 may have a larger volume than the second pin 350 to allow a larger allowable current than the allowable current of the second pin 350. For example, the first pin 300 may be implemented (or configured) to apply a current larger than the current applied by each of the second pins 350. For example, the first pin 300 may apply a current higher than the current of each of the second pins 350. The second pin 350 may apply a current lower than the current of the first pin 300. For example, the first pin 300 may be implemented to apply a current in the range of about 7A to about 10A, and the second pin 350 may apply a current of about 0.5A. In an embodiment, the first pin 300 of the connector CN may apply (or transmit) power, and the second pin 350 may apply (or transmit) a signal. However, the purpose or function of pins 300 and 350 is not limited thereto. As described above, because the connector CN includes a first pin 300 with a larger allowable current than the allowable current of the second pin 350, the allowable current of the connector CN can be increased. Therefore, the connector CN can reduce or mitigate heat generation issues caused by high current application, and because the overall allowable current can be increased without increasing the number of pins, the size of the connector CN can be reduced or minimized. Thus, the connector CN can be implemented (or configured) to apply relatively high current while reducing or minimizing its size by including the first pin 300, thereby further improving the performance of the electronic device and promoting the miniaturization of the connector CN.

[0073] Figure 6 This is a perspective view of the first pin according to an embodiment. Figure 7 This is a perspective view of the second pin according to an embodiment. Figures 8 to 11 This is a side view of the first and second pins according to an embodiment.

[0074] Reference Figures 6 to 11 The first pin 300 and the second pin 350 can be coupled to the housing 100. The first pin 300 may include a first coupling portion 301, a first contact portion 302 and / or a first connection portion 303.

[0075] The first coupling portion 301 may be a region coupled to the housing 100. The first coupling portion 301 may include a support portion and an extension portion extending from the support portion. The support portion may be positioned in a horizontal direction (e.g., a first direction DR1).

[0076] The extension may pass through the actuator 400 and may be coupled to the interior of the housing 100. For example, a portion of the extension may be inserted into the actuator 400 and may be secured to the actuator 400.

[0077] The extension may include a first vertical extension extending from one end of the support portion in a vertical direction (e.g., third direction DR3) and a second vertical extension extending from the other end of the support portion in a vertical direction (e.g., third direction DR3). The first vertical extension and the second vertical extension may be spaced apart from each other in a first direction DR1.

[0078] The extension may further include a first horizontal extension extending from one end of the first vertical extension in the second direction DR2 and a second horizontal extension extending from one end of the second vertical extension in the second direction DR2. The first horizontal extension and the second horizontal extension may be spaced apart from each other in the first direction DR1.

[0079] The first contact portion 302 may protrude from the first coupling portion 301. For example, the first contact portion 302 may protrude from the support portion of the first coupling portion 301 in a direction opposite to the second direction DR2, but is not limited thereto. The first contact portion 302 may be mounted on a circuit board. For example, the first contact portion 302 may be soldered to the surface of the circuit board using surface mount technology (SMT), but is not limited thereto. The first pin 300 may be mounted on the circuit board via the first contact portion 302 for electrical connection to the circuit board.

[0080] The first connecting portion 303 may protrude from the first coupling portion 301. For example, the first connecting portion 303 may protrude from the support portion of the first coupling portion 301 in the second direction DR2, but is not limited thereto. The first connecting portion 303 may be electrically connected to the flexible cable FC (see...). Figure 3 For example, the first connection portion 303 may be electrically connected to a flexible cable FC inserted into the housing 100. In embodiments, the first coupling portion 301, the first contact portion 302, and / or the first connection portion 303 may be integrally formed, but are not limited thereto.

[0081] The second pin 350 may include a second coupling portion 351, a second contact portion 352 and / or a second connection portion 353.

[0082] The second coupling portion 351 may be a region coupled to the housing 100. The second coupling portion 351 may include a support portion and an extension portion extending from the support portion. The extension portion may pass through the actuator 400 and may be coupled to the housing 100. For example, a portion of the extension portion may be inserted into the actuator 400 and may be secured to the actuator 400.

[0083] The extension may include a vertical extension extending from one end of the support portion in a vertical direction (e.g., third direction DR3) and a horizontal extension extending from one end of the vertical extension in a horizontal direction (e.g., second direction DR2).

[0084] The second contact portion 352 may protrude from the second coupling portion 351. For example, the second contact portion 352 may protrude from the support portion of the second coupling portion 351 in a direction opposite to the second direction DR2, but is not limited thereto. The second contact portion 352 may be mounted on a circuit board. For example, the second contact portion 352 may be soldered to the surface of the circuit board using surface mount technology (SMT), but is not limited thereto. The second pin 350 may be mounted on the circuit board via the second contact portion 352 for electrical connection to the circuit board.

[0085] The second connecting portion 353 may protrude from the second coupling portion 351. For example, the second connecting portion 353 may protrude from the support portion of the second coupling portion 351 in the second direction DR2, but is not limited thereto. The second connecting portion 353 may be electrically connected to the flexible cable FC. For example, the second connecting portion 353 may be electrically connected to the flexible cable FC inserted into the housing 100. In embodiments, the second coupling portion 351, the second contact portion 352, and / or the second connecting portion 353 may be integrally formed, but is not limited thereto.

[0086] In an embodiment, the width W11 of the first coupling portion 301 in the first direction DR1 may be different from the width W12 of the second coupling portion 351 in the first direction DR1. The width W11 of the first coupling portion 301 in the first direction DR1 may be greater than the width W12 of the second coupling portion 351 in the first direction DR1.

[0087] The width W21 of the first contact portion 302 in the first direction DR1 may be different from the width W22 of the second contact portion 352 in the first direction DR1. The width W21 of the first contact portion 302 in the first direction DR1 may be greater than the width W22 of the second contact portion 352 in the first direction DR1.

[0088] The width WP1 of the first pad P1 of the circuit board on which the first contact portion 302 is mounted in the first direction DR1 may be different from the width WP2 of the second pad P2 of the circuit board on which the second contact portion 352 is mounted in the first direction DR1. The width WP1 of the first pad P1 in the first direction DR1 may be greater than the width WP2 of the second pad P2 in the first direction DR1. In such an embodiment, the thickness (or lead amount) of the first solder SD1 between the first contact portion 302 and the first pad P1 in the third direction DR3 may be different from the thickness (or lead amount) of the second solder SD2 between the second contact portion 352 and the second pad P2 in the third direction DR3. The thickness (or lead amount) of the first solder SD1 in the third direction DR3 may be greater than the thickness (or lead amount) of the second solder SD2 in the third direction DR3.

[0089] Reference Figure 8 In connector CN (see Figure 3 In this embodiment, the height of the first pin 300 (or the first contact portion 302) on the third-direction DR3 may differ from the height of the second pin 350 (or the second contact portion 352) on the third-direction DR3 to prevent connector CN from bending due to the thickness step difference (or lead difference) between the first solder SD1 and the second solder SD2. For example, the height of the first pin 300 (or the first contact portion 302) on the third-direction DR3 may be higher than the height of the second pin 350 (or the second contact portion 352) on the third-direction DR3.

[0090] The length L1 of the first pin 300 on the third-direction DR3 may be different from the length L2 of the second pin 350 on the third-direction DR3. For example, the length L1 of the first pin 300 on the third-direction DR3 may be shorter than the length L2 of the second pin 350 on the third-direction DR3. In such an embodiment, the distance on the third-direction DR3 between the first pin 300 (or the first contact portion 302) and the first pad P1 may be greater than the distance on the third-direction DR3 between the second pin 350 (or the second contact portion 352) and the second pad P2.

[0091] In an embodiment, the height difference H (or length difference between the first pin 300 and the second pin 350 on the third-direction DR3) between the first pin 300 (or the first contact portion 302) and the second pin 350 (or the second contact portion 352) on the third-direction DR3 can be about 80 μm or less. For example, the height difference H (or length difference between the first pin 300 and the second pin 350 on the third-direction DR3) between the first pin 300 and the second pin 350 on the third-direction DR3 can be in the range of about 30 μm to about 50 μm. When the height difference H (or length difference between the first pin 300 and the second pin 350 on the third-direction DR3) between the first pin 300 and the second pin 350 on the third-direction DR3 is too small, due to the thickness step difference between the first solder SD1 and the second solder SD2, the connector CN may experience bending or lifting at the outer portion of the connector CN where the first pin 300 is located. When the height difference H (or length difference between the first pin 300 and the second pin 350 on the third-direction DR3) between the first pin 300 (or the first contact portion 302) and the second pin 350 (or the second contact portion 352) on the third-direction DR3 is too large, poor contact of the first pin 300 (or the first contact portion 302) may occur. The height difference H (or length difference between the first pin 300 and the second pin 350 on the third-direction DR3) between the first pin 300 and the second pin 350 can vary depending on the dimensions of pads P1 and P2, as well as the thickness step difference of solder SD1 and SD2.

[0092] Reference Figure 10 and Figure 11 To prevent connector CN (see above) from being damaged due to the lead content difference between solders SD1 and SD2 (see above). Figure 3 The bending phenomenon can be addressed by the number of first contact portions 302 differing from the number of second contact portions 352. For example, the number of first contact portions 302 can be greater than the number of second contact portions 352. For instance, multiple first contact portions 302 can be provided, and these multiple first contact portions 302 can be spaced apart from each other. The first contact portions 302 can be spaced apart in the first direction DR1. As described above, when multiple first contact portions 302 are provided, the thickness step difference (or lead difference) between the first solder SD1 and the second solder SD2 in the third direction DR3 can be reduced or minimized, and the phenomenon of first solder SD1 agglomeration can be alleviated. The accompanying drawings provide an embodiment configuring two first contact portions 302 and one second contact portion 352, but this disclosure is not limited thereto. The number of first contact portions 302 and second contact portions 352 can vary within a range that can reduce or minimize the lead difference between the first solder SD1 and the second solder SD2.

[0093] The number of first pads P1 on the circuit board on which the first contact portion 302 is mounted may differ from the number of second pads P2 on the circuit board on which the second contact portion 352 is mounted. The number of first pads P1 may be greater than the number of second pads P2. An embodiment providing two first pads P1 and one second pad P2 is shown in the accompanying drawings, but this disclosure is not limited thereto. The number of first pads P1 and second pads P2 may vary within a range that can reduce or minimize the lead content difference between the first solder SD1 and the second solder SD2.

[0094] The area (e.g., contact area or surface area) of the first contact portion 302 may differ from the area of ​​the second contact portion 352. For example, the area of ​​the first contact portion 302 may be larger than the area of ​​the second contact portion 352. The area of ​​the first pad P1 on which the first contact portion 302 is mounted may differ from the area of ​​the second pad P2 on which the second contact portion 352 is mounted. The area of ​​the first pad P1 may be larger than the area of ​​the second pad P2.

[0095] Figure 12 This is a plan view of the display panel according to an embodiment.

[0096] Reference Figure 12 The display panel DP can have a display area DA and a non-display area NDA. The display panel DP displays the image at (or from) the display area DA. The non-display area NDA is set around the display area DA.

[0097] The display panel (DP) may include a substrate (SUB), subpixels (SP), and / or display pads (PD).

[0098] Subpixels SP are disposed on the substrate SUB in the display area DA. The subpixels SP can be arranged in a matrix along a first direction DR1 and a second direction DR2 that intersects (e.g., crosses) the first direction DR1. However, the embodiments are not limited to this. For example, the subpixels SP can be arranged in a zigzag pattern along the first direction DR1 and the second direction DR2. For example, the subpixels SP can be arranged in a... (A registered trademark of Samsung Display Inc.) The format is as follows: The first direction DR1 can be the row direction, and the second direction DR2 can be the column direction. Two or more sub-pixels SP can constitute a pixel PXL.

[0099] Components for controlling the sub-pixel SP can be disposed on the substrate SUB in the non-display area NDA. For example, lines connected to the sub-pixel SP (such as gate lines and data lines) can be disposed in the non-display area NDA.

[0100] The display pad (PD) is located in the non-display area (NDA) on the substrate (SUB). The display pad (PD) can be electrically connected to the sub-pixel (SP) via a wire. For example, the display pad (PD) can be connected to the sub-pixel (SP) via a data cable.

[0101] The display pads (PD) can connect the display panel (DP) and the display device (DD) (see...) Figure 1 Other component interfaces. In an embodiment, voltages and signals for the operation of components included in the display panel DP can be provided from the driver integrated circuit via the display pad PD. For example, data lines can be connected to the driver integrated circuit via the display pad PD. For example, power voltage can be received from the driver integrated circuit via the display pad PD.

[0102] In embodiments, the display area DA can have various planar shapes. The display area DA can have a closed-loop shape including sides with straight and / or curved shapes. For example, the display area DA can have planar shapes such as other polygons, circles, semicircles, and ellipses.

[0103] In one embodiment, the display panel DP may have a flat display surface. In another embodiment, the display panel DP may have a display surface that is at least partially curved (or bent). In another embodiment, the display panel DP may be bendable, foldable, or rollable. In such an embodiment, the display panel DP and / or the substrate SUB may comprise a material with flexible properties.

[0104] Figure 13 It is a planar view of the sub-pixels according to the embodiment.

[0105] Reference Figure 13 Pixel PXL may include first sub-pixels SP1 to third sub-pixels SP3 arranged in the first direction DR1.

[0106] The first sub-pixel SP1 may have a first emission region EMA1 and a non-emission region NEA surrounding the first emission region EMA1. The second sub-pixel SP2 may have a second emission region EMA2 and a non-emission region NEA surrounding the second emission region EMA2. The third sub-pixel SP3 may have a third emission region EMA3 and a non-emission region NEA surrounding the third emission region EMA3.

[0107] The first emission region EMA1 can be the first emitting layer EML1 of the first sub-pixel SP1 (see...). Figure 14 The second emitting region EMA2 can be the region that emits light from the second emitting layer EML2 of the second sub-pixel SP2 (see...). Figure 14 The third emitting region EMA3 can be the region emitting light from the third sub-pixel SP3's third emitting layer EML3 (see...). Figure 14 The area that emits light.

[0108] Figure 14 It is along Figure 13 The cross-sectional view taken from line I-I' in the diagram.

[0109] Reference Figure 14 Each of the first sub-pixel SP1 to the third sub-pixel SP3 may have an emission region EMA, and the non-emission region NEA may be located between the first emission region EMA1 to the third emission region EMA3 of the first sub-pixel SP1 to the third sub-pixel SP3, respectively.

[0110] Each of the first sub-pixels SP1 to the third sub-pixels SP3 may include a pixel circuit layer PCL, a display element layer DPL, and / or a thin film encapsulation layer TFE sequentially disposed on the substrate SUB.

[0111] The substrate SUB can form a substrate surface. The substrate SUB can include a transparent insulating material and is therefore transmissive to light. The substrate SUB can be a rigid substrate or a flexible substrate. For example, a rigid substrate can be one of a glass substrate, a quartz substrate, a glass-ceramic substrate, and a crystalline glass substrate. A flexible substrate can be one of a film substrate comprising a polymeric organic material and a plastic substrate. For example, a flexible substrate can include, but is not limited to, at least one of, polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0112] The pixel circuitry layer (PCL) may include pixel circuitry provided on the substrate (SUB). The pixel circuitry layer (PCL) may also include sensor circuitry provided on the substrate (SUB).

[0113] The pixel circuit layer PCL may include a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer PSV, and / or a via layer VIA, which are sequentially stacked on the substrate SUB along the third direction DR3.

[0114] The buffer layer (BFL) can be an inorganic insulating layer comprising inorganic materials. The buffer layer (BFL) can include materials such as silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiO) x N y ) and aluminum oxide (AlO xAt least one of the following. The buffer layer BFL can be provided as a single layer, or it can be provided as a multilayer comprising two or more layers. When the buffer layer BFL is provided as multiple layers, each layer can be formed of the same material or can be formed of different materials. In some embodiments, the buffer layer BFL may be omitted depending on the material and process conditions of the substrate SUB, etc.

[0115] Transistor T can be disposed on buffer layer BFL. Transistor T may include active pattern ACT, gate electrode GE, first transistor electrode TE1 and / or second transistor electrode TE2.

[0116] An active pattern ACT can be disposed on a buffer layer BFL. The active pattern ACT can include a polysilicon semiconductor. For example, the active pattern ACT can be formed using a low-temperature polysilicon process. However, this disclosure is not limited thereto, and the active pattern ACT can be formed from oxide semiconductors or metal oxide semiconductors, etc.

[0117] Each active pattern (ACT) may have a channel region, a first contact region connected to one end of the channel region (or extending from one end of the channel region), and a second contact region connected to the other end of the channel region (or extending from the other end of the channel region). The channel region, the first contact region, and the second contact region may be formed of an undoped or doped semiconductor layer. For example, the first and second contact regions may be formed of a doped semiconductor layer, and the channel region may be formed of an undoped semiconductor layer. As an impurity, for example, a p-type impurity may be used, but it is not limited thereto. One of the first and second contact regions may be a source region, and the other may be a drain region.

[0118] The gate insulating layer GI can be disposed on the active pattern ACT. The gate insulating layer GI can be an inorganic layer (or an inorganic insulating layer) containing inorganic materials. For example, the gate insulating layer GI may include silicon nitride (SiN). x ), silicon dioxide (SiO) x ), silicon oxynitride (SiO) x N y ) and aluminum oxide (AlO x At least one of the above. However, the material of the gate insulating layer GI is not limited to the materials described above. According to an embodiment, the gate insulating layer GI may be formed of an organic layer (or an organic insulating layer) comprising an organic material. The gate insulating layer GI may be provided as a single layer, or it may be provided as a multilayer comprising two or more layers.

[0119] The gate electrode GE can be disposed on the gate insulating layer GI. The gate electrode GE can overlap with the channel region of the active pattern ACT. The gate electrode GE can be formed as a single layer using only one material selected from the group consisting of copper (Cu), molybdenum (Mo), tungsten (W), aluminum neodymium (AlNd), titanium (Ti), aluminum (Al), silver (Ag) and alloys thereof, or mixtures thereof, or it can be formed as a double-layer or multi-layer structure of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al) or silver (Ag) as a low-resistance material to reduce line resistance.

[0120] An interlayer insulating layer (ILD) can be disposed on the gate electrode GE. The ILD may be made of the same material as the gate insulating layer GI, or may include one or more materials selected from the above materials as the configuration material of the gate insulating layer GI.

[0121] The first transistor electrode TE1 and the second transistor electrode TE2 can be disposed on the interlayer insulating layer ILD. The first transistor electrode TE1 of transistor T can contact the first contact region of the active pattern ACT through a contact hole (e.g., a contact opening) passing through the interlayer insulating layer ILD and the gate insulating layer GI. When the first contact region is a source region, the first transistor electrode TE1 can be the first source electrode.

[0122] The second transistor electrode TE2 of transistor T can contact the second contact region at the other end of the active pattern ACT through a contact hole (e.g., a contact opening) passing through the interlayer insulating layer ILD and the gate insulating layer GI. When the second contact region is a drain region, the second transistor electrode TE2 can be the second drain electrode.

[0123] Each of the first transistor electrode TE1 and the second transistor electrode TE2 may comprise the same material as the gate electrode GE, or may comprise one or more materials selected from the above materials as the configuration material of the gate electrode GE.

[0124] A passivation layer PSV can be disposed on the first transistor electrode TE1 and the second transistor electrode TE2. The passivation layer PSV (e.g., a protective layer) can be an inorganic layer (or inorganic insulating layer) comprising inorganic materials or an organic layer (or organic insulating layer) comprising organic materials. For example, the inorganic layer can include silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiO) x N y ) and aluminum oxide (AlO xAt least one of the following: . For example, the organic layer may include at least one of acrylic resin (polyacrylate resin), epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin and benzocyclobutene resin.

[0125] According to an embodiment, the passivation layer PSV may comprise the same material as the interlayer insulating layer ILD, but is not limited thereto. The passivation layer PSV may be provided as a single layer, or it may be provided as a multilayer comprising two or more layers.

[0126] The via layer VIA can be disposed on the passivation layer PSV. The via layer VIA can be made of the same material as the passivation layer PSV, or it can include one or more materials selected from the above materials as the configuration material of the passivation layer PSV. In an embodiment, the via layer VIA can be an organic layer formed of an organic material.

[0127] The display element layer (DPL) can be disposed on the pixel circuit layer (PCL). The display element layer (DPL) may include light-emitting elements (LDs) that emit (e.g., are configured to emit) light. The first sub-pixel SP1 to the third sub-pixel SP3 may each include a first light-emitting element LD1 to a third light-emitting element LD3.

[0128] The first light-emitting element LD1 may include an anode electrode AE, a first light-emitting layer EML1, and a cathode electrode CE. The second light-emitting element LD2 may include an anode electrode AE, a second light-emitting layer EML2, and a cathode electrode CE. The third light-emitting element LD3 may include an anode electrode AE, a third light-emitting layer EML3, and a cathode electrode CE. For example, the first light-emitting element LD1 to the third light-emitting element LD3 may be front-surface emitting organic light-emitting elements.

[0129] The anode electrode AE ​​of each sub-pixel SP can be disposed in the corresponding emitter region EMA and can be spaced apart from each other. The anode electrode AE ​​of each sub-pixel SP can be electrically connected to the first transistor electrode TE1 of the transistor T of each corresponding sub-pixel SP through contact holes (e.g., contact openings) passing through the via layer VIA and the passivation layer PSV.

[0130] A dam PDL can be set on the anode electrode AE. The dam PDL can define (or divide) the emission region EMA of each sub-pixel SP. The dam PDL can have an opening that partially exposes the anode electrode AE ​​of each sub-pixel SP.

[0131] A diaphragm PDL can be an organic insulating layer formed from organic materials. Organic materials can include acrylic resins, epoxy resins, phenolic resins, polyamide resins, and polyimide resins, etc.

[0132] According to embodiments, the dam PDL may include a light-absorbing material or may be coated with a light-absorbing material to absorb light incident from the outside. For example, the dam PDL may include a carbon-based black pigment. However, this disclosure is not limited thereto, and the dam PDL may include opaque metallic materials such as chromium (Cr), molybdenum (Mo), an alloy of molybdenum (Mo) and titanium (Ti) (MoTi), tungsten (W), vanadium (V), niobium (Nb), tantalum (Ta), manganese (Mn), cobalt (Co), or nickel (Ni).

[0133] The emissive layer EML of each sub-pixel SP can be disposed on the anode electrode AE ​​exposed by the diaphragm PDL. The cathode electrode CE can be disposed on the emissive layer EML. The cathode electrode CE can be disposed on all of the first sub-pixels SP1 to the third sub-pixels SP3. For example, the cathode electrode CE can be provided as a common electrode, but is not limited thereto.

[0134] The cathode electrode CE can be formed from a metal layer of Ag (silver), Mg (magnesium), Al (aluminum), Pt (platinum), Pd (palladium), Au (gold), Ni (nickel), Nd (neodymium), Ir (iridium), Cr (chromium) and their alloys, and / or a transparent conductive layer of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), and indium tin zinc oxide (ITZO). According to embodiments, the cathode electrode CE can be formed as multiple layers, such as two or more layers including thin metal layers, for example, three layers including ITO / Ag / ITO.

[0135] A thin-film encapsulation layer (TFE) can be disposed on the display element layer (DPL). The TFE can have a single-layer or multi-layer structure. The TFE may include an insulating layer covering the light-emitting element (LD). The TFE includes at least one inorganic layer and at least one organic layer. For example, the TFE may have a structure in which inorganic and organic layers are alternately stacked. For example, the TFE may include a first inorganic layer, an organic layer disposed on the first inorganic layer, and a second inorganic layer disposed on the organic layer.

[0136] The sensing layer TS can be disposed on the thin-film encapsulation layer TFE. The sensing layer TS may include a first insulating layer INS1, a first conductive layer MT1, a second insulating layer INS2, a second conductive layer MT2 and / or a third insulating layer INS3.

[0137] The first insulating layer INS1 can be disposed on the thin-film encapsulation layer TFE. The first insulating layer INS1 can be an inorganic insulating layer comprising inorganic materials. The inorganic insulating layer can include inorganic insulating materials such as silicon oxide (SiO2). x ), silicon nitride (SiN) x ), silicon oxynitride (SiO) x Ny), aluminum oxide (Al)x O y Titanium oxide (TiO) x ), tantalum oxide (Ta x O y ), hafnium oxide (HfO) x ) or zinc oxide (ZnO) x In some embodiments, the first insulating layer INS1 may be omitted, or it may be configured as the topmost layer of the thin-film encapsulation layer TFE.

[0138] A first conductive layer MT1 may be disposed on a first insulating layer INS1. The first conductive layer MT1 may be partially open (e.g., may have an opening therein) so as not to overlap with the light-emitting element LD of each sub-pixel SP. For example, the first conductive layer MT1 may be configured to overlap with the non-emitting region NEA around the emitting region EMA.

[0139] The first conductive layer MT1 may include a metal layer or a transparent conductive layer. For example, the metal layer may include molybdenum, titanium, copper, aluminum, and their alloys. The transparent conductive layer may include, but is not limited to, one of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, and metal nanowires. The first conductive layer MT1 may form a connecting electrode for connecting to the sensing electrode.

[0140] The second insulating layer INS2 may be disposed on the first conductive layer MT1. The second insulating layer INS2 may be made of the same material as the first insulating layer INS1, or may include one or more materials selected from the above materials as the configuration material of the first insulating layer INS1.

[0141] A second conductive layer MT2 may be disposed on the second insulating layer INS2. The second conductive layer MT2 may be partially open (e.g., may have an opening therein) so as not to overlap with the light-emitting element LD of each sub-pixel SP. For example, the second conductive layer MT2 may be configured to overlap with the non-emitting region NEA around the emitting region EMA.

[0142] The second conductive layer MT2 may be made of the same material as the first conductive layer MT1, or may include one or more materials selected from the above materials as the configuration material of the first conductive layer MT1.

[0143] The second conductive layer MT2 can be electrically connected to the first conductive layer MT1 through a contact hole (e.g., a contact opening) passing through the second insulating layer INS2. The second conductive layer MT2 can form a sensing electrode.

[0144] The third insulating layer INS3 may be disposed on the second conductive layer MT2. The third insulating layer INS3 may be an organic insulating layer comprising organic materials. However, this disclosure is not limited thereto, and according to embodiments, the third insulating layer INS3 may be formed of an inorganic layer, or may have a structure in which organic layers and inorganic layers are alternately stacked.

[0145] A light-blocking layer (LBP) can be disposed on the display element layer (DPL), the thin-film encapsulation layer (TFE), and / or the sensing layer (TS). The LBP can have an opening that overlaps with the light-emitting element (LD). For example, the LBP can be configured to overlap with the non-emitting region (NEA) around the emitting region (EMA).

[0146] The light-blocking layer (LBP) may include a light-blocking material to prevent light leakage and color mixing defects. For example, the LBP may include a black matrix, but is not limited thereto. According to embodiments, the LBP may include carbon black (CB) and / or titanium black (TiBK).

[0147] A color filter layer (CFL) can be disposed on a light-blocking layer (LBP). The color filter layer (CFL) can include color filters CF1 to CF3 that match the colors of the corresponding sub-pixels SP. The color filters CF1 to CF3 that match the colors of the corresponding first sub-pixels SP1 to third sub-pixels SP3 allow for full color reproduction of the image to be displayed.

[0148] The color filter layer CFL may include a first color filter CF1 disposed in a first sub-pixel SP1 to selectively transmit light emitted from the first sub-pixel SP1, a second color filter CF2 disposed in a second sub-pixel SP2 to selectively transmit light emitted from the second sub-pixel SP2, and a third color filter CF3 disposed in a third sub-pixel SP3 to selectively transmit light emitted from the third sub-pixel SP3.

[0149] In the embodiments, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be a red color filter, a green color filter, and a blue color filter, respectively, but are not limited thereto.

[0150] The first color filter CF1 may include a color filter material that selectively transmits light of a first color (e.g., red). For example, when the first sub-pixel SP1 is a red sub-pixel, the first color filter CF1 may include a red color filter material.

[0151] The second color filter CF2 may include a color filter material that selectively transmits light of a second color (e.g., green). For example, when the second sub-pixel SP2 is a green sub-pixel, the second color filter CF2 may include a green color filter material.

[0152] The third color filter CF3 may include a color filter material that selectively transmits light of a third color (e.g., blue). For example, when the third sub-pixel SP3 is a blue sub-pixel, the third color filter CF3 may include a blue color filter material.

[0153] An outer coating OC can be provided on the color filter layer CFL. The outer coating OC can include various materials suitable for protecting the underlying layer from foreign matter such as dust or moisture. For example, the outer coating OC can include at least one of inorganic and organic insulating layers. For example, the outer coating OC can include epoxy resin, but the embodiments are not limited thereto.

[0154] The display device according to the embodiments is applicable to various types of electronic devices. In the embodiments, the electronic device includes the above-described display device, and may also include other modules or devices with additional functions in addition to the display device.

[0155] Figure 15 This is a block diagram describing an electronic device according to an embodiment. (Refer to...) Figure 15 The electronic device 10 may include a display module 11, a processor 12, a memory 13, and a power module 14.

[0156] The processor 12 may include at least one of a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a communication processor (CP), an image signal processor (ISP), and a controller.

[0157] The memory 13 can store data and / or information used to operate the processor 12 or the display module 11. When the processor 12 executes an application stored in the memory 13, image data signals and / or input control signals can be transmitted to the display module 11. The display module 11 can process the provided (e.g., received) signals and output image information on the display screen.

[0158] The power module 14 may include a power supply module (such as a power adapter or battery device) and a power conversion module. The power conversion module converts the power supplied by the power supply module and generates power for operating the electronic device 10.

[0159] At least one of the above-described components of the electronic device 10 may be included in the display device according to the embodiments described above (e.g., Figure 1 The display device 11 is included in the display device 10. Furthermore, in terms of functionality, some individual modules included in one module can be included in the display device, while other modules can be disposed separately from the display device. For example, the display module 11 is included in the display device, while the processor 12, memory 13, and power module 14 are not included in the display device but are disposed separately in the electronic device 10.

[0160] Figure 16 Schematic diagrams of various embodiments of the electronic device are shown.

[0161] Reference Figure 16 The various types of electronic devices used in the embodiments of the display device may include electronic devices that display images, such as smartphones 10_1a, tablet PCs 10_1b, laptop computers 10_1c, televisions (TVs) 10_1d, and desktop monitors 10_1e; wearable electronic devices including display modules, such as smart glasses 10_2a, head-mounted displays (HMDs) 10_2b, and smartwatches 10_2c; and automotive electronic devices including display modules, such as central information displays (CIDs) and rearview mirror displays located in the instrument cluster, central dashboard, and dashboard of a vehicle.

[0162] While embodiments and applications according to this disclosure have been described herein, other embodiments and variations can be derived from the above description. Therefore, the spirit of this disclosure is not limited to these embodiments, but extends to the appended and set forth claims, various apparent modifications and their equivalents.

Claims

1. A connector, wherein, The connector includes: case; A plurality of first pins, each of the plurality of first pins having a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion; and A plurality of second pins, each of the plurality of second pins having a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion. The height of the first contact portion is different from the height of the second contact portion.

2. The connector according to claim 1, wherein, The height of the first contact portion is higher than the height of the second contact portion.

3. The connector according to claim 1, wherein, The height difference between the first contact portion and the second contact portion is 80 μm or less.

4. The connector according to claim 1, wherein, The width of the first contact portion is greater than the width of the second contact portion.

5. The connector according to claim 1, wherein, The width of the first coupling portion is greater than the width of the second coupling portion.

6. The connector according to claim 1, wherein, The plurality of second pins are located between adjacent first pins of the plurality of first pins.

7. The connector according to claim 1, wherein, The plurality of first pins are located on the outside of the connector.

8. The connector according to claim 1, wherein, The plurality of second pins are located at the center of the connector.

9. An electronic device, wherein, The electronic device includes: The processor is configured to provide input image data; and A display device for displaying an image based on the input image data, the display device comprising: Display panel; Circuit board, electrically connected to the display panel; and The connector includes a housing, a plurality of first pins, and a plurality of second pins, the plurality of first pins and the plurality of second pins being electrically connected to the circuit board. Each of the plurality of first pins has a first coupling portion coupled to the housing and a first contact portion protruding from the first coupling portion. Each of the plurality of second pins has a second coupling portion coupled to the housing and a second contact portion protruding from the second coupling portion, and The height of the first contact portion is different from the height of the second contact portion.

10. The electronic device according to claim 9, wherein, The circuit board includes: The first pad is electrically connected to the first contact portion; and The second pad is electrically connected to the second contact portion.

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