Zero-sequence inrush current protection method based on digital primary and secondary fusion pole-mounted circuit breaker
By using a zero-sequence inrush current protection method for digital primary and secondary integrated pole-mounted circuit breakers, and by analyzing the dynamic changes in zero-sequence voltage and current, the problem of false tripping or failure to trip caused by zero-sequence inrush current caused by high-impedance transformers is solved, thereby improving the reliability and selectivity of zero-sequence overcurrent protection.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-24
- Publication Date
- 2026-03-13
AI Technical Summary
The zero-sequence inrush current caused by high-impedance transformers in the distribution network leads to frequent maloperation or failure of zero-sequence overcurrent protection, affecting the reliability of power supply. Existing technology has difficulty in effectively distinguishing between the zero-sequence inrush current generated by transformer no-load closing and the zero-sequence fault current generated by ground fault.
A zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker is adopted. Task polling is performed every cycle. By analyzing the dynamic change characteristics of zero-sequence voltage and current, the inrush current is judged by the trend of zero-sequence second harmonic content over multiple cycles. Blocking and reset conditions are set to distinguish inrush current from fault current.
It effectively distinguishes between transformer no-load closing and grounding faults, improves the selectivity and reliability of zero-sequence overcurrent protection, reduces false tripping and failure to trip, and enhances the power supply reliability and automation level of the distribution network.
Abstract
Description
Technical Field
[0001] This invention relates to the field of power system distribution network protection technology, specifically to a zero-sequence inrush current protection method for pole-mounted circuit breakers. Background Technology
[0002] In traditional power distribution systems, due to relatively small system capacity, high network resistance, and the use of conventional transformer designs, the inrush current generated when a transformer is closed under no-load conditions has a limited amplitude and decays quickly. Typically, the inrush current decays below the protection threshold before the zero-sequence overcurrent protection's tripping delay arrives, thus rarely causing maloperation of the zero-sequence overcurrent protection and resulting in a high success rate for power restoration and closure.
[0003] However, with the rapid development of the power grid and the continuous increase in system capacity, the equivalent impedance of the system is decreasing. To limit short-circuit current and meet the requirements of economic operation, high-impedance transformers have been widely used. These transformers increase winding reactance through special designs (such as embedding the high-voltage winding and connecting the low-voltage winding with a series reactor), which has the advantages of cost-effectiveness, low loss, and strong short-circuit resistance. However, at the same time, the open area between the internal winding and the core is smaller, resulting in a more prominent inrush current problem during no-load closing compared to ordinary transformers, manifested as a larger inrush current amplitude and slower decay. On the other hand, for safety and lightning protection considerations, the construction level of the distribution network grounding network is constantly improving, which reduces the proportion of resistive components in the fault zero-sequence circuit and increases the decay time constant. The combined effect of these two factors leads to the zero-sequence inrush current of new high-impedance transformers being able to maintain a high level for a long time when put into operation, which can easily reach and exceed the operating setting of the zero-sequence overcurrent protection, thus frequently triggering maloperation of the protection, resulting in failure to close the circuit and restore power, seriously affecting the reliability of power supply.
[0004] To address the issue of protection maloperation caused by inrush current, existing solutions use the second harmonic content (a characteristic component of inrush current) in the current as a criterion: when the detected second harmonic content exceeds a preset threshold, it is determined to be inrush current, thus blocking the phase current overcurrent protection and preventing maloperation. However, when these existing solutions are directly applied to inrush current protection for zero-sequence current, the following problems still exist: to ensure the accuracy of measuring the small unbalanced zero-sequence current during normal operation, zero-sequence current transformers (CTs) are usually selected with small ranges and high precision, and their anti-saturation capability is far lower than that of conventional three-phase CTs. Therefore, scenarios leading to zero-sequence CT saturation include not only "transformer no-load closing" (generating transient saturation, waveform asymmetry, and containing a large number of harmonics), but also "ground fault" (if the fault current is large, it may lead to steady-state saturation, waveform symmetry, and low harmonic content). In the saturated state of the CT, its transmission characteristics are severely distorted, making it impossible to accurately extract characteristic quantities such as the second harmonic. If only the second harmonic content is relied upon as a single criterion, when a ground fault occurs and causes CT saturation, the harmonics may not be effectively detected, leading to a misjudgment as inrush current. This could result in the zero-sequence overcurrent protection being falsely blocked, causing the protection to fail to operate. Conversely, when inrush current causes CT saturation, the accuracy of the judgment may also be affected by harmonic measurement distortion. Summary of the Invention
[0005] This invention proposes a zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker. Its purpose is to reliably distinguish between the zero-sequence inrush current generated by the no-load closing of the transformer and the zero-sequence fault current generated by the ground fault, and to solve the problem of the difficulty in balancing the prevention of false tripping and the prevention of failure to tripping in the existing zero-sequence overcurrent protection.
[0006] The technical solution of this invention is as follows:
[0007] A zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, wherein a task poll is performed once per cycle, and the following steps are executed during each poll:
[0008] First, determine whether to continue with the subsequent steps based on the zero-sequence voltage and zero-sequence current;
[0009] Then, the dynamic variation characteristics of the zero-sequence current second harmonic content in multiple cycles are obtained, and these dynamic variation characteristics are represented by counting.
[0010] Then, the dynamic change characteristics of the second harmonic content of the zero-sequence current are used to determine whether the zero-sequence inrush current blocking condition is met; if it is met, a blocking signal is generated to block the zero-sequence overcurrent protection.
[0011] Finally, it is determined whether the preset reset condition is met. If it is met, the blocking is canceled and the zero-sequence overcurrent protection is restored.
[0012] As a further improvement to the zero-sequence inrush current protection method based on the digital primary and secondary integrated pole-mounted circuit breaker: an internal zero-sequence inrush current blocking counter is initialized. And allocate a circular buffer with a capacity of 4. ;
[0013] The following specific steps are performed during each polling cycle:
[0014] Step A1: Based on the zero-sequence voltage RMS value collected in this cycle and the fundamental effective value of zero-sequence current Determine if a ground fault has occurred on the line and whether the zero-sequence inrush current detection process needs to be initiated. If no ground fault has occurred and the zero-sequence inrush current detection process needs to be initiated, continue to step A2.
[0015] Step A2: Based on the circular buffer Analysis of zero-sequence second harmonic content data over multiple consecutive periods is used to determine the changing trend of zero-sequence second harmonic content, and the zero-sequence inrush current blocking counter is adjusted according to the changing trend. ;
[0016] Step A3: Based on the zero-sequence inrush current blocking counter Determine whether the zero-sequence inrush current blocking condition is met; if it is met, generate a blocking signal to block the zero-sequence overcurrent protection.
[0017] Step A4: Determine whether the preset reset condition is met based on the trend of the zero-sequence second harmonic content. If it is met, cancel the blocking and restore the zero-sequence overcurrent protection.
[0018] As a further improvement to the zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, step A1 specifically includes:
[0019] Step A1.1: Convert the effective value of the fundamental frequency of the zero-sequence current. Compare with the preset start-up threshold value: if the effective value of the zero-sequence current fundamental frequency is... If the starting threshold is not exceeded, the current polling ends; otherwise, proceed to step A1.2.
[0020] Step A1.2: Collect the effective value of the zero-sequence voltage. With the set zero-sequence inrush current zero-pressure setpoint Comparison: If If a ground fault occurs, the zero-sequence inrush current counter will be immediately blocked. Clear the current to zero and immediately enable the zero-sequence overcurrent protection function; this polling session ends. Otherwise, continue with step A1.3.
[0021] Step A1.3: Calculate the second harmonic content of the currently sampled zero-sequence current and store it in the circular buffer. Then check the current circular buffer. Does any data point in the data set have a value greater than the zero-sequence inrush blocking ratio? If it exists, proceed to step A2; otherwise, end this polling cycle.
[0022] As a further improvement to the zero-sequence inrush current protection method based on digital primary and secondary fusion pole-mounted circuit breakers: in step A2, the changing trend of the zero-sequence second harmonic content is determined based on instantaneous trend judgment, multi-point fault-tolerant trend judgment, and attenuation period blocking maintenance judgment.
[0023] As a further improvement to the zero-sequence inrush current protection method based on the digital primary and secondary integrated pole-mounted circuit breaker: In step A2, let the latest data point in the cyclic buffer of length 4 be... The previous point is Similarly, step A2 specifically includes:
[0024] Step A2.1: Instantaneous trend judgment: If If the zero-sequence inrush content shows an instantaneous increasing trend, the zero-sequence inrush counter is activated. Add 1, then directly end step A2 and jump to step A3; if not satisfied, then execute step A2.2;
[0025] Step A2.2: Multi-point fault tolerance trend judgment: First check the circular buffer. Check if 4 valid data points have been stored. If not, skip this check and proceed directly to step A2.3. If the data points have been stored, then store the current point... Compared to the first three history points in the circular buffer , , Comparison: If Greater than and If the zero-sequence inrush content shows an overall increasing trend, the zero-sequence inrush counter is activated. Add 1, then directly end step A2 and jump to step A3; otherwise, execute step A2.3.
[0026] Step A2.3: Degradation Period Blocking Hold Judgment: First, determine the zero-sequence inrush current blocking counter. Is it greater than the set intermediate threshold? :like If, then this polling ends; if Then further statistics on the circular buffer. The median value is less than the zero-sequence inrush blocking ratio. Number of data points: If more than 2 points are less than the zero-sequence inrush blocking ratio This polling session ends; otherwise, further check whether there are more than two sets of decreasing relationships between adjacent data points in the circular buffer: if the decreasing trend is established, then the zero-order surge latch counter is activated. Add the preset zero-sequence inrush current blocking count The value, that is Ensure that the locking condition is met immediately, then directly end step A2 and jump to step A3; otherwise, end this polling.
[0027] Step A2.4: Check the latest zero-sequence second harmonic content in the circular buffer. Is it less than the preset zero-sequence inrush current blocking ratio? ,like Then the zero-sequence inrush current blocking counter will be activated. Subtract 1, that is .
[0028] As a further improvement to the zero-sequence inrush current protection method based on digital primary and secondary integrated pole-mounted circuit breakers: In step A4, the past zero-sequence inrush current opening time is determined. Does the internal zero-sequence second harmonic content always remain less than the preset zero-sequence inrush current blocking ratio? If true, the zero-sequence inrush current latch counter will be locked. Clear to zero, and simultaneously enable zero-sequence overcurrent protection; zero-sequence inrush current enable time. This is the default value.
[0029] As a further improvement to the zero-sequence inrush current protection method based on the digital primary and secondary integrated pole-mounted circuit breaker: an internal zero-sequence inrush current blocking counter is initialized. The following specific steps are executed during each polling cycle:
[0030] Step B1: Based on the phase current, zero-sequence current and zero-sequence voltage collected in this cycle, determine whether a ground fault has occurred in the line and whether the zero-sequence inrush current detection process needs to be started. If no ground fault has occurred and the zero-sequence inrush current detection process needs to be started, then continue to step B2.
[0031] Step B2: Create an inrush current detection open time window based on the magnitude of the phase current second harmonic content, determine the changing trend of the zero-sequence current second harmonic content within the inrush current detection open time window, and adjust the zero-sequence inrush current blocking counter according to the changing trend. ;
[0032] Step B3: Based on the zero-sequence inrush current blocking counter Determine whether the zero-sequence inrush current blocking condition is met; if it is met, generate a blocking signal to block the zero-sequence overcurrent protection.
[0033] Step B4: Determine whether the reset condition is met based on the inrush detection opening time. If it is met, cancel the interlock and restore the zero-sequence overcurrent protection.
[0034] As a further improvement to the zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, step B1 specifically includes:
[0035] Step B1.1: Compare the fundamental RMS value of each phase current and the fundamental RMS value of the zero-sequence current with the corresponding start-up threshold value. If both exceed the corresponding start-up threshold value, proceed to step B1.2; otherwise, end this polling.
[0036] Step B1.2: Convert the zero-sequence voltage With the set zero-sequence inrush current zero-pressure setpoint Comparison: If If a ground fault is detected, the following actions should be taken immediately: The zero-sequence inrush current counter should be blocked. Clear the current to zero and immediately enable the zero-sequence overcurrent protection function; otherwise, proceed to step B2.
[0037] As a further improvement to the zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, step B2 specifically includes:
[0038] Step B2.1: Check if the zero-sequence inrush current enable timer is enabled. If it is not enabled, proceed to step B2.2; otherwise, proceed directly to step 2.3.
[0039] Step 2.2: Determine whether the second harmonic content of the phase current in any phase exceeds the preset inrush current blocking ratio. If so, start the zero-sequence inrush current enable timer, with a timing duration equal to the preset inrush current detection enable time. Then proceed to step 2.3; otherwise, this polling session ends.
[0040] Step B2.3: Determine whether the current zero-sequence current second harmonic content is greater than the preset zero-sequence inrush current blocking ratio. If true, then the zero-sequence inrush current latch-up counter is activated. Add 1, that is If yes, proceed to step B3; otherwise, the polling ends.
[0041] As a further improvement to the zero-sequence inrush current protection method based on the digital primary and secondary integrated pole-mounted circuit breaker: In step B4, it is determined whether the zero-sequence inrush current enabling timer has ended; if it has, the zero-sequence inrush current blocking counter is activated. Clear to zero and simultaneously enable zero-sequence overcurrent protection.
[0042] Compared with the prior art, the present invention has the following beneficial effects:
[0043] 1. In each task polling cycle, this invention first uses zero-sequence voltage and zero-sequence current for initial screening of operating conditions, eliminating obvious ground fault scenarios. Then, it identifies inrush current by analyzing the dynamic changing trend of the second harmonic content of the zero-sequence current over multiple consecutive cycles, rather than relying on the absolute value of the harmonic content at a single moment. Finally, it generates or releases the blocking signal based on this trend. This method effectively distinguishes between two scenarios: transformer no-load closing (with obvious inrush current characteristics and a specific trend of change) and ground faults (even if it causes CT saturation, its harmonic characteristics are different from inrush current). It fundamentally balances the requirements of zero-sequence overcurrent protection against maloperation and failure to operate, improving the reliability of power distribution networks.
[0044] 2. The first embodiment of this invention introduces a mechanism for continuously tracking and trend judging the dynamic changes in the second harmonic content of the zero-sequence current. Specifically, a cyclic buffer is set up to store harmonic data for multiple consecutive cycles, and a comprehensive trend analysis logic is designed, including instantaneous trend judgment, multi-point fault-tolerant trend judgment, and decay period lockout maintenance judgment. This approach enables the protection criterion to adapt to the discrete characteristics of the interval sampling of the microcomputer protection device, allowing for deviations or noise interference in individual sampled data points. Decisions are made by examining the overall trend of the data sequence rather than a single outlier, thereby significantly improving the robustness and anti-interference capability of the criterion and avoiding misjudgments caused by sampling quantization errors or instantaneous distortions.
[0045] 3. The second approach of this invention creates an open time window for inrush current detection by detecting the second harmonic content of the phase current, and then judges the second harmonic content of the zero-sequence current based on this. This "phase current-first triggering" strategy cleverly utilizes the physical nature that three-phase excitation inrush current will inevitably appear and has significant characteristics when the transformer is closed under no-load conditions, providing a highly reliable time reference and logical enable condition for judging zero-sequence inrush current. This method can effectively eliminate zero-sequence current anomalies caused solely by non-closing factors such as line asymmetry, making the identification of zero-sequence inrush current more targeted and accurate.
[0046] 4. The present invention also includes a reset mechanism. Whether the judgment is based on the time when the zero-sequence second harmonic content is continuously lower than the threshold value, or on the end of the open time window triggered by the phase current, it ensures that the zero-sequence overcurrent protection function can be restored in a timely and automatic manner after the inrush current has decayed or the closing process has ended. This ensures that the protection system can quickly return to the normal monitoring state after dealing with the transient process without manual intervention, thereby improving the level of automation and operation and maintenance efficiency.
[0047] In summary, this invention fills the gap in the protection function of 10kV distribution network pole-mounted circuit breakers in dealing with zero-sequence inrush current when high-impedance transformers are put into operation, and provides effective technical support for the intelligent upgrading and safe and reliable operation of distribution networks. Detailed Implementation
[0048] The technical solution of the present invention will be described in detail below. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.
[0049] A zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker is disclosed. This method is implemented using a digital primary and secondary integrated pole-mounted circuit breaker system, which includes: a power supply PT, a digital primary and secondary integrated pole-mounted circuit breaker (integrating an electronic PT / CT and an ADMU digital unit), and a feeder automation terminal. The feeder automation terminal acquires the zero-sequence voltage and current digital signals of the line through the ADMU unit and executes the zero-sequence inrush current protection logic of this method.
[0050] In this method, a task poll is performed once per cycle, and the following steps are executed during each poll:
[0051] First, determine whether to continue with the subsequent steps based on the zero-sequence voltage and zero-sequence current.
[0052] Then, the dynamic variation characteristics of the zero-sequence current second harmonic content in multiple cycles are obtained, and these dynamic variation characteristics are represented by counting.
[0053] Then, based on the dynamic change characteristics of the second harmonic content of the zero-sequence current, it is determined whether the zero-sequence inrush current blocking condition is met; if it is met, a blocking signal is generated to block the zero-sequence overcurrent protection.
[0054] Finally, it is determined whether the preset reset condition is met. If it is met, the blocking is canceled and the zero-sequence overcurrent protection is restored.
[0055] Example 1
[0056] This embodiment provides a zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, the specific implementation of which is as follows:
[0057] This method is implemented in a feeder automation terminal, where the execution level of its protection task is higher than that of zero-sequence overcurrent protection. The feeder automation terminal performs a task polling every 2 milliseconds, and each polling requires the execution of the logic flow of this zero-sequence inrush current protection method. Based on the judgment result, it determines whether to block the zero-sequence overcurrent protection function, thereby preventing the zero-sequence inrush current when the transformer is closed under no-load conditions from causing the zero-sequence overcurrent protection to malfunction, and ensuring that the zero-sequence overcurrent protection can operate reliably when a real ground fault occurs.
[0058] Before implementation, the following protection parameter settings need to be set in the feeder automation terminal: zero-sequence inrush current zero-voltage setting. Zero-sequence inrush blocking ratio Zero-sequence inrush current blocking count Zero-order inrush opening time (Default 60 milliseconds). Simultaneously, an internal zero-sequence inrush current latch-up counter is initialized. And allocate a circular buffer with a capacity of 4. It is used to store the zero-sequence second harmonic content data of historical sampling points.
[0059] The specific steps are as follows:
[0060] Step A1: Based on the zero-sequence voltage RMS value collected in this cycle and the fundamental effective value of zero-sequence current Determine if a ground fault has occurred on the line and whether the zero-sequence inrush current detection process needs to be initiated. If no ground fault has occurred and the zero-sequence inrush current detection process needs to be initiated, continue to step A2.
[0061] Step A1 specifically includes:
[0062] Step A1.1: Convert the effective value of the fundamental frequency of the zero-sequence current. Compare with a preset start-up threshold value (e.g., 1% of the zero-sequence current rating): if the effective value of the fundamental zero-sequence current... If the threshold value for starting is not exceeded, the current polling ends; otherwise, proceed to step A1.2.
[0063] Step A1.2: Collect the effective value of the zero-sequence voltage. With the set zero-sequence inrush current zero-pressure setpoint Comparison: If If a ground fault occurs, the zero-sequence inrush current counter will be immediately blocked. Clear the current to zero and immediately enable the zero-sequence overcurrent protection function. This polling session ends; otherwise, continue with step A1.3.
[0064] Step A1.3: Calculate the second harmonic content of the currently sampled zero-sequence current, denoted as That is, the zero-sequence inrush current content, which stores the second harmonic content of the zero-sequence current in the circular buffer. Then check the current circular buffer. Does any data point in the data set have a value greater than the zero-sequence inrush blocking ratio? If it exists, proceed to step A2; otherwise, end this polling cycle.
[0065] Step A2: Based on the circular buffer Analysis of zero-sequence second harmonic content data over multiple consecutive periods is used to determine the changing trend of zero-sequence second harmonic content, and the zero-sequence inrush current blocking counter is adjusted according to the changing trend. .
[0066] Let the latest data point in the circular buffer be... The previous point is Similarly, step A2 specifically includes:
[0067] Step A2.1: Instantaneous trend judgment: If If the zero-sequence inrush content shows an instantaneous increasing trend, the zero-sequence inrush counter is activated. Add 1, then directly end step A2 and jump to step A3; if not satisfied, then execute step A2.2.
[0068] Step A2.2: Multi-point fault tolerance trend judgment: First check the circular buffer. Check if 4 valid data points have been stored. If not, skip this check and proceed directly to step A2.3. If the data points have been stored, then store the current point... Compared to the first three history points in the circular buffer , , Comparison: If Greater than and If the zero-sequence inrush content is still determined to be increasing overall, the zero-sequence inrush counter will be used. Add 1, then directly end step A2 and jump to step A3; otherwise, execute step A2.3.
[0069] Step A2.3: Decay Period Lockout Holding Judgment: The current point does not meet either the instantaneous trend judgment or the multi-point fault-tolerant trend judgment, and may be in the decay period after the inrush peak. First, determine the zero-sequence inrush lockout counter. Is it greater than the set intermediate threshold? ( Usually taken (half of) If this indicates that a sufficient increasing trend has not been accumulated previously, then this polling session ends; if This indicates that there was already a clear trend of increasing flow, so further statistics on the circular buffer are needed. The median value is less than the zero-sequence inrush blocking ratio. Number of data points: If more than 2 points are less than the zero-sequence inrush blocking ratio If the flow has significantly decreased, the polling ends; otherwise, further check whether there are more than two sets of decreasing relationships between adjacent data points in the circular buffer (e.g., ...). and If this decreasing trend holds, it indicates that the inflow has passed its peak and entered a stable decay phase, but the concentration is still high. In this case, to maintain the locked state, execution will cease. Instead of the usual increment operation, it directly latches the zero-sequence inrush current counter. Add zero-sequence inrush current blocking count The value, that is Ensure that the locking condition is met immediately, then directly end step A2 and jump to step A3; otherwise, end this polling.
[0070] Step A2.4: Check the latest zero-sequence second harmonic content in the circular buffer. Is it less than the zero-sequence inrush blockade ratio? ,like Then the zero-sequence inrush current blocking counter will be activated. Subtract 1, that is (If the value after subtracting 1 is less than 0, it is forcibly set to 0). This criterion is used to gradually reduce the counter value when the zero-sequence inrush current content remains low, creating conditions for functional recovery.
[0071] Step A3: Based on the zero-sequence inrush current blocking counter Determine whether the zero-sequence inrush current blocking condition is met; if it is met, generate a blocking signal to block the zero-sequence overcurrent protection.
[0072] Specifically, compare the zero-sequence inrush current latch-up counter. With preset zero-sequence inrush block count Size: If Then a zero-sequence inrush current blocking signal will be generated and output. This signal will block the zero-sequence overcurrent protection function, making it temporarily ineffective, thereby preventing false tripping caused by inrush current.
[0073] Step A4: Determine whether the preset reset condition is met based on the trend of the zero-sequence second harmonic content. If it is met, cancel the blocking and restore the zero-sequence overcurrent protection.
[0074] Specifically, determining the past zero-sequence inrush opening time Does the internal zero-sequence second harmonic content always remain less than the preset zero-sequence inrush current blocking ratio? If true, the zero-sequence inrush current latch counter will be locked. Clear to zero and simultaneously enable zero-sequence overcurrent protection.
[0075] Through the above steps, this embodiment comprehensively utilizes the zero-sequence current and zero-sequence voltage threshold criteria and the dynamic trend analysis of the second harmonic content of the zero-sequence current to effectively distinguish between the zero-sequence inrush current generated by the no-load closing of the transformer and the ground fault current, thereby improving the selectivity and reliability of the zero-sequence overcurrent protection under complex operating conditions.
[0076] Example 2
[0077] This embodiment provides another zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, using the same concept. This method is also implemented in a feeder automation terminal, where the execution level of the protection task is higher than that of zero-sequence overcurrent protection. The feeder automation terminal performs a task polling every 2 milliseconds. During each polling, the logic flow of this zero-sequence inrush current protection method is executed first, and the determination result determines whether to block the zero-sequence overcurrent protection function.
[0078] The 10kV pole-mounted circuit breaker is equipped with a three-phase current transformer. The zero-sequence current is collected using the three-phase current synthesis method. This means that a phase current with a large amplitude must be generated before the zero-sequence inrush current is generated. Based on this, the process of this method is as follows:
[0079] Before implementation, the following protection parameter settings need to be set in the feeder automation terminal: zero-sequence inrush current zero-voltage setting. Phase flow blocking ratio Flow detection opening hours (Default 5 seconds), Zero-sequence inrush current blocking ratio Zero-sequence inrush current blocking count Simultaneously, an internal zero-sequence inrush current latch-up counter is initialized. A timer is set to record the inrush detection open time. The passage of time.
[0080] The specific steps are as follows:
[0081] Step B1: Based on the phase current, zero-sequence current and zero-sequence voltage collected in this cycle, determine whether a ground fault has occurred in the line and whether the zero-sequence inrush current detection process needs to be started. If no ground fault has occurred and the zero-sequence inrush current detection process needs to be started, then continue to step B2.
[0082] Step B1 specifically includes:
[0083] Step B1.1: Combine the fundamental RMS values of each phase current and the fundamental RMS value of the zero-sequence current. Each value is compared with its corresponding start-up threshold value. In this embodiment, the start-up threshold value of the fundamental effective value of the phase current is 1% of the rated value of the phase current, and the start-up threshold value of the fundamental effective value of the zero-sequence current is 1% of the rated value of the zero-sequence current. If both exceed the corresponding start-up threshold value, step B1.2 is executed; otherwise, the polling ends.
[0084] Step B1.2: Convert the zero-sequence voltage With the set zero-sequence inrush current zero-pressure setpoint Comparison: If If a ground fault is detected, the following actions should be taken immediately: The zero-sequence inrush current counter should be blocked. Clear the current to zero and immediately enable the zero-sequence overcurrent protection function; otherwise, proceed to step B2.
[0085] Step B2: Create an inrush current detection open time window based on the magnitude of the phase current second harmonic content, determine the changing trend of the zero-sequence current second harmonic content within the inrush current detection open time window, and adjust the zero-sequence inrush current blocking counter according to the changing trend. .
[0086] Step B2.1: Check if the zero-sequence inrush current open timer is enabled. If it is not enabled, proceed to step B2.2; otherwise, proceed directly to step 2.3.
[0087] Step 2.2: Determine whether the second harmonic content of the phase current in any phase exceeds the preset inrush current blocking ratio. If so, start the zero-sequence inrush current enable timer, with a timing duration equal to the preset inrush current detection enable time. Then proceed to step 2.3; otherwise, this polling session ends.
[0088] Step B2.3: Determine whether the current zero-sequence current second harmonic content is greater than the preset zero-sequence inrush current blocking ratio. If true, then the zero-sequence inrush current latch-up counter is activated. Add 1, that is If yes, proceed to step B3; otherwise, the polling ends.
[0089] Step B3: Based on the zero-sequence inrush current blocking counter Determine whether the zero-sequence inrush current blocking condition is met; if it is met, generate a blocking signal to block the zero-sequence overcurrent protection.
[0090] Specifically, compare the zero-sequence inrush current latch-up counter. With preset zero-sequence inrush block count Size: If Then a zero-sequence inrush current blocking signal will be generated and output. This signal will block the zero-sequence overcurrent protection function, making it temporarily ineffective, thereby preventing false tripping caused by inrush current.
[0091] Step B4: Determine whether the reset condition is met based on the inrush detection opening time. If it is met, cancel the interlock and restore the zero-sequence overcurrent protection.
[0092] Specifically, it determines whether the zero-sequence inrush current enable timer has ended; if it has, it latches the zero-sequence inrush current counter. Clear to zero and simultaneously enable zero-sequence overcurrent protection.
[0093] Through the above steps, this embodiment utilizes the characteristic that phase current inrush current usually occurs before zero-sequence inrush current. By detecting the second harmonic content of the phase current, a time window is initiated. Within this window, the second harmonic content of the zero-sequence current is detected and counted, thereby more reliably distinguishing between closing inrush current and fault current, and realizing timed automatic reset. Compared with the steps of Embodiment 1, this embodiment is simpler.
[0094] It should be noted that, as will be apparent to those skilled in the art, the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics thereof. The scope of the present invention is defined by the claims rather than the foregoing description.
Claims
1. A zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker, wherein a task polling is performed once per cycle, characterized in that: Perform the following steps during each polling cycle: First, determine whether to continue with the subsequent steps based on the zero-sequence voltage and zero-sequence current; Then, the dynamic variation characteristics of the zero-sequence current second harmonic content in multiple cycles are obtained, and these dynamic variation characteristics are represented by counting. Then, the dynamic change characteristics of the second harmonic content of the zero-sequence current are used to determine whether the zero-sequence inrush current blocking condition is met; if it is met, a blocking signal is generated to block the zero-sequence overcurrent protection. Finally, it is determined whether the preset reset condition is met. If it is met, the blocking is canceled and the zero-sequence overcurrent protection is restored.
2. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 1, characterized in that: Initialize an internal zero-sequence inrush current latch counter And allocate a circular buffer with a capacity of 4. ; The following specific steps are performed during each polling cycle: Step A1: Based on the zero-sequence voltage RMS value collected in this cycle and the fundamental effective value of zero-sequence current Determine if a ground fault has occurred on the line and whether the zero-sequence inrush current detection process needs to be initiated. If no ground fault has occurred and the zero-sequence inrush current detection process needs to be initiated, continue to step A2. Step A2: Based on the circular buffer Analysis of zero-sequence second harmonic content data over multiple consecutive periods is used to determine the changing trend of zero-sequence second harmonic content, and the zero-sequence inrush current blocking counter is adjusted accordingly. ; Step A3: Based on the zero-sequence inrush current blocking counter Determine whether the zero-sequence inrush current blocking condition is met; if it is met, generate a blocking signal to block the zero-sequence overcurrent protection. Step A4: Determine whether the preset reset condition is met based on the trend of the zero-sequence second harmonic content. If it is met, cancel the blocking and restore the zero-sequence overcurrent protection.
3. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 2, characterized in that, Step A1 specifically includes: Step A1.1: Convert the effective value of the fundamental frequency of the zero-sequence current. Compare with the preset start-up threshold value: if the effective value of the zero-sequence current fundamental frequency is... If the starting threshold is not exceeded, the current polling ends; otherwise, proceed to step A1.
2. Step A1.2: Collect the effective value of the zero-sequence voltage. With the set zero-sequence inrush current zero-pressure setpoint Comparison: If If a ground fault occurs, the zero-sequence inrush current counter will be immediately blocked. Clear the current to zero and immediately enable the zero-sequence overcurrent protection function; this polling session ends. Otherwise, continue with step A1.
3. Step A1.3: Calculate the second harmonic content of the currently sampled zero-sequence current and store it in the circular buffer. Then check the current circular buffer. Does any data point in the data set have a value greater than the zero-sequence inrush blocking ratio? If it exists, proceed to step A2; otherwise, end this polling cycle.
4. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 2, characterized in that: In step A2, the changing trend of the zero-sequence second harmonic content is determined based on instantaneous trend judgment, multi-point fault-tolerant trend judgment, and decay period lockout maintenance judgment.
5. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 4, characterized in that: In step A2, let the latest data point in the circular buffer of length 4 be... The previous point is Similarly, step A2 specifically includes: Step A2.1: Instantaneous trend judgment: If If the zero-sequence inrush content shows an instantaneous increasing trend, the zero-sequence inrush counter is activated. Add 1, then directly end step A2 and jump to step A3; if not satisfied, then execute step A2.2; Step A2.2: Multi-point fault tolerance trend judgment: First check the circular buffer. Check if 4 valid data points have been stored. If not, skip this check and proceed directly to step A2.
3. If the data points have been stored, then store the current point... Compared to the first three history points in the circular buffer , , Comparison: If Greater than and If the zero-sequence inrush content shows an overall increasing trend, the zero-sequence inrush counter is activated. Add 1, then directly end step A2 and jump to step A3; otherwise, execute step A2.
3. Step A2.3: Degradation Period Blocking Hold Judgment: First, determine the zero-sequence inrush current blocking counter. Is it greater than the set intermediate threshold? :like If, then this polling ends; if Then further statistics on the circular buffer. The median value is less than the zero-sequence inrush blocking ratio. Number of data points: If more than 2 points are less than the zero-sequence inrush blocking ratio This polling session ends; otherwise, further check whether there are more than two sets of decreasing relationships between adjacent data points in the circular buffer: if the decreasing trend is established, then the zero-order surge latch counter is activated. Add the preset zero-sequence inrush current blocking count The value, that is Ensure that the locking condition is met immediately, then directly end step A2 and jump to step A3; otherwise, end this polling. Step A2.4: Check the latest zero-sequence second harmonic content in the circular buffer. Is it less than the preset zero-sequence inrush current blocking ratio? ,like Then the zero-sequence inrush current blocking counter will be activated. Subtract 1, that is .
6. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 2, characterized in that: In step A4, determine the past zero-sequence inrush opening time. Does the internal zero-sequence second harmonic content always remain less than the preset zero-sequence inrush current blocking ratio? If true, the zero-sequence inrush current latch counter will be locked. Clear to zero, and simultaneously enable zero-sequence overcurrent protection; zero-sequence inrush current enable time. This is the default value.
7. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 1, characterized in that: Initialize an internal zero-sequence inrush current latch counter The following specific steps are executed during each polling cycle: Step B1: Based on the phase current, zero-sequence current and zero-sequence voltage collected in this cycle, determine whether a ground fault has occurred in the line and whether the zero-sequence inrush current detection process needs to be started. If no ground fault has occurred and the zero-sequence inrush current detection process needs to be started, then continue to step B2. Step B2: Create an inrush current detection open time window based on the magnitude of the phase current second harmonic content, determine the changing trend of the zero-sequence current second harmonic content within the inrush current detection open time window, and adjust the zero-sequence inrush current blocking counter according to the changing trend. ; Step B3: Based on the zero-sequence inrush current blocking counter Determine whether the zero-sequence inrush current blocking condition is met; if it is met, generate a blocking signal to block the zero-sequence overcurrent protection. Step B4: Determine whether the reset condition is met based on the inrush detection opening time. If it is met, cancel the interlock and restore the zero-sequence overcurrent protection.
8. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 7, characterized in that, Step B1 specifically includes: Step B1.1: Compare the fundamental RMS value of each phase current and the fundamental RMS value of the zero-sequence current with the corresponding start-up threshold value. If both exceed the corresponding start-up threshold value, proceed to step B1.2; otherwise, end this polling. Step B1.2: Convert the zero-sequence voltage With the set zero-sequence inrush current zero-pressure setpoint Comparison: If If a ground fault is detected, the following actions should be taken immediately: The zero-sequence inrush current counter should be blocked. Clear the current to zero and immediately enable the zero-sequence overcurrent protection function; otherwise, proceed to step B2.
9. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 7, characterized in that, Step B2 specifically includes: Step B2.1: Check if the zero-sequence inrush current enable timer is enabled. If it is not enabled, proceed to step B2.2; otherwise, proceed directly to step 2.
3. Step 2.2: Determine whether the second harmonic content of the phase current in any phase exceeds the preset inrush current blocking ratio. If so, start the zero-sequence inrush current enable timer, with a timing duration equal to the preset inrush current detection enable time. Then proceed to step 2.3; otherwise, this polling session ends. Step B2.3: Determine whether the current zero-sequence current second harmonic content is greater than the preset zero-sequence inrush current blocking ratio. If true, then the zero-sequence inrush current latch-up counter is activated. Add 1, that is If yes, proceed to step B3; otherwise, the polling ends.
10. The zero-sequence inrush current protection method based on a digital primary and secondary integrated pole-mounted circuit breaker as described in claim 7, characterized in that: In step B4, it is determined whether the zero-sequence inrush current enable timer has ended. If it has, the zero-sequence inrush current latch is set to be enabled. Clear to zero and simultaneously enable zero-sequence overcurrent protection.