Power module, electric drive assembly and vehicle
By arranging capacitors and power devices close together in the silicon carbide power module, the problems of uneven current distribution and voltage overshoot in the multi-chip parallel structure are solved, low inductance circuit design and EMI reduction are achieved, and the electromagnetic compatibility and stability of the module are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-29
- Publication Date
- 2026-03-13
AI Technical Summary
In the prior art, silicon carbide power modules in multi-chip parallel structures suffer from uneven current distribution, voltage overshoot caused by parasitic inductance, and EMI problems, which affect module reliability and electromagnetic compatibility.
By arranging capacitors and power devices close together, the power loop path is shortened, parasitic inductance is reduced, and the internal shielding layer of the module is formed by capacitors to weaken the radiation and conduction of high-frequency switching noise and optimize the dynamic current sharing effect.
Significantly reduces voltage overshoot, minimizes EMI issues, improves the electromagnetic compatibility and operational stability of power modules, and enhances current uniformity and device safety when multiple chips are connected in parallel.
Smart Images

Figure CN121663948A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electric drive technology, and more specifically, to a power module, an electric drive assembly, and a vehicle. Background Technology
[0002] With the widespread application of third-generation semiconductor silicon carbide (SiC) devices, the operating frequency and power density of power modules are continuously increasing. Compared with traditional silicon-based IGBTs, silicon carbide MOSFETs have higher operating frequencies (up to 100kHz-1MHz), higher switching speeds (dv / dt up to 50-100V / ns), and higher operating temperatures (up to over 200°C). However, these advantages also bring new challenges: in multi-chip parallel structures, inconsistencies in parasitic parameters can lead to uneven current distribution, affecting module reliability; due to extremely high di / dt (up to over 10A / ns), parasitic inductance in the power circuit can cause severe voltage overshoot, threatening device safety; switching noise in the MHz to GHz frequency band can interfere with the control system and cause EMI problems.
[0003] There is currently no effective solution to the above problems. Summary of the Invention
[0004] The main objective of this invention is to provide a power module, an electric drive assembly, and a vehicle to solve the problem of how power modules can effectively suppress voltage spikes during the switching process in the prior art.
[0005] To achieve the above objectives, according to one aspect of the present invention, a power module is provided, comprising: a plurality of sub-power modules, each sub-power module corresponding to a phase; a plurality of bushings, each bushing having a reference surface, at least one of the plurality of sub-power modules having a bushing, the sub-power module being located within the reference surface; a plurality of DC power terminals, the plurality of DC power terminals being disposed in a one-to-one correspondence with the plurality of bushings, the DC power terminals being located within the reference surface, the DC power terminals being disposed at one end of the bushings; a plurality of AC power terminals, the plurality of AC power terminals being disposed in a one-to-one correspondence with the plurality of bushings, the AC power terminals being disposed within the reference surface, the AC power terminals being disposed at a distance from the DC power terminals, the AC power terminals being located at the other end of the bushings; and a plurality of capacitors, the plurality of capacitors being disposed in a one-to-one correspondence with the plurality of bushings, the capacitors being located between the sub-power modules and the DC power terminals.
[0006] Furthermore, the DC power terminal includes: a negative DC power terminal located on the geometric center line of the substrate; and a positive DC power terminal located on one side of the negative DC power terminal, which is disposed adjacent to the capacitor.
[0007] Furthermore, the capacitor on any one of the multiple liner plates includes multiple sub-capacitors, which are spaced apart along the width direction of the liner plate.
[0008] Furthermore, the multiple sub-capacitors are arranged symmetrically about the geometric center line of the substrate.
[0009] Furthermore, the sub-power module includes multiple chips arranged symmetrically about the geometric center line of the substrate.
[0010] Furthermore, at least one of the multiple chips is a silicon carbide chip.
[0011] Furthermore, at least one of the multiple sub-capacitors is a decoupling capacitor.
[0012] Furthermore, the positive DC power terminal includes multiple terminals, and multiple positive DC power terminals are arranged corresponding to multiple sub-capacitors.
[0013] According to another aspect of the present invention, an electric drive assembly is provided, including a motor controller, wherein the motor controller is the power module described above.
[0014] According to another aspect of the present invention, a vehicle is provided, including an electric drive assembly, the electric drive assembly being the electric drive assembly described above.
[0015] By applying the technical solution of this invention, the power circuit path is significantly shortened and the circuit area is reduced through the close arrangement of capacitors, power devices, and DC terminals. This significantly reduces the parasitic inductance of the power circuit, achieving a low-inductance circuit design. This effectively suppresses voltage overshoot caused by the high di / dt characteristics of silicon carbide devices. At the same time, the capacitor between the sub-power module and the DC terminal forms an internal shielding layer of the module, which can shield the parasitic capacitance from the midpoint to ground, weaken the radiation and conduction of high-frequency switching noise in the MHz to GHz band, significantly reduce EMI problems, improve the electromagnetic compatibility and operating stability of the power module, and solve the problem of how power modules can effectively suppress voltage spikes during the switching process in the prior art. Attached Figure Description
[0016] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:
[0017] Figure 1 A structural diagram of the first embodiment of the power module described in this invention;
[0018] Figure 2 Axonometric view of the second embodiment of the power module described in this invention;
[0019] Figure 3Circuit diagram of the third embodiment of the power module of the present invention.
[0020] 10. DC power terminal; 101. Positive DC power terminal; 102. Negative DC power terminal; 20. Capacitor; 30. Sub-power module; 301. Chip; 40. AC power terminal. Detailed Implementation
[0021] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.
[0022] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.
[0023] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus. Exemplary embodiments according to this application will now be described in more detail with reference to the accompanying drawings. However, these exemplary embodiments may be implemented in many different forms and should not be construed as being limited to the embodiments set forth herein. It should be understood that these embodiments are provided so that the disclosure of this application is thorough and complete, and that the concept of these exemplary embodiments is fully conveyed to those skilled in the art. In the drawings, for clarity, the thickness of layers and regions may be enlarged, and the same reference numerals are used to denote the same devices, and therefore their description will be omitted.
[0024] With the continuous upgrading of the demand for high efficiency, miniaturization, and high reliability in power electronic devices from fields such as new energy vehicles, rail transit, and energy storage systems, third-generation semiconductor silicon carbide devices have achieved widespread application due to their excellent material properties, driving the technological iteration of power modules into a new stage. Compared with traditional silicon-based IGBT devices, silicon carbide MOSFETs have achieved a qualitative breakthrough in core performance indicators: the operating frequency has been greatly improved to the 100kHz and 1MHz level, which is several times or even an order of magnitude higher than that of silicon-based devices, providing a foundation for the high-frequency design of power modules; the switching speed (dv / dt) reaches 50 and 100V / ns, respectively, and the switching loss is significantly reduced, which helps to further improve the power density of the module; the maximum operating temperature can exceed 200°C, enhancing the adaptability of the module under high-temperature conditions.
[0025] However, realizing these core advantages also comes with a series of pressing technical challenges: First, in a multi-chip parallel power module structure, due to factors such as the discreteness of chip parameters, differences in lead length during packaging, and asymmetrical substrate layout, the parasitic resistance, parasitic inductance, and other parameters of each parallel chip are difficult to be completely consistent. This leads to different current rise / fall rates for each chip during switching, resulting in dynamic current imbalance. This causes some chips to bear excessive current stress, resulting in excessively high local temperatures, which seriously affects the long-term reliability and service life of the power module. Second, the extremely high switching speed of silicon carbide MOSFETs results in a current change rate (di / dt) of over 10 A / ns. According to the principle of electromagnetic induction (U=L... The parasitic inductance in the power circuit inevitably generates a significant induced voltage, resulting in severe voltage overshoot and voltage oscillation. If this voltage spike exceeds the rated breakdown voltage of the device, it will directly threaten the safe operation of the silicon carbide MOSFET and may even cause instantaneous breakdown and damage to the device. Thirdly, due to the increase in switching frequency to the MHz level and the extremely fast change rate of voltage and current during the switching process, the power module will generate high-frequency switching noise in the MHz to GHz frequency band. This noise will not only interfere with the signal transmission accuracy of the surrounding control system through both conduction and radiation, causing the control logic to be falsely triggered, but will also cause the electromagnetic interference (EMI) level of the module to exceed the relevant standard limits, affecting the electromagnetic compatibility of the entire power electronic system and limiting the application of silicon carbide power modules in high-requirement scenarios.
[0026] This application provides a power module, such as... Figure 1 and Figure 2As shown, the system includes: multiple sub-power modules 30, each corresponding to one phase; multiple bushings, each bushing having a reference surface, at least one of the multiple sub-power modules having one bushing, the sub-power modules being located within the reference surface; multiple DC power terminals 10, each DC power terminal 10 corresponding to one of the bushings, the DC power terminals 10 being located within the reference surface, and the DC power terminals 10 being disposed at one end of the bushing; multiple AC power terminals 40, each AC power terminal 40 corresponding to one of the bushings, the AC power terminals 40 being disposed within the reference surface, the AC power terminals 40 being disposed at a distance from the DC power terminals 10, and the AC power terminals 40 being located at the other end of the bushing; and multiple capacitors 20, each capacitor 20 corresponding to one of the bushings, the capacitors 20 being located between the sub-power modules and the DC power terminals 10.
[0027] By applying the technical solution of this invention, the close arrangement of capacitor 20 with the sub-power module and DC power terminal 10 significantly shortens the power circuit path, reduces the circuit area, and significantly reduces the parasitic inductance of the power circuit, achieving a low-inductance circuit design. This effectively suppresses voltage overshoot caused by the high di / dt characteristics of silicon carbide devices. At the same time, capacitor 20 between the sub-power module 30 and DC power terminal 10 constitutes an internal shielding layer of the module, which can shield the parasitic capacitance 20 at the midpoint to ground, weaken the radiation and conduction of high-frequency switching noise in the MHz to GHz band, significantly reduce EMI problems, improve the electromagnetic compatibility and operating stability of the power module, and solve the problem of how the power module can effectively suppress voltage spikes during the switching process in the prior art.
[0028] Furthermore, the DC power terminal 10 includes: a negative DC power terminal 102, which is located on the geometric center line of the liner; and a positive DC power terminal 101, which is located on one side of the negative DC power terminal 102 and is disposed adjacent to the capacitor 20.
[0029] In this embodiment, the negative DC power terminal 102 is located at the geometric center line of the substrate, which gives the layout good symmetry and helps to distribute the current evenly when multiple chips are connected in parallel. The positive DC power terminal 101 is set close to the capacitor 20, which shortens the energy transmission path between the capacitor 20 and the DC power terminal 10 and effectively reduces the parasitic inductance of the power circuit. This not only further optimizes the dynamic current sharing effect in conjunction with the symmetrical layout, but also suppresses voltage spikes during the switching process and improves the reliability of the power module.
[0030] In this embodiment, the capacitor on any one of the multiple substrates includes multiple sub-capacitors, which are spaced apart along the width of the substrate. The arrangement of multiple sub-capacitors spaced apart along the width of the substrate on each substrate makes the corresponding positions of the sub-capacitors and sub-power modules more uniform, optimizes the consistency of parasitic parameters of each parallel chip, further improves the dynamic current sharing effect, increases the equivalent contact range between the capacitor 20 and the power device, shortens the local energy transmission path, and more effectively reduces the parasitic inductance of the power circuit, enhancing the voltage spike suppression effect. This embodiment uses two sub-capacitors.
[0031] Specifically, multiple sub-capacitors are symmetrically arranged about the geometric center line of the substrate. This symmetrical arrangement ensures that the energy transmission path length and parasitic parameters of each parallel chip and capacitor 20 are highly consistent, significantly optimizing the dynamic current sharing effect. Simultaneously, it enhances the symmetry of the substrate layout, further reducing the parasitic inductance of the power circuit, effectively improving voltage spike suppression capability. Furthermore, the resulting internal shielding layer is more regular, weakening high-frequency noise coupling, reducing EMI issues, and improving the stability and reliability of the power module.
[0032] In one exemplary embodiment, the sub-power module includes multiple chips 301, which are symmetrically arranged about the geometric center line of the substrate. This symmetrical arrangement of the chips 301 about the substrate ensures that the parasitic parameters of each chip 301 and the energy transmission paths with the capacitor 20, DC power terminal 10, and AC power terminal 40 are highly consistent. This significantly optimizes the dynamic current sharing effect when multiple chips are connected in parallel, avoids excessive current stress on individual chips 301, enhances the overall symmetry of the substrate layout, further reduces parasitic inductance in the power circuit, effectively suppresses voltage spikes, reduces high-frequency noise coupling, helps reduce EMI problems, and improves the operational stability and reliability of the power module.
[0033] like Figure 3 As shown, the power module includes at least an inverter, which includes an upper three-bridge and a lower three-bridge. The output terminals of the upper three-bridge and the lower three-bridge are connected to the three-phase input terminals of the motor. Both the upper three-bridge and the lower three-bridge include three parallel decoupling capacitors C1, and each decoupling capacitor is connected in parallel with the DC power terminal 10. Each of the above four chips 301 is equivalent to MOSN, where N is 1, 2, 3, 4, 5 and 6.
[0034] Furthermore, at least one of the multiple chips 301 is a silicon carbide chip. By fully utilizing the high-frequency, high-speed switching and high-temperature resistance characteristics of silicon carbide material, the power density and operating efficiency of the power module are effectively improved, and switching losses are reduced. Simultaneously, its excellent electrical performance, combined with the symmetrical layout of the substrate and the close-packed arrangement of capacitors 20, further optimizes the dynamic current sharing effect, enhances voltage spike suppression capability, reduces high-frequency noise interference and EMI issues, and improves the operating stability and long-term reliability of the power module under high-temperature and high-frequency conditions.
[0035] In this embodiment, at least one of the multiple sub-capacitors is a decoupling capacitor. It can specifically absorb high-frequency switching noise, enhance the decoupling effect within the module, and synergize with the layout of capacitor 20 close to the sub-power module and DC power terminal 10, the symmetrical design of the substrate and chip 301, further shortening the energy transmission path, reducing parasitic inductance in the power circuit, optimizing the dynamic current sharing effect of multiple chips in parallel, effectively suppressing voltage spikes, reducing EMI problems and device stress, and improving the operational stability and long-term reliability of the power module.
[0036] In one exemplary embodiment, the positive DC power terminals 101 include multiple terminals, each corresponding to a plurality of sub-capacitors. This ensures that the energy output path of each sub-capacitor precisely matches the power supply path of the chip 301, shortening the energy transmission distance between the capacitor 20 and the chip 301, further reducing the parasitic inductance of the power circuit. Combined with the symmetrical layout of the substrate and the chip 301, this improves the dynamic current sharing effect of multiple chips in parallel, effectively suppressing voltage spikes, reducing high-frequency noise coupling, helping to reduce EMI problems, and simultaneously enhancing the current carrying capacity of the power module, improving its operational stability and reliability. In this embodiment, two positive DC power terminals 101 are used.
[0037] According to another specific embodiment of this application, an electric drive assembly is also provided, including a motor controller, which is the power module described above.
[0038] By applying the technical solution of this invention, the motor controller of the electric drive assembly adopts the aforementioned power module. With the symmetrical layout of the substrate chip 301 and multiple sub-capacitors, and the corresponding arrangement of the positive DC power terminal 101 and the sub-capacitors, as well as the layout design of the capacitor 20 close to the sub-power module and the DC power terminal 10, the high-frequency, high-speed, and high-temperature resistance characteristics of the silicon carbide chip are fully utilized. This effectively optimizes the dynamic current sharing effect of the parallel connection of multiple chips 301, significantly reduces the parasitic inductance of the power circuit, suppresses voltage spikes, reduces high-frequency noise coupling and EMI problems, and improves the current carrying capacity. This enables the electric drive assembly to have higher power density and working efficiency, enhances operational stability and long-term reliability, and meets the high-efficiency operation requirements of new energy vehicles and other fields.
[0039] According to another specific embodiment of this application, a vehicle is also provided, including an electric drive assembly, the electric drive assembly being the electric drive assembly described above.
[0040] By applying the technical solution of this invention, a vehicle is equipped with the aforementioned electric drive assembly. The motor controller of this electric drive assembly adopts the power module. With the help of the symmetrical layout of the substrate, chip 301 and multiple sub-capacitors, the corresponding setting of the positive DC power terminal 101 and the sub-capacitors, the layout design of the capacitor 20 close to the sub-power module and the DC power terminal 10, and the high-frequency, high-speed and high-temperature resistance characteristics of the silicon carbide chip, the dynamic current sharing effect of the parallel connection of multiple chips 301 is effectively optimized, the parasitic inductance of the power circuit is significantly reduced, voltage spikes are suppressed, high-frequency noise coupling and EMI problems are reduced, and the current carrying capacity, power density and working efficiency of the electric drive assembly are improved. This makes the vehicle's power output stronger, energy consumption lower, and operation stability and long-term reliability better, fully adapting to the driving needs of new energy vehicles and improving the overall vehicle user experience and durability.
[0041] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.
[0042] In addition to the above, it should be noted that the terms "one embodiment," "another embodiment," and "embodiment" used in this specification refer to specific features, structures, or characteristics described in connection with that embodiment, which are included in at least one embodiment described in the general description of this application. The appearance of the same expression in multiple places in the specification does not necessarily refer to the same embodiment. Furthermore, when a specific feature, structure, or characteristic is described in connection with any embodiment, the intention is to suggest that implementing such a feature, structure, or characteristic in conjunction with other embodiments also falls within the scope of this invention.
[0043] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0044] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.
Claims
1. A power module, characterized in that, include: Multiple sub-power modules (30), each of the sub-power modules (30) corresponding to one phase; The liner includes multiple liners, each liner having a reference surface, and at least one of the multiple sub-power modules has a liner, the sub-power module being located within the reference surface; A DC power terminal (10) is provided, comprising a plurality of DC power terminals (10), each of which is provided in correspondence with a plurality of the substrates. The DC power terminals (10) are located within the reference plane and are disposed at one end of the substrate. AC power terminal (40), the AC power terminal (40) includes a plurality of them, the plurality of AC power terminals (40) are arranged one-to-one with the plurality of the substrates, the AC power terminal (40) is arranged in the reference plane, the AC power terminal (40) is arranged at a distance from the DC power terminal (10), and the AC power terminal (40) is located at the other end of the substrate; The capacitor (20) includes multiple capacitors, and the multiple capacitors (20) are arranged in a one-to-one correspondence with the multiple substrates. The capacitors (20) are located between the sub-power module and the DC power terminal (10).
2. The power module according to claim 1, characterized in that, The DC power terminal (10) includes: A negative DC power terminal (102) is located on the geometric center line of the liner; A positive DC power terminal (101) is located on one side of the negative DC power terminal (102), and the positive DC power terminal (101) is disposed adjacent to the capacitor (20).
3. The power module according to claim 2, characterized in that, The capacitor on any one of the plurality of liner plates includes a plurality of sub-capacitors, and the plurality of sub-capacitors are spaced apart along the width direction of the liner plate.
4. The power module according to claim 3, characterized in that, The multiple sub-capacitors are arranged symmetrically about the geometric center line of the substrate.
5. The power module according to claim 1, characterized in that, The sub-power module includes a plurality of chips (301) arranged symmetrically about the geometric center line of the substrate.
6. The power module according to claim 5, characterized in that, At least one of the plurality of chips (301) is a silicon carbide chip.
7. The power module according to claim 3, characterized in that, At least one of the multiple sub-capacitors is a decoupling capacitor.
8. The power module according to claim 3, characterized in that, The positive DC power terminal (101) includes a plurality of terminals, and the plurality of positive DC power terminals (101) are arranged corresponding to the plurality of sub-capacitors.
9. An electric drive assembly, comprising a motor controller, characterized in that, The motor controller is the power module as described in any one of claims 1-8.
10. A vehicle comprising an electric drive assembly, characterized in that, The electric drive assembly is the electric drive assembly as described in claim 9.