Totem pole bridgeless PFC current zero-crossing peak suppression method and system

Abstract

The invention provides a totem-pole bridgeless PFC current zero-crossing peak suppression method and system, and the method comprises the steps: monitoring an operation signal of a totem-pole bridgeless PFC circuit in real time, judging whether the circuit is in a zero-crossing state or not according to a preset threshold value, and determining a zero-crossing type at the same time; when it is determined that the circuit is in a zero-crossing state, dead time control is started immediately, and all switching tubes are turned off; after dead zone time control is finished, soft start control is carried out on a target switching tube of the high-frequency bridge arm according to the zero-crossing type, and the duty ratio is gradually increased to a target value from an initial value from the first switching period to the Nth switching period; after soft start control is completed, bipolar control is executed, the totem-pole bridgeless PFC circuit is regarded as a full-bridge rectification structure, and the midpoint voltage of a bridge arm is controlled to adjust the inductive current; and after the bipolar control lasts for M second switching periods, quitting the zero-crossing control mode, and executing conventional double-closed-loop control. According to the invention, the current zero-crossing peak problem of the totem-pole bridgeless PFC can be effectively suppressed.

Description

Technical Field

[0001] This invention relates to the field of circuit control technology, specifically to a method and system for suppressing zero-crossing current spikes in totem-pole bridgeless PFC. Background Technology

[0002] Totem-pole bridgeless PFC boasts advantages such as high efficiency, high power factor, fewer switching devices, and low common-mode interference, leading to its extensive research in the PFC conversion field. The development of next-generation wide-bandgap semiconductors (such as GAN and SiC) has enabled totem-pole bridgeless PFC to operate in continuous current mode (CCM), thus facilitating its widespread application in high-power converters. However, this topology has an inherent problem: current spikes frequently occur near the zero-crossing point of the AC input voltage.

[0003] Near the zero-crossing point of the AC input voltage, the polarity of the input voltage changes, causing a sudden change in the conduction state of the switching transistors. The duty cycle of the main switching transistor in the high-frequency bridge arm abruptly changes from near 0 to near 100% (the synchronous rectifier changes in the opposite direction). Due to the slow reverse recovery characteristic of the body diode of the low-frequency bridge arm switching transistor, at certain moments, a large voltage, approximately equal to the output voltage, is directly applied to the inductor, forming a positive current spike. Furthermore, even if the synchronous rectifier in the high-frequency bridge arm has a very small duty cycle at this time, the voltage applied to the inductor is still very high, which will result in a large negative spike on the inductor. Additionally, because the reverse recovery characteristic of low-frequency transistors is generally poor, if the low-frequency bridge arm does not have a reasonable dead time, it may lead to shoot-through of the upper and lower transistors. The zero-crossing current spikes not only increase the harmonic content of the circuit, reducing PFC efficiency and power factor, but may also damage components such as the switching transistors in the circuit.

[0004] Currently, while some methods exist to suppress the zero-crossing current spike problem in totem-pole PFC, such as soft-start control of the switching transistor and adding a buffer circuit, they all have certain limitations. While some soft-start control methods can suppress current spikes to a certain extent, abrupt changes in the control quantity during zero-crossing control and closed-loop control may lead to current unevenness and introduce new interference. Adding a buffer circuit increases the circuit size and cost, as well as losses and reduces system efficiency. Summary of the Invention

[0005] In view of the above problems, embodiments of the present invention provide a method and system for suppressing zero-crossing current spikes in totem pole bridgeless PFC to solve the existing technical problems.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0007] In a first aspect, the present invention provides a method for suppressing zero-crossing spikes in totem-pole bridgeless PFC current, the method comprising the following steps:

[0008] The system monitors the operating signals of the bridgeless PFC circuit of the totem pole in real time, and determines whether the circuit is in a zero-crossing state based on a preset threshold, while also determining the type of zero-crossing.

[0009] When the circuit is in a zero-crossing state, the dead-time control is immediately activated to turn off all switching transistors.

[0010] After the dead time control ends, soft start control is performed on the target switch of the high-frequency bridge arm according to the zero-crossing type, so that the duty cycle gradually increases from the initial value to the target value from the first to the Nth first switching cycle;

[0011] After the soft start control is completed, bipolar control is executed, treating the totem pole bridgeless PFC circuit as a full-bridge rectifier structure, and controlling the midpoint voltage of the bridge arm to adjust the inductor current.

[0012] After the bipolar control continues for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control.

[0013] In one embodiment, the bipolar control sequentially performs the following steps:

[0014] The switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are turned on to form a positive current loop, so that the midpoint of the bridge arm outputs a positive voltage, driving the inductor current to rise linearly to approach the reference signal of the inner current loop.

[0015] Turn off all switches to bring the voltage at the midpoint of the bridge arm close to zero, allowing time for reverse recovery during switch switching.

[0016] The switching transistors controlling the high-frequency and low-frequency bridge arms are turned on to form a reverse current loop, causing the midpoint of the bridge arm to output a negative voltage, driving the inductor current to decrease linearly to offset the previous increase.

[0017] Turn off all switches again to prepare for the next second switching cycle, until the Mth second switching cycle is completed.

[0018] In one embodiment, the number of cycles M of the second switching cycle is adjustable, and M ranges from 30 to 50 switching cycles. In each second switching cycle, the switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are controlled to alternately conduct with a duty cycle of less than 50%.

[0019] In one embodiment, the real-time monitoring of the operating signal of the totem pole bridgeless PFC circuit, and the determination of whether the circuit is in a zero-crossing state based on a preset threshold, and the determination of the zero-crossing type include:

[0020] The AC input voltage signal in the operating signal is processed by a phase-locked loop to generate a unit sine wave signal;

[0021] Compare the current unit sine wave signal with the positive threshold voltage and the negative threshold voltage;

[0022] If the absolute value of the current signal is less than or equal to the threshold voltage, the circuit is determined to be in a zero-crossing state.

[0023] When determining whether the circuit is in a zero-crossing state, the signal value from the previous moment is used to distinguish whether the zero-crossing is positive or negative.

[0024] In one embodiment, the step of distinguishing whether the zero-crossing type is positive or negative when the determination circuit is in a zero-crossing state, based on the signal value at the previous moment, includes:

[0025] If the phase-following signal from the previous moment is greater than the positive threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be positive zero-crossing.

[0026] If the phase-following signal at the previous moment is less than the negative threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be negative zero-crossing.

[0027] In one embodiment, the step of immediately initiating dead-time control and shutting off the drive signals of all switching transistors when the determination circuit is in a zero-crossing state includes:

[0028] When the detection circuit is in a zero-crossing state, the zero-crossing state flag is set.

[0029] After setting the zero-crossing status flag, immediately set the drive signals of all switching transistors to the off state;

[0030] The duration of the dead time is controlled by the zero-crossing state flag, providing reverse recovery time for the low-frequency bridge arm switches.

[0031] In one embodiment, the step of performing soft-start control on the target switch of the high-frequency bridge arm according to the zero-crossing type after the dead-time control ends, and gradually increasing the duty cycle from the initial value to the target value from the first to the Nth first switching cycle, includes:

[0032] Select the target switch transistor to be soft-started in the high-frequency bridge arm based on the zero-crossing direction flag;

[0033] If the zero-crossing type is positive zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the positive half-cycle as the target switch.

[0034] If the zero-crossing type is negative zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the negative half-cycle as the target switch.

[0035] Over N first switching cycles, the duty cycle of the selected target switch is uniformly increased from zero to 50%.

[0036] In one embodiment, the number of cycles N of the first switching cycle is adjustable, and N ranges from 10 to 20 switching cycles.

[0037] In one embodiment, after the bipolar control continues for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control, including:

[0038] After M second switching cycles of bipolar control, the zero-crossing state flag is cleared;

[0039] The system performs dual closed-loop control, consisting of an outer loop for output voltage and an inner loop for input current, based on the input AC voltage signal, input current signal, and output DC voltage signal in the operating signals.

[0040] Secondly, this invention provides a totem pole bridgeless PFC current zero-crossing spike suppression system, the system comprising:

[0041] Signal acquisition module: used to monitor the operating signal of the totem pole bridgeless PFC circuit in real time, and determine whether the circuit is in a zero-crossing state according to the preset threshold, and at the same time determine the zero-crossing type;

[0042] Dead time control module: When the detection circuit is in a zero-crossing state, the dead time control is activated immediately to turn off all switching transistors;

[0043] Soft start module: After the dead time control ends, it is used to perform soft start control on the target switch of the high-frequency bridge arm according to the zero crossing type, so that the duty cycle gradually increases from the initial value to the target value from the first to the Nth first switching cycle;

[0044] Bipolar control module: After the soft start control is completed, bipolar control is executed, treating the totem pole bridgeless PFC circuit as a full-bridge rectifier structure, and controlling the midpoint voltage of the bridge arm to adjust the inductor current.

[0045] Dual closed-loop control module: After continuous bipolar control for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control.

[0046] Thirdly, the present invention provides an electronic device, comprising: a processor and a memory;

[0047] The memory is used to store computer programs;

[0048] The processor is configured to execute, by invoking the computer program, a totem pole bridgeless PFC current zero-crossing spike suppression method provided in any of the first aspects.

[0049] Fourthly, the present invention provides a computer-readable storage medium comprising a program, which, when executed by a processor, is used to implement a totem-pole bridgeless PFC current zero-crossing spike suppression method provided in any of the first aspects.

[0050] The totem-pole bridgeless PFC current zero-crossing spike suppression method of this invention significantly reduces zero-crossing current spikes, lowers harmonic content in the PFC circuit, and improves the power factor through the synergistic effect of zero-crossing state judgment, dead-time control, soft-start control, and bipolar control. Reducing current spikes lowers voltage and current stress on components such as switching transistors, extends component lifespan, reduces the risk of component damage, and lowers system maintenance costs. It is applicable to totem-pole bridgeless PFC circuits of different power levels and application scenarios, exhibiting good versatility and meeting the needs of various power electronic devices. Attached Figure Description

[0051] Figure 1 The diagram shown is a flowchart illustrating the totem pole bridgeless PFC current zero-crossing spike suppression method of the present invention.

[0052] Figure 2 The diagram shows the topology of a totem pole bridgeless PFC circuit.

[0053] Figure 3 The diagram shows the current flow of a bridgeless PFC circuit for totem poles during the positive half-cycle.

[0054] Figure 4 The diagram shows the current flow of a bridgeless totem pole PFC circuit during the negative half-cycle.

[0055] Figure 5 The figure shown is a timing diagram of the switching transistor control within one power frequency cycle in the current zero-crossing spike suppression method of the bridgeless PFC of the present invention.

[0056] Figure 6 The figure shown is a waveform diagram of the bipolar controlled gate drive in the totem pole bridgeless PFC current zero-crossing spike suppression method of the present invention.

[0057] Figure 7 The diagram shown is a block diagram of the dual closed-loop control strategy in the totem pole bridgeless PFC current zero-crossing spike suppression method of the present invention.

[0058] Figure 8 The diagram shown is a structural schematic of the bridgeless PFC current zero-crossing spike suppression system of the present invention.

[0059] Figure 9 The diagram shown is a structural schematic of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of this invention clearer and more understandable, the invention will be further described below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0061] To address the shortcomings of existing technologies, this invention provides a specific implementation method for suppressing zero-crossing current spikes in totem-pole bridgeless PFC, such as... Figure 1 and combined Figure 5 As shown, the method includes:

[0062] S110: Real-time monitoring of the operating signal of the bridgeless PFC circuit of the totem pole, and determination of whether the circuit is in a zero-crossing state based on a preset threshold, and determination of the zero-crossing type.

[0063] S120: When the detection circuit is in a zero-crossing state, the dead time control is immediately activated to turn off all switching transistors;

[0064] S130: After the dead time control ends, the target switch of the high-frequency bridge arm is soft-started according to the zero-crossing type, and the duty cycle is gradually increased from the initial value to the target value from the first to the Nth first switching cycle.

[0065] S140: After the soft start control is completed, bipolar control is executed, and the totem pole bridgeless PFC circuit is regarded as a full bridge rectifier structure. The voltage at the midpoint of the bridge arm is controlled to adjust the inductor current.

[0066] S150: After the bipolar control continues for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control.

[0067] like Figure 2-4 As shown, in practical applications, the totem pole bridgeless PFC circuit topology is described in [reference needed]. Figure 1 Among them, gallium nitride switches Q1 and Q3 form a high-frequency bridge arm, and Q2 and Q4 form a low-frequency bridge arm (operating in the AC input voltage power frequency cycle). Figure 2 The working state of the totem pole bridgeless PFC during the positive half-cycle of AC input is as follows: Q3 is the main switch transistor, Q1 is the synchronous rectifier transistor, Q4 of the low-frequency bridge arm is always on during the positive half-cycle, and Q2 is always off. Figure 3To illustrate the working state of the totem pole bridgeless PFC during the negative half-cycle of the AC input, Q1 is the main switch transistor, Q2 is the synchronous rectifier transistor, the low-frequency bridge arm Q2 is always on during the negative half-cycle, and Q4 is always off. This embodiment's method monitors the totem pole bridgeless PFC circuit's operating signal in real time and determines the zero-crossing state and type based on a preset threshold. Without precise zero-crossing determination, dead-time control is prone to false triggering or missed triggering. Clearly defining the zero-crossing type provides a basis for accurate selection of the target switch in soft-start control, avoiding current surges caused by incorrect switch selection. Upon determining the zero-crossing state, dead-time control is immediately initiated and all switches are turned off. This is a proactive protection against the core pain point of slow reverse recovery of the low-frequency bridge arm switch's body diode during the zero-crossing phase. This step provides sufficient reverse recovery time for the low-frequency diode, preventing a large voltage spike from being directly applied to the inductor when the high-frequency switch is turned on during subsequent soft-start control due to incomplete reverse recovery of the low-frequency diode. It also clears reverse recovery interference for a smooth soft-start. If dead-time control is omitted, the gradual change in duty cycle during the soft-start phase cannot offset the current surge caused by reverse recovery. After dead-time control, the high-frequency bridge arm target switch undergoes a gradual duty cycle soft-start for N first switching cycles based on the zero-crossing type. This addresses the sudden change in the high-frequency bridge arm's duty cycle. The targeted solution to the problem ensures a smooth transition of the duty cycle of the main switch in the high-frequency bridge arm to the target value (e.g., 50%). This avoids negative spikes caused by abrupt changes in the duty cycle from near 0 to near 100%. Once the target duty cycle is reached, bipolar control can be directly initiated without additional adjustments. If the soft-start control is insufficient, current distortion may still occur in the initial stage of bipolar control due to duty cycle fluctuations. After soft-start, the bipolar control operates by treating the circuit as a full-bridge rectifier structure and adjusting the midpoint voltage of the bridge arm. The flexible switching between ±Vo and 0 provides the inductor with appropriate positive and negative voltage excitation, ensuring that the inductor current always fluctuates smoothly around the reference current, further eliminating the current fluctuations that may remain after soft start. At the same time, the design of bipolar control for M second switching cycles provides sufficient time for the current to fully follow the reference signal, avoiding current abrupt changes caused by switching to conventional control too early. Finally, after the bipolar control ends, it exits the zero-crossing control mode and executes conventional dual closed-loop control, realizing a seamless connection between zero-crossing control and conventional control, avoiding mode switching interference.

[0068] This embodiment can significantly suppress current zero-crossing spikes, reduce circuit harmonic content, stabilize the power factor at a high level, and avoid efficiency losses caused by spikes. Through dead-time control and shoot-through protection design in bipolar control, it can effectively reduce voltage and current stress on switching transistors, reduce the risk of component damage, improve system reliability and service life, and reduce maintenance costs. The entire process is based on digital control, eliminating the need for additional buffer circuits and other hardware, avoiding the problems of increased size and cost caused by existing hardware solutions. At the same time, it is adaptable to different power levels and application scenarios, and has strong versatility. The progressive control of each step ensures a smooth current transition from the zero-crossing stage to the normal stage, without the introduction of additional electromagnetic interference, further optimizing the stability of circuit operation.

[0069] In one embodiment of the present invention, such as Figure 6 As shown, the following steps are executed sequentially during bipolar control:

[0070] The switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are turned on to form a positive current loop, so that the midpoint of the bridge arm outputs a positive voltage, driving the inductor current to rise linearly to approach the reference signal of the inner current loop.

[0071] Turn off all switches to bring the voltage at the midpoint of the bridge arm close to zero, allowing time for reverse recovery during switch switching.

[0072] The switching transistors controlling the high-frequency and low-frequency bridge arms are turned on to form a reverse current loop, causing the midpoint of the bridge arm to output a negative voltage, driving the inductor current to decrease linearly to offset the previous increase.

[0073] Turn off all switches again to prepare for the next second switching cycle, until the Mth second switching cycle is completed.

[0074] See Figure 6In this embodiment, the bipolar control is divided into four stages within each second switching cycle. In the first stage, Q1 of the high-frequency bridge arm is turned on and Q3 is turned off, while Q4 of the low-frequency bridge arm is turned on and Q2 is turned off. The current starts from the positive terminal of the output DC voltage Vo+, flows through Q4 to the midpoint Vab of the bridge arm, and then through the inductor and the input side. At this time, the input voltage Vin is close to 0. After the load, it flows back to Vo- through Q1, forming a complete positive current loop. In this stage, the midpoint Vab of the bridge arm is pulled to the same potential as Vo+ by Q4 (i.e., Vab = +Vo). Since Vin is close to 0, the voltage VL across the inductor is approximately +Vo, driving the inductor current to rise linearly and gradually approach the inner current loop reference signal iref, avoiding current lag due to Vin being too low. In the second stage, after the preset duration of stage 1, Q1, Q2, Q3, and Q4 are all turned off, entering the dead zone stage. At this time, because the inductor current cannot change abruptly, it freewheels through the body diode of the switching transistor: if the inductor current is still positive, the current starts from the inductor, flows back to Vo- through the body diode of Q2, and then returns to the inductor through the body diode of Q3, forming a freewheeling loop. During the freewheeling process, the forward voltage drop of the body diode is much smaller than Vo, the potential of Vab at the midpoint of the bridge arm is close to 0, and the voltage across the inductor is also close to 0. The inductor current stops rising and maintains its current value with a slight decay. The core purpose of this stage is to reserve reverse recovery time for the turn-off of Q1 and Q4 and the subsequent turn-on of Q2 and Q3, to avoid shoot-through caused by delay when switching transistors of different bridge arms, and to prevent electromagnetic interference caused by Vab jumping directly from +Vo to negative voltage. In the third stage, after the dead zone has lasted for a preset duration, Q3 of the high-frequency bridge arm is turned on and Q1 is turned off, while Q2 of the low-frequency bridge arm is turned on and Q4 is turned off. The current starts from the negative terminal of the output DC voltage Vo-, flows through Q2 to the midpoint Vab of the bridge arm, and then flows back to Vo+ through the inductor, the input side, and the load, forming a complete reverse current loop. In this stage, the midpoint Vab of the bridge arm is pulled to the same potential as Vo (i.e., -Vo) by Q2. Since Vin is close to 0, the voltage across the inductor VL≈-Vo, driving the inductor current to decrease linearly, offsetting the increase in inductor current in stage 1, so that the inductor current fluctuates smoothly around iref, avoiding excessive current growth that forms a negative spike. In the fourth stage, after the preset duration of stage 3, Q1, Q2, Q3, and Q4 are all turned off again, entering the second dead zone freewheeling stage. The inductor continues to freewheel through the body diode: if the inductor current is still positive, the current flows from the inductor, through the body diode of Q1 back to Vo-, and then through the body diode of Q4 (drain to source) back to the inductor; if the inductor current has reversed, the freewheeling path is reversed. In this stage, Vab is still ≈0, VL ≈0, the inductor current stops decreasing and stabilizes at a value close to iref, and at the same time prepares for entering the next high-frequency switching cycle, avoiding timing conflicts caused by frequent switching of the switching transistors, and ensuring a smooth transition of each cycle.

[0075] This embodiment employs a control method that uses a forward current loop to drive the inductor current to rise linearly and a reverse current loop to drive the inductor current to fall linearly. This actively and precisely constrains the inductor current during the zero-crossing phase, effectively solving the problems of existing soft-start control of switching transistors, which can only partially suppress current spikes and are prone to current unevenness or even the introduction of new interference due to sudden changes in control quantities. It ensures that the rise and fall amplitudes of the inductor current in each high-frequency switching cycle are essentially offset, significantly reducing the peak-to-peak current, reducing current distortion, and thus reducing circuit harmonic content and improving the power factor. Secondly, the step of turning off all switching transistors twice to reserve reverse recovery time completely avoids the problem of poor reverse recovery characteristics of low-frequency bridge arm switching transistors in existing technologies from the control timing perspective. The method eliminates the risk of bridge arm shoot-through due to improper dead-time settings, eliminating the need for additional hardware protection circuits and significantly improving the safety and reliability of system operation. Furthermore, addressing the challenge of near-zero input voltage during the zero-crossing phase, where conventional dual-loop control struggles to provide effective excitation to the inductor via input voltage, resulting in inaccurate current tracking of the reference signal, this method actively provides appropriate voltage excitation to the inductor by outputting positive and negative voltages at the midpoint of the bridge arm. This ensures that the current consistently fluctuates smoothly around the inner loop reference signal, resolving the difficulty of current tracking in the zero-crossing region under conventional control. Moreover, after completing M high-frequency switching cycles, it can smoothly switch to conventional control mode without electromagnetic interference caused by sudden changes in control mode, further enhancing system stability.

[0076] In one embodiment of the present invention, the number of cycles M of the second switching cycle is adjustable, and the range of M is 30 to 50 switching cycles. In each second switching cycle, the switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are controlled to alternately conduct with a duty cycle of less than 50%.

[0077] In this embodiment, during each high-frequency switching cycle of the bipolar control, the switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are alternately turned on with a duty cycle of less than 50%. The duty cycle of less than 50% can reserve sufficient dead time for the switching transistors to switch, avoiding the bridge arm shoot-through phenomenon that occurs when the upper and lower transistors are briefly turned on at the moment of switching due to the conduction or turn-off delay of the switching transistors of the high-frequency bridge arm (Q1 and Q3) or the low-frequency bridge arm (Q2 and Q4). This eliminates the risk of output short circuit from the control timing level and protects the switching transistors from damage caused by overvoltage and overcurrent.

[0078] In one embodiment of the present invention, the operating signal of the totem pole bridgeless PFC circuit is monitored in real time, and it is determined whether the circuit is in a zero-crossing state according to a preset threshold. The zero-crossing type is also determined to include:

[0079] The AC input voltage signal in the operating signal is processed by a phase-locked loop to generate a unit sine wave signal;

[0080] Compare the current unit sine wave signal with the positive threshold voltage and the negative threshold voltage;

[0081] If the absolute value of the current signal is less than or equal to the threshold voltage, the circuit is determined to be in a zero-crossing state.

[0082] When the circuit is in a zero-crossing state, it combines the signal value of the previous moment to distinguish whether the zero-crossing type is positive or negative.

[0083] When determining whether the circuit is in a zero-crossing state, the signal value from the previous moment is used to distinguish whether the zero-crossing type is positive or negative, including:

[0084] If the phase-following signal from the previous moment is greater than the positive threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be positive zero-crossing.

[0085] If the phase-following signal at the previous moment is less than the negative threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be negative zero-crossing.

[0086] In this embodiment, the judgment logic combining threshold comparison and historical signals is used to accurately identify the zero-crossing state and type, avoid misjudgment caused by voltage fluctuations, ensure that the zero-crossing control strategy is activated at the correct time, and effectively suppress zero-crossing spikes.

[0087] In one embodiment of the present invention, when the determination circuit is in a zero-crossing state, dead-time control is immediately initiated, and the drive signals of all switching transistors are turned off, including:

[0088] When the detection circuit is in a zero-crossing state, the zero-crossing state flag is set.

[0089] After setting the zero-crossing status flag, immediately set the drive signals of all switching transistors to the off state;

[0090] The duration of the dead time is controlled by the zero-crossing state flag, providing reverse recovery time for the low-frequency bridge arm switches.

[0091] In this embodiment, when the circuit is in a zero-crossing state, the zero-crossing state flag is set to 1, turning off the drive signals of all switches (including high-frequency bridge arms Q1 and Q3 and low-frequency bridge arms Q2 and Q4) in the totem-pole bridgeless PFC circuit. The dead-time duration is controlled by the duration of the zero-crossing state flag setting, ensuring that the switches to be turned on in the low-frequency bridge arms (such as Q4 during positive zero-crossing and Q2 during negative zero-crossing) have sufficient time to complete reverse recovery, preventing them from being triggered to conduct while still having high voltage remaining at their ends, which would result in a large voltage being directly applied to the inductor. This embodiment provides sufficient time for the low-frequency transistors to recover in reverse through dead-time control, fundamentally avoiding the generation of positive current spikes, and preventing shoot-through due to switching delays between the upper and lower transistors in the low-frequency bridge arms, thus improving the safety of circuit operation.

[0092] In one embodiment of the present invention, after the dead-time control ends, soft-start control is performed on the target switch of the high-frequency bridge arm according to the zero-crossing type. From the first to the Nth first switching cycle, the duty cycle is gradually increased from the initial value to the target value, including:

[0093] Select the target switch transistor to be soft-started in the high-frequency bridge arm based on the zero-crossing direction flag;

[0094] If the zero-crossing type is positive zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the positive half-cycle as the target switch.

[0095] If the zero-crossing type is negative zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the negative half-cycle as the target switch.

[0096] Over N first switching cycles, the duty cycle of the selected target switch is uniformly increased from zero to 50%.

[0097] The number of cycles N in the first switching cycle is adjustable, ranging from 10 to 20 switching cycles.

[0098] See Figure 5 More specifically, in this embodiment, if the positive zero-crossing flag is set to 1, Q3 performs soft-start control, and the duty cycle of Q3 gradually increases from zero, uniformly increasing to 50% over N first switching cycles; if the negative zero-crossing flag is set to 1, Q1 performs soft-start control, and the duty cycle of Q1 gradually increases from zero, uniformly increasing to 50% over N switching cycles; when the duty cycle of the switching transistor increases to 50%, the soft-start control ends.

[0099] This embodiment avoids current response lag or path redundancy caused by controlling non-main switching transistors, ensuring that the current accurately follows the phase change of the input voltage, and solving the current and voltage phase deviation problem that may occur in general soft start without distinguishing direction. The process of uniformly increasing the duty cycle from zero to 50% effectively avoids the current surge caused by the sudden change in the duty cycle of the high-frequency bridge arm main switching transistor from near 0 to near 100% in conventional control during the zero-crossing phase. This allows the inductor current to gradually build up with the gradual increase of the duty cycle, suppressing the zero-crossing spike caused by the sudden change in current from the source. Through a uniform transition of N high-frequency switching cycles, sufficient gate drive response time is reserved for the high-frequency switching transistor, avoiding drive failure or incomplete conduction or turn-off problems caused by the switching transistor's inability to respond to extreme duty cycles in time, while also allowing the inductor energy to accumulate and release slowly. The duty cycle eventually stabilizes at 50%, which is perfectly aligned with the reference duty cycle of the subsequent bipolar control mode. This allows for a smooth transition to bipolar control without the need for additional adjustments to the duty cycle reference, avoiding current fluctuations caused by differences in the duty cycle reference between different control stages and ensuring the continuity and stability of the entire zero-crossing control process.

[0100] In one embodiment of the present invention, after the bipolar control continues for M second switching cycles, it exits the zero-crossing control mode and performs conventional dual closed-loop control, including:

[0101] After M second switching cycles of bipolar control, the zero-crossing state flag is cleared;

[0102] The system performs dual closed-loop control, consisting of an outer loop for output voltage and an inner loop for input current, based on the input AC voltage signal, input current signal, and output DC voltage signal in the operating signals.

[0103] See Figure 7 More specifically, this embodiment employs a dual closed-loop control system consisting of an outer output voltage loop and an inner input current loop. The outer voltage loop output signal is multiplied by the phase-locked loop signal Vpll and the unit input voltage to obtain the inner loop reference signal iref. iref is compared with the current sampling value, and the inner loop PI controller generates the drive signals for the high-frequency bridge arms Q1 and Q3. The low-frequency bridge arm drive signals follow the positive and negative half-cycles of the input voltage, thereby enabling the input current and input voltage of the totem-pole bridgeless PFC to remain in phase.

[0104] Based on the same inventive concept, this application also provides a totem-pole bridgeless PFC current zero-crossing spike suppression system, which can be used to implement the totem-pole bridgeless PFC current zero-crossing spike suppression method described in the above embodiments, as shown in the following embodiments. Since the principle and method of solving the problem are similar, the implementation of the system can refer to the method implementation, and repeated details will not be elaborated further. As used below, the terms "unit" or "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the system described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0105] This invention provides a totem-pole bridgeless PFC current zero-crossing spike suppression system, such as... Figure 8 As shown. In Figure 8 The system includes:

[0106] Signal acquisition module 210: used to monitor the operating signal of the totem pole bridgeless PFC circuit in real time, and determine whether the circuit is in a zero-crossing state according to a preset threshold, and at the same time determine the zero-crossing type;

[0107] Dead time control module 220: When the detection circuit is in a zero-crossing state, the dead time control is immediately activated to turn off all switching transistors;

[0108] Soft start module 230: After the dead time control ends, it performs soft start control on the target switch of the high-frequency bridge arm according to the zero crossing type, so that the duty cycle gradually increases from the initial value to the target value from the first to the Nth first switching cycle;

[0109] Bipolar control module 240: After the soft start control is completed, bipolar control is executed, treating the totem pole bridgeless PFC circuit as a full-bridge rectifier structure, and controlling the midpoint voltage of the bridge arm to adjust the inductor current.

[0110] Dual closed-loop control module 250: After continuous bipolar control for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control.

[0111] In one embodiment of the present invention, the following steps are executed sequentially during bipolar control in the bipolar control module 240:

[0112] The switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are turned on to form a positive current loop, so that the midpoint of the bridge arm outputs a positive voltage, driving the inductor current to rise linearly to approach the reference signal of the inner current loop.

[0113] Turn off all switches to bring the voltage at the midpoint of the bridge arm close to zero, allowing time for reverse recovery during switch switching.

[0114] The switching transistors controlling the high-frequency and low-frequency bridge arms are turned on to form a reverse current loop, causing the midpoint of the bridge arm to output a negative voltage, driving the inductor current to decrease linearly to offset the previous increase.

[0115] Turn off all switches again to prepare for the next second switching cycle, until the Mth second switching cycle is completed.

[0116] In one embodiment of the present invention, the number of cycles M of the second switching cycle in the bipolar control module 240 is adjustable, and the range of M is 30 to 50 switching cycles. In each second switching cycle, the switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are controlled to alternately conduct with a duty cycle of less than 50%.

[0117] In one embodiment of the present invention, the signal acquisition module 210 is specifically used for:

[0118] The AC input voltage signal in the operating signal is processed by a phase-locked loop to generate a unit sine wave signal;

[0119] Compare the current unit sine wave signal with the positive threshold voltage and the negative threshold voltage;

[0120] If the absolute value of the current signal is less than or equal to the threshold voltage, the circuit is determined to be in a zero-crossing state.

[0121] When determining whether the circuit is in a zero-crossing state, the signal value from the previous moment is used to distinguish whether the zero-crossing is positive or negative.

[0122] In one embodiment of the present invention, when the determination circuit in the signal acquisition module 210 is in a zero-crossing state, distinguishing whether the zero-crossing type is positive or negative by combining the signal value at the previous moment includes:

[0123] If the phase-following signal from the previous moment is greater than the positive threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be positive zero-crossing.

[0124] If the phase-following signal at the previous moment is less than the negative threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be negative zero-crossing.

[0125] In one embodiment of the present invention, the dead time control module 220 is specifically used for:

[0126] When the detection circuit is in a zero-crossing state, the zero-crossing state flag is set.

[0127] After setting the zero-crossing status flag, immediately set the drive signals of all switching transistors to the off state;

[0128] The duration of the dead time is controlled by the zero-crossing state flag, providing reverse recovery time for the low-frequency bridge arm switches.

[0129] In one embodiment of the present invention, the soft-start module 230 is specifically used for:

[0130] Select the target switch transistor to be soft-started in the high-frequency bridge arm based on the zero-crossing direction flag;

[0131] If the zero-crossing type is positive zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the positive half-cycle as the target switch.

[0132] If the zero-crossing type is negative zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the negative half-cycle as the target switch.

[0133] Over N first switching cycles, the duty cycle of the selected target switch is uniformly increased from zero to 50%.

[0134] In one embodiment of the present invention, the number of cycles N of the first switching cycle in the soft-start module 230 is adjustable, and the range of N is 10 to 20 switching cycles.

[0135] In one embodiment of the present invention, the dual closed-loop control module 250 is specifically used for:

[0136] After M second switching cycles of bipolar control, the zero-crossing state flag is cleared;

[0137] The system performs dual closed-loop control, consisting of an outer loop for output voltage and an inner loop for input current, based on the input AC voltage signal, input current signal, and output DC voltage signal in the operating signals.

[0138] The embodiments of this application also provide a specific implementation of an electronic device capable of implementing all the steps in the methods described above. See [link to implementation details]. Figure 9 The electronic device 300 specifically includes the following:

[0139] Processor 310, memory 320, communication unit 330 and bus 340;

[0140] The processor 310, memory 320, and communication unit 330 communicate with each other via bus 340; the communication unit 330 is used to realize information transmission between server-side devices and terminal devices and other related devices.

[0141] The processor 310 is used to call the computer program in the memory 320. When the processor executes the computer program, it implements all the steps in the method in the above embodiments.

[0142] Those skilled in the art will understand that memory can be, but is not limited to, Random Access Memory (RAM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Erasable Programmable Read-Only Memory (EPROM), and Electrically Erasable Programmable Read-Only Memory (EEPROM). The memory stores programs, which are then executed by the processor upon receiving execution instructions. Furthermore, the software programs and modules within the memory may include an operating system, which may include various software components and / or drivers for managing system tasks (e.g., memory management, storage device control, power management), and can communicate with various hardware or software components to provide an operating environment for other software components.

[0143] A processor can be an integrated circuit chip with signal processing capabilities. The aforementioned processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor.

[0144] This application also provides a computer-readable storage medium including a program that, when executed by a processor, performs the method provided in any of the foregoing method embodiments.

[0145] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks, and this application does not limit the specific type of media.

[0146] The above description is merely a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for suppressing zero-crossing current spikes in totem pole bridgeless PFC, characterized in that, The method includes the following steps: The system monitors the operating signals of the bridgeless PFC circuit of the totem pole in real time, and determines whether the circuit is in a zero-crossing state based on a preset threshold, while also determining the type of zero-crossing. When the circuit is in a zero-crossing state, the dead-time control is immediately activated to turn off all switching transistors. After the dead time control ends, soft start control is performed on the target switch of the high-frequency bridge arm according to the zero-crossing type, so that the duty cycle gradually increases from the initial value to the target value from the first to the Nth first switching cycle; After the soft start control is completed, bipolar control is executed, treating the totem pole bridgeless PFC circuit as a full-bridge rectifier structure, and controlling the midpoint voltage of the bridge arm to adjust the inductor current. After the bipolar control continues for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control.

2. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 1, characterized in that, The bipolar control process executes the following steps sequentially: The switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are turned on to form a positive current loop, so that the midpoint of the bridge arm outputs a positive voltage, driving the inductor current to rise linearly to approach the reference signal of the inner current loop. Turn off all switches to bring the voltage at the midpoint of the bridge arm close to zero, allowing time for reverse recovery during switch switching. The switching transistors controlling the high-frequency and low-frequency bridge arms are turned on to form a reverse current loop, causing the midpoint of the bridge arm to output a negative voltage, driving the inductor current to decrease linearly to offset the previous increase. Turn off all switches again to prepare for the next second switching cycle, until the Mth second switching cycle is completed.

3. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 2, characterized in that, The number of cycles M in the second switching cycle is adjustable, ranging from 30 to 50 switching cycles. In each second switching cycle, the switching transistors of the high-frequency bridge arm and the low-frequency bridge arm are controlled to alternately conduct with a duty cycle of less than 50%.

4. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 1, characterized in that, The system monitors the operating signal of the bridgeless PFC circuit of the totem pole in real time, and determines whether the circuit is in a zero-crossing state based on a preset threshold. The type of zero-crossing is also determined, including: The AC input voltage signal in the operating signal is processed by a phase-locked loop to generate a unit sine wave signal; Compare the current unit sine wave signal with the positive threshold voltage and the negative threshold voltage; If the absolute value of the current signal is less than or equal to the threshold voltage, the circuit is determined to be in a zero-crossing state. When determining whether the circuit is in a zero-crossing state, the signal value from the previous moment is used to distinguish whether the zero-crossing is positive or negative.

5. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 4, characterized in that, The step of distinguishing between positive and negative zero crossing types by combining the signal value from the previous moment when the determination circuit is in a zero-crossing state includes: If the phase-following signal from the previous moment is greater than the positive threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be positive zero-crossing. If the phase-following signal at the previous moment is less than the negative threshold voltage and the current moment is in a zero-crossing state, then the zero-crossing type is determined to be negative zero-crossing.

6. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 1, characterized in that, The step of immediately activating dead-time control and shutting off the drive signals of all switching transistors when the determination circuit is in a zero-crossing state includes: When the detection circuit is in a zero-crossing state, the zero-crossing state flag is set. After setting the zero-crossing status flag, immediately set the drive signals of all switching transistors to the off state; The duration of the dead time is controlled by the zero-crossing state flag, providing reverse recovery time for the low-frequency bridge arm switches.

7. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 1, characterized in that, The step of performing soft-start control on the target switch of the high-frequency bridge arm according to the zero-crossing type after the dead-time control ends, and gradually increasing the duty cycle from the initial value to the target value from the first to the Nth first switching cycle, includes: Select the target switch transistor to be soft-started in the high-frequency bridge arm based on the zero-crossing direction flag; If the zero-crossing type is positive zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the positive half-cycle as the target switch. If the zero-crossing type is negative zero-crossing, select the switch in the high-frequency bridge arm that corresponds to the main switch in the negative half-cycle as the target switch. Over N first switching cycles, the duty cycle of the selected target switch is uniformly increased from zero to 50%.

8. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 7, characterized in that, The number of cycles N in the first switching cycle is adjustable, and N ranges from 10 to 20 switching cycles.

9. The method for suppressing zero-crossing current spikes in a totem pole bridgeless PFC as described in claim 1, characterized in that, After the bipolar control continues for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control, including: After M second switching cycles of bipolar control, the zero-crossing state flag is cleared; The system performs dual closed-loop control, consisting of an outer loop for output voltage and an inner loop for input current, based on the input AC voltage signal, input current signal, and output DC voltage signal in the operating signals.

10. A totem pole bridgeless PFC current zero-crossing spike suppression system, characterized in that, The system includes: Signal acquisition module: used to monitor the operating signal of the totem pole bridgeless PFC circuit in real time, and determine whether the circuit is in a zero-crossing state according to the preset threshold, and at the same time determine the zero-crossing type; Dead time control module: When the detection circuit is in a zero-crossing state, the dead time control is activated immediately to turn off all switching transistors; Soft start module: After the dead time control ends, it is used to perform soft start control on the target switch of the high-frequency bridge arm according to the zero crossing type, so that the duty cycle gradually increases from the initial value to the target value from the first to the Nth first switching cycle; Bipolar control module: After the soft start control is completed, bipolar control is executed, treating the totem pole bridgeless PFC circuit as a full-bridge rectifier structure, and controlling the midpoint voltage of the bridge arm to adjust the inductor current. Dual closed-loop control module: After continuous bipolar control for M second switching cycles, it exits the zero-crossing control mode and executes conventional dual closed-loop control.

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