Anti-radiation low-jitter phase-locked loop based on double-loop redundancy switching

By employing a dual-ring redundant switching structure and radiation-hardened unit, the fault problem of the phase-locked loop in the radiation environment is solved, achieving continuous and high-precision clock signal output, which is suitable for aerospace and nuclear industries.

CN121664181APending Publication Date: 2026-03-13CHONGQING UNIV
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-07
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Existing phase-locked loops are susceptible to damage in radiated environments, leading to single-event upsets and single-event latch-up failures. They also lack redundancy and jitter suppression capabilities, failing to meet the requirements for high reliability and high precision clock signals.

Method used

It adopts a dual-ring redundant switching structure, including a main phase-locked loop and a backup phase-locked loop. Combined with a radiation hardening unit and a low jitter optimization module, dual-ring backup and switching are realized through a redundant switching control module. It integrates a radiation-hardened frequency and phase detector, a radiation-hardened charge pump, a low jitter loop filter, etc., to form all-round protection and jitter suppression.

Benefits of technology

It effectively resists radiation damage, ensures the continuity and high precision of clock signals, meets the high reliability requirements of harsh radiation environments such as aerospace and nuclear industry, and achieves seamless switching and self-repair functions.

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Abstract

The invention discloses an anti-radiation low-jitter phase-locked loop based on double-loop redundancy switching, belongs to the field of clock generation, and aims to solve the problems that an existing phase-locked loop is not provided with anti-radiation design, the reliability of a single-loop architecture is insufficient, and the jitter suppression capability in an irradiation environment is poor. The system comprises a main phase-locked loop, a standby phase-locked loop, a redundancy switching control module, an anti-radiation reinforcing unit and a low-jitter optimization module, wherein the main phase-locked loop and the standby phase-locked loop are consistent in structure and are optimized based on an automatic calibration architecture. The anti-radiation reinforcing unit is integrated on the core device, and the anti-radiation capability is improved through a specific structure, layout optimization and a redundant transistor; the redundancy switching control module monitors the double-loop state and the radiation condition in real time, fault seamless switching is achieved, and a fault loop can be self-repaired; the low jitter optimization module suppresses jitter through noise cancellation and adaptive damping. The functions of radiation resistance, redundant backup and low jitter are integrally realized, the stability and high precision of clock signals are ensured, and the method is suitable for aerospace, nuclear industry and other scenes.
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Description

Technical Field

[0001] This invention relates to the field of clock generation technology, and more particularly to a radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching. Background Technology

[0002] Phase-locked loops (PLLs) are core clock generation modules in fields such as wireless communication, aerospace electronics, and nuclear industry, and their performance directly affects the stability and accuracy of the entire system.

[0003] Patent number CN116505938B discloses a phase-locked loop with automatic calibration function. By adjusting the control signal through a counter and a finite state machine module, it effectively reduces reference spurious signals caused by process, temperature and voltage changes and optimizes the working stability.

[0004] However, this existing technology still has the following significant defects and shortcomings: Without radiation hardening design, it cannot adapt to harsh radiation environments: There is a large amount of ionizing radiation in aerospace, nuclear industry and other scenarios, which can cause single-event upset (SEU) and single-event latch-up (SEL) failures in the core components of the phase-locked loop. However, the existing phase-locked loops do not adopt any radiation hardening measures, and the core components (such as D flip-flops and current sources) are easily damaged by radiation, resulting in clock signal distortion or even circuit failure. The single-ring structure lacks redundancy and backup, resulting in insufficient reliability: The existing phase-locked loop is a single-ring architecture. Once the core module (such as the frequency and phase detector, voltage-controlled oscillator) fails due to radiation or other factors, the entire phase-locked loop will be unable to output a valid clock signal, which cannot meet the continuous operation requirements of high reliability scenarios. Insufficient jitter suppression capability under irradiation environment: Although existing technologies reduce reference spurious signals through calibration, they do not have a suppression mechanism designed for additional noise and phase disturbances caused by irradiation. Large jitter is easily generated in the irradiation environment, which cannot meet the requirements of high-precision clocks.

[0005] Therefore, a phase-locked loop (PLL) that combines radiation resistance, redundancy backup, and low jitter performance is needed to solve the above problems. Summary of the Invention

[0006] To address the shortcomings of existing technologies, this invention provides a radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching, which solves the problems mentioned in the background section.

[0007] Technical Solution: To solve the above-mentioned technical problems, according to one aspect of the present invention, more specifically, a radiation-resistant low-jitter phase-locked loop based on dual-ring redundant switching, comprising a main phase-locked loop, a backup phase-locked loop, a redundancy switching control module, a radiation-resistant hardening unit, and a low-jitter optimization module. The main phase-locked loop and the backup phase-locked loop have the same structure and are both based on an optimized design of an automatic calibration architecture. The redundancy switching control module realizes dual-ring backup and switching. The radiation-resistant hardening unit is integrated into the core device to resist radiation damage. The low-jitter optimization module suppresses radiation and jitter caused by the loop. Overall, it realizes radiation resistance, redundancy backup, and low-jitter functions.

[0008] Furthermore, both the main phase-locked loop and the backup phase-locked loop include a radiation-resistant frequency and phase detector, a first counter and finite state machine module, a radiation-resistant charge pump, a low-jitter loop filter, a radiation-resistant voltage-controlled oscillator, and a first frequency divider. The radiation-hardened frequency and phase detector uses a dual D flip-flop with a DICE structure, and outputs a signal after passing through a radiation-hardened buffer. The first counter and finite state machine module counts the output signals and adjusts the control signals, while also receiving calibration instructions from the redundant switching control module.

[0009] Furthermore, the radiation-resistant charge pump employs a redundant current source array, including a main current source and a backup current source, and uses control signals to connect corresponding switches to achieve current input or extraction. The low jitter loop filter has a built-in adaptive damping resistor network, which consists of resistor R1, capacitor C1, capacitor C2 and an adaptive damping submodule, and can dynamically adjust the damping coefficient.

[0010] Furthermore, the radiation-hardened voltage-controlled oscillator employs a radiation-hardened oscillator unit with integrated redundant transistors, exhibiting low phase noise characteristics. After dividing the target frequency, the first frequency divider provides a feedback signal to the frequency and phase detector.

[0011] Furthermore, the redundancy switching control module includes a status monitoring submodule, a damage assessment submodule, and a switching switch submodule; The condition monitoring submodule acquires the locking signals and current stability signals of the main / backup phase-locked loop through voltage and current sensors, and acquires the irradiation dose and particle flux signals through radiation sensors.

[0012] Furthermore, the damage assessment submodule presets irradiation damage thresholds and operating status thresholds. When the main phase-locked loop is not locked, the current fluctuation exceeds ±5%, or the irradiation dose exceeds the threshold, it is determined to be a fault state and a switching command is generated. The switching submodule uses a high-speed CMOS switching switch with a response time of less than 10ns. During switching, the output clock is kept continuous through a buffer.

[0013] Furthermore, the radiation hardening unit includes a DICE structure module, a layout hardening module, and a redundant transistor module; The DICE structure module is used in the storage unit of the D flip-flops and counters of the frequency and phase detector, improving the SEU resistance to 1MeV·cm. 2 / mg or more.

[0014] Furthermore, the layout hardening module employs a design that increases device spacing and adds a metal shielding layer, raising the SEL threshold to 200 MeV·cm. 2 / mg; In the redundant transistor module, each core transistor of the charge pump current source and the voltage-controlled oscillator oscillation unit is connected in parallel with a backup transistor, and the backup transistor automatically turns on when the main transistor fails.

[0015] Furthermore, the low jitter optimization module includes a noise cancellation submodule and an adaptive damping submodule; The noise cancellation submodule collects the phase noise of the voltage-controlled oscillator through a phase detector, generates a reverse compensation signal, and injects it into the output of the loop filter to cancel out additional noise.

[0016] Furthermore, the adaptive damping submodule adjusts the damping resistor value through a digital potentiometer. When the voltage change rate exceeds the preset value, the damping coefficient is increased to control the peak-to-peak output jitter within 5ps. After the system is powered on, the main and standby phase-locked loops perform automatic calibration synchronously. The faulty main phase-locked loop can achieve self-repair through deep calibration and redundant transistor switching, forming a cyclic redundancy mechanism of "working-standby-repair".

[0017] The beneficial effects of the radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching of the present invention are as follows: (1) By integrating radiation hardening units, adopting specific structural design, layout optimization and redundant transistor configuration, the present invention forms all-round protection for the core device of the phase-locked loop, which can effectively resist the single-event upset, single-event latch-up and other faults that may occur in the radiation environment, and avoid the core device from clock signal distortion or circuit failure due to radiation damage. It can be stably adapted to harsh radiation application scenarios such as aerospace and nuclear industry.

[0018] (2) This invention adopts a main and backup dual-ring architecture, and uses a redundant switching control module to realize dual-ring backup and intelligent switching. This module can monitor the working status and radiation of the dual rings in real time, and quickly switch to the backup ring when the main ring fails. The clock signal continuity is ensured during the switching process through buffer design. At the same time, the faulty main ring can recover its function through a self-repair mechanism, forming a "working-standby-repair" cyclic redundancy mode, which completely solves the problem of insufficient reliability of the single-ring structure and meets the requirements of continuous clock output in high reliability scenarios.

[0019] (3) With the help of the low jitter optimization module, the present invention suppresses the additional phase noise caused by radiation through noise cancellation mechanism on the one hand, and suppresses loop oscillation through adaptive damping adjustment on the other hand, effectively reducing the jitter caused by radiation and the loop itself, ensuring the high precision of the output clock signal, and meeting the application requirements of high precision clocks in wireless communication, aerospace electronics and other fields. Attached Figure Description

[0020] The present invention will now be described in further detail with reference to the accompanying drawings and specific implementation methods.

[0021] Figure 1 This is a schematic diagram of the structure of the present invention. Detailed Implementation

[0022] The present invention will be described in detail below with reference to the accompanying drawings and embodiments. It should be noted that, unless otherwise specified, the embodiments and features described in the present application can be combined with each other.

[0023] To make the technical solution of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0024] Reference Figure 1 A radiation-resistant, low-jitter phase-locked loop (PLL) based on dual-ring redundancy switching includes a main PLL, a backup PLL, a redundancy switching control module, a radiation-hardening unit, and a low-jitter optimization module. These modules work collaboratively to achieve radiation resistance, redundancy backup, and low-jitter functionality, as detailed below: 1. Main phase-locked loop and standby phase-locked loop The main phase-locked loop and the backup phase-locked loop have completely identical structures, both based on an optimized design of the automatic calibration architecture from comparative documents. The core components include: Radiation-resistant frequency and phase detector: It adopts a dual D flip-flop with DICE structure. The D terminal inputs the corresponding input signal, the clk terminal inputs another signal after a delay, and the Q output is output through a radiation-resistant buffer to resist single-event upset. First counter and finite state machine module: counts the output signal of the frequency and phase detector, adjusts the control signal when the difference value of the status flag bit exceeds 2, and receives the calibration command of the redundant switching control module to ensure the synchronization of the dual-loop parameters; Radiation-resistant charge pump: It adopts a redundant current source array, including a main current source and a backup current source. The corresponding switch is turned on by the control signal to feed or draw current to the output terminal, avoiding failure due to the failure of a single current source. Low jitter loop filter: It has a built-in adaptive damping resistor network, which consists of resistor R1, capacitor C1, capacitor C2 and adaptive damping submodule, and dynamically adjusts the damping coefficient according to the output voltage. Radiation-hardened voltage-controlled oscillator: Employs radiation-hardened oscillator units, integrates redundant transistors, outputs the target frequency, and features low phase noise characteristics; First frequency divider: After dividing the target frequency, it provides a feedback signal to the frequency and phase detector.

[0025] 2. Redundancy switching control module The redundancy switching control module is the core of achieving dual-loop backup, and includes a condition monitoring submodule, a damage assessment submodule, and a switching switch submodule: The status monitoring submodule acquires the locking signals of the main / standby phase-locked loop and the charge pump current stability signal through voltage and current sensors, and acquires the irradiation dose and particle flux signals through radiation sensors. Damage assessment submodule: presets irradiation damage threshold and working status threshold. When the main phase-locked loop is not locked, the current fluctuation exceeds ±5%, or the irradiation dose exceeds the threshold, it is judged as a fault state and a switching command is generated. Switching submodule: adopts high-speed CMOS switching with a response time of less than 10ns. During switching, the output clock is kept continuous through a buffer to avoid switching jitter.

[0026] 3. Radiation-resistant hardening unit The radiation hardening unit is integrated into the core components of the main / backup phase-locked loop, forming all-round radiation protection: DICE structure module: The D flip-flops and counters of the frequency and phase detector employ a double-interlocked storage unit structure to prevent state flipping during single-particle bombardment, thus improving SEU resistance to 1 MeV·cm⁻¹. 2 / mg or more; Layout hardening module: The core component layout adopts a design that increases component spacing and adds a metal shielding layer to reduce the probability of single-event latch-up and improve the SEL threshold to 200 MeV·cm. 2 / mg; Redundant transistor module: In the current source of the charge pump and the oscillation unit of the voltage-controlled oscillator, each core transistor is connected in parallel with a backup transistor. When the main transistor fails due to irradiation damage, the backup transistor automatically turns on to ensure the continuity of circuit function.

[0027] 4. Low jitter optimization module The low jitter optimization module further suppresses jitter based on the existing calibration mechanism: Noise cancellation submodule: It collects the phase noise of the voltage-controlled oscillator through a phase detector, generates a compensation signal with the opposite phase and equal amplitude to the noise, and injects it into the output of the loop filter to cancel the additional noise caused by radiation. Adaptive Damping Submodule: Monitors the output voltage change rate of the loop filter in real time, adjusts the damping resistor value through a digital potentiometer, and increases the damping coefficient when the voltage change rate exceeds the preset value to suppress loop oscillation and control the peak-to-peak output jitter within 5ps.

[0028] Workflow: Initialization steps: After the system is powered on, the main phase-locked loop starts and performs automatic calibration (the counter is disabled, the control signal is cleared, and the counter is enabled after locking). The standby phase-locked loop performs the same calibration process synchronously and then enters standby mode. The redundant switching control module initializes the monitoring thresholds (such as the irradiation dose threshold and the current fluctuation threshold). Status monitoring steps: The redundancy switching control module collects the locking signal of the main phase-locked loop, the charge pump current signal and the irradiation sensor signal in real time, and monitors the standby status of the standby phase-locked loop to ensure that the parameters of the standby phase-locked loop are consistent with those of the main phase-locked loop. Fault diagnosis steps: The damage assessment submodule compares the collected signals with preset thresholds. If the main phase-locked loop is not locked, the current fluctuation exceeds ±5%, or the irradiation dose exceeds 100 MeV·cm, the fault diagnosis will be initiated. 2 If / mg is detected as a fault, a switching command is generated; otherwise, the main phase-locked loop continues to operate. Switching execution steps: After receiving the instruction, the switching submodule disconnects the main phase-locked loop from the output terminal within 10ns and connects the backup phase-locked loop. The buffer maintains the amplitude and phase stability of the clock signal during the switching process to achieve seamless switching. Self-repair steps: The faulty main phase-locked loop enters self-repair mode, performs deep calibration (clears the damage status flag and readjusts the control signal) and redundant transistor switching. After the repair is completed, it enters standby mode and waits for the next switching command, forming a "work-standby-repair" cyclic redundancy mechanism.

[0029] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching, comprising a main phase-locked loop, a backup phase-locked loop, a redundancy switching control module, a radiation-resistant hardening unit, and a low-jitter optimization module, characterized in that: The main phase-locked loop and the backup phase-locked loop have the same structure and are both based on an optimized design of automatic calibration architecture. The redundancy switching control module realizes dual-loop backup and switching. The radiation hardening unit is integrated into the core device to resist radiation damage. The low jitter optimization module suppresses the jitter caused by radiation and the loop. Overall, it realizes radiation resistance, redundancy backup and low jitter functions.

2. The radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching according to claim 1, characterized in that, Both the main phase-locked loop and the backup phase-locked loop include a radiation-resistant frequency and phase detector, a first counter and finite state machine module, a radiation-resistant charge pump, a low-jitter loop filter, a radiation-resistant voltage-controlled oscillator, and a first frequency divider. The radiation-hardened frequency and phase detector uses a dual D flip-flop with a DICE structure, and outputs a signal after passing through a radiation-hardened buffer. The first counter and finite state machine module counts the output signals and adjusts the control signals, while also receiving calibration instructions from the redundant switching control module.

3. The radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching according to claim 2, characterized in that, The radiation-resistant charge pump uses a redundant current source array, including a main current source and a backup current source. Current is fed in or extracted by turning on the corresponding switch through a control signal. The low jitter loop filter has a built-in adaptive damping resistor network, which consists of resistor R1, capacitor C1, capacitor C2 and an adaptive damping submodule, and can dynamically adjust the damping coefficient.

4. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching as described in claim 2, characterized in that, The radiation-hardened voltage-controlled oscillator uses a radiation-hardened oscillator unit with integrated redundant transistors and features low phase noise characteristics. After dividing the target frequency, the first frequency divider provides a feedback signal to the frequency and phase detector.

5. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching as described in claim 1, characterized in that, The redundancy switching control module includes a status monitoring submodule, a damage assessment submodule, and a switching switch submodule; The condition monitoring submodule acquires the locking signals and current stability signals of the main / backup phase-locked loop through voltage and current sensors, and acquires the irradiation dose and particle flux signals through radiation sensors.

6. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching as described in claim 5, characterized in that, The damage assessment submodule presets irradiation damage threshold and working status threshold. When the main phase-locked loop is not locked, the current fluctuation exceeds ±5%, or the irradiation dose exceeds the threshold, it is judged as a fault state and a switching command is generated. The switching submodule uses a high-speed CMOS switching switch with a response time of less than 10ns. During switching, the output clock is kept continuous through a buffer.

7. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching as described in claim 1, characterized in that, The radiation hardening unit includes a DICE structure module, a layout hardening module, and a redundant transistor module; The DICE structure module is used in the storage unit of the D flip-flops and counters of the frequency and phase detector, improving the SEU resistance to 1MeV·cm. 2 / mg or more.

8. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching according to claim 7, characterized in that, The layout hardening module employs a design that increases component spacing and adds a metal shielding layer, raising the SEL threshold to 200 MeV·cm. 2 / mg; In the redundant transistor module, each core transistor of the charge pump current source and the voltage-controlled oscillator oscillation unit is connected in parallel with a backup transistor, and the backup transistor automatically turns on when the main transistor fails.

9. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching according to claim 1, characterized in that, The low jitter optimization module includes a noise cancellation submodule and an adaptive damping submodule; The noise cancellation submodule collects the phase noise of the voltage-controlled oscillator through a phase detector, generates a reverse compensation signal, and injects it into the output of the loop filter to cancel out additional noise.

10. A radiation-resistant, low-jitter phase-locked loop based on dual-ring redundant switching according to claim 9, characterized in that, The adaptive damping submodule adjusts the damping resistor value through a digital potentiometer. When the voltage change rate exceeds the preset value, the damping coefficient is increased to control the peak-to-peak output jitter within 5ps. After the system is powered on, the main and standby phase-locked loops perform automatic calibration synchronously. The faulty main phase-locked loop can achieve self-repair through deep calibration and redundant transistor switching, forming a cyclic redundancy mechanism of "working-standby-repair".

Citation Information

Patent Citations

  • Phase-locked loop

    CN116505938B