Bidirectional semiconductor device and preparation method thereof

Abstract

The invention relates to a bidirectional semiconductor device and a preparation method thereof, and the bidirectional semiconductor device comprises the components of a functional region which comprises two-dimensional carrier gas; a first electrode and a first control electrode of the electrode group are symmetrically distributed in the functional area with a second electrode and a second control electrode respectively, and the first electrode and the second electrode can be electrically connected with two-dimensional carrier gas respectively; the electrode field plate comprises a first field plate and a second field plate which are symmetrically distributed according to the symmetry axis, and the first field plate and the second field plate are electrically connected with the first electrode and the second electrode respectively or electrically connected with the first control electrode and the second control electrode respectively; the first field plate and the second field plate are symmetrically distributed between the first field plate and the second field plate according to the symmetry axis, and under the action of the first control electrode and the second control electrode, the first field plate and the second field plate form an electric field balancing field plate. According to the invention, the electric field distribution in the device is effectively balanced, and the voltage resistance and performance of the device are improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a bidirectional semiconductor device and its fabrication method. Background Technology

[0002] Bidirectional semiconductor devices have a wide range of applications. Taking bidirectional dual-gate common-drain gallium nitride devices as an example, by sharing the drift region between the first gate G1 and the second gate G2, the overall area of ​​the chip can be effectively reduced, the overall size of the device can be reduced, and thus the reliability of the device can be improved.

[0003] In the application of bidirectional semiconductor devices, when a high voltage is applied to the first gate G1 or the second gate G2, a large electric field spike is generated on the side of the edge of the first gate G1 or the second gate G2 near the drain, which leads to local dielectric layer degradation and time-dependent breakdown, seriously affecting the reliability of the device. The electric field spike problem is also common in unidirectional semiconductor devices. To solve this problem, a field plate is usually connected to the source or gate of the unidirectional semiconductor device to increase the area of ​​the depletion region, suppress the electric field spike on the drain side of the gate, adjust the electric field distribution between the gate and drain, and thus enhance the device's withstand voltage. For example, Chinese Patent CN1938859B, entitled "High-Energy Bandgap Transistor Device with Field Plate," provides a solution that provides a field plate electrically connected to the gate, extending a distance from the gate junction to the drain junction. This field plate can effectively reduce the peak electric field in the device.

[0004] Bidirectional semiconductor devices typically employ symmetrically distributed first and second gate field plates, similar to unidirectional devices. However, this symmetrical distribution restricts the propagation of potential or electric field to the other side, thus reducing the device's breakdown voltage. Figure 3 The schematic diagram illustrating the electric field distribution of a conventional bidirectional horizontal device using a traditional gate field plate shows that the device employs a conventional gate field plate. The first gate G1 on the left and the second gate G2 on the right are electrically connected to the multi-step first gate field plate G1-FP and the second gate field plate G2-FP, respectively. When a high voltage is applied to the second gate G2 and the second source S2, and a turn-off voltage is applied to the first gate G1, causing the device to enter a breakdown voltage turn-off state, the electric field distribution in the device is shown in different colors in the diagram. As can be seen from the colors in the diagram, multiple gradient electric fields are formed between the first gate G1 and the second gate G2 on the right. The electric field peaks are still concentrated at the edge of the first gate field plate G1-FP, and due to the presence of the symmetrical structure of the second gate field plate G2-FP, the electric field cannot extend downwards to the second gate field plate G2-FP. That is, the electric field distribution between the first gate G1 and the second gate G2 is still not uniform and has peaks. Summary of the Invention

[0005] In view of the technical problems existing in the prior art, the present invention proposes a bidirectional semiconductor device and its fabrication method to balance the electric field distribution in the device and thus improve the device's withstand voltage.

[0006] According to one aspect of the present invention, a bidirectional semiconductor device is provided, the bidirectional semiconductor device comprising: A functional region, comprising at least an epitaxial layer, wherein the epitaxial layer comprises a two-dimensional carrier gas; The electrode group includes a first electrode group and a second electrode group that are symmetrically distributed laterally. The first electrode and the first control electrode in the first electrode group are symmetrically distributed with the second electrode and the second control electrode in the second electrode group in the functional area with the center of the drift region between the first control electrode and the second control electrode as the axis of symmetry. The first electrode and the second electrode can be electrically connected to the two-dimensional carrier gas. The electrode field plate includes a first field plate and a second field plate symmetrically distributed along an axis of symmetry, wherein the first field plate and the second field plate are electrically connected to a first electrode and a second electrode, respectively, or electrically connected to a first control electrode and a second control electrode, respectively. A common field plate is symmetrically distributed between the first and second field plates along the axis of symmetry. Under the action of the first and second control electrodes, it forms an electric field equilibrium field plate with the first or second field plate, respectively.

[0007] Optionally, the common field plate is a continuous field plate in the electrode length direction or includes multiple field plates that are disconnected in the electrode length direction; or the common field plate includes multiple sub-field plates, which are distributed at intervals and symmetrically between the first field plate and the second field plate.

[0008] Optionally, the plurality of sub-field plates are distributed at intervals and equal distances between the first field plate and the second field plate; or, the spacing between the field plates gradually increases or decreases from the first field plate and the second field plate toward the central axis of symmetry.

[0009] Optionally, the plurality of subfield plates are placed at the same horizontal position parallel to the epitaxial layer as the first field plate and the second field plate; or, the plurality of subfield plates are placed at different horizontal positions parallel to the epitaxial layer.

[0010] Optionally, from both ends toward the axis of symmetry, the distance between the plurality of subfield plates and the epitaxial layer gradually increases, with the distance between the subfield plates located at the axis of symmetry and the functional area being the largest.

[0011] Optionally, the cross-section of the subfield plate is rectangular, stepped with two or more steps, and / or formed by two or more steps back to back.

[0012] Optionally, the cross-section of the sub-field plate is a stepped shape with two levels of steps, and when multiple sub-field plates are arranged from both ends toward the axis of symmetry, they are arranged in a manner from the lower level step to the higher level step.

[0013] Optionally, the plurality of subfield plates are floating field plates; or, resistors are connected between the plurality of floating subfield plates; or, resistors are connected between the plurality of subfield plates, and between the first field plate and the second field plate and adjacent subfield plates.

[0014] Optionally, the common field plate is a floating resistive field plate; or, the common field plate is a resistive field plate, and the two ends of the resistive field plate are electrically connected to their respective adjacent first and second field plates.

[0015] According to another aspect of the present invention, the present invention also provides a method for fabricating a bidirectional semiconductor device, comprising the following steps: A functional region is provided, which includes, from bottom to top, a channel layer, a barrier layer and a dielectric layer, wherein a two-dimensional carrier gas can be formed in the region of the channel layer near the barrier layer. A first electrode group and a second electrode group are symmetrically distributed in the functional region. The first electrode and the first control electrode in the first electrode group are symmetrically distributed in the functional region with the second electrode and the second control electrode in the second electrode group as the axis of symmetry, and the first electrode and the second electrode can be electrically connected to the two-dimensional carrier gas. Fabricate a first field plate and a second field plate symmetrically distributed along a symmetry axis, wherein the first field plate and the second field plate are electrically connected to a first electrode and a second electrode, respectively, or to a first control electrode and a second control electrode, respectively; and A common field plate is prepared based on the axis of symmetry and symmetrically distributed between the first field plate and the second field plate; wherein, under the action of the first control electrode and the second control electrode, the common field plate and the first field plate or the second field plate respectively constitute an electric field equalization field plate.

[0016] By adding a common field plate, this invention can adjust the electric potential or electric field to be evenly distributed in the drift region, reduce the electric field spikes in the barrier layer, thereby effectively improving the overall breakdown voltage of the device, solving the limitation of the field plate spacing on the breakdown voltage of bidirectional devices, and facilitating the miniaturization of the device. Attached Figure Description

[0017] The preferred embodiments of the present invention will now be described in further detail with reference to the accompanying drawings, wherein: Figure 1 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to an embodiment of the present invention; Figure 2This is a schematic diagram simulating the potential distribution of a conventional bidirectional horizontal device under the first voltage condition; Figure 3 This is a schematic diagram simulating the electric field distribution of a conventional bidirectional horizontal device under the first voltage condition; Figure 4 This is a schematic diagram simulating the potential distribution of a bidirectional horizontal device in one embodiment of the present invention under the first voltage condition; Figure 5 This is a schematic diagram simulating the electric field distribution of a bidirectional horizontal device in one embodiment of the present invention under the first voltage condition; Figure 6 The above is a simulation diagram of the barrier layer electric field of the bidirectional horizontal device provided by the present invention and the conventional bidirectional device under the same voltage and structural parameters. Figure 7 yes Figure 1 An enlarged view of the structure of a further embodiment of Part A; Figure 8 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention; Figure 9 This is a schematic diagram of the arrangement of three subfield plates in the drift region according to an embodiment of the present invention; Figure 10 yes Figure 9 A schematic diagram of the structure in the B direction; Figure 11 yes Figure 9 Another structure in the diagram is shown in the B direction; Figure 12 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention; Figure 13 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention; Figure 14 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention; Figure 15 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to yet another embodiment of the present invention; Figure 16 This is a flowchart of a method for fabricating a bidirectional semiconductor device according to an embodiment of the present invention; Figure 17 This is a process flow diagram of a bidirectional semiconductor device fabrication method according to an embodiment of the present invention; Figure 18 This is a typical circuit schematic of a BPS. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] In the following detailed description, reference can be made to the accompanying drawings, which form part of this application and illustrate specific embodiments of the present application. In the drawings, similar reference numerals describe substantially similar components in different figures. Specific embodiments of the present application are described in sufficient detail below to enable those skilled in the art to implement the technical solutions of the present application. It should be understood that other embodiments may also be utilized, or structural, logical, or electrical changes may be made to the embodiments of the present application.

[0020] This invention provides a bidirectional semiconductor device that improves the device's breakdown voltage by adding a common field plate to balance the electric field distribution within the device. See also... Figure 1 , Figure 1 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to an embodiment of the present invention. In this embodiment, the bidirectional semiconductor device includes a functional layer 10, a dielectric layer 20, electrodes, and a field plate. The functional layer 10 includes a substrate 100 and an epitaxial layer. The substrate 100 is made of, for example, intrinsic gallium nitride (GaN) or materials such as silicon (Si), silicon carbide (SiC), or sapphire (Al2O3). When the substrate 100 is not an intrinsic GaN substrate, a buffer layer can be further introduced. The buffer layer can be one or more of aluminum nitride (AlN), gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum indium nitride (AlInN), and aluminum indium gallium nitride (AlGaInN). The buffer layer can effectively reduce the influence of differences in lattice constant and thermal expansion coefficient between the substrate 100 and the epitaxial layer, effectively preventing cracking in the epitaxial layer. The buffer layer is an optional structure and can also be a multilayer structure, with each layer composed of different materials. When using a silicon (Si) substrate, a nucleation layer can be introduced between the substrate and the buffer layer to prevent the melt-back effect. When using a sapphire or silicon carbide substrate, a nucleation layer can also be introduced to improve the quality of the epitaxial layer.

[0021] The epitaxial layer includes a channel layer 111 and a barrier layer 112. The channel layer 111 is made of materials such as GaN, and the barrier layer 112 is made of materials such as AlGaN. The channel layer 111 and the barrier layer 112 constitute a heterojunction, in which a two-dimensional carrier gas, such as a two-dimensional electron gas (2DEG) or a two-dimensional hole gas (2DHG), is provided. The materials of the channel layer 111 and the barrier layer 112 constituting the heterojunction can also be other III-V group semiconductor materials, such as AlN, GaN, InN, and compounds of these materials, such as AlGaN, InGaN, AlInGaN, etc.

[0022] Above the epitaxial layer is a dielectric layer 20. In this embodiment, the dielectric layer 20 includes a gate dielectric layer 210 and a passivation dielectric layer 220. The passivation dielectric layer 220 is used to cover and separate the electrodes, and its material is, for example, silicon nitride, silicon oxide, hafnium oxide, or aluminum oxide. The passivation dielectric layer 220 can be a single-layer structure or a multi-layer structure, such as silicon nitride near the barrier layer 112 and silicon oxide near the electrodes.

[0023] In this invention, the bidirectional semiconductor device includes a pair of laterally arranged electrodes for connecting to an external circuit and a pair of electrodes for controlling the device mode. For ease of explanation, the control electrodes are referred to as the first control electrode and the second control electrode, and the electrodes for connecting to the external circuit are referred to as the first electrode and the second electrode. In terms of layout, the first electrode and the first control electrode constitute a first electrode group, and the second electrode and the second control electrode constitute a second electrode group. A drift region exists between the first control electrode and the second control electrode. With the center of the drift region as the axis of symmetry, the first electrode group and the second electrode group are symmetrically distributed. Figure 2 Taking the illustrated principle structure as an example, in this embodiment, the first electrode and the second electrode are the first source S1 and the second source S2, respectively, and the first control electrode and the second control electrode are the first gate G1 and the second gate G2, respectively. The first gate G1 and the second gate G2 are symmetrical about the center line C between them, and the first source S1 and the second source S2 are symmetrical about the center line C between them, and are electrically connected to 2DEG.

[0024] For ease of explanation, the semiconductor region comprising the functional layer 10 and the dielectric layer 20, including electrodes, will be referred to as the functional region in this invention. In this embodiment, both the electrodes and the field plate are distributed within the functional region.

[0025] The field plate includes an electrode field plate and a common field plate. The electrode field plate includes a first field plate and a second field plate symmetrically distributed along a symmetry axis. The first field plate is connected to a first electrode or a first control electrode, and the second field plate is connected to a second electrode or a second control electrode. When the first field plate and the second field plate are respectively connected to the first electrode and the second electrode, both the first field plate and the second field plate are source field plates. When the first field plate and the second field plate are respectively connected to the first control electrode and the second control electrode, both the first field plate and the second field plate are gate field plates. In this embodiment, the first field plate is a first gate field plate G1-FP, and the second field plate is a second gate field plate G2-FP, both of which are conventional field plates.

[0026] In this embodiment, the shared field plate includes multiple floating sub-field plates 301 (three as shown in the figure). These sub-field plates 301 are symmetrically distributed between the first gate field plate G1-FP and the second gate field plate G2-FP, and are positioned at the same horizontal level as the first gate field plate G1-FP and the second gate field plate G2-FP. Under the action of the first gate G1 and the second gate G2, the multiple sub-field plates 301, together with the first gate field plate G1-FP and the second gate field plate G2-FP, respectively constitute a first electric field equalization field plate 31 and a second electric field equalization field plate 32. The electric field equalization field plate achieves electric field modulation through electrostatic induction between the conventional field plate and the floating field plate.

[0027] Traditional bidirectional horizontal devices are stressed through the depletion region between the first gate G1 and the second gate G2. (See also...) Figure 2 and Figure 3 , Figure 2 This is a schematic diagram simulating the potential distribution of a conventional bidirectional horizontal device under the first voltage condition. Figure 3 This is a schematic diagram simulating the electric field distribution of a conventional bidirectional horizontal device under the first voltage condition. In this example, the conventional bidirectional horizontal device is a D-mode (depletion-type) device, and the first voltage condition is as follows: G1: OFF; G2: ON; V G2 =V S2 =BV, where BV is the high voltage.

[0028] The device is currently in the off state. Figure 2 In the diagram, the red area on the right represents high potential, and the purple area on the left represents low potential. The potential gradually decreases from right to left, with different colors used to represent different potentials. Figure 3As can be seen, the electric field distribution is mainly concentrated in the drift region between the first gate G1 and the second gate G2. When a high voltage is applied to the second source S2 and the second gate G2, since the adjacent second gate G2 is electrically connected to the second gate field plate G2-FP, both the second gate G2 and the second gate field plate G2-FP are at high voltage and equipotential. Due to the limited height of the field plate from the barrier layer (because the modulation capability of the electric field deteriorates when it is too high), the area below the gate field plate is at the same potential as the gate, thus limiting the propagation of the depletion layer below the gate field plate. Therefore, for devices with gate field plates, both the potential distribution and the electric field distribution are confined between the two gate field plates. Under the first voltage condition, the potential lines and electric field lines at the end of the first gate field plate G1-FP are compactly distributed.

[0029] from Figure 3 As can be seen, electric field spikes exist at the ends of the first gate field plate G1-FP and the second gate field plate G2-FP. Since the first gate G1 is in the OFF state and the second gate G2 is in the ON state, the electric field spike at the end of the first gate field plate G1-FP is the largest. Therefore, the electric field of the barrier layer below the field plate ends reaches the breakdown field strength first, causing the barrier layer dielectric to break down. Similar to unidirectional devices, the breakdown voltage of horizontal bidirectional devices is affected by the length and height of the field plates. Generally, the longer the field plate, the larger the depletion region area, and the greater the voltage across the gates G1 and G2. Simultaneously, the height of the field plate has an optimal modulation range.

[0030] Experimental data shows that the breakdown voltage of bidirectional horizontal devices is also limited by the spacing between the first gate field plate G1-FP and the second gate field plate G2-FP. The larger the spacing between the first gate field plate G1-FP and the second gate field plate G2-FP, the higher the breakdown voltage of the device. Therefore, in order to obtain a high breakdown voltage, the spacing between the first gate field plate G1-FP and the second gate field plate G2-FP needs to be increased, which obviously increases the size of the device, contradicting the requirements for low resistance and miniaturization.

[0031] In this invention, the top-layer field plate uses shorter conventional field plates (G1-FP / G2-FP) and floating field plates (such as...). Figure 2 The scheme involves multiple floating subfield plates 301. See [link / reference]. Figure 4 and Figure 5 , Figure 4 This is a schematic diagram simulating the potential distribution of a bidirectional horizontal device in one embodiment of the present invention under the first voltage condition. Figure 5 This is a schematic diagram simulating the electric field distribution of a bidirectional horizontal device in one embodiment of the present invention under the first voltage condition.

[0032] from Figure 4As can be seen, under the first voltage condition, the floating field plate can induce a potential, which increases sequentially from the first gate field plate G1-FP, the floating sub-field plate, and the second gate field plate G2-FP. The potential / electric field is still distributed between the first gate field plate G1-FP and the second gate field plate G2-FP, but at this time, the first gate field plate G1-FP and the second gate field plate G2-FP use shorter field plate dimensions. Compared with traditional bidirectional devices of the same size, the distance between the first gate field plate G1-FP and the second gate field plate G2-FP is larger, so the potential distribution in this region is more uniform, allowing the device to withstand higher voltages. At the same time, there are electric field peaks between the first gate field plate G1-FP and the floating sub-field plate, between the two floating sub-field plates, and between the floating sub-field plate and the second gate field plate G2-FP. From left to right, the electric field peak in this region is located at the end of the left field plate. By adjusting the distance between the field plates and the height and length of the floating field plate, the electric field lines collected at the end of the first gate field plate G1-FP can be minimized, thereby effectively reducing the electric field peak in the depletion region of the underlying barrier layer at that location. See also Figure 6 , Figure 6 This is a simulation diagram of the barrier layer electric field of the bidirectional horizontal device provided by this invention and a conventional bidirectional device under the same voltage and structural parameters. The structural parameters refer to the distances between the substrate, epitaxial layer, and gate field plate, and the height of the field plate from the barrier layer, etc. Figure 6 The horizontal axis represents the length of the region between the first source S1 and the second source S2, i.e., the length of the drift region, in micrometers (µm), with the midpoint of this region as the origin of the horizontal axis. The vertical axis represents the electric field strength of the barrier layer, in megavolts per centimeter (MV / cm). As can be seen from the figure, the electric field strength of the barrier layer in a conventional bidirectional device has only two electric field peaks of different sizes, while the electric field strength of the barrier layer in the bidirectional device provided by this invention has multiple peaks, and the largest peak is smaller than the electric field peak of the barrier layer in a conventional bidirectional device.

[0033] Therefore, compared with traditional bidirectional devices, the bidirectional device provided by the present invention can provide higher withstand voltage for the same volume; and at the same withstand voltage, the volume of the bidirectional device provided by the present invention can be significantly smaller than that of traditional bidirectional devices.

[0034] When the device switches between high and low voltage, the floating sub-field plate in the middle can be used as part of the first gate field plate G1-FP and as part of the first gate field plate G2-FP, which is equivalent to increasing the length of the field plate, thus retaining the advantages of the long field plate and improving the withstand voltage.

[0035] See Figure 7 , Figure 7 yes Figure 1The diagram shows an enlarged view of a further embodiment of Part A. In this embodiment, the number of sub-field plates 301 between the first gate field plate G1-FP and the second gate field plate G2-FP is N. The distances between the two sub-field plates 301 from the first gate field plate G1-FP and the second gate field plate G2-FP toward the axis of symmetry are m1, m2, ..., respectively. In one embodiment, the distances between the two sub-field plates 301 are equal, i.e., m1 = m2. This allows the electric field to be uniformly distributed between the first gate field plate G1-FP and the second gate field plate G2-FP. In another embodiment, the distances between the two sub-field plates 301 gradually increase or decrease from the first gate field plate G1-FP and the second gate field plate G2-FP toward the axis of symmetry. By adjusting the spacing between the field plates, the peak electric field between the two field plates can be adjusted, ensuring that the electric field spikes on the barrier layer are all less than their breakdown field strength. The sub-field plates 301 in this embodiment have rectangular cross-sections, and all sub-field plates 301 have the same cross-sectional shape, thickness, length, and horizontal position. In another embodiment, the cross-section of the N sub-field plates 301 is rectangular, and their thickness can gradually decrease or increase from both ends toward the axis of symmetry in the middle. When the sub-field plate 301 is a resistive field plate, the resistance can be adjusted by adjusting the thickness, thereby optimizing the potential and electric field.

[0036] See Figure 8 , Figure 8This is a schematic diagram of the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention. In this embodiment, the first field plate and the second field plate in the bidirectional semiconductor device are the first source field plate S1-FP and the second source field plate S2-FP, respectively. The first source field plate S1-FP and the second source field plate S2-FP extend from the first source S1 and the second source S2 to the drift region, respectively, and are symmetrical about the center line of the drift region. In this embodiment, the common field plate includes a first sub-field plate 311, a second sub-field plate 312, and a third sub-field plate 313 arranged horizontally from left to right. Since there are an odd number of sub-field plates in this embodiment, in order to ensure symmetry, the cross-sections of the first sub-field plate 311 and the third sub-field plate 313 are stepped with two levels, and are arranged from both ends toward the axis of symmetry in a manner from the lower level step to the higher level step. The cross-section of the second sub-field plate 312 in the middle is rectangular, and it is located at the same horizontal position as the higher level step of the first sub-field plate 311 and the third sub-field plate 313 on the left and right sides. In this embodiment, the structure and layout of the sub-field plates ensure the depletion rate of electrons in the drift region below the field plate while increasing the distance from the electric field peak at the end of the floating field plate to the barrier layer, thereby improving the breakdown voltage of the device. In another embodiment, when the number of sub-field plates is even, the cross-section of the sub-field plates can be the same, for example, a stepped shape with two or more steps, and arranged from both ends toward the axis of symmetry in a manner from the lower step to the higher step. Therefore, on one side of the axis of symmetry, with the end closer to the first or second field plate as the starting end and the end closer to the axis of symmetry as the ending end, the ends of multiple sub-field plates arranged in this way rise sequentially, thereby increasing the distance from the electric field peak at the end of the floating field plate to the barrier layer, which is beneficial for improving the breakdown voltage.

[0037] Although the cross-sectional shape of the sub-field plate in the figure is a two-step shape, it can be known that it can also be a three-step or multi-step shape. In terms of arrangement, it is still arranged from the two ends toward the axis of symmetry, from the lower step to the higher step.

[0038] The cross-sectional shape of the sub-field plate can also be a shape composed of two or more steps placed back-to-back. See also Figure 9 , Figure 9 This is a schematic diagram of the arrangement of three subfield plates in the drift region according to an embodiment of the present invention. In this embodiment, the cross-sectional shape of the fourth subfield plate 314 is a two-stage step-like shape with two back-to-back plates. This allows the electric field spikes to be moved away from the barrier layer when electric field spikes are formed at the two ends of the fourth subfield plate 314 under different conditions.

[0039] See Figure 10 , Figure 10 yes Figure 9 The diagram shows the structure along the B-direction. The fourth sub-field plate 314 is identical to the source field plate, being a continuous field plate along the electrode length, thus simplifying the fabrication process. (See also...) Figure 11 , Figure 11 yes Figure 9 Another structure is shown in the schematic diagram along the B direction. In this embodiment, the fourth sub-field plate 314 is composed of multiple separate field plates with a certain spacing along the electrode length direction. The multiple field plates in this embodiment are arranged at intervals to form a single field plate, which can save raw materials and reduce manufacturing costs while maintaining a balanced electric field. Similarly, Figure 1 and Figure 8 The subfield plate in the electrode length direction can be a continuous field plate or a discontinuous field plate, which will not be elaborated here.

[0040] The subfield plate in the aforementioned embodiments is made of conductive materials, such as metals, for example, Ti, Al, Ni, Au, etc., or a composite metal layer consisting of two or three metal layers.

[0041] See Figure 12 , Figure 12 This is a schematic diagram of a bidirectional semiconductor device according to another embodiment of the present invention. For ease of explanation, the structure of the bidirectional semiconductor device in the present invention is shown below. Figure 1 Taking the structure in the middle as an example, in Figure 1 In the structure shown, resistors are connected in series between two adjacent sub-field plates 301, as shown by the first resistor R1 and the second resistor R2 in the figure. When resistors are connected in series between the floating sub-field plates, during operation, a potential is generated between the sub-field plates 301 at both ends and the gate field plate through electrostatic induction. The potential between the sub-field plates is automatically matched according to the resistance value, thereby forming a relatively uniform potential gradient between the gates.

[0042] Further, see Figure 13 , Figure 13 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention. This embodiment... Figure 12 Based on this, resistors are also added between the sub-field plate 301 at both ends and the gate field plate, such as the third resistor R3 and the fourth resistor R4 in the figure. This allows the potential to be automatically matched between the gate field plate and the sub-field plate 301, and between the sub-field plates 301, according to the resistance values, which further facilitates the equalization of the electric field gradient between the gates.

[0043] Similarly, it can also be done in Figure 8 and Figure 9 According to the field plate structure shown Figure 12 and Figure 13 The method of increasing resistance will not be explained again here.

[0044] See Figure 14 , Figure 14This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention. In this embodiment, the common field plate is a floating resistive field plate made of materials such as TiN and PolySi. In the device's off-state, the floating resistive field plate induces a potential, which is then uniformly distributed between the two gate field plates, thereby improving the device's breakdown voltage.

[0045] Figure 15 This is a schematic diagram illustrating the structural principle of a bidirectional semiconductor device according to another embodiment of the present invention. In this embodiment, the common field plate is a resistive field plate, with its two ends connected to two gate field plates. In the device's off-state operating state, the potential between the gates is uniformly distributed through the resistive field plate, thereby improving the device's withstand voltage.

[0046] Furthermore, in the above embodiments, the bidirectional semiconductor device is a depletion-mode (D-mode), such as... Figure 1 The semiconductor structure shown can also be in enhancement mode (E-mode), such as... Figure 8 As shown.

[0047] In another aspect, the present invention provides a method for fabricating a bidirectional semiconductor device. See also Figure 16 , Figure 16 This is a flowchart illustrating a method for fabricating a bidirectional semiconductor device according to an embodiment of the present invention. In this embodiment, the method includes the following steps: Step S1, providing a functional region, which includes at least a channel layer, a barrier layer and a dielectric layer from bottom to top, wherein a two-dimensional carrier gas can be formed in the region of the channel layer near the barrier layer.

[0048] Step S2: A first electrode group and a second electrode group are symmetrically distributed in the functional region. The first electrode and the first control electrode in the first electrode group are symmetrically distributed in the functional region with the second electrode and the second control electrode in the second electrode group as the axis of symmetry, and the first electrode and the second electrode are electrically connected to the two-dimensional carrier gas. Step S3: Fabricate a first field plate and a second field plate symmetrically distributed along a symmetry axis, wherein the first field plate and the second field plate are electrically connected to the first electrode and the second electrode, respectively, or electrically connected to the first control electrode and the second control electrode, respectively; and Step S4: Prepare a shared field plate that is symmetrically distributed between the first field plate and the second field plate based on the axis of symmetry; wherein, under the action of the first control electrode and the second control electrode, the shared field plate and the first field plate or the second field plate respectively constitute an electric field equalization field plate.

[0049] In the aforementioned steps, one step can be divided into multiple steps. For example, in step S2, when preparing the symmetrically distributed first and second electrode groups, the first and second electrodes are first generated, then the dielectric layer is deposited, and then the first and second control electrodes are generated. Alternatively, multiple steps can be combined as needed. For example, when preparing a common field plate, it can be prepared simultaneously with the first and second field plates.

[0050] See Figure 17 , Figure 17 This is a process flow diagram of a method for fabricating a bidirectional semiconductor device according to an embodiment of the present invention. The method in this embodiment includes the following steps: Step S101: Provide a functional layer. The functional layer 10 includes a substrate 100, a channel layer 111, and a barrier layer 112. In this embodiment, the channel layer 111 is a GaN layer, and the barrier layer 112 is an AlGaN layer. The channel layer 111 and the barrier layer 112 constitute an epitaxial layer.

[0051] Step S102: Deposit a gate dielectric layer 210 on the current epitaxial layer.

[0052] Step S103: Etch the current functional layer to define the functional region, also known as the active region, so as to isolate it from the adjacent die.

[0053] Step S104: Deposit medium in the current functional area to obtain the first medium layer 220-1.

[0054] In step S105, two electrode holes 41 are etched downwards from the current first dielectric layer 220-1, with the bottom of the electrode holes 41 reaching the channel layer 111. Alternatively, they can enter the channel layer and be located above the 2DEG.

[0055] Step S106: Deposit metal in electrode hole 41 to obtain first source S1 and second source S2.

[0056] Step S107: Continue depositing the medium to obtain the second medium layer 220-2.

[0057] In step S108, with the center of the first source S1 and the second source S2 as the center of symmetry, two control electrode holes 42 are etched downwards from the current second dielectric layer 220-2. Furthermore, a certain number of field plate levels are etched during the etching process. The bottom of the control electrode holes 42 reaches the gate dielectric layer 210. In this embodiment, since the gate is connected to multiple levels of field plates, field plate grooves are etched simultaneously with the control electrode holes 42.

[0058] In step S109, metal is deposited on the current second dielectric layer 220-2 to obtain a metal layer 50. The metal layer 50 may be a composite metal layer and covers the inner surface of the control electrode hole 42. The metal layer on the inner surface of the control electrode hole 42 constitutes the gate and its field plate.

[0059] Step S110: Etch the metal layer to obtain the field plate morphology. As shown in the figure, etch the metal layer 50 on the dielectric layer surrounding the control electrode hole 42 to obtain the topmost gate field plate, such as the first gate field plate G1-FP and the second gate field plate G2-FP in the figure. Then, when etching the sub-field plates 301, excess metal is etched away according to the set parameters such as position, spacing, thickness, and field plate length to obtain multiple symmetrically distributed sub-field plates 301.

[0060] Step S111: Deposit passivation medium to generate passivation and perform mechanical grinding and other operations to obtain the third medium layer 220-3.

[0061] In this embodiment, the subfield plate 301 has a rectangular cross-section. However, it is known that when etching the metal layer in step S110 to obtain the field plate shape, different shapes of subfield plates 301 can be obtained by varying the depth and length of the etching, as well as by multiple depositions and etchings of the metal layer.

[0062] Additionally, when it is necessary to add a resistor between the two sub-field plates 301, such as Figure 13 or Figure 14 ,exist Figure 18 Based on the fabrication process shown, during step S109, when depositing the first metal layer for fabricating the subfield plate, a second metal layer can also be fabricated in the passive region or at other locations in the current active region to obtain a resistor. The second metal layer can be connected to the first metal layer. The second metal layer is etched according to the required resistance value and quantity to obtain a resistor of a certain value and quantity. When fabricating the subfield plate, the connection relationship between the resistor and the subfield plate can also be obtained by etching the first metal layer to obtain the subfield plate.

[0063] for Figure 14 The field plate structure shown, since the floating field plate is a resistive field plate, allows for the separate fabrication of electrode field plates and sub-field plates; for Figure 15 The field plate structure shown can be fabricated by first preparing a resistive field plate, and then connecting the electrode field plate and the resistive field plate during the fabrication of the electrode field plate.

[0064] A bidirectional power switch (BPS), also commonly known as an AC switch or four-quadrant switch, is an active device that allows bidirectional conduction when powered on and bidirectional blocking when powered off. Traditional BPSs typically consist of multiple distributed components, with a typical circuit structure as shown below. Figure 18 As shown, Figure 18This is based on a typical circuit schematic of a BPS (Block MOSFET). It consists of two back-to-back series-connected MOSFETs / IGBTs and a diode. This distributed device structure results in a large BPS chip area, high cost, and long processing time. Since monolithic devices have fewer external wiring and do not require additional interfaces, they can improve device performance, efficiency, and reliability. However, when considering building a BPS using monolithic devices, the MOSFETs / IGBTs are usually arranged in a vertical structure. This structure makes it extremely challenging to fabricate two MOSFETs / IGBTs on a single chip while meeting certain conditions, such as cost, RDS(on), and rated voltage of approximately 30V and above.

[0065] This invention provides a bidirectional semiconductor device based on group III-V compounds. Due to its lateral structure and the absence of parasitic diodes, its monolithic fabrication process is relatively easier compared to traditional vertical MOSFETs / IGBTs. By sharing the drift region between the first gate G1 and the second gate G2, the overall chip area is effectively reduced, thereby reducing the device size, weakening parasitic effects, and ultimately improving system reliability.

[0066] Furthermore, when fabricating bidirectional power switches using the bidirectional semiconductor device described in this invention, the addition of a bidirectional common field plate based on the operating characteristics ensures a uniform distribution of the potential or electric field in the drift region between the first gate G1 and the second gate G2, effectively improving the overall withstand voltage of the device and overcoming the voltage limitation imposed by the field plate spacing on bidirectional devices. Additionally, the addition of the common field plate retains the advantages of a long field plate, improving withstand voltage and reducing leakage. Simultaneously, the fabrication process of the floating field plate is easy to implement. For high-voltage bidirectional horizontal devices, a solution combining a traditional field plate and a floating field plate can replace the complex traditional multilayer field plate stacking technology, effectively improving withstand voltage and facilitating device miniaturization.

[0067] The above embodiments are for illustrative purposes only and are not intended to limit the invention. Those skilled in the art can make various changes and modifications without departing from the scope of the invention. Therefore, all equivalent technical solutions should also fall within the scope of the invention.

Claims

1. A bidirectional semiconductor device, characterized in that, include: A functional region, comprising at least an epitaxial layer, wherein the epitaxial layer comprises a two-dimensional carrier gas; The electrode group includes a first electrode group and a second electrode group that are symmetrically distributed laterally. The first electrode and the first control electrode in the first electrode group are symmetrically distributed with the second electrode and the second control electrode in the second electrode group in the functional area with the center of the drift region between the first control electrode and the second control electrode as the axis of symmetry. The first electrode and the second electrode can be electrically connected to the two-dimensional carrier gas. An electrode field plate includes a first field plate and a second field plate symmetrically distributed along an axis of symmetry, wherein the first field plate and the second field plate are electrically connected to a first electrode and a second electrode, respectively, or electrically connected to a first control electrode and a second control electrode, respectively; and A common field plate is symmetrically distributed between the first and second field plates along the axis of symmetry. Under the action of the first and second control electrodes, it forms an electric field equilibrium field plate with the first or second field plate, respectively.

2. The bidirectional semiconductor device according to claim 1, characterized in that, The common field plate is a continuous field plate along the electrode length direction or includes multiple field plates that are disconnected along the electrode length direction; or the common field plate includes multiple sub-field plates, which are distributed at intervals and symmetrically between the first field plate and the second field plate.

3. The bidirectional semiconductor device according to claim 2, characterized in that, The multiple sub-field plates are distributed at intervals and equal distances between the first and second field plates; or, the spacing between the field plates gradually increases or decreases from the first and second field plates toward the central axis of symmetry.

4. The bidirectional semiconductor device according to claim 2, characterized in that, The plurality of subfield plates are placed at the same horizontal position parallel to the epitaxial layer as the first field plate and the second field plate; or, the plurality of subfield plates are placed at different horizontal positions parallel to the epitaxial layer.

5. The bidirectional semiconductor device according to claim 4, characterized in that, From the first field plate and the second field plate respectively toward the axis of symmetry, the longitudinal distance between the plurality of sub-field plates and the epitaxial layer gradually increases.

6. The bidirectional semiconductor device according to claim 2, characterized in that, The cross-section of the sub-field plate is rectangular, stepped with two or more steps, and / or formed by two or more steps back to back.

7. The bidirectional semiconductor device according to claim 6, characterized in that, The cross-section of the sub-field plate is a stepped shape with two levels of steps, and when multiple sub-field plates are arranged from both ends toward the axis of symmetry, they are arranged in a manner from the lower level step to the higher level step.

8. The bidirectional semiconductor device according to any one of claims 2-7, characterized in that, The plurality of subfield plates are floating field plates; or, resistors are connected between the plurality of floating subfield plates; or, resistors are connected between the plurality of subfield plates, and between the first field plate and the second field plate and the adjacent subfield plates.

9. The bidirectional semiconductor device according to claim 1, characterized in that, The common field plate is a floating resistive field plate; or, the common field plate is a resistive field plate, and the two ends of the resistive field plate are electrically connected to their respective adjacent first and second field plates.

10. A method for fabricating a bidirectional semiconductor device, characterized in that, include: A functional region is provided, which includes, from bottom to top, a channel layer, a barrier layer and a dielectric layer, wherein a two-dimensional carrier gas can be formed in the region of the channel layer near the barrier layer. A first electrode group and a second electrode group are symmetrically distributed in the functional region. The first electrode and the first control electrode in the first electrode group are symmetrically distributed in the functional region with the second electrode and the second control electrode in the second electrode group as the axis of symmetry, and the first electrode and the second electrode can be electrically connected to the two-dimensional carrier gas. Fabricate a first field plate and a second field plate symmetrically distributed along a symmetry axis, wherein the first field plate and the second field plate are electrically connected to a first electrode and a second electrode, respectively, or to a first control electrode and a second control electrode, respectively; and A common field plate is prepared based on the axis of symmetry and symmetrically distributed between the first field plate and the second field plate; wherein, under the action of the first control electrode and the second control electrode, the common field plate and the first field plate or the second field plate respectively constitute an electric field equalization field plate.

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