Optical chip and display device

Abstract

The invention provides an optical chip and a display device. The optical chip comprises a substrate, and a plurality of semiconductor laminated structures, a plurality of first electrodes and a functional structural member which are respectively arranged on the substrate, the first electrodes are located between the corresponding semiconductor laminated structures and the substrate, and a groove is formed between any two adjacent semiconductor laminated structures; the functional structural member comprises a plurality of reflection parts, at least one second electrode and at least one collimation dimming layer; a reflecting part is arranged in the groove; the second electrode is arranged on one side, deviating from the substrate, of the reflecting part, and the second electrode is connected with at least part of the semiconductor laminated structure; the collimation dimming layer is at least arranged on the side, away from the substrate, of the second electrode, collimation light emitting of the optical chip can be achieved through the collimation dimming layer, arrangement of a micro lens is omitted, and therefore the density of pixels in the optical chip can be effectively improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to an optical chip and display device. Background Technology

[0002] The optical chip includes a light-emitting device and a driving circuit. The light-emitting device includes an anode, a semiconductor stacked structure, and a cathode. The anode and cathode are located on opposite sides of the semiconductor stacked structure, and the driving circuit is connected to the anode. The optical chip may also include a microlens disposed on the side of the light-emitting device away from the driving circuit. The microlens can reduce the divergence of the light beam emitted by the light-emitting device and improve the directionality and concentration of light propagation, thereby achieving collimated light emission. However, the diameter of the microlens is often larger than the diameter of the light-emitting device, causing the microlens to occupy a large space. Due to process limitations, the size of the microlens is difficult to reduce, thus limiting the increase in the density of light-emitting devices in the optical chip. If each semiconductor stacked structure is regarded as a pixel, the increase in pixel density in the optical chip is also limited. Summary of the Invention

[0003] This application provides an optical chip and a display device for realizing collimated light emission from the optical chip and improving the pixel density of the optical chip.

[0004] In a first aspect, embodiments of this application provide an optical chip, which may include: a substrate, and a plurality of semiconductor stacked structures, a plurality of first electrodes, and functional structural components respectively disposed on the substrate; the plurality of first electrodes are correspondingly disposed with the plurality of semiconductor stacked structures, and the first electrodes are located between the corresponding semiconductor stacked structures and the substrate; a trench is formed between any two adjacent semiconductor stacked structures; the functional structural components include: a plurality of reflective components, at least one second electrode, and at least one collimation and modulation layer; the reflective components are correspondingly disposed with the trench, and the trench contains the reflective components; the second electrode is disposed on the side of the plurality of reflective components facing away from the substrate, and the second electrode is connected to at least a portion of the semiconductor stacked structures; the collimation and modulation layer is at least disposed on the side of the second electrode facing away from the substrate, and collimation and modulation layer can realize collimated light emission of the optical chip, eliminating the need for microlenses and freeing up more space for the semiconductor stacked structures, thereby effectively increasing the pixel density in the optical chip. Furthermore, by using a reflective component located within the trench, light emitted from the semiconductor stacked structure to the reflective component can be reflected, allowing more light to be collimated and avoiding crosstalk between light emitted from adjacent semiconductor stacked structures, thereby improving the luminous effect and luminous efficiency.

[0005] Optionally, the collimation and dimming layer also wraps around the side surface of the second electrode, allowing the collimation and dimming layer to absorb more stray light, thereby further improving the collimation and light emission effect. Here, if the surface of the second electrode facing away from the substrate is referred to as the upper surface, the side surface of the second electrode refers to the surface connected to the upper surface and forming a certain angle with it.

[0006] Optionally, the collimation and dimming layer is made of at least one of the following materials: black glue and light-absorbing metal. The light-absorbing metal includes, but is not limited to, alloys formed by one or more combinations of nickel, chromium, and titanium. Since black glue also has light-absorbing properties, the collimation and dimming layer is made of light-absorbing materials to absorb stray light in the light emitted by the semiconductor stacked structure, thereby achieving collimated light emission and avoiding light crosstalk between adjacent semiconductor stacked structures.

[0007] Optionally, the thickness of the collimation and modulation layer is 1 to 6 times the thickness of the semiconductor stacked structure. Further, the thickness of the collimation and modulation layer can be 3 to 5 times the thickness of the semiconductor stacked structure. The specific thickness can be set according to actual needs and is not specifically limited here. For example, if the thickness of the collimation and modulation layer is too large, it will result in an excessively large optical chip, which will hinder the miniaturization design of the optical chip. If the thickness of the collimation and modulation layer is too small, it may weaken the collimation and light emission effect. Therefore, setting the thickness of the collimation and modulation layer within the above range can achieve both the miniaturization design of the optical chip and the improvement of the collimation and light emission effect.

[0008] Optionally, the reflective component includes: a first insulating layer and a reflective layer. The reflective layer is located within the corresponding trench, and the first insulating layer is disposed between the reflective layer and the trench wall of the corresponding trench, and between the reflective layer and the trench bottom of the corresponding trench. The first insulating layer is made of a light-transmitting material, so that the light emitted by the semiconductor stacked structure can pass through the first insulating layer and be incident on the surface of the reflective layer. The reflective layer can reflect the light incident on its surface, and then enter the semiconductor stacked structure through the light-transmitting first insulating layer. This can avoid optical crosstalk between semiconductor stacked structures, thereby further improving the luminous efficiency and luminous effect of the optical chip.

[0009] Furthermore, the first insulating layer can be a distributed Bragg reflector layer, which can increase the reflection of light emitted from the sidewalls of the semiconductor stacked structure, thereby further improving the light-emitting effect of the optical chip.

[0010] Optionally, the first insulating layer extends to the first surface of the semiconductor stack structure on the side opposite to the substrate, and the first insulating layer covers the four edges of the first surface. If the first insulating layer located on the first surface is referred to as the upper extension layer, the upper extension layer and the second electrode can form an Omni Directional Reflector (ODR) structure. This ODR structure can reflect light incident from the semiconductor stack structure onto its surface, so that the light is reflected back into the semiconductor stack structure, allowing more light to be collimated and emitted, thereby further improving the luminous efficiency of the optical chip.

[0011] Furthermore, the length covered along the first normal direction at any edge of the first surface is the first length, and the length along the first normal direction at the center of two adjacent grooves is the second length. The ratio of the first length to the second length is 1 / 15 to 1 / 4, which can improve both luminous efficiency and luminous effect.

[0012] Optionally, the first insulating layer extends to the second surface of the semiconductor stack structure facing the substrate, and the first insulating layer covers the four edges of the second surface. If the first insulating layer located on the second surface is referred to as the lower extension layer, the lower extension layer and the first electrode can form an ODR structure. This ODR structure can reflect light incident from the semiconductor stack structure onto its surface, so that the light is reflected back into the semiconductor stack structure, allowing more light to be collimated and emitted, thereby further improving the luminous efficiency of the optical chip.

[0013] Furthermore, the length covered along the second normal direction at any edge of the second surface is the third length, and the length along the second normal direction at the center of two adjacent grooves is the fourth length. The ratio of the third length to the fourth length is 1 / 15 to 1 / 4, which can improve the luminous efficiency.

[0014] Secondly, embodiments of this application also provide a display device, including: an optical chip as described in the first aspect and any of the embodiments described in the first aspect, wherein when the optical chip has a high pixel density, the display effect of the display device can be improved.

[0015] It should be understood that since the principle by which the display device solves the problem is similar to that of the aforementioned optical chip, the implementation and technical effects of the display device can be found in the implementation and technical effects of the aforementioned optical chip, and the repetitions will not be repeated. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a display device provided in an embodiment of this application;

[0017] Figure 2This is a schematic diagram of the structure of an optical chip provided in an embodiment of this application;

[0018] Figure 3 For along Figure 2 A cross-sectional view shown in the x1-x2 direction;

[0019] Figure 4 This is a schematic diagram of the semiconductor stacked structure provided in the embodiments of this application;

[0020] Figure 5 For along Figure 2 Another sectional view shown in the x1-x2 direction;

[0021] Figure 6 For along Figure 2 Another sectional view shown in the x1-x2 direction;

[0022] Figure 7 For along Figure 2 Another sectional view shown in the x1-x2 direction;

[0023] Figure 8 A schematic diagram of the positional relationship between the semiconductor stacked structure and the first insulating layer provided in the embodiments of this application;

[0024] Figure 9 For along Figure 2 Another sectional view shown in the x1-x2 direction;

[0025] Figure 10 This is a schematic diagram illustrating another positional relationship between the semiconductor stacked structure and the first insulating layer provided in an embodiment of this application.

[0026] Explanation of reference numerals in the attached figures:

[0027] 10-Lens, 10A-Optical waveguide, 10L-Left lens, 10R-Right lens, 11-Coupled grating, 12-Coupled grating, 20-Optical mechanism, 100-Structural component, 101-Right temple, 102-Frame, 103-Left temple, 200-Optical assembly, 30-Semiconductor stacked structure, 31-Second semiconductor layer, 32-Light-emitting layer, 33-First semiconductor layer, 40-First electrode, 50-Functional structural component, 51-Reflective component, 51a-First insulating layer 51b - Reflective layer, 511 - Upper extension layer, 512 - Lower extension layer, 52 - Second electrode, 53 - Collimation and adjustment layer, C0 - Trench, b1 - First surface, b2 - Second surface, b3, b4 - Side surface, b5 - Side of the upper extension layer facing the center of the first surface, b6 - Side of the lower extension layer facing the center of the second surface, k0 - Light outlet, m1 - Substrate, m2 - Driving circuit layer, m3 - Insulator, G1 - First hollow structure, G2 - Second hollow structure. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of this application clearer, the application will now be described in further detail with reference to the accompanying drawings.

[0029] It should be noted that the same reference numerals in the accompanying drawings of this application denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms expressing position and direction described in this application are illustrative based on the accompanying drawings, but may be modified as needed, and all such modifications are included within the scope of protection of this application. The accompanying drawings of this application are for illustrating relative positional relationships only and do not represent actual scale.

[0030] To facilitate understanding of the technical solutions provided in the embodiments of this application, the application scenarios will be explained first below.

[0031] The optical chip provided in this application embodiment can be widely used in display devices, which may include, but are not limited to, various pixel art display devices or projectors. Pixel art display devices include, but are not limited to, augmented reality (AR) glasses, virtual reality (VR) glasses, mixed reality (MR) glasses, head-up display (HUD) devices, etc. In this application embodiment, the specific implementation of the display device including the optical chip can be designed according to actual needs and is not specifically limited here. Taking the application of the optical chip in AR glasses as an example... Figure 1 An exemplary schematic diagram of a display device, such as AR glasses, is shown, with reference to... Figure 1 As shown, the display device may include a structural component 100 and an optical assembly 200. The structural component 100 is used to construct the overall external structure and install internal optical and electronic components. The optical assembly 200 is an optical component. The structural component 100 includes a frame 102 and temples, with the temples including a right temple 101 and a left temple 103. The right temple 101 and the left temple 103 are respectively connected to both sides of the frame 102. The connection between the temples and the frame 102 can be a rotatable connection or a fixed connection. When a user wears the display device, the frame 102 is located in front of the user's eyes, and the temples (right temple 101 and left temple 103) rest on the user's ears. The above structure of the structural component 100 is merely an example; in other embodiments, it can be designed as needed. For example, the structural component 100 can be a headband or helmet for a head-mounted display device.

[0032] The optical component 200 includes a lens 10 and an optical engine 20. The lens 10 is mounted to a frame 102 and is worn directly in front of the human eye. The lens 10 is transparent and has an optical waveguide 10A, which may be a diffractive waveguide structure. In one embodiment, all areas of the lens 10 are optical waveguides 10A, i.e., the optical waveguide 10A constitutes the lens of the display device. In other embodiments, the optical waveguide 10A may only constitute part of the lens 10. The optical waveguide 10A has a coupling grating 11 and a coupling grating 12. The optical engine 20 projects light onto the optical waveguide 10A. The optical engine 20 projects the light onto the coupling grating 11, couples the light into the optical waveguide 10A through the coupling grating 11, and performs total internal reflection within the optical waveguide 10A. The light is then emitted through the coupling grating 12, which generates a virtual image that enters the human eye.

[0033] The optical engine 20 is located between the left lens 10L and the right lens 10R, and is situated at the top of the frame 102. The optical engine 20 emits two beams of light. One beam passes through the coupling grating 11 on the left lens 10L and enters the optical waveguide 10A on the left lens 10L, then exits through the coupling grating 12 on the left lens 10L to form a virtual image. The other beam of light emitted by the optical engine 20 passes through the coupling grating 11 on the right lens 10R and enters the optical waveguide 10A on the right lens 10R, then exits through the coupling grating 12 on the right lens 10R to form a virtual image. Figure 1 In the illustrated embodiment, the optical engine 20 and the two coupling gratings 11 are both located at the intersection of the left lens 10L and the right lens 10R, i.e., the adjacent area. It should be understood that the location of the optical engine 20 is not limited to the intersection of the left lens 10L and the right lens 10R, but can also be located in other locations, such as, but not limited to, the temple, and is not specifically limited here.

[0034] The optical engine comprises an optical chip, a beam combiner, and an optical imaging unit. The optical chip is located on the light-incident side of the beam combiner, and the optical imaging unit is located on the light-outcident side. The optical chip serves as the light source for the optical engine. The beam combiner combines the light emitted from the optical chip to form a mixed beam, which is then transmitted to the optical imaging unit. The optical imaging unit receives the mixed beam emitted from the beam combiner, and the mixed beam, after passing through the optical imaging unit, is emitted onto the coupling grating of the optical waveguide. The optical imaging unit can be a lens group, and its optical axis can be the optical axis of the optical engine.

[0035] For example, an optical chip generally includes a light-emitting device and a driving circuit. The light-emitting device includes an anode, a semiconductor stacked structure, and a cathode. The anode and cathode are located on opposite sides of the semiconductor stacked structure. The driving circuit is connected to the anode and can provide an anode signal to the anode, enabling the anode to inject holes into the semiconductor stacked structure. The cathode is connected to a signal terminal for providing a cathode signal, enabling the cathode to inject electrons into the semiconductor stacked structure. The semiconductor stacked structure may include a P-type semiconductor layer, a light-emitting layer, and an N-type semiconductor layer stacked sequentially along the direction from the anode to the cathode. The P-type semiconductor layer can transport the injected holes to the light-emitting layer, and the N-type semiconductor layer can transport the injected electrons to the light-emitting layer. Electrons and holes recombine in the light-emitting layer to emit light, thereby realizing the driving circuit driving the semiconductor stacked structure to emit light.

[0036] The optical chip may also include a microlens disposed on the side of the light-emitting device away from the driving circuit. The microlens can reduce the divergence of the light beam emitted by the light-emitting device and improve the directionality and concentration of light propagation, thereby achieving collimated light emission. However, the diameter of the microlens is often larger than the diameter of the light-emitting device, which makes the microlens occupy a large space. Due to process limitations, the size of the microlens is difficult to reduce, which limits the increase in the density of light-emitting devices in the optical chip. If each semiconductor stack structure is regarded as a pixel, the increase in the pixel density in the optical chip is limited.

[0037] Based on this, embodiments of this application provide an optical chip, which may include: a substrate, and a plurality of semiconductor stacked structures, a plurality of first electrodes, and functional structural components respectively disposed on the substrate; the plurality of first electrodes are correspondingly disposed with the plurality of semiconductor stacked structures, and the first electrodes are located between the corresponding semiconductor stacked structures and the substrate; a trench is formed between any two adjacent semiconductor stacked structures; the functional structural components include: a plurality of reflective components, at least one second electrode, and at least one collimation and modulation layer; the reflective components are correspondingly disposed with the trench, and the trench contains the reflective components; the second electrode is disposed on the side of the plurality of reflective components away from the substrate, and the second electrode is connected to at least a portion of the semiconductor stacked structures; the collimation and modulation layer is at least disposed on the side of the second electrode away from the substrate, and collimation and modulation layer can realize collimated light emission of the optical chip, eliminating the need for microlenses and freeing up more space for the semiconductor stacked structures, thereby effectively increasing the pixel density in the optical chip. Furthermore, by using a reflective component located within the trench, light emitted from the semiconductor stacked structure to the reflective component can be reflected, allowing more light to be collimated and avoiding crosstalk between light emitted from adjacent semiconductor stacked structures, thereby improving the luminous effect and luminous efficiency.

[0038] The optical chip provided in this application will be described below with reference to specific embodiments.

[0039] Figures 2 to 4 An exemplary schematic diagram of an optical chip according to an embodiment of this application is shown. See also... Figures 2 to 4 As shown, Figure 2 Image (a) is a top view of the optical chip. Figure 2 Image (b) is an exploded view of the collimation and modulation layer 53, the second electrode 52, and the semiconductor stacked structure 30. Figure 2 (c) is a three-dimensional structural diagram of the semiconductor stacked structure 30 and the reflective component 51. For ease of illustration, Figure 2 (b) in the diagram only illustrates the first surface b1 of the semiconductor stacked structure 30. Figure 3 For along Figure 2 The cross-sectional view shown in the x1-x2 direction, Figure 4 This is a schematic diagram of a semiconductor stacked structure 30; the optical chip may include: a substrate m1, a driving circuit layer m2, the semiconductor stacked structure 30, a first electrode 40, and a functional structural component 50. The light-emitting surface of the optical chip can be... Figure 3 The upper surface of the structure shown is the side of the semiconductor stacked structure 30 that is away from the substrate m1. Of course, the light-emitting surface can also be the side of the substrate m1 that is away from the semiconductor stacked structure 30. However, no matter which side the light-emitting surface is located on, normal light emission can be achieved by setting the materials of the relevant structures in the optical chip.

[0040] The substrate m1 can be made of materials with a certain degree of hardness, such as silicon oxide, silicon, and sapphire, to provide a certain support function.

[0041] The driving circuit layer m2 is located on the substrate m1. The semiconductor stack structure 30, the first electrode 40, and the functional structure 50 are all located on the side of the driving circuit layer m2 away from the substrate m1. The driving circuit layer m2 may include multiple driving circuits. Figure 3 (Not shown in the diagram), the driving circuit is correspondingly disposed and connected to the first electrode 40, so that the driving circuit can provide a first electrode signal to the corresponding first electrode 40. The driving circuit, the semiconductor stack structure 30, and the first electrode 40 are all disposed in a one-to-one correspondence to realize that the driving circuit drives the corresponding semiconductor stack structure 30 to emit light. It should be understood that the driving circuit can be implemented using any structure known to those skilled in the art that can achieve its function, and the structure of the driving circuit in the embodiments of this application is not specifically limited.

[0042] Each semiconductor stack structure 30 may include: a first semiconductor layer 33, a light-emitting layer 32, and a second semiconductor layer 31, which are sequentially stacked along the direction from the substrate m1 to the driving circuit layer m2. The first semiconductor layer 33 can inject a first type of charge carrier into the light-emitting layer 32, and the second semiconductor layer 31 can inject a second type of charge carrier into the light-emitting layer 32. When the first type of charge carrier is a hole, the second type of charge carrier is an electron; or when the first type of charge carrier is an electron, the second type of charge carrier is a hole, so that electrons and holes can recombine in the light-emitting layer 32 to achieve light emission. The semiconductor stack structures 30 can be arranged in an array above the driving circuit layer m2, and there is a trench C0 between any two adjacent semiconductor stack structures 30, so that the semiconductor stack structures 30 are separated from each other. Thus, each semiconductor stack structure 30 can emit light of the target color to meet the light emission requirements of the optical chip. For example, the light-emitting layer 32 can be made of at least one of quantum hydrazine, quantum dots, gallium nitride, organic light-emitting materials, etc. When the first charge carrier is a hole and the second charge carrier is an electron, the first semiconductor layer 33 can be made of a material capable of transporting holes, such as, but not limited to, P-type gallium nitride, P-type gallium arsenide, P-type aluminum gallium indium phosphide, etc., and the second semiconductor layer 31 can be made of a material capable of transporting electrons, such as, but not limited to, N-type gallium nitride, N-type gallium arsenide, N-type aluminum gallium indium phosphide, etc.; conversely, when the first charge carrier is an electron and the second charge carrier is a hole, the first semiconductor layer 33 can be made of a material capable of transporting electrons, but not limited to, the second semiconductor layer 31 can be made of a material capable of transporting holes. The specific materials used can be set according to actual needs and are not specifically limited here. Furthermore, in the embodiments of this application, the device composed of the semiconductor stacked structure 30, the first electrode 40 and the second electrode is not limited to a micro light-emitting diode (μLED), but can also be other light-emitting devices, which can be set according to actual needs, and are not specifically limited here.

[0043] The first electrode 40 is located between the corresponding semiconductor stacked structure 30 and the substrate m1. Further, the first electrode 40 is located between the corresponding semiconductor stacked structure 30 and the driving circuit layer m2. Each first electrode 40 is insulated from the others. The first electrodes 40 are correspondingly arranged with the semiconductor stacked structures 30, such that each semiconductor stacked structure 30 has a first electrode 40 between it and the substrate m1. The material used to fabricate the first electrode 40 may include at least one of the following: Cr, Ti, Al, Pt, Ni, Cu, Ag, Au, CuW, W, TiN, TaN, etc. The specific material can be selected according to actual needs and is not specifically limited here.

[0044] The functional structural component 50 includes: multiple reflective components 51, at least one second electrode 52, and at least one collimation and adjustment layer 53. Each reflective component 51 is correspondingly disposed in one-to-one with each trench C0, such that each trench C0 contains one reflective component 51. The reflective component 51 can be made of any material with reflective function, such as, but not limited to, reflective metal or white glue. Reflective metal includes, but is not limited to, aluminum and silver. White glue can be, but is not limited to, a mixture of alumina nanoparticles, titanium dioxide nanoparticles, and silicone or other adhesives. The specific choice can be made according to the actual situation and is not specifically limited here. Furthermore, the reflective component 51 can be regarded as a structure formed by filling the trench C0 with a material with reflective function. This makes the reflective component 51 easier to manufacture, simplifies the manufacturing process of the optical chip, and reduces the manufacturing cost of the optical chip. In addition, the position between two adjacent trenches C0 can be filled with an insulating component m3, such as... Figure 2 As shown in (c); or, the position between two adjacent trenches C0 can also be filled with reflective components 51, which are not shown in the figure. In this case, each reflective component 51 can be connected to form a whole to fill the gap between trenches C0 and the gap between semiconductor stacked structures 30, so as to achieve dense stacking of each structure.

[0045] The second electrode 52 is disposed on the side of the plurality of reflective components 51 facing away from the substrate m1. The second electrode 52 is connected to at least a portion of the semiconductor stacked structure 30. One second electrode 52 may be provided, and this second electrode 52 is in contact with and connected to the first surface b1 of each semiconductor stacked structure 30 on the side facing away from the substrate m1. In this case, the second electrode 52 can be considered as a common electrode. Figure 2 As shown in (b), the second electrode 52 has multiple first hollow structures G1, which are correspondingly arranged with the semiconductor stacked structure 30. The first hollow structures G1 can expose a portion of the first surface b1 of the corresponding semiconductor stacked structure 30. Alternatively, multiple second electrodes 52 can be provided (not shown), with each second electrode 52, each reflective component 51, and each trench C0 corresponding to each other, such that each second electrode 52 is in contact with and connected to the first surface b1 of the corresponding adjacent semiconductor stacked structure 30. That is, each second electrode 52 is connected to a portion of the semiconductor stacked structure 30. In this case, the second electrode 52 can be considered as a non-common electrode. Therefore, the number of second electrodes 52 can be set according to actual needs and is not limited here. The material used to fabricate the second electrode 52 may include at least one of the following: Cr, Ti, Al, Pt, Ni, Cu, Ag, Au, CuW, W, TiN, TaN, and other metals or metal alloys. Furthermore, the materials used to fabricate the first electrode 40 and the second electrode 52 may be the same or different, and the specific choice can be made according to actual needs; no specific limitation is made here. It should be understood that in... Figure 2 and Figure 3To facilitate the indication of trench C0, only a portion of the reflective component 51, second electrode 52, and collimation layer 53 at trench C0 are shown; not all of these components at every trench C0 are represented. Furthermore, the first electrode 40 can be the anode, and the corresponding second electrode 52 can be the cathode; a common cathode is formed when only one second electrode 52 is provided. Alternatively, the first electrode 40 can be the cathode, and the corresponding second electrode 52 can be the anode; a common anode is formed when only one second electrode 52 is provided.

[0046] The collimation and adjustment layer 53 is disposed on the surface of the second electrode 52 facing away from the substrate m1, such that the reflective component 51 and the collimation and adjustment layer 53 are located on opposite sides of the corresponding second electrode 52; wherein, as Figure 2 As shown in (b), the collimation and modulation layer 53 can be a film layer with multiple second hollow structures G2 and disposed in one layer. In this case, there is one collimation and modulation layer 53. The second hollow structure G2 can expose a part of the first surface b1 of the semiconductor stacked structure 30. The first hollow structure G1 and the second hollow structure G2 are disposed in a one-to-one correspondence and have the same or approximately the same size. The material for manufacturing the collimation and modulation layer 53 can include at least one of black glue and light-absorbing metal. The light-absorbing metal includes, but is not limited to, an alloy formed by any one or more combinations of nickel, chromium, and titanium. That is, the collimation and modulation layer 53 is made of light-absorbing material to absorb stray light in the light emitted by the semiconductor stacked structure 30, thereby achieving collimated light emission and avoiding light crosstalk between adjacent semiconductor stacked structures 30. Therefore, the collimation and modulation layer 53 can play a collimation role similar to that of a microlens, thereby eliminating the need for a microlens. Since the collimation and modulation layer 53 has a simpler structure and lower manufacturing cost compared to a microlens, it can simplify the structure of the optical chip and reduce the manufacturing cost of the optical chip. Of course, the collimation and dimming layer 53 can also be a non-whole layer. In this case, there can be multiple collimation and dimming layers 53, as long as collimation and light emission can be achieved. Whether the collimation and dimming layer 53 is a whole layer is not specifically limited here.

[0047] Furthermore, when the collimation and modulation layer 53 is disposed on the surface of the second electrode 52 facing away from the substrate m1, the lateral dimension of the collimation and modulation layer 53 is positively correlated with the lateral dimension of the second electrode 52, and the lateral dimension of the second electrode 52 is positively correlated with the lateral dimension of the trench C0. Since the lateral dimension of the trench C0 is usually set to be small, the lateral dimension of the collimation and modulation layer 53 is usually also small, thereby making the collimation and modulation layer 53 occupy less space compared with the microlens, freeing up more space for the semiconductor stacked structure 30, thereby effectively increasing the density of the semiconductor stacked structure 30 in the optical chip. If each semiconductor stacked structure 30 is regarded as a pixel, the pixel density in the optical chip can be increased. It should be understood that the lateral dimension of a certain structure in the embodiments of this application can be regarded as the dimension of the structure on the surface of the substrate m1 facing the driving circuit layer m2.

[0048] In addition, the reflective component 51 can be used to reflect the light emitted by the semiconductor stacked structure 30. Combined with the collimation and modulation layer 53, more light can be collimated and emitted, avoiding crosstalk between the light emitted by adjacent semiconductor stacked structures 30, thereby improving the luminous efficiency and luminous effect of the optical chip.

[0049] For example, the thickness h0 of the collimation and modulation layer 53 can be 1 to 6 times the thickness h1 of the semiconductor stacked structure 30, and further, the thickness h0 of the collimation and modulation layer 53 can be 3 to 5 times the thickness h1 of the semiconductor stacked structure 30. The specific thickness can be set according to actual needs and is not specifically limited here. For example, if the thickness h0 of the collimation and modulation layer 53 is too large, the size of the optical chip will be too large, which will hinder the miniaturization design of the optical chip. If the thickness h0 of the collimation and modulation layer 53 is too small, the collimation and light emission effect may be weakened. Therefore, by setting the thickness h0 of the collimation and modulation layer 53 within the above range, the miniaturization design of the optical chip can be realized, and the collimation and light emission effect can also be improved.

[0050] See Figure 4As shown, the surface of the semiconductor stacked structure 30 facing away from the first electrode 40 is referred to as the first surface b1, and the surface of the semiconductor stacked structure 30 facing the first electrode 40 is referred to as the second surface b2. The ratio of the area of ​​the first surface b1 to the area of ​​the second surface b2 can be set to 0.85:1.1 to 1.1:0.85. Further, the ratio of the area of ​​the first surface b1 to the area of ​​the second surface b2 can be set to 0.95:1.05, such that the areas of the first surface b1 and the second surface b2 are approximately the same. The areas of surface b1 and the second surface b2 can be the same, or the area of ​​the first surface b1 can be larger than the area of ​​the second surface b2, or the area of ​​the first surface b1 can be smaller than the area of ​​the second surface b2. Furthermore, the angle α between the sidewall of the semiconductor stacked structure 30 and the surface of the first electrode 40 can be set to 80° to 90°, and further, the angle α between the sidewall of the semiconductor stacked structure 30 and the surface of the first electrode 40 can be set to 85° to 90°, making the sidewall of the semiconductor stacked structure 30 approximately perpendicular to the surface of the first electrode 40. This increases the area of ​​the light-emitting layer in the semiconductor stacked structure 30, thereby increasing the ratio of the area of ​​the light-emitting layer to the area of ​​the optical chip, improving the internal quantum efficiency of the semiconductor stacked structure 30, and thus improving the photoelectric conversion efficiency. Furthermore, when using the same current to drive the semiconductor stacked structure 30, the current density in the semiconductor stacked structure 30 is lower, thereby reducing the heat generated by the optical chip and improving the performance of the optical chip.

[0051] Figure 5 An exemplary schematic diagram of another optical chip structure according to an embodiment of this application is shown below. Figure 5 As shown, the optical chip in this embodiment is similar to that in the aforementioned embodiments. Figures 2 to 4 The structure of the optical chip described in the text is basically similar, except that the collimation and modulation layer 53 also wraps around the side of the second electrode 52, such as... Figure 5 The sides b3 and b4 shown in the diagram allow the collimation and modulation layer 53 to not only cover the surface of the second electrode 52 facing away from the substrate, but also to wrap around the sides b3 and b4 of the second electrode 52. This allows the collimation and modulation layer 53 to absorb more stray light, thereby further improving the collimation and light emission effect. Wherein, if the surface of the second electrode 52 facing away from the substrate is referred to as the upper surface, the sides of the second electrode 52 refer to the surfaces connected to the upper surface and forming a certain angle.

[0052] It should be understood that the optical chip in this embodiment is different from that in the aforementioned embodiments. Figures 2 to 4 The structural similarities of the optical chips described in the previous embodiments can be found in the relevant descriptions, and the repeated parts will not be repeated.

[0053] Figure 6 An exemplary schematic diagram of another optical chip structure according to an embodiment of this application is shown below. Figure 6As shown, the optical chip in this embodiment is similar to that in the aforementioned embodiments. Figures 2 to 5 The structures of the optical chips described in this paper are basically similar, with the difference being that the reflective component 51 includes a first insulating layer 51a and a reflective layer 51b. Exemplarily, both the first insulating layer 51a and the reflective layer 51b are located within corresponding trenches. To avoid overly complex figures, Figure 6 The trench is not labeled. The first insulating layer 51a is disposed between the reflective layer 51b and the trench wall of the corresponding trench, and between the reflective layer 51b and the bottom of the corresponding trench. The first insulating layer 51a is disposed between the reflective layer 51b and the semiconductor stacked structure 30, between the reflective layer 51b and the first electrode 40, and between the reflective layer 51b and the driving circuit layer m2. The first insulating layer 51a isolates the reflective layer 51b from the semiconductor stacked structure 30, from the reflective layer 51b and the first electrode 40, and from the reflective layer 51b and the driving circuit layer m2, respectively.

[0054] The first insulating layer 51a can be made of an insulating, light-transmitting material. This material can include, but is not limited to, organic transparent materials such as polymethyl methacrylate, polyester, polycarbonate, polystyrene, polyimide, and silicone resin, as well as inorganic transparent materials such as silicon dioxide, titanium dioxide, aluminum nitride, aluminum oxide, silicon nitride, zirconium oxide, magnesium fluoride, tantalum oxide, and silicon carbide. The specific material can be selected based on actual needs and is not specifically limited here. Light-transmitting material refers to a material with a light transmittance of 85%. The reflective layer 51b can be made of any material with reflective properties, such as, but not limited to, metals or insulating materials. Metals can include, but are not limited to, aluminum and silver, while insulating materials include, but are not limited to, white glue. The specific material can be selected based on actual needs and is not specifically limited here. Since the first insulating layer 51a is made of an insulating and light-transmitting material, the light emitted by the semiconductor stacked structure 30 can pass through the first insulating layer 51a and be incident on the surface of the reflective layer 51b. The reflective layer 51b can reflect the light incident on its surface and then enter the semiconductor stacked structure 30 through the light-transmitting first insulating layer 51a. This can avoid optical crosstalk between the semiconductor stacked structures 30, thereby further improving the light-emitting efficiency and light-emitting effect of the optical chip.

[0055] For example, the first insulating layer 51a can be a single-layer structure, or the first insulating layer 51a can be a distributed Bragg reflector layer. When the first insulating layer 51a is a distributed Bragg reflector layer, the first insulating layer 51a includes at least one first film layer and at least one second film layer stacked together, wherein the refractive index of the first film layer is less than the refractive index of the second film layer. When at least one of the first film layer and the second film layer is provided in multiple layers, the first film layer and the second film layer are alternately arranged. In this way, a distributed Bragg reflector layer can be formed by the first film layer and the second film layer, which can increase the reflection of light emitted from the sidewalls of the semiconductor stacked structure 30, thereby further avoiding optical crosstalk between adjacent semiconductor stacked structures 30, and also increasing the intensity of light emitted by each semiconductor stacked structure 30, thereby further improving the light emission effect of the optical chip.

[0056] In this embodiment, the thickness of the first insulating layer 51a is not specifically limited. The thickness of the first insulating layer 51a can be set according to actual needs to meet the needs of different application scenarios and improve design flexibility.

[0057] It should be understood that the optical chip in this embodiment is different from that in the aforementioned embodiments. Figures 2 to 5 For any of the optical chips described above that have structural similarities, please refer to the relevant descriptions in the foregoing embodiments; repeated details will not be repeated here.

[0058] Figure 7 and Figure 8 An exemplary schematic diagram of another optical chip structure according to an embodiment of this application is shown below. Figure 7 and Figure 8 As shown, the optical chip in this embodiment is similar to that in the aforementioned embodiments. Figure 6 The structures of the described optical chips are basically similar, with the difference being that the first insulating layer 51a also extends onto the first surface b1 of the semiconductor stacked structure 30 on the side opposite to the substrate m1. Exemplarily, the first insulating layer 51a extends into the first surface b1 and covers the four edges of the first surface b1, such as... Figure 8 As shown, Figure 8The attached figure shows the positional relationship between the semiconductor stacked structure 30 and the first insulating layer 51a from the perspective of the first surface b1. In order to make the first surface b1 clear, only a part of the structure of the first insulating layer 51a extending into the first surface b1 is shown. If the first insulating layer 51a located above the first surface b1 is referred to as the upper extension layer 511, the second electrode 52 wraps the side b5 of the upper extension layer 511 facing the center of the first surface b1. Therefore, even if the first insulating layer 51a extends into the first surface b1, the second electrode 52 can still contact and connect with the first surface b1 of the semiconductor stacked structure 30 by wrapping the side b5 of the upper extension layer 511 facing the center of the first surface b1. This facilitates the injection of charge carriers into the semiconductor stacked structure 30 by the second electrode 52, so as to ensure that the semiconductor stacked structure 30 can emit light. Furthermore, the upper extension layer 511 and the second electrode 52 can form an ODR structure, which can reflect light incident from the semiconductor stacked structure 30 onto its surface, so that the light is reflected back into the semiconductor stacked structure 30, allowing more light to be collimated and emitted, thereby further improving the light-emitting efficiency of the optical chip.

[0059] Wherein, at any edge of the first surface b1, along the first normal direction of that edge (e.g. Figure 8 The length covered by the upper extension layer 511 in the x-direction shown is the first length d1, and the length of the center of two adjacent trenches along the first normal direction is the second length d2. The ratio of the first length d1 to the second length d2 is 1 / 15 to 1 / 4, and further, the ratio of the first length d1 to the second length d2 is 1 / 10 to 1 / 4. The ratio of the first length d1 to the second length d2 can be set according to actual conditions. For example, although the first insulating layer 51a is made of a transparent material, the second electrode 52 needs to wrap the side b5 of the upper extension layer 511 and connect to the first surface b1 of the semiconductor stacked structure 30. A collimation and modulation layer 53 is also provided on the side of the second electrode 52 facing away from the substrate m1. Since the collimation and modulation layer 53 is made of a light-absorbing material, and the light-emitting surface is the side of the semiconductor stacked structure 30 facing away from the substrate m1, if the ratio of the first length d1 to the second length d2 is set large, the area of ​​the light-emitting port k0 will be reduced, thereby reducing the light output. The light-emitting effect of the optical chip is affected by its size. Therefore, to improve the light-emitting effect, the ratio of the first length d1 to the second length d2 can be set smaller. For example, if the ratio of the first length d1 to the second length d2 is set small, the size of the formed ODR structure will be small, which will limit the reflection of light emitted by the semiconductor stacked structure, thus limiting the improvement of light-emitting efficiency. Therefore, to improve the light-emitting efficiency, the ratio of the first length d1 to the second length d2 can be set larger. Based on this, setting the ratio of the first length d1 to the second length d2 within the above range can improve both the light-emitting efficiency and the light-emitting effect.

[0060] The thickness h1 of the upper extension layer 511 can be set from 10nm to 250nm, and can be set according to actual needs, without limitation here. For example, if the thickness h1 of the upper extension layer 511 is set to be large, it will increase the thickness of the optical chip, thereby increasing the size of the optical chip, which is not conducive to the miniaturization design of the optical chip; if the thickness h1 of the upper extension layer 511 is set to be small, the reflection effect of the ODR structure may be weakened, resulting in a decrease in luminous efficiency. Based on this, when the thickness h1 of the upper extension layer 511 is set within a suitable range, both the miniaturization design of the optical chip and the luminous efficiency can be improved.

[0061] It should be understood that the optical chip in this embodiment is different from that in the aforementioned embodiments. Figure 6 The structural similarities of the optical chips described in the previous embodiments can be found in the relevant descriptions, and the repeated parts will not be repeated.

[0062] Figure 9 and Figure 10 An exemplary schematic diagram of another optical chip structure according to an embodiment of this application is shown below. Figure 9 and Figure 10 As shown, the optical chip in this embodiment is similar to that in the aforementioned embodiments. Figures 6 to 8 The structures of any optical chips described herein are basically similar, with the difference being that the first insulating layer 51a also extends onto the second surface b2 of the semiconductor stacked structure 30 facing the substrate m1. Exemplarily, the first insulating layer 51a extends into the second surface b2 and covers the four edges of the second surface b2, such as... Figure 10 As shown, Figure 10The attached figure shows the positional relationship between the semiconductor stacked structure 30 and the first insulating layer 51a from the perspective of the second surface b2. To make the second surface b2 clearer, only a portion of the structure of the first insulating layer 51a extending into the second surface b2 is shown. If the first insulating layer 51a located above the second surface b2 is referred to as the lower extension layer 512, the first electrode 40 wraps the side b6 of the lower extension layer 512 facing the center of the second surface b2. Therefore, even though the first insulating layer 51a extends into the second surface b2 of the semiconductor stacked structure 30, the first electrode 40 can still contact and connect with the second surface b2 of the semiconductor stacked structure 30 by wrapping the side b6 of the lower extension layer 512 facing the center of the second surface b2. This facilitates the injection of charge carriers into the semiconductor stacked structure 30 by the first electrode 40, ensuring that the semiconductor stacked structure 30 can emit light. Furthermore, the lower extension layer 512 and the first electrode 40 can form an ODR structure, which can reflect light incident from the semiconductor stacked structure 30 onto its surface, so that the light is reflected back into the semiconductor stacked structure 30, allowing more light to be collimated and emitted, thereby further improving the light-emitting efficiency of the optical chip.

[0063] Wherein, at any edge of the second surface b2, along the second normal direction of that edge (e.g. Figure 10 The length covered by the lower extension layer 512 in the x-direction shown is the third length d3, and the length along the second normal direction between the centers of two adjacent trenches is the fourth length d4. The ratio of the third length d3 to the fourth length d4 is 1 / 15 to 1 / 4, and further, the ratio of the third length d3 to the fourth length d4 is 1 / 10 to 1 / 4. The ratio of the third length d3 to the fourth length d4 can be set according to the actual situation. For example, if the ratio of the third length d3 to the fourth length d4 is set to be small, the size of the formed ODR structure will be small, and the reflection effect on the light emitted by the semiconductor stacked structure 30 will be limited, thus limiting the improvement of luminous efficiency. Therefore, in order to improve luminous efficiency, the ratio of the third length d3 to the fourth length d4 can be set to be larger.

[0064] The thickness h2 of the lower extension layer 512 can be set from 10nm to 250nm, and can be set according to actual needs, without limitation here. For example, if the thickness h2 of the lower extension layer 512 is set to be large, it will increase the thickness of the optical chip, thereby increasing the size of the optical chip, which is not conducive to the miniaturization design of the optical chip; if the thickness h2 of the lower extension layer 512 is set to be small, the reflection effect of the ODR structure may be weakened, resulting in a decrease in luminous efficiency. Based on this, when the thickness h2 of the lower extension layer 512 is set within a suitable range, both the miniaturization design of the optical chip and the luminous efficiency can be improved.

[0065] It is worth noting that when the semiconductor stacked structure 30 is a six-sided structure, and the first insulating layer 51a extends into the first surface b1 and the second surface b2 of the semiconductor stacked structure 30 respectively, it can cover all six sides of the semiconductor stacked structure 30 and reflect the light emitted from the semiconductor stacked structure 30 from multiple directions, so that more light can achieve collimated light emission, thereby effectively improving the light emission efficiency of the optical chip.

[0066] It should be understood that the optical chip in this embodiment is different from that in the aforementioned embodiments. Figures 6 to 8 The structural similarities of the optical chips described in the previous embodiments can be found in the relevant descriptions, and the repeated parts will not be repeated.

[0067] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this application without departing from the spirit and scope of the embodiments of this application. Therefore, if these modifications and variations to the embodiments of this application fall within the scope of the claims of this application and their equivalents, this application also intends to include these modifications and variations.

Claims

1. An optical chip, characterized in that, include: A substrate, and a plurality of semiconductor stacked structures, a plurality of first electrodes and functional structural components respectively disposed on the substrate; The plurality of first electrodes are disposed corresponding to the plurality of semiconductor stacked structures, and the first electrodes are located between the corresponding semiconductor stacked structure and the substrate; A trench exists between any two adjacent semiconductor stacked structures; The functional structural component includes: multiple reflective components, at least one second electrode, and at least one collimation and dimming layer; The reflective component is disposed corresponding to the groove, and the reflective component is disposed within the groove; The second electrode is disposed on the side of the plurality of reflective components facing away from the substrate, and the second electrode is connected to at least a portion of the semiconductor stacked structure; The collimation and dimming layer is disposed at least on the surface of the second electrode facing away from the substrate.

2. The optical chip as described in claim 1, characterized in that, The collimation and modulation layer also covers the side of the second electrode.

3. The optical chip as described in claim 1 or 2, characterized in that, The materials used to manufacture the collimation and light-adjusting layer include at least one of the following: black glue and light-absorbing metal.

4. The optical chip according to any one of claims 1-3, characterized in that, The thickness of the collimation and modulation layer is 1 to 6 times the thickness of the semiconductor stacked structure.

5. The optical chip according to any one of claims 1-4, characterized in that, The reflective component includes a first insulating layer and a reflective layer. The reflective layer is located within the corresponding trench. The first insulating layer is disposed between the reflective layer and the trench wall, and between the reflective layer and the trench bottom. The first insulating layer is made of a light-transmitting material.

6. The optical chip as described in claim 5, characterized in that, The first insulating layer is a distributed Bragg reflector layer.

7. The optical chip as described in claim 5 or 6, characterized in that, The first insulating layer extends to a first surface of the semiconductor stack structure opposite to the substrate, and the first insulating layer covers the four edges of the first surface.

8. The optical chip as described in claim 7, characterized in that, The length covered at any edge of the first surface along the first normal direction of that edge is the first length, and the length of the center of two adjacent grooves along the first normal direction is the second length. The ratio of the first length to the second length is 1 / 15 to 1 / 4.

9. The optical chip according to any one of claims 5-8, characterized in that, The first insulating layer extends to the second surface of the semiconductor stack structure facing the substrate, and the first insulating layer covers the four edges of the second surface.

10. The optical chip as described in claim 9, characterized in that, The length covered at any edge of the second surface along the second normal direction of that edge is the third length, and the length of the center of two adjacent grooves along the second normal direction is the fourth length. The ratio of the third length to the fourth length is 1 / 15 to 1 / 4.

11. A display device, characterized in that, include: The optical chip as described in any one of claims 1-10.

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