Semiconductor module arrangement and method for producing semiconductor module arrangement
By using a thermal interface material design that includes filler particles and capsules in semiconductor module devices, the problems of thermal interface material pumping and drying are solved, achieving stable heat transfer and cost reduction.
Patent Information
- Application Number
- CN202511223734.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-08-30
- Filing Date
- 2025-08-29
- Publication Date
- 2026-03-13
AI Technical Summary
Existing semiconductor module devices suffer from heat interface material pumping out and drying problems during heat transfer between the substrate and the substrate or heat sink, resulting in reduced heat transfer efficiency. Furthermore, existing sheet thermal conductive layers are costly and difficult to apply.
The design employs multiple filler particles and capsules within a liquid or viscous thermal interface material (TIM). The capsules contain catalysts or free radical initiators, which are activated to form a cross-linked network in the thermal interface material to solidify the layer, ensuring stable heat transfer.
This achieves stability and thermal conductivity of thermal interface materials in semiconductor module devices, avoids heat pumping effects, improves heat transfer efficiency, and reduces production costs.
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Figure CN121666073A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to semiconductor module devices, and to methods for manufacturing semiconductor module devices. Background Technology
[0002] Power semiconductor module devices typically include at least one substrate. The substrate may be disposed on a base plate or a heat sink. Semiconductor devices comprising multiple semiconductor components (e.g., diodes, MOSFETs, JFETs, HEMTs, IGBTs, or any other suitable controllable or uncontrollable semiconductor elements in parallel, half-bridge, or any other configuration) are typically disposed on at least one of at least one substrate. Each substrate typically includes a substrate layer (e.g., a ceramic layer), a first metallization layer deposited on a first side of the substrate layer, and a second metallization layer deposited on a second side of the substrate layer. Semiconductor components are, for example, mounted on the first metallization layer. The second metallization layer may be attached to the base plate or a heat sink.
[0003] Heat generated by semiconductor components is dissipated through the substrate to a base plate or heat sink. A thermally conductive layer is typically placed between the substrate and the base plate or heat sink to effectively conduct heat away from the substrate. Liquid or viscous thermally conductive layers can perfectly adapt to any surface and irregularity, eliminating significant air gaps between the substrate and the base plate or heat sink that could adversely affect heat transfer. However, due to thermal changes that occur during the operation of the semiconductor module device, the liquid thermally conductive layer may unintentionally "pump out" between the substrate and the base plate or heat sink during the operation of the semiconductor module. Furthermore, the liquid thermally conductive layer may unexpectedly dry out during the lifetime of the semiconductor module, causing heat to no longer be effectively transferred away from the substrate. Sheets are also frequently used as an alternative to liquid thermally conductive layers. However, sheet layers are typically quite thick, difficult to apply, and expensive. Furthermore, sheets generally cannot perfectly adapt to any surface and irregularity.
[0004] There is a need for a semiconductor module device that is easy to manufacture at low cost, provides good thermal conductivity between the substrate and the base plate or heat sink, and has increased lifespan. Summary of the Invention
[0005] A power semiconductor module device includes a substrate, a base plate or a heat sink, and a layer disposed between the substrate and the base plate or heat sink, wherein the layer includes a liquid or viscous thermal interface material (TIM), a plurality of filler particles distributed within the liquid or viscous thermal interface material (TIM), and a plurality of capsules distributed within the liquid or viscous thermal interface material (TIM), wherein each of the plurality of capsules includes a catalyst or a free radical initiator, and the plurality of capsules are configured to release the catalyst or free radical initiator when activated.
[0006] A method according to embodiments of the present disclosure includes distributing a layer between a substrate of a semiconductor module device and a substrate or heat sink, wherein the layer includes a liquid or viscous thermal interface material (TIM), a plurality of filler particles distributed within the liquid or viscous thermal interface material (TIM), and a plurality of capsules distributed within the liquid or viscous thermal interface material (TIM), wherein each of the plurality of capsules includes a catalyst or free radical initiator, and the plurality of capsules are configured to release the catalyst or free radical initiator when activated.
[0007] A method according to other embodiments of this disclosure includes: forming a first sublayer on the surface of one of a substrate and a base plate or a heat sink, the first sublayer comprising a liquid or viscous thermal interface material (TIM) and a plurality of filler particles distributed within the liquid or viscous thermal interface material (TIM); forming a second sublayer on the surface of the other of the substrate and the base plate or the heat sink, the second sublayer comprising a catalyst or a free radical initiator; and disposing the substrate on the base plate or the heat sink, wherein the first sublayer and the second sublayer are disposed between the substrate and the base plate or the heat sink such that the first sublayer and the second sublayer are in direct contact with each other.
[0008] The invention can be better understood by referring to the following figures and description. The components in the figures are not necessarily drawn to scale, but are used to emphasize the principles of the invention. Furthermore, in the figures, the same reference numerals denote corresponding components in different views. Attached Figure Description
[0009] Figure 1 A schematic cross-sectional view of a semiconductor module device is shown.
[0010] Figure 2 Schematic illustration Figure 1 A cross-sectional view of a portion of a semiconductor substrate device.
[0011] Figure 3 The illustration schematically depicts a method for manufacturing a semiconductor module apparatus according to embodiments of the present disclosure.
[0012] Figure 4A and 4B Further steps of a method for manufacturing a semiconductor module apparatus according to embodiments of the present disclosure are illustrated schematically.
[0013] Figure 5 The methods according to other embodiments of this disclosure are illustrated schematically. Detailed Implementation
[0014] In the following detailed description, reference is made to the accompanying drawings. The drawings illustrate specific examples in which the invention can be practiced. It should be understood that, unless otherwise specifically indicated, the features and principles described with respect to the various examples can be combined with each other. The designation of certain elements as “first element,” “second element,” “third element,” etc., in the specification and claims should not be construed as an enumeration. Rather, such designation is only used to distinguish different “elements.” That is, for example, the presence of a “third element” does not require the presence of a “first element” and a “second element.” The semiconductor body described herein may be made of (doped) semiconductor material and may be a semiconductor chip or included in a semiconductor chip. The semiconductor body has electrical connection pads and includes at least one semiconductor element having electrodes.
[0015] Figure 1 An exemplary semiconductor module device including a substrate 10 is shown. The substrate 10 includes a dielectric insulating layer 110, a (structured) first metallization layer 111 attached to the dielectric insulating layer 110, and a second metallization layer 112 attached to the dielectric insulating layer 110. The dielectric insulating layer 110 is disposed between the first metallization layer 111 and the second metallization layer 112.
[0016] Each of the first metallization layer 111 and the second metallization layer 112 may be composed of or include one of the following materials: copper; copper alloys; aluminum; aluminum alloys; any other metal or alloy that remains solid during operation of the power semiconductor module device. Optionally, for example, the first metallization layer 111 and / or the second metallization layer 112 may be covered by a thin layer of nickel or silver. Such layers may be formed, for example, using a nickel plating process or a silver plating process. The substrate 10 may be a ceramic substrate, i.e., a substrate in which the dielectric insulating layer 110 is a ceramic (e.g., a thin ceramic layer). The ceramic may be composed of or include one of the following materials: alumina; aluminum nitride; zirconium oxide; silicon nitride; boron nitride; or any other dielectric ceramic. For example, the dielectric insulating layer 110 may be composed of or include one of the following materials: Al2O3, AlN, or Si3N4. For example, the substrate 10 may be, for example, a direct copper bonding (DCB) substrate, a direct aluminum bonding (DAB) substrate, or an active metal bonding (AMB) substrate.
[0017] Typically, one or more semiconductor bodies 20 are disposed on the substrate 10. Each semiconductor body 20 disposed on the substrate 10 may include a diode, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), a JFET (Junction Field-Effect Transistor), a HEMT (High Electron Mobility Transistor), or any other suitable controllable or uncontrollable semiconductor device. One or more semiconductor bodies 20 may form a semiconductor device on the substrate 10. Figure 1 The example shown contains two semiconductor bodies 20. However, any other number of semiconductor bodies 20 is also possible.
[0018] exist Figure 1 In the example shown, substrate 10 is attached to substrate or heat sink 30, wherein a second metallization layer 112 is disposed between dielectric insulating layer 110 and substrate or heat sink 30. Thermally conductive material layer 40 is disposed between second metallization layer 112 and substrate or heat sink 30. Heat generated by semiconductor body 20 can be dissipated to substrate or heat sink 30 through substrate 10 and thermally conductive material layer 40. This is due to... Figure 1 The thick arrow in the image is shown as an example. Figure 1 The second metallization layer 112 of the substrate 10 is a continuous layer. The first metallization layer 111 is... Figure 1 The structured layer in the device shown. In this document, "structured layer" means that the first metallization layer 111 is not a continuous layer, but includes recesses between different portions of the layer. Figure 1 This recess is schematically illustrated. The first metallization layer 111 in the device exemplarily comprises four distinct portions. Different semiconductor bodies 20 may be mounted to the same or different portions of the first metallization layer 111. The different portions of the first metallization layer 111 may not have electrical connections, or may be electrically connected to one or more other portions using electrical connections such as, for example, bonding wires. By way of example only, electrical connections may also include, for example, bonding tapes, connecting plates, or conductor rails. However, the first metallization layer 111 being a structured layer is merely an example. The first metallization layer 111 may also be a continuous layer. According to another example, the substrate 10 may consist only of a dielectric insulating layer 110 and the first metallization layer 111. The second metallization layer 112 may be a continuous layer or a structured layer. However, the second metallization layer 112 may also be omitted.
[0019] The substrate or heat sink 30 may include or be composed of metal. According to one example, the substrate or heat sink 30 includes or is composed of at least one of Al and Cu. According to another example, the substrate or heat sink 30 may be a metal matrix composite (MMC) substrate comprising an MMC material such as AlSiC. Any other suitable material is possible. The substrate or heat sink 30 may also optionally be covered by a thin layer of, for example, nickel or silver. Such a layer may be formed, for example, using a nickel plating process or a silver plating process.
[0020] The materials used for the known thermally conductive layer 40 typically have very low thermal conductivity, which may be unsatisfactory for some applications. Therefore, to further increase the thermal conductivity of layer 40, thermally conductive filler particles 44 can be added to layer 40. This is in Figure 2 The diagram illustrates that, Figure 2 It shows Figure 1 The cross section A of the semiconductor module device.
[0021] Thermally conductive filler particles 44, which can be added to the thermally conductive material layer 40, can be (uniformly) distributed within the layer 40. The thermal conductivity of the filler particles 44 can be greater than that of the surrounding material of the thermally conductive layer 40. For example, the filler particles 44 can have a thermal conductivity of 60 to 400 W / mK, such that the resulting layer 40 having the filler particles 44 can have a thermal conductivity of 1 to 10 W / mK. The filler particles 44 can include, for example, ceramic materials, glass, or metal powder. The maximum size d44 of each filler particle 44 can be equal to or less than the thickness d1 of the layer 40. According to one example, the maximum size d44 of each filler particle 44 can be between 100 nm and 150 μm. The filler particles 44 can all have the same shape and can all have the same size, such as Figure 2 The diagram is schematic. However, this is merely an example. Typically, multiple filler particles 44 may include a first plurality of particles of a first type and a second plurality of particles of a second type. For example, the size of the first type of particles may be smaller or larger than the second type of particles. Figure 2 In the example shown, the filler particles 44 have a circular shape. In this case, the maximum size d44 of each particle corresponds to the diameter of the corresponding particle. However, this is just an example. Typically, each of the multiple filler particles 44 can have any regular or irregular shape.
[0022] Now for reference Figure 3 This illustration schematically depicts a semiconductor module device and a corresponding method for forming the semiconductor module device according to embodiments of the present disclosure. The semiconductor module device includes a substrate 10, a base plate or heat sink 30, and a layer 40 disposed between the substrate 10 and the base plate or heat sink 30. Layer 40 includes a liquid or viscous thermal interface material TIM 42, and is similar to the layer described above. Figure 2 As described, a plurality of filler particles 44 are distributed within a liquid or viscous thermal interface material (TIM) 42. Each filler particle 44 may be composed of a thermally conductive material, wherein the thermal conductivity of the thermally conductive material is greater than that of the liquid or viscous thermal interface material (TIM) 42. For example, the thickness d1 of layer 40 may be between 70 μm and 120 μm, or between 40 μm and 70 μm.
[0023] The thermally conductive layer 40, essentially formed of a liquid or viscous thermal interface material TIM 42, can perfectly adapt to any surface (i.e., surface 61 of the substrate 10 and surface 31 of the substrate or heat sink 30) and any irregularities (protrusions, leads, bumps, gaps, cavities, etc.) that may exist on the respective surfaces 31, 61, ensuring that there are no significant air gaps between the substrate 10 and the substrate or heat sink 30 that could adversely affect heat transfer between them. However, due to thermal changes that occur during the operation of the semiconductor module device, the thermally conductive layer 40 of the liquid or viscous thermal interface material TIM 42 may unintentionally "pump out" between the substrate 10 and the substrate or heat sink 30 during the operation of the semiconductor module. Furthermore, the thermally conductive layer 40 of the liquid or viscous thermal interface material TIM 42 may unexpectedly dry out during the lifetime of the semiconductor module, causing heat to no longer be effectively transferred away from the substrate 10.
[0024] For this purpose, layer 40 also includes a plurality of capsules 46 distributed within a liquid or viscous thermal interface material TIM 42, wherein each of the plurality of capsules 46 includes a catalyst or free radical initiator. The plurality of capsules 46 are configured to release the catalyst or free radical initiator upon activation.
[0025] That is, layer 40 (i.e., thermal interface material TIM 42) is initially liquid or viscous. In this way, the advantages of a liquid or viscous layer are fully utilized. When disposed between substrate 10 and the substrate or heat sink 30, as... Figure 3 As shown, layer 40 can smoothly contact the surface 61 of substrate 10 and the surface 31 of substrate or heat sink 30. In this way, optimal contact is provided between substrate 10 and layer 40, and between layer 40 and substrate or heat sink 30. However, upon activation, a curing process begins. After curing, layer 40 (i.e., thermal interface material TIM 42) is no longer liquid or viscous. In this way, any undesirable pump-out effect during operation of the semiconductor module device can be effectively prevented. Figure 3 The device shown illustrates a layer 40 arranged between the substrate 10 and the substrate or heat sink 30 before the activation of the plurality of capsules 46.
[0026] Each of the plurality of capsules 46 may be a microcapsule, for example, with a diameter d46 between 10 μm and 50 μm. However, other diameters, sizes, or shapes are generally also possible. However, spherical microcapsules are generally easier to manufacture. In addition to the catalyst or free radical initiator, each of the plurality of capsules 46 may also contain a solvent, as well as other small filler particles and / or a small amount of liquid or viscous thermal interface material. The liquid or viscous thermal interface material TIM 42 may include multiple individual polymer chains. For example, the liquid or viscous thermal interface material TIM 42 may include one of a silicone-based polymer, an epoxy molding or potting compound, or an acrylate. The liquid or viscous thermal interface material TIM 42 may also include a crosslinker. When the plurality of capsules 46 are activated and release the catalyst or free radical initiator, the catalyst or free radical initiator is distributed within the thermal interface material TIM 42 and links the crosslinker included in the thermal interface material TIM 42 to the polymer chains of the thermal interface material TIM 42, thereby curing the liquid or viscous thermal interface material TIM 42. In other words, generally speaking, each of the multiple capsules 46 includes a material that, when released from the capsule and in direct contact with the thermal interface material TIM 42, triggers a reaction in which a crosslinking agent is attached to the polymer chain and forms a crosslinked chain network.
[0027] The number of capsules 46 included in layer 40 typically depends on several factors. For example, the number of capsules 46 can depend on the size of each individual capsule, and therefore on the amount of catalyst or radical initiator included in each capsule. The number of capsules also typically depends on the volume of the thermal interface material TIM 42 included in layer 40. The number of capsules 46 can also depend on the specific material used, as this also limits the total amount of catalyst or radical initiator required for complete curing of layer 40.
[0028] A method for forming a semiconductor module device includes disposing a layer 40 between a substrate 10 of the semiconductor module device and a substrate or heat sink 30. Layer 40 includes a liquid or viscous thermal interface material (TIM) 42, a plurality of filler particles 44 distributed within the liquid or viscous thermal interface material (TIM), and a plurality of capsules 46 distributed within the liquid or viscous thermal interface material (TIM), wherein each of the plurality of capsules 46 includes a catalyst or free radical initiator. The plurality of capsules 46 are configured to release the catalyst or free radical initiator upon activation. The plurality of capsules 46 may be configured to be activated under elevated temperature, elevated pressure, or other forms of activation.
[0029] Activation of the plurality of capsules 46 may be performed without any specific additional steps. The plurality of capsules 46 may be configured to be activated under elevated temperature and / or elevated pressure. According to one example, the plurality of capsules 46 are activated when the substrate 10 is pressed toward the substrate or heat sink 30, thereby applying pressure to the layer 40 and to the plurality of capsules 46 included in the layer 40. During the mounting process, when the substrate 10 is disposed on the substrate or heat sink 30, the substrate 10 is typically pressed toward the substrate or heat sink 30 with a certain force. That is, the plurality of capsules 46 may be activated during the process of disposing the substrate 10 on the substrate or heat sink 30, wherein the layer 40 is disposed between the substrate 10 and the substrate or heat sink 30.
[0030] According to another example, multiple capsules 46 are activated when heat is generated in the semiconductor module device during operation. Heat is generated, for example, by means of components disposed on the substrate 10 (e.g., semiconductor body 20), as long as the semiconductor module device continues to operate. As described above, this heat is transferred through the substrate 10 and layer 40 toward the substrate or heat sink 30. That is, layer 40 is automatically heated during operation of the semiconductor module device. Therefore, the activation of multiple capsules 46 occurs when layer 40 is continuously heated. In other words, layer 40 will solidify as long as the semiconductor module device operates in the application, and undesirable pumping effects may no longer occur during subsequent operation of the semiconductor module device. For example, multiple capsules 46 can be activated at temperatures above 100°C, or at temperatures of 150°C or higher. Increased temperatures can also accelerate the curing process. However, many materials are also known to be typically designed to cure at lower temperatures.
[0031] The steps to activate multiple capsules 46 are as follows Figure 4A The diagram is schematically illustrated. For example, when pressure and / or heat are applied, capsule 46 will rupture, and the catalyst or free radical initiator will be released, which will trigger the curing of layer 40. As mentioned above, other forms of activation are generally also possible. Figure 4B The resulting cured layer 50 is schematically shown. The capsules 46 are no longer present in the cured layer 50. If the multiple capsules 46 include a solvent prior to activation, the solvent typically evaporates during the curing (crosslinking) process and is no longer present in the resulting cured layer 50. For example, the catalyst could be a so-called Pt catalyst. The resulting cured layer 50 can be a highly crosslinked solid layer.
[0032] When a layer 40 having a plurality of capsules 46 distributed therein as described above is provided, the method and the resulting apparatus benefit from the advantages of a liquid or viscous layer (e.g., optimal contact between layer 40 and surfaces 31, 61) and a cured layer (e.g., no pumping out during operation). The same advantages can be achieved, and the same problems can be solved by methods according to other embodiments of this disclosure. Reference will be made below. Figure 5 Describe the method.
[0033] like Figure 5 The alternative method shown includes forming a first sublayer 402 on surfaces 31, 61 of one of the substrate 10 and the substrate or heat sink 30. The first sublayer 402 includes a liquid or viscous thermal interface material (TIM) 42 and a plurality of filler particles 44 distributed within the liquid or viscous thermal interface material (TIM) 42. The liquid or viscous thermal interface material (TIM) 42 and the plurality of filler particles 44 distributed within the viscous thermal interface material (TIM) 42 can be similar to those already described above. Instead of providing a plurality of capsules 46 in the first sublayer 402, a second sublayer 404 is formed on the corresponding surface 31, 61 of the other of the substrate 10 and the substrate or heat sink 30. The second sublayer 404 includes a catalyst or free radical initiator. Figure 5 In the example shown, a first sublayer 402 is formed on surface 61 of substrate 10, and a second sublayer 404 is formed on surface 31 of substrate or heat sink 30. However, this is only an example. The first sublayer 402 may also be formed on surface 31 of substrate or heat sink 30, and the second sublayer 404 may be formed on surface 61 of substrate 10.
[0034] The method further includes arranging the substrate 10 on the substrate or heat sink 30, wherein a first sublayer 402 and a second sublayer 404 are arranged between the substrate 10 and the substrate or heat sink 30, such that the first sublayer 402 and the second sublayer 404 are in direct contact with each other. The step of arranging the substrate 10 on the substrate or heat sink 30 is described in detail below. Figure 5 This is schematically shown by arrows. When the first sublayer 402 and the second sublayer 404 come into contact with each other, their materials will mix. This will trigger the curing of the thermal interface material TIM 42, similar to what was described above regarding the activation of the multiple capsules 46.
[0035] When the first sublayer 402 and the second sublayer 404 are still liquid or viscous, they are applied to the corresponding surfaces 31 and 61. That is, the first sublayer 402 and the second sublayer 404 are perfectly adapted to the corresponding surfaces (i.e., surface 61 of the substrate 10 and surface 31 of the substrate or heat sink 30) and any irregularities (protrusions, leads, bumps, gaps, cavities, etc.) that may exist on the corresponding surfaces 31 and 61, such that when the substrate 10 is disposed on the substrate or heat sink 30, there is no significant air gap between the substrate 10 and the substrate or heat sink 30 that could adversely affect heat transfer. However, when the substrate 10 is disposed on the substrate or heat sink 30 at its desired mounting position, the materials of the first sublayer 402 and the second sublayer 404 become in direct contact with each other. The substrate 10 is typically pressed against the substrate or heat sink 30 with a certain amount of force. In this way, the materials of the first sublayer 402 and the second sublayer 404 are mixed, and the curing process is automatically triggered when the substrate 10 is mounted on the substrate or heat sink 30. No additional curing steps are required. The resulting layer is already fully cured while the semiconductor substrate device continues to operate, and pump-out effects may not occur.
[0036] For example, the thickness d3 of the first sublayer 402 can be between 70 μm and 120 μm, or between 40 μm and 70 μm. The thickness d1 of the first sublayer 402 can substantially define the thickness of the resulting cured layer 50. The thickness d2 of the second sublayer 404 can typically be less than the thickness of the first sublayer 402. For example, the thickness d2 of the second sublayer 404 can be less than half, less than one-third, or even less than one-quarter of the thickness d3 of the first sublayer 402. That is, for example, d2
Claims
1. A semiconductor module device, comprising: Substrate (10); Substrate or heat sink (30); as well as Layer (40), said layer being disposed between the substrate (10) and the base plate or heat sink (30), The layer (40) includes a liquid or viscous thermal interface material (TIM) (42), a plurality of filler particles (44) distributed within the liquid or viscous thermal interface material (TIM) (42), and a plurality of capsules (46) distributed within the liquid or viscous thermal interface material (TIM) (42). Each of the plurality of capsules (46) includes a catalyst or free radical initiator, and The plurality of capsules (46) are configured to release the catalyst or free radical initiator when activated.
2. The semiconductor module device according to claim 1, wherein, The plurality of capsules (46) are configured to be activated under elevated temperature and / or elevated pressure.
3. The semiconductor module device according to claim 1, wherein, Each of the plurality of capsules (46) is a microcapsule with a diameter (d46) between 10 μm and 50 μm.
4. The semiconductor module device according to claim 1, wherein, Each of the plurality of capsules (46) also includes a solvent.
5. The semiconductor module device according to any one of claims 1-3, wherein, Each of the plurality of filler particles (44) is composed of a thermally conductive material, wherein the thermal conductivity of the thermally conductive material is greater than that of the liquid or viscous thermal interface material TIM (42).
6. The semiconductor module device according to any one of the preceding claims, wherein, The maximum size (d44) of each of the plurality of filler particles (44) is between 100 nm and 150 μm.
7. The semiconductor module device according to any one of the preceding claims, wherein, The thickness (d1) of the layer (40) is between 70 μm and 120 μm, or between 40 μm and 70 μm.
8. The semiconductor module device according to any one of the preceding claims, wherein, The liquid or viscous thermal interface material TIM(42) comprises multiple individual polymer chains.
9. The semiconductor module device according to any one of the preceding claims, wherein, The liquid or viscous thermal interface material TIM (42) includes one of a silicone-based polymer, an epoxy molding or potting compound, or an acrylate.
10. The semiconductor module device according to claim 9, wherein, The liquid or viscous thermal interface material TIM(42) also includes a crosslinking agent.
11. A method comprising: A layer (40) is disposed between the substrate (10) of the semiconductor module device and the substrate or heat sink (30). The layer (40) includes a liquid or viscous thermal interface material (TIM) (42), a plurality of filler particles (44) distributed within the liquid or viscous thermal interface material (TIM) (42), and a plurality of capsules (46) distributed within the liquid or viscous thermal interface material (TIM) (42). Each of the plurality of capsules (46) includes a catalyst or free radical initiator, and The plurality of capsules (46) are configured to release the catalyst or free radical initiator when activated.
12. The method of claim 11, further comprising activating the plurality of capsules (46) by applying an increased temperature and / or an increased pressure.
13. The method according to claim 12, wherein, When the substrate (10) is pressed toward the substrate or heat sink (30), the plurality of capsules (46) are activated, thereby applying pressure to the layer (40) and to the plurality of capsules (46) included in the layer (40), or The plurality of capsules (46) are activated when heat is generated in the semiconductor module device during operation of the semiconductor module device.
14. The method according to any one of claims 11-13, wherein, The liquid or viscous thermal interface material TIM (42) comprises multiple individual polymer chains and a crosslinking agent, and when the multiple capsules (46) release the catalyst or free radical initiator, the catalyst or free radical initiator links the crosslinking agent to the polymer chains, thereby curing the liquid or viscous thermal interface material TIM (42).
15. A method comprising: A first sublayer (402) is formed on the surface (31, 61) of one of the substrate (10) and the substrate or heat sink (30), the first sublayer (402) comprising a liquid or viscous thermal interface material TIM (42) and a plurality of filler particles (44) distributed within the liquid or viscous thermal interface material TIM (42). A second sublayer (404) is formed on the surface (31, 61) of the other of the substrate (10) and the base plate or heat sink (30), the second sublayer (404) comprising a catalyst or free radical initiator; as well as The substrate (10) is disposed on the substrate or heat sink (30), wherein the first sublayer (402) and the second sublayer (404) are disposed between the substrate (10) and the substrate or heat sink (30) such that the first sublayer (402) and the second sublayer (404) are in direct contact with each other.