A low noise amplifier and radio frequency chip

Abstract

The application belongs to the field of communication technology, and particularly relates to a low-noise amplifier and a radio frequency chip. The low-noise amplifier comprises an input matching circuit, a first amplification circuit, a second amplification circuit, a third amplification circuit, a control circuit, an output matching circuit and an output attenuation circuit. Compared with the prior art, the low-noise amplifier maximally reduces the required switch quantity in the circuit, saves the area of the low-noise amplifier, uses the first MOS tube and the second MOS tube as common source tubes, uses the third MOS tube as a common gate tube, controls the conduction and turn-off of the first MOS tube and the second MOS tube through an external logic control circuit, and when the low-noise amplifier works in the highest gain gear, the first MOS tube and the second MOS tube are simultaneously turned on, and when the gain is reduced, the first MOS tube or the second MOS tube is turned on according to the requirement, so that the power consumption of the low-noise amplifier is lower, the area is smaller, and the band-pass mode echo loss is better.

Description

Technical Field

[0001] This invention relates to the field of communication technology, and in particular to a low-noise amplifier and a radio frequency chip. Background Technology

[0002] With the development of modern 5G communication, there is an increasing demand for terminals to have higher transmission speeds, larger bandwidths, and lower latency. This leads to a significant increase in the complexity of the radio frequency (RF) front-end, which in turn greatly increases power consumption. Since the battery capacity of mobile phones is unlikely to increase significantly in the short term, reducing the power consumption of the RF front-end module is crucial for improving the battery life of 5G phones. The low-noise amplifier, as a constantly active module in the RF front-end, also contributes considerable power consumption.

[0003] To reduce current, it is necessary to strictly control the aspect ratio and bias voltage of the common source transistor in the low-noise amplifier. Therefore, when the current drops to a certain level, reducing the noise figure becomes crucial. However, existing low-noise amplifiers often meet the various gain levels of existing platforms by adding various switching devices. The presence of these switches often introduces additional losses, increasing the noise figure and power consumption of the low-noise amplifier, which fails to meet current communication requirements.

[0004] Therefore, there is an urgent need for a new low-noise amplifier and RF chip to solve the above-mentioned technical problems. Summary of the Invention

[0005] This invention provides a low-noise amplifier and an RF chip, aiming to provide a low-noise amplifier with low power consumption, small area, and excellent bandpass mode return loss.

[0006] In a first aspect, the present invention provides a low-noise amplifier, the low-noise amplifier comprising an input matching circuit, a first amplification circuit, a second amplification circuit, a third amplification circuit, a control circuit, an output matching circuit, and an output attenuation circuit.

[0007] The input terminal of the input matching circuit is used to receive radio frequency signals, and the output terminal of the input matching circuit is connected to the input terminal of the control circuit, the input terminal of the first amplifier circuit, and the input terminal of the second amplifier circuit, respectively.

[0008] The output terminals of the first amplifier circuit and the second amplifier circuit are respectively connected to the input terminal of the third amplifier circuit;

[0009] The output terminal of the control circuit is connected to the input terminal of the output matching circuit, and the output terminal of the third amplification circuit is connected to the input terminal of the output matching circuit; the control circuit is used to control the opening or closing of the bypass path of the low noise amplifier.

[0010] The output terminal of the output matching circuit is connected to the input terminal of the output attenuation circuit, and the output terminal of the output attenuation circuit is used to output a signal.

[0011] The first amplifier circuit includes a first capacitor, a first resistor, a first capacitor adjustment unit, a first MOSFET, and a first inductor; the first terminal of the first capacitor serves as the input terminal of the first amplifier circuit, the second terminal of the first capacitor is connected to the gate of the first MOSFET, the drain of the first MOSFET serves as the output terminal of the first amplifier circuit, the source of the first MOSFET is connected to the first terminal of the first inductor, the second terminal of the first inductor is grounded, the first terminal of the first resistor is connected to the gate of the first MOSFET, the second terminal of the first resistor is used to connect to an external first logic control circuit, the first terminal of the first capacitor adjustment unit is connected to the gate of the first MOSFET, and the second terminal of the first capacitor adjustment unit is connected to the source of the first MOSFET;

[0012] The second amplifier circuit includes a second capacitor, a second resistor, a second capacitor adjustment unit, a second MOSFET, and a second inductor. The first terminal of the second capacitor serves as the input terminal of the second amplifier circuit, the second terminal of the second capacitor is connected to the gate of the second MOSFET, the drain of the second MOSFET serves as the output terminal of the second amplifier circuit, the source of the second MOSFET is connected to the first terminal of the second inductor, the second terminal of the second inductor is grounded, the first terminal of the second resistor is connected to the gate of the second MOSFET, the second terminal of the second resistor is used to connect to an external second logic control circuit, the first terminal of the second capacitor adjustment unit is connected to the gate of the second MOSFET, and the second terminal of the second capacitor adjustment unit is connected to the source of the second MOSFET.

[0013] Preferably, the first capacitor adjustment unit includes a third capacitor, wherein the first end of the third capacitor serves as the first end of the first capacitor adjustment unit, and the second end of the third capacitor serves as the second end of the first capacitor adjustment unit.

[0014] The second capacitor adjustment unit includes a fourth capacitor, the first end of which serves as the first end of the second capacitor adjustment unit, and the second end of which serves as the second end of the second capacitor adjustment unit.

[0015] Preferably, the first amplifier circuit further includes a first diode and a second diode, the anode of the first diode and the cathode of the second diode are interconnected and connected to the gate of the first MOS transistor, and the cathode of the first diode and the anode of the second diode are interconnected and connected to the source of the first MOS transistor.

[0016] The second amplifier circuit further includes a third diode and a fourth diode. The anode of the third diode and the cathode of the fourth diode are connected to each other and connected to the gate of the second MOS transistor. The cathode of the third diode and the anode of the fourth diode are connected to each other and connected to the source of the second MOS transistor.

[0017] Preferably, the third amplifier circuit includes a third MOS transistor, a third resistor, and a fifth capacitor; the source of the third MOS transistor serves as the input terminal of the third amplifier circuit, the drain of the third MOS transistor serves as the output terminal of the third amplifier circuit, the gate of the third MOS transistor is connected to the first terminal of the third resistor and the first terminal of the fifth capacitor, the second terminal of the third resistor is used to connect to an external third logic control circuit, and the second terminal of the fifth capacitor is grounded.

[0018] Preferably, the output matching circuit includes a third inductor, a fourth inductor, a fourth resistor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a first switch, and a second switch; the third inductor and the fourth inductor are coupled to each other, the second end of the third inductor is connected to the first end of the fourth inductor, the second end of the fourth inductor is used to connect to the power supply voltage, the first end of the seventh capacitor is connected to the first end of the third inductor, the first end of the sixth capacitor, and the first end of the fourth resistor, the first end of the seventh capacitor serves as the input terminal of the output matching circuit, the second end of the seventh capacitor is connected to the control terminal of the first switch, the output terminal of the first switch serves as the output terminal of the output matching circuit, the second end of the sixth capacitor is connected to the control terminal of the second switch, the output terminal of the second switch is grounded, the second end of the fourth resistor is connected to the second end of the fourth inductor, the first end of the eighth capacitor is connected to the second end of the third inductor and the first end of the fourth inductor, and the second end of the eighth capacitor is connected to the output terminal of the first switch.

[0019] Preferably, the low-noise amplifier further includes an attenuation suppression unit, the first end of which is connected to the input terminal of the third amplifier circuit, and the second end of which is grounded.

[0020] The attenuation suppression unit includes a ninth capacitor and a fifth resistor. The first end of the ninth capacitor serves as the first end of the attenuation suppression unit, and the second end of the ninth capacitor is connected to the first end of the fifth resistor. The second end of the fifth resistor serves as the second end of the attenuation suppression unit.

[0021] Preferably, the control circuit includes a third switch and a fourth switch; the control terminal of the third switch serves as the input terminal of the control circuit, the output terminal of the third switch serves as the output terminal of the control circuit, the control terminal of the fourth switch is connected to the output terminal of the third switch, and the output terminal of the fourth switch is grounded.

[0022] Preferably, the low-noise amplifier further includes a protection circuit, a tenth capacitor, an eleventh capacitor, and a fifth switch. The first terminal of the protection circuit is connected to the input terminal of the first amplifier circuit and the input terminal of the second amplifier circuit, respectively, and the second terminal of the protection circuit is grounded.

[0023] The protection circuit includes a fifth diode and a sixth diode. The positive terminal of the fifth diode, the negative terminal of the sixth diode, and the control terminal of the fifth switch are connected to each other and serve as the first terminal of the protection circuit. The negative terminal of the fifth diode, the positive terminal of the sixth diode, and the output terminal of the fifth switch are connected to each other and serve as the second terminal of the protection circuit.

[0024] The first terminal of the tenth capacitor is connected to the second terminal of the fourth inductor, and the second terminal of the tenth capacitor is grounded.

[0025] The output terminal of the control circuit is connected to the input terminal of the output matching circuit via the eleventh capacitor in series.

[0026] The control terminal of the fifth switch is connected to the input terminal of the input matching circuit, and the output terminal of the fifth switch is grounded.

[0027] Preferably, the input matching circuit includes a fifth inductor, the first end of which serves as the input terminal of the input matching circuit, and the second end of which serves as the output terminal of the input matching circuit.

[0028] Secondly, the present invention also provides a radio frequency chip, the radio frequency chip comprising a low-noise amplifier as described in any of the above embodiments.

[0029] Compared with existing technologies, the low-noise amplifier proposed in this invention minimizes the number of switches required in the circuit, saving the amplifier's area. It uses the first and second MOSFETs as common-source transistors and the third MOSFET as a common-gate transistor. External logic control circuits control the on / off state of the first and second MOSFETs. When the low-noise amplifier operates at its highest gain level, both MOSFETs are turned on simultaneously. When the gain decreases, either the first or second MOSFET is turned on as needed, and compensation is provided through the first or second capacitor. Simultaneously, the current is reduced and the gain margin is improved through the matching relationship of the coupling inductor in the output matching circuit. A fourth resistor switches the output attenuation to balance the performance of different gain levels. Switchable first and second capacitors optimize input noise matching during low-gain compensation and frequency band switching, resulting in a low-noise amplifier with lower power consumption, smaller area, and better bandpass mode return loss. Attached Figure Description

[0030] The present invention will now be described in detail with reference to the accompanying drawings. The above and other aspects of the present invention will become clearer and more readily understood through the detailed description following the accompanying drawings. In the drawings:

[0031] Figure 1 This is a circuit diagram of a low-noise amplifier provided in an embodiment of the present invention. Detailed Implementation

[0032] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0033] Example 1

[0034] Please refer to Figure 1 The present invention provides a low noise amplifier 100, which includes an input matching circuit 1, a first amplification circuit 2, a second amplification circuit 3, a third amplification circuit 4, a control circuit 5, an output matching circuit 6, and an output attenuation circuit 7.

[0035] The input terminal of the input matching circuit 1 is used to receive radio frequency signals, and the output terminal of the input matching circuit 1 is connected to the input terminal of the control circuit 5, the input terminal of the first amplifier circuit 2, and the input terminal of the second amplifier circuit 3, respectively.

[0036] The output terminals of the first amplifier circuit 2 and the second amplifier circuit 3 are respectively connected to the input terminal of the third amplifier circuit 4;

[0037] The output terminal of the control circuit 5 is connected to the input terminal of the output matching circuit 6, and the output terminal of the third amplification circuit 4 is connected to the input terminal of the output matching circuit 6; the control circuit 5 is used to control the conduction or closure of the bypass path of the low noise amplifier 100; wherein, the control circuit 5 is the bypass path, and the first amplification circuit 2, the second amplification circuit 3 and the third amplification circuit 4 are the amplification paths.

[0038] The output terminal of the output matching circuit 6 is connected to the input terminal of the output attenuation circuit 7, and the output terminal of the output attenuation circuit 7 is used to output a signal.

[0039] The first amplifier circuit 2 includes a first capacitor C1, a first resistor R1, a first capacitor adjustment unit 21, a first MOSFET M1, and a first inductor L1. The first terminal of the first capacitor C1 serves as the input terminal of the first amplifier circuit 2, the second terminal of the first capacitor C1 is connected to the gate of the first MOSFET M1, the drain of the first MOSFET M1 serves as the output terminal of the first amplifier circuit 2, the source of the first MOSFET M1 is connected to the first terminal of the first inductor L1, the second terminal of the first inductor L1 is grounded, the first terminal of the first resistor R1 is connected to the gate of the first MOSFET M1, the second terminal of the first resistor R1 is used to connect to an external first logic control circuit (VGCS1), the first terminal of the first capacitor adjustment unit 21 is connected to the gate of the first MOSFET M1, and the second terminal of the first capacitor adjustment unit 21 is connected to the source of the first MOSFET M1.

[0040] The second amplifier circuit 3 includes a second capacitor C2, a second resistor R2, a second capacitor adjustment unit 31, a second MOSFET M2, and a second inductor L2. The first terminal of the second capacitor C2 serves as the input terminal of the second amplifier circuit 3, the second terminal of the second capacitor C2 is connected to the gate of the second MOSFET M2, the drain of the second MOSFET M2 serves as the output terminal of the second amplifier circuit 3, the source of the second MOSFET M2 is connected to the first terminal of the second inductor L2, the second terminal of the second inductor L2 is grounded, the first terminal of the second resistor R2 is connected to the gate of the second MOSFET M2, the second terminal of the second resistor R2 is used to connect to the second external logic control circuit (VGCS2), the first terminal of the second capacitor adjustment unit 31 is connected to the gate of the second MOSFET M2, and the second terminal of the second capacitor adjustment unit 31 is connected to the source of the second MOSFET M2.

[0041] In this embodiment of the invention, the first capacitor adjustment unit 21 includes a third capacitor C3, the first end of the third capacitor C3 serves as the first end of the first capacitor adjustment unit 21, and the second end of the third capacitor C3 serves as the second end of the first capacitor adjustment unit 21; wherein, the third capacitor C3 is an adjustable capacitor.

[0042] The second capacitor adjustment unit 31 includes a fourth capacitor C4. The first terminal of the fourth capacitor C4 serves as the first terminal of the second capacitor adjustment unit 31, and the second terminal of the fourth capacitor C4 serves as the second terminal of the second capacitor adjustment unit 31. The fourth capacitor C4 is an adjustable capacitor.

[0043] In this embodiment of the invention, the first amplifier circuit 2 further includes a first diode D1 and a second diode D2. The anode of the first diode D1 and the cathode of the second diode D2 are interconnected and connected to the gate of the first MOS transistor M1. The cathode of the first diode D1 and the anode of the second diode D2 are interconnected and connected to the source of the first MOS transistor M1.

[0044] The second amplifier circuit 3 further includes a third diode D3 and a fourth diode D4. The positive terminal of the third diode D3 and the negative terminal of the fourth diode D4 are connected to each other and connected to the gate of the second MOS transistor M2. The negative terminal of the third diode D3 and the positive terminal of the fourth diode D4 are connected to each other and connected to the source of the second MOS transistor M2.

[0045] In this embodiment of the invention, the third amplifier circuit 4 includes a third MOSFET M3, a third resistor R3, and a fifth capacitor C5. The source of the third MOSFET M3 serves as the input terminal of the third amplifier circuit 4, and the drain of the third MOSFET M3 serves as the output terminal of the third amplifier circuit 4. The gate of the third MOSFET M3 is connected to the first terminal of the third resistor R3 and the first terminal of the fifth capacitor C5, respectively. The second terminal of the third resistor R3 is used to connect to the external third logic control circuit (VGCG), and the second terminal of the fifth capacitor C5 is grounded. By controlling the external first logic control circuit (VGCS1), the external second logic control circuit (VGCS2), and the external third logic control circuit (VGCG), the amplification mode and bypass of the low-noise amplifier 100 can be switched.

[0046] In this embodiment of the invention, the output matching circuit 6 includes a third inductor L3, a fourth inductor L4, a fourth resistor R4, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a first switch S1, and a second switch S2; the third inductor L3 and the fourth inductor L4 are coupled to each other, the second end of the third inductor L3 is connected to the first end of the fourth inductor L4, the second end of the fourth inductor L4 is used to connect to the power supply voltage VDD, the first end of the seventh capacitor C7 is connected to the first end of the third inductor L3, the first end of the sixth capacitor C6, and the first end of the fourth resistor R4, respectively, and the seventh capacitor C8... The first terminal of capacitor C7 serves as the input terminal of the output matching circuit 6. The second terminal of the seventh capacitor C7 is connected to the control terminal of the first switch S1, and the output terminal of the first switch S1 serves as the output terminal of the output matching circuit 6. The second terminal of the sixth capacitor C6 is connected to the control terminal of the second switch S2, and the output terminal of the second switch S2 is grounded. The second terminal of the fourth resistor R4 is connected to the second terminal of the fourth inductor L4. The first terminal of the eighth capacitor C8 is connected to the second terminals of the third inductor L3 and the fourth inductor L4, respectively, and the second terminal of the eighth capacitor C8 is connected to the output terminal of the first switch S1. The fourth resistor R4 is an adjustable resistor.

[0047] In this embodiment of the invention, the low-noise amplifier 100 further includes an attenuation suppression unit 9, the first end of which is connected to the input end of the third amplifier circuit 4, and the second end of which is grounded.

[0048] The attenuation suppression unit 9 includes a ninth capacitor C9 and a fifth resistor R5. The first end of the ninth capacitor C9 serves as the first end of the attenuation suppression unit 9, and the second end of the ninth capacitor C9 is connected to the first end of the fifth resistor R5. The second end of the fifth resistor R5 serves as the second end of the attenuation suppression unit 9.

[0049] In this embodiment of the invention, the control circuit 5 includes a third switch S3 and a fourth switch S4; the control terminal of the third switch S3 serves as the input terminal of the control circuit 5, the output terminal of the third switch S3 serves as the output terminal of the control circuit 5, the control terminal of the fourth switch S4 is connected to the output terminal of the third switch S3, and the output terminal of the fourth switch S4 is grounded.

[0050] In this embodiment of the invention, the low-noise amplifier 100 further includes a protection circuit 8, a tenth capacitor C10, an eleventh capacitor C11, and a fifth switch S5. The first end of the protection circuit 8 is connected to the input end of the first amplifier circuit 2 and the input end of the second amplifier circuit 3, respectively, and the second end of the protection circuit 8 is grounded.

[0051] The protection circuit 8 includes a fifth diode D5 and a sixth diode D6. The positive terminal of the fifth diode D5 and the negative terminal of the sixth diode D6 are connected to each other and serve as the first terminal of the protection circuit 8. The negative terminal of the fifth diode D5 and the positive terminal of the sixth diode D6 are connected to each other and serve as the second terminal of the protection circuit 8.

[0052] The first terminal of the tenth capacitor C10 is connected to the second terminal of the fourth inductor L4, and the second terminal of the tenth capacitor C10 is grounded.

[0053] The output terminal of the control circuit 5 is connected to the input terminal of the output matching circuit 6 via the eleventh capacitor C11 connected in series.

[0054] The control terminal of the fifth switch S5 is connected to the input terminal of the input matching circuit 1, and the output terminal of the fifth switch S5 is grounded.

[0055] In this embodiment of the invention, the input matching circuit 1 includes a fifth inductor L5, the first end of the fifth inductor L5 serves as the input terminal of the input matching circuit 1, and the second end of the fifth inductor L5 serves as the output terminal of the input matching circuit 1.

[0056] Specifically, the first MOSFET M1 and the second MOSFET M2 are common source transistors, and the third MOSFET M3 is a common gate transistor. The first MOSFET M1 and the second MOSFET M2 are connected to ground through the first inductor L1 and the second inductor L2. The conduction and turn-off of the first MOSFET M1 and the second MOSFET M2 are controlled by external logic control circuits (VGCS1 and VGCS2), thereby minimizing the number of switches required in the low-noise amplifier 100 and saving the area of ​​the low-noise amplifier 100. The saved area can be used to increase the Q value of the inductor, further optimizing the noise.

[0057] When the low-noise amplifier 100 operates at its highest gain level, the first MOSFET M1 and the second MOSFET M2 are turned on simultaneously. When the gain of the low-noise amplifier 100 decreases, only the first MOSFET M1 or the second MOSFET M2 can be turned on according to actual needs. At this time, compensation is performed by the first capacitor adjustment unit 21 or the second capacitor adjustment unit 31. The first capacitor C1 and the second capacitor C2 are used to compensate for the low gain level and optimize the input noise matching during frequency band switching. At the same time, the coupling matching of the third inductor L3 and the fourth inductor L4 coupled by the output matching circuit 6 reduces the current and improves the gain margin. The fourth resistor R4 is used to switch the output attenuation to balance the different gain level indicators. The first switch S1 and the second switch S2 are used to switch the frequency band to select different output matching.

[0058] Compared with existing technologies, the low-noise amplifier proposed in this invention minimizes the number of switches required in the circuit, saving the area of ​​the low-noise amplifier. The first and second MOSFETs are used as common source transistors, and the third MOSFET is used as a common gate transistor. The conduction and turn-off of the first and second MOSFETs are controlled by an external logic control circuit. When the low-noise amplifier is working at the highest gain level, the first and second MOSFETs are turned on simultaneously. When the gain is reduced, either the first or second MOSFET is turned on as needed. This results in lower power consumption, smaller area, and better bandpass mode return loss of the low-noise amplifier.

[0059] Example 2

[0060] This invention also provides a radio frequency chip, which includes the low-noise amplifier 100 as described in the above embodiments and can achieve the same technical effect. Please refer to the description in the above embodiments, which will not be repeated here.

[0061] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0062] The embodiments of the present invention have been described above with reference to the accompanying drawings. The disclosed embodiments are merely preferred embodiments of the present invention. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many equivalent changes in form without departing from the spirit and scope of the claims of the present invention, and all such changes are within the protection scope of the present invention.

Claims

1. A low-noise amplifier, characterized in that, The low-noise amplifier includes an input matching circuit, a first amplification circuit, a second amplification circuit, a third amplification circuit, a control circuit, an output matching circuit, and an output attenuation circuit. The input terminal of the input matching circuit is used to receive radio frequency signals, and the output terminal of the input matching circuit is connected to the input terminal of the control circuit, the input terminal of the first amplifier circuit, and the input terminal of the second amplifier circuit, respectively. The output terminals of the first amplifier circuit and the second amplifier circuit are respectively connected to the input terminal of the third amplifier circuit; The output terminal of the control circuit is connected to the input terminal of the output matching circuit, and the output terminal of the third amplification circuit is connected to the input terminal of the output matching circuit; the control circuit is used to control the opening or closing of the bypass path of the low noise amplifier. The output terminal of the output matching circuit is connected to the input terminal of the output attenuation circuit, and the output terminal of the output attenuation circuit is used to output a signal. The first amplifier circuit includes a first capacitor, a first resistor, a first capacitor adjustment unit, a first MOSFET, and a first inductor; the first terminal of the first capacitor serves as the input terminal of the first amplifier circuit, the second terminal of the first capacitor is connected to the gate of the first MOSFET, the drain of the first MOSFET serves as the output terminal of the first amplifier circuit, the source of the first MOSFET is connected to the first terminal of the first inductor, the second terminal of the first inductor is grounded, the first terminal of the first resistor is connected to the gate of the first MOSFET, the second terminal of the first resistor is used to connect to an external first logic control circuit, the first terminal of the first capacitor adjustment unit is connected to the gate of the first MOSFET, and the second terminal of the first capacitor adjustment unit is connected to the source of the first MOSFET; The second amplifier circuit includes a second capacitor, a second resistor, a second capacitor adjustment unit, a second MOSFET, and a second inductor. The first terminal of the second capacitor serves as the input terminal of the second amplifier circuit, the second terminal of the second capacitor is connected to the gate of the second MOSFET, the drain of the second MOSFET serves as the output terminal of the second amplifier circuit, the source of the second MOSFET is connected to the first terminal of the second inductor, the second terminal of the second inductor is grounded, the first terminal of the second resistor is connected to the gate of the second MOSFET, the second terminal of the second resistor is used to connect to an external second logic control circuit, the first terminal of the second capacitor adjustment unit is connected to the gate of the second MOSFET, and the second terminal of the second capacitor adjustment unit is connected to the source of the second MOSFET.

2. The low-noise amplifier as described in claim 1, characterized in that, The first capacitor adjustment unit includes a third capacitor, wherein the first end of the third capacitor serves as the first end of the first capacitor adjustment unit, and the second end of the third capacitor serves as the second end of the first capacitor adjustment unit. The second capacitor adjustment unit includes a fourth capacitor, the first end of which serves as the first end of the second capacitor adjustment unit, and the second end of which serves as the second end of the second capacitor adjustment unit.

3. The low-noise amplifier as described in claim 1, characterized in that, The first amplifier circuit further includes a first diode and a second diode. The anode of the first diode and the cathode of the second diode are connected to each other and connected to the gate of the first MOS transistor. The cathode of the first diode and the anode of the second diode are connected to each other and connected to the source of the first MOS transistor. The second amplifier circuit further includes a third diode and a fourth diode. The anode of the third diode and the cathode of the fourth diode are connected to each other and connected to the gate of the second MOS transistor. The cathode of the third diode and the anode of the fourth diode are connected to each other and connected to the source of the second MOS transistor.

4. The low-noise amplifier as described in claim 1, characterized in that, The third amplifier circuit includes a third MOSFET, a third resistor, and a fifth capacitor. The source of the third MOSFET serves as the input terminal of the third amplifier circuit, and the drain of the third MOSFET serves as the output terminal of the third amplifier circuit. The gate of the third MOSFET is connected to the first terminal of the third resistor and the first terminal of the fifth capacitor, respectively. The second terminal of the third resistor is used to connect to an external third logic control circuit, and the second terminal of the fifth capacitor is grounded.

5. The low-noise amplifier as described in claim 1, characterized in that, The output matching circuit includes a third inductor, a fourth inductor, a fourth resistor, a sixth capacitor, a seventh capacitor, an eighth capacitor, a first switch, and a second switch. The third inductor and the fourth inductor are coupled together, and the second end of the third inductor is connected to the first end of the fourth inductor. The second end of the fourth inductor is used to connect to the power supply voltage. The first end of the seventh capacitor is connected to the first end of the third inductor, the first end of the sixth capacitor, and the first end of the fourth resistor. The first end of the seventh capacitor serves as the input terminal of the output matching circuit. The second end of the seventh capacitor is connected to the control terminal of the first switch, and the output terminal of the first switch serves as the output terminal of the output matching circuit. The second end of the sixth capacitor is connected to the control terminal of the second switch, and the output terminal of the second switch is grounded. The second end of the fourth resistor is connected to the second end of the fourth inductor. The first end of the eighth capacitor is connected to the second end of the third inductor and the first end of the fourth inductor. The second end of the eighth capacitor is connected to the output terminal of the first switch.

6. The low-noise amplifier as claimed in claim 1, characterized in that, The low-noise amplifier further includes an attenuation suppression unit, the first end of which is connected to the input terminal of the third amplifier circuit, and the second end of which is grounded. The attenuation suppression unit includes a ninth capacitor and a fifth resistor. The first end of the ninth capacitor serves as the first end of the attenuation suppression unit, and the second end of the ninth capacitor is connected to the first end of the fifth resistor. The second end of the fifth resistor serves as the second end of the attenuation suppression unit.

7. The low-noise amplifier as claimed in claim 1, characterized in that, The control circuit includes a third switch and a fourth switch; the control terminal of the third switch serves as the input terminal of the control circuit, the output terminal of the third switch serves as the output terminal of the control circuit, the control terminal of the fourth switch is connected to the output terminal of the third switch, and the output terminal of the fourth switch is grounded.

8. The low-noise amplifier as described in claim 5, characterized in that, The low-noise amplifier also includes a protection circuit, a tenth capacitor, an eleventh capacitor, and a fifth switch. The first terminal of the protection circuit is connected to the input terminal of the first amplifier circuit and the input terminal of the second amplifier circuit, respectively, and the second terminal of the protection circuit is grounded. The protection circuit includes a fifth diode and a sixth diode. The positive terminal of the fifth diode and the negative terminal of the sixth diode are connected to each other and serve as the first terminal of the protection circuit. The negative terminal of the fifth diode and the positive terminal of the sixth diode are connected to each other and serve as the second terminal of the protection circuit. The first terminal of the tenth capacitor is connected to the second terminal of the fourth inductor, and the second terminal of the tenth capacitor is grounded. The output terminal of the control circuit is connected to the input terminal of the output matching circuit via the eleventh capacitor in series. The control terminal of the fifth switch is connected to the input terminal of the input matching circuit, and the output terminal of the fifth switch is grounded.

9. The low-noise amplifier as claimed in claim 1, characterized in that, The input matching circuit includes a fifth inductor, the first end of which serves as the input terminal of the input matching circuit, and the second end of which serves as the output terminal of the input matching circuit.

10. A radio frequency chip, characterized in that, The radio frequency chip includes a low-noise amplifier as described in any one of claims 1-9.

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