Method for preparing small substrates

Abstract

This invention belongs to the field of chip packaging technology, specifically, a method for fabricating a small substrate. The steps are as follows: A small substrate is placed on a first substrate through a first release layer. A molding compound is used to wrap the small substrate and fill the gaps between it on the first release layer, forming a molding compound layer. Multiple vias are formed in the molding compound layer to expose partial surfaces of the small substrate. Bumps are fabricated on the vias. A second temporary carrier is temporarily bonded to the bumps. The first release layer is debonded, exposing the bottom of the small substrate. RDL lines are fabricated on the exposed bottom of the small substrate. A passivation layer and pads are fabricated on the RDL lines. Then, the second temporary carrier is debonded, exposing the bumps. The remaining structure is cut to separate units containing a single small substrate or units containing multiple small substrates. The small substrate fabrication method proposed in this invention can effectively improve overall integration and reliability.

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