Train logic control system and method

Abstract

The invention relates to the technical field of train logic control, in particular to a train logic control system and method.The train logic control system is characterized in that a main system control system is used for executing a train logic control task and sending a working state signal to a standby system control system in real time based on a preset period; the collection capacitor is used for collecting the leakage current of the electronic switch PMOS in a turn-off state until the voltage is greater than the reference voltage threshold value of the comparator, and then sending a wake-up signal to the standby system control system; the standby system control system is used for sending a release command to the control switch NMOS and monitoring the main system control system based on the working state signal; and the control switch NMOS is used for releasing the charges stored in the collection capacitor to the ground after receiving a release command of the standby system control system, and waiting for the voltage of the collection capacitor to reach a reference voltage threshold next time. By means of low-power-consumption hardware design from bottom to top, dynamic adjustment and heat dissipation optimization are achieved, the low-power-consumption design effect of the LCU system is improved, and an efficient and stable low-power-consumption design solution is provided.

Description

Technical Field

[0001] This invention relates to the field of train logic control technology, specifically to a train logic control system and method. Background Technology

[0002] The train logic control unit (LCU), as the core onboard control equipment of a train, is responsible for train braking control, status monitoring, and command issuance. Its reliability and stability are directly related to train operation safety. However, the LCU is usually installed in an enclosed cabinet on the train, where the internal space is compact, ventilation is limited, and heat dissipation capacity is inherently insufficient.

[0003] In practical applications, continuous high-power operation leads to significant system heat accumulation. Core components such as processors, FPGAs, and MOSFETs are exposed to high temperatures for extended periods, resulting in a noticeable degradation in their electrical performance, a drastically shortened lifespan, and even device failure. This reduces the reliability and stability of the entire LCU system, ultimately impacting normal train operation. Furthermore, the power consumption of onboard equipment directly affects train energy consumption and operating costs. High-power LCUs not only increase power losses but also contradict the industry trend of sustainable development in the rail transit sector. Summary of the Invention

[0004] The purpose of this invention is to provide a train logic control system and method that improves the low-power design effect of the LCU system through bottom-up low-power hardware design, dynamic adjustment and optimized heat dissipation, and provides an efficient and stable low-power design solution.

[0005] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: This invention provides a train logic control system, comprising: a primary control system, a backup control system, an electronic switch PMOS, a leakage current recovery module, and a comparator. The primary control system executes train logic control tasks and sends a working status signal to the backup control system in real time based on a preset cycle. The leakage current recovery module includes a collection capacitor and a control switch NMOS. The collection capacitor collects the leakage current of the electronic switch PMOS in the off state until the voltage of the collection capacitor exceeds the reference voltage threshold of the comparator, and then sends a wake-up signal to the backup control system. Upon receiving the wake-up signal, the backup control system determines whether there is a request to upgrade to the primary system. If so, it sends a release command to the control switch NMOS and monitors the primary control system based on the working status signal; otherwise, it does not respond. Upon receiving the release command from the backup control system, the control switch NMOS releases the charge stored in the collection capacitor to ground and waits for the voltage of the collection capacitor to reach the reference voltage threshold again.

[0006] Optionally, the train logic control system also includes a non-volatile memory, a first high-speed switch chip, and a second high-speed switch chip; the first high-speed switch chip is used to establish a communication link between the primary system core control unit and the non-volatile memory; the second high-speed switch chip is used to establish a communication link between the backup system core control unit and the non-volatile memory.

[0007] Optionally, the backup control system is configured with a sleep mode and a working mode; the backup control system is used to monitor the primary system based on the working status signal, including: when the working status of the primary system is detected to be abnormal, ending the sleep mode and switching to the working mode to take over the execution of train logic control tasks; when the working status of the primary system is detected to be normal, maintaining the sleep mode.

[0008] Optionally, when the backup control system is in working mode, the computing, communication, and drive control functions of the backup control system are turned on; the sleep modes of the backup control system include deep sleep mode, light sleep mode, and pseudo sleep mode; the sleep mode of the backup control system is switched based on the task safety level requirements of the train logic control task. When the backup control system is in sleep mode, it retains the functions of monitoring the operating status signals of the primary control system and receiving wake-up signals. Specifically: when the train logic control task is at a low safety level, the backup control system switches to deep sleep mode, and the computing and drive control functions are turned off; when the train logic control task is at a medium safety level, the backup control system switches to light sleep mode, the computing and drive control functions remain off, and the backup core processing unit DMA module independently participates in data processing; when the train logic control task is at a high safety level, the backup control system switches to pseudo-sleep mode, the drive control function is turned off, the computing and communication functions are turned on, and it participates in data processing except for drive commands.

[0009] Optionally, the system nodes of the train terminal use a star topology NB-IoT communication method to communicate directly with the cloud server or IoT gateway, and the nodes do not communicate with each other.

[0010] Optionally, the train logic control system also includes a fan control module and a fan electrically connected to the fan control module. The fan control module is used to collect the system temperature, fan speed and system power consumption of the train logic control system in real time, and determine the target speed change parameters of the fan based on the system temperature, fan speed and system power consumption, and adjust the fan speed based on the target speed change parameters.

[0011] The present invention also provides a train logic control method applicable to the aforementioned train logic control system, comprising: collecting the leakage current of the electronic switch PMOS in the off state using a collection capacitor until the voltage of the collection capacitor is greater than the reference voltage threshold of the comparator, and then sending a wake-up signal to the backup control system; after receiving the wake-up signal, the backup control system determines whether there is a request to upgrade to the primary system; if so, it sends a release command to the control switch NMOS and monitors the primary control system based on the operating status signal; if not, it does not respond; after receiving the release command from the backup control system, the control switch NMOS releases the charge stored in the collection capacitor to ground and waits for the voltage of the collection capacitor to reach the reference voltage threshold next time.

[0012] Optionally, it also includes: when the primary system performs train logic control tasks, the primary system core control unit writes startup code and logs to non-volatile memory through the first high-speed switch chip; when the backup system takes over to perform train logic control tasks, the backup system core control unit reads startup code and logs from the non-volatile memory in the original primary system through the second high-speed switch chip.

[0013] Optionally, it also includes: the fan control module collects the system temperature, fan speed and system power consumption of the train logic control system in real time; generates the change curves of system temperature, fan speed and system power consumption, performs fitting calculations based on the change curves to obtain the optimal operating point of fan speed as system temperature and system power consumption change; and tests the power consumption of the fan when it operates based on the optimal operating point to determine the final target speed change parameters.

[0014] Optionally, it also includes: after adjusting the fan speed based on the operating point, setting the temperature polling interval based on the temperature data of the train logic control system; after the temperature polling interval is reached, collecting the power consumption data and temperature data of the train logic control system again, and adaptively readjusting the fan speed.

[0015] The beneficial effects of this invention are as follows: 1. The collecting capacitor continuously collects and accumulates the microampere-level leakage current from the PMOS electronic switch in the off state, converting it into an energy source for the wake-up signal of the backup control system. This allows the previously wasted leakage current to perform the function of waking up the backup control system, eliminating the need for an independent power supply or monitoring module for the backup control system's wake-up. After the backup control system is woken up, it quickly releases the charge on the collecting capacitor through the control switch NMOS, resetting the voltage of the collecting capacitor and waiting for the voltage of the collecting capacitor to reach the reference voltage threshold for the next leakage current charging. The entire process from charging to wake-up to discharging relies on the self-energy cycle of the leakage current, requiring no external circuit intervention, ensuring the continuous availability of the backup control system's wake-up function and reducing the power consumption of the train logic control system.

[0016] 2. In related dual-redundancy systems, the backup control system needs to maintain a hot standby state for a long time, resulting in high power consumption. The backup control system of this invention features a gradient mode of deep sleep, light sleep, and pseudo-sleep: in deep sleep mode, the backup control system's computing function is disabled; in light sleep mode, it operates independently using the DMA module, while the CPU core is in sleep mode; in pseudo-sleep mode, it maintains a light load, only participating in auxiliary calculations and not issuing drive commands. The primary control system sends a working status signal based on a preset period. The backup control system switches to the working mode under the conditions of leakage current wake-up and primary control system anomaly, avoiding meaningless high-load operation of the backup control system and overcoming the power waste problem of dual high-load idling in related technologies.

[0017] 3. In related technologies, fans operate at a constant speed or are speed-regulated based on temperature, resulting in a high proportion of fan power consumption in the total system power consumption. Upon system startup, the fan control module collects system temperature, fan speed, and system power consumption in real time, generating curves showing the changes in these three parameters. It then calculates the optimal operating point for fan speed as system temperature and power consumption change. Subsequently, it tests the fan's power consumption during speed regulation, selects the optimal speed regulation parameters, and controls the fan speed based on these target parameters. This not only significantly improves the system's cooling capacity but also effectively reduces the additional power consumption caused by the fan operating at the same speed for extended periods. Attached Figure Description

[0018] Other features, objects, and advantages of the invention will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings. The drawings are for illustrative purposes only and are not intended to limit the invention. Furthermore, the same reference numerals denote the same parts throughout the drawings.

[0019] Figure 1 This is a flowchart of leakage current recovery and wake-up in a train logic control system according to the present invention; Figure 2 This is a flowchart of fan adaptive speed regulation in a train logic control system according to the present invention. Figure 3 This is a flowchart of mode switching and fan adaptive speed regulation in a train logic control system according to the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only one preferred embodiment of this invention and are only used to explain this invention. They do not limit the scope of protection of this invention. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0021] As one implementation method, such as Figure 1 As shown, this invention provides a train logic control system, including: a primary control system, a backup control system, an electronic switch PMOS, a leakage current recovery module, and a comparator. The primary control system is used to execute train logic control tasks and sends working status signals to the backup control system in real time based on a preset period. The primary control system is hereinafter referred to as the primary system, and the backup control system is hereinafter referred to as the backup system.

[0022] The backup system is equipped with a sleep mode and an operating mode. The sleep mode includes a deep sleep mode, a light sleep mode, and a pseudo-sleep mode. The sleep mode of the backup system switches based on the safety level requirements of the train logic control task. When the train logic control task is at a low safety level, the backup system switches to deep sleep mode; when the train logic control task is at a medium safety level, the backup system switches to light sleep mode; and when the train logic control task is at a high safety level, the backup system switches to pseudo-sleep mode.

[0023] When the backup system is in active mode (i.e., backup becomes primary), its computing, communication, and drive control functions are enabled. When the backup system is in sleep mode, it retains the ability to monitor the primary system's operating status signals and receive wake-up signals. Specifically: In deep sleep mode, the backup system's computing and drive control functions are disabled, and all communication, input / output, data acquisition, and computation are shut down; it only monitors the primary system's heartbeat and accepts wake-up signals. In light sleep mode, the backup system's computing and drive control functions remain disabled; the backup system's core processing unit (DMA module) independently participates in data processing, directly performing simple tasks such as data acquisition and on-board serial communication. In pseudo-sleep mode, the backup system's drive control function is disabled, while its computing and communication functions are enabled; it participates in data processing (excluding drive commands) and assists the primary system in calculations, data acquisition, and self-tests.

[0024] The DMA module, or Direct Memory Access, allows peripherals to directly exchange data with memory without the backup CPU's involvement. In light sleep mode, the backup CPU's core computing module is already in sleep mode to conserve energy. At this time, the DMA module can independently complete simple tasks such as onboard serial communication and data acquisition without waking up the backup CPU's core module. This ensures uninterrupted basic data transmission while meeting the low-power requirements of the train's logic control system.

[0025] The backup system is also used to monitor the main system based on the working status signal. If the working status of the main system is detected to be abnormal, the backup system will end the hibernation mode and switch to the working mode to take over the execution of train logic control tasks; if the working status of the main system is detected to be normal, the backup system will maintain the hibernation mode.

[0026] The dynamic power consumption of the train logic control system stems from factors such as signal input / output, redundancy design, and core processing chip read / write calculations. In related technologies, the train logic control unit (LCU) system employs a shared redundancy design, with both the primary and backup systems performing calculations, inputs, and outputs in real time. This embodiment optimizes the primary / backup system's operating strategy to reduce system power consumption without compromising system reliability and stability. In low-power hardware design, optocouplers with high CTR and low saturation voltage drop are preferred. As temperature increases, the CTR decreases, and the minimum trigger current (IF) further increases, leading to higher system power consumption. Choosing a low IF ensures system reliability and noise immunity while keeping the operating current as close to this minimum value as possible, thereby reducing the input-side drive current.

[0027] Furthermore, the traditional switching signal acquisition method is optimized. Since vehicle signal acquisition is used for safety detection and not continuously collected in real time, this embodiment employs a dynamic pulse feedback method. The optocoupler only provides a brief, large current pulse to the input side at the moment signal transmission is needed, remaining off the rest of the time, thus significantly reducing average power consumption. For signals not involving high voltage such as 110V switching signal isolation, digital isolation chips are preferred to reduce overall power consumption.

[0028] Based on the mission's safety requirements, the main system proactively reduces the frequency and voltage after sensing the CPU temperature and load. The train logic control system adopts a low-power design, selecting low-power devices and designing low-power functional modules. SI and PI simulations are used to evaluate circuit losses at the initial design stage, optimizing and reducing useless static losses such as leakage current. At the same time, through clever design of leakage current recovery paths, losses are fully utilized.

[0029] This embodiment dynamically adjusts the working state of the primary and backup systems according to the task safety level requirements of the train logic control mission, replacing the full-power execution during system hot standby. This embodiment sets up multiple sleep modes for the backup system, namely deep sleep mode, light sleep mode, and pseudo-sleep mode. Based on the load requirements of different safety levels, the backup system completes different levels of work. Furthermore, when the backup system is in light sleep mode, data acquisition and communication both utilize the DMA module, significantly reducing the backup system load.

[0030] The leakage current recovery module includes a collection capacitor and a control switch NMOS. The collection capacitor collects the leakage current from the electronic switch PMOS in the off state until its voltage exceeds the comparator's reference voltage threshold, at which point a wake-up signal is sent to the backup system. Upon receiving the wake-up signal, the backup system determines if there is a request to become the primary system. If so, it sends a release command to the control switch NMOS and monitors the primary system based on its operating status signal; otherwise, it does not respond. Upon receiving the release command from the backup system, the control switch NMOS releases the charge stored in the collection capacitor to ground, waiting for the collection capacitor voltage to reach the reference voltage threshold again.

[0031] As one implementation method, refer to Figure 1 In the LCU system, high-power PMOS is used as an electronic switch. In this embodiment, a PMOS with low on-resistance R_DS(on) is selected to reduce dynamic on-state power consumption. Most importantly, the static power consumption, i.e., the leakage current in the off-state, is recovered and reused. For example, this voltage can be used as a wake-up signal for the standby system in sleep mode, or a heartbeat signal for the master system. When the high-power electronic switch PMOS in the system is in the off-state, its inherent leakage current I_LEAKAGE flows from the source PMOS_S to the drain PMOS_D and is connected to the charging circuit of the collector capacitor C_wakeup.

[0032] Since the leakage current is a weak, continuous current, it slowly charges C_wakeup. During this time, the standby system is in sleep mode, waiting for the capacitor voltage to accumulate. As the leakage current continues to charge, the voltage V_Cap across the collector capacitor C_wakeup gradually increases from the initial 0V. This voltage is synchronously input to the non-inverting input of the comparator. When the voltage V_Cap of C_wakeup rises above the comparator's reference voltage V_REF (the preset wake-up voltage), the comparator outputs a high-level wake-up signal. Simultaneously, combined with the system's master-slave competition logic (if the master system malfunctions and the standby system meets the requirements for becoming the master), this wake-up signal triggers the standby system to wake up from sleep mode. After the standby system is woken up and completes its reset, it outputs a control signal to the gate of the NMOS transistor, turning on the NMOS switch to discharge. At this time, the charge stored in the collector capacitor C_wakeup is quickly released to ground (GND) through the NMOS transistor, and V_Cap is pulled back to 0V, preparing for the next leakage current charging and wake-up trigger.

[0033] As system temperature rises, leakage current in system components exacerbates dissipation, such as carrier diffusion and drift, in MOSFETs. This embodiment proposes a leakage current recovery method that cleverly uses a designed method to continuously charge a collection capacitor from previously useless leakage current. This capacitor utilizes the collected energy to perform basic functions, such as wake-up signals, heartbeat maintenance, or memory power supply, thus reducing the power consumption of the train logic control system. The recovered leakage current can be used as a wake-up signal for the backup system. When the collection capacitor is fully charged and the backup system becomes the primary system, the backup system resumes full-power operation and switches to the primary mode, significantly reducing the power consumption of the train logic control system. Furthermore, after taking over, the backup system automatically switches to the primary logic, while the original primary system becomes the backup system and enters hibernation upon recovery, always maintaining a state of "one primary, one backup; one high load, one low power consumption."

[0034] Furthermore, the train logic control system also includes a non-volatile memory, a first high-speed switch chip, and a second high-speed switch chip; the first high-speed switch chip is used to establish a communication link between the primary system core control unit and the non-volatile memory; the second high-speed switch chip is used to establish a communication link between the backup system core control unit and the non-volatile memory.

[0035] It should be noted that the standby system's wake-up is accomplished through the cooperation of the collector capacitor and the control switch NMOS. When the standby system is woken up, the BIOS and operating system will directly execute the boot code for the standby system through the non-volatile memory in the primary system's core processing board. This program reads the latest snapshot file from the storage, directly decompresses and loads it into the memory in the standby system's core processing board, and restores the CPU register settings. Application services will continue in milliseconds, unaffected by delays such as primary / standby switching and standby system initialization. At the same time, after the standby system wakes up, the non-volatile memory will directly import the logs of the primary system before it went offline due to the fault into the standby CPU to complete calculations and analysis, ensuring that the standby system can continue to take over the current tasks. The non-volatile memory is connected to the primary and standby CPUs (or FPGAs, the same below) through two high-speed switch chips. When the system detects that the primary system is about to go offline, the switch switches the non-volatile memory to the primary CPU (default state) and writes the boot code and logs into it; when the standby system wakes up, the switch switches the non-volatile memory back to the standby CPU, and the standby system begins to read the contents of the memory.

[0036] This solution dynamically adjusts the operating status of the primary and backup systems based on external task conditions, replacing the full-power execution required for hot standby. Simultaneously, this patented solution achieves both cold standby power consumption and fast hot standby switching. The system will skip the lengthy startup and initialization process, exhibiting high consistency.

[0037] As one implementation method, since the LCU systems in different carriages need to exchange data to complete their respective control and data acquisition tasks, this embodiment adopts a star topology NB-IoT communication method. All system nodes in each carriage communicate directly with the remote cloud server / IoT gateway, and the nodes do not communicate with each other. If all backup systems are in sleep mode, they will only wake up when the collection capacitor outputs a wake-up signal. After waking up, the backup system will initialize and perform network data transmission and reception as quickly as possible. After communicating with the cloud server or gateway, the NB-IoT will enter standby mode again until the next data interaction requirement. Compared with CAN and Ethernet communication in related technologies, this communication scheme does not require real-time monitoring or continuous online operation, greatly reducing energy loss caused by inter-system communication and lowering system power consumption. Furthermore, based on the low-power hardware board design, the system's network topology is extracted and chip models of the system CPUs are distributed. SI / PI simulations are established to evaluate signal path loss and dielectric loss, optimizing and reducing useless static losses such as leakage current.

[0038] Furthermore, the train logic control system also includes a fan control module and a fan electrically connected to the fan control module. The fan control module is used to collect the system temperature, fan speed and system power consumption of the train logic control system in real time, and determine the target speed change parameters of the fan based on the system temperature, fan speed and system power consumption, and adjust the fan speed based on the target speed change parameters.

[0039] As one implementation method, refer to Figure 2 After system startup, the system first acquires three basic parameters: current system temperature, initial fan speed, and system power consumption, which serve as the basis for subsequent adjustments. The system temperature, fan speed, and system power consumption are monitored in real time. Based on the correlation between these three parameters, a curve showing the change in system temperature, fan speed, and system power consumption is generated. The optimal operating point of the fan speed under the current temperature and power consumption is calculated and fitted, achieving a speed parameter that balances heat dissipation and low fan power consumption. Based on the fitted optimal operating point, the actual power consumption of the fan during dynamic speed changes is tested, and the optimal speed parameter with the lowest power consumption and meeting heat dissipation requirements is selected from multiple candidate speed parameters. According to the selected optimal speed parameter, the fan speed ratio is set, i.e., the fan's operating speed under the current conditions. This forms the adaptive speed control logic at the software level. Simultaneously, the actual operating temperature and power consumption data are fed back to the system startup phase to correct the initial parameters, achieving cyclical optimization of the speed control process.

[0040] As one implementation method, refer to Figure 3The system comprehensively senses its current operating status, including primary CPU load, temperature, and primary / standby system status, serving as the basis for subsequent mode decisions. Based on the sensed system status, it determines whether to trigger primary CPU frequency reduction and voltage reduction or standby system hibernation. If not (determined as normal operating mode): it directly enters the fan speed adaptive step, reducing fan power consumption to the minimum level through speed adjustment. If necessary (determined as low-power mode), it first modifies the operating modes of primary and standby systems by setting CPU registers: primary CPU frequency reduction and standby CPU hibernation, before proceeding with subsequent power consumption acquisition and adjustment processes.

[0041] Upon entering low-power mode, the system continuously monitors its current power consumption and inputs this data into a pre-calculated curve to adaptively adjust fan speed. This ensures adequate cooling while preventing unnecessary high-power operation of the fan. After adjusting the fan speed, a temperature polling interval is set based on the current system temperature: a longer interval for low temperatures and a shorter interval for high temperatures, enabling high-frequency monitoring at high temperatures and low-frequency monitoring at low temperatures. When the set temperature polling time is reached, the system temperature is monitored. If the temperature change exceeds a preset threshold, the new temperature parameters are input into the fitted curve again to recalculate and update the fan status information. This dynamic iterative optimization of fan speed improves system cooling capacity and reduces the additional power consumption caused by prolonged fan operation at the same speed.

[0042] This method proposes a multi-dimensional collaborative low-power train logic control system, including low-power hardware design, dynamic adjustment, and optimized heat dissipation. Through three bottom-up optimization design steps, the low-power design effect of the LCU system is significantly improved, providing an efficient and stable low-power design solution for traditional LCU systems.

[0043] The present invention also provides a train logic control method applicable to the aforementioned train logic control system, comprising: collecting the leakage current of the electronic switch PMOS in the off state using a collection capacitor until the voltage of the collection capacitor is greater than the reference voltage threshold of the comparator, and then sending a wake-up signal to the backup system; after receiving the wake-up signal, the backup system determines whether there is a request to upgrade to the master system; if so, it sends a release command to the control switch NMOS and monitors the master system based on the working status signal; if not, it does not respond; after receiving the release command from the backup system, the control switch NMOS releases the charge stored in the collection capacitor to ground and waits for the voltage of the collection capacitor to reach the reference voltage threshold next time.

[0044] Optionally, it also includes: when the primary system performs train logic control tasks, the primary system core control unit writes startup code and logs to non-volatile memory through the first high-speed switch chip; when the backup system takes over to perform train logic control tasks, the backup system core control unit reads startup code and logs from the non-volatile memory in the original primary system through the second high-speed switch chip.

[0045] Optionally, it also includes: the fan control module collects the system temperature, fan speed and system power consumption of the train logic control system in real time; generates the change curves of system temperature, fan speed and system power consumption, performs fitting calculations based on the change curves to obtain the optimal operating point of fan speed as system temperature and system power consumption change; and tests the power consumption of the fan when it operates based on the optimal operating point to determine the final target speed change parameters.

[0046] Optionally, it also includes: after adjusting the fan speed based on the operating point, setting the temperature polling interval based on the temperature data of the train logic control system; after the temperature polling interval is reached, collecting the power consumption data and temperature data of the train logic control system again, and adaptively readjusting the fan speed.

[0047] Compared with the prior art, the present invention has the following beneficial effects based on the above embodiments: The beneficial effects of this invention are as follows: 1. The collecting capacitor continuously collects and accumulates the microampere-level leakage current from the PMOS electronic switch in the off state, converting it into an energy source for the wake-up signal of the backup control system. This allows the previously wasted leakage current to perform the function of waking up the backup control system, eliminating the need for an independent power supply or monitoring module for the backup control system's wake-up. After the backup control system is woken up, it quickly releases the charge on the collecting capacitor through the control switch NMOS, resetting the voltage of the collecting capacitor and waiting for the voltage of the collecting capacitor to reach the reference voltage threshold for the next leakage current charging. The entire process from charging to wake-up to discharging relies on the self-energy cycle of the leakage current, requiring no external circuit intervention, ensuring the continuous availability of the backup control system's wake-up function and reducing the power consumption of the train logic control system.

[0048] 2. In related dual-redundancy systems, the backup control system needs to maintain a hot standby state for a long time, resulting in high power consumption. The backup control system of this invention features a gradient mode of deep sleep, light sleep, and pseudo-sleep: in deep sleep mode, the backup control system's computing function is disabled; in light sleep mode, it operates independently using the DMA module, while the CPU core is in sleep mode; in pseudo-sleep mode, it maintains a light load, only participating in auxiliary calculations and not issuing drive commands. The primary control system sends a working status signal based on a preset period. The backup control system switches to the working mode under the conditions of leakage current wake-up and primary control system anomaly, avoiding meaningless high-load operation of the backup control system and overcoming the power waste problem of dual high-load idling in related technologies.

[0049] 3. In related technologies, fans operate at a constant speed or are speed-regulated based on temperature, resulting in a high proportion of fan power consumption in the total system power consumption. Upon system startup, the fan control module collects system temperature, fan speed, and system power consumption in real time, generating curves showing the changes in these three parameters. It then calculates the optimal operating point for fan speed as system temperature and power consumption change. Subsequently, it tests the fan's power consumption during speed regulation, selects the optimal speed regulation parameters, and controls the fan speed based on these target parameters. This not only significantly improves the system's cooling capacity but also effectively reduces the additional power consumption caused by the fan operating at the same speed for extended periods.

[0050] The specific embodiments described above are preferred embodiments of a train logic control system and method of this application, and are not intended to limit the specific scope of this application. The scope of this application includes but is not limited to the specific embodiments described above. All equivalent changes made in accordance with the shape and structure of this application are within the protection scope of this application.

Claims

1. A train logic control system, characterized in that, include: The system comprises a primary control system, a backup control system, electronic switches (PMOS), a leakage current recovery module, and a comparator. The primary control system executes train logic control tasks and sends real-time operating status signals to the backup control system based on a preset cycle. The leakage current recovery module includes a collection capacitor and a control switch (NMOS). The collection capacitor collects the leakage current from the electronic switches (PMOS) in the off state until its voltage exceeds the comparator's reference voltage threshold, at which point it sends a wake-up signal to the backup control system. Upon receiving the wake-up signal, the backup control system determines whether there is a request to upgrade to the primary system. If so, it sends a release command to the control switch (NMOS) and monitors the primary control system based on the operating status signal. If not, it does not respond. Upon receiving the release command from the backup control system, the control switch (NMOS) releases the charge stored in the collection capacitor to ground, waiting for the voltage of the collection capacitor to reach the reference voltage threshold again.

2. The train logic control system according to claim 1, characterized in that, The train logic control system also includes a non-volatile memory, a first high-speed switch chip, and a second high-speed switch chip; the first high-speed switch chip is used to establish a communication link between the primary system core control unit and the non-volatile memory; the second high-speed switch chip is used to establish a communication link between the backup system core control unit and the non-volatile memory.

3. A train logic control system according to claim 1, characterized in that, The backup control system is equipped with a sleep mode and a working mode. The backup control system is used to monitor the main system based on the working status signal, including: when the working status of the main system is detected to be abnormal, ending the sleep mode and switching to the working mode to take over the execution of train logic control tasks; when the working status of the main system is detected to be normal, maintaining the sleep mode.

4. A train logic control system according to claim 3, characterized in that, When the backup control system is in working mode, its computing, communication, and drive control functions are activated. The backup control system has three sleep modes: deep sleep mode, light sleep mode, and pseudo-sleep mode. The sleep mode of the backup control system is switched based on the task safety level requirements of the train logic control task. When the backup control system is in sleep mode, it retains the functions of monitoring the operating status signals of the primary control system and receiving wake-up signals. Specifically: when the train logic control task is at a low safety level, the backup control system switches to deep sleep mode, and the computing and drive control functions are turned off; when the train logic control task is at a medium safety level, the backup control system switches to light sleep mode, the computing and drive control functions remain off, and the backup core processing unit DMA module independently participates in data processing; when the train logic control task is at a high safety level, the backup control system switches to pseudo-sleep mode, the drive control function is turned off, the computing and communication functions are turned on, and it participates in data processing except for drive commands.

5. A train logic control system according to claim 4, characterized in that, The system nodes of the train terminal use a star topology NB-IoT communication method to communicate directly with the cloud server or IoT gateway, and the nodes do not communicate with each other.

6. A train logic control system according to claim 1, characterized in that, The train logic control system also includes a fan control module and a fan electrically connected to the fan control module. The fan control module is used to collect the system temperature, fan speed and system power consumption of the train logic control system in real time, and determine the target speed change parameters of the fan based on the system temperature, fan speed and system power consumption, and adjust the fan speed based on the target speed change parameters.

7. A train logic control method, applicable to the train logic control system described in any one of claims 1 to 6, characterized in that, include: The collection capacitor collects the leakage current of the PMOS electronic switch in the off state until the voltage of the collection capacitor is greater than the reference voltage threshold of the comparator, and then sends a wake-up signal to the backup control system. After receiving the wake-up signal, the standby control system determines whether there is a request to upgrade to the main system. If so, it sends a release command to the control switch NMOS and monitors the main control system based on the working status signal; otherwise, it does not respond. After receiving a release command from the backup control system, the NMOS control switch releases the charge stored in the collection capacitor to ground and waits for the voltage of the collection capacitor to reach the reference voltage threshold next time.

8. A train logic control method according to claim 7, characterized in that, Also includes: When the main system is performing train logic control tasks, the main system core control unit writes startup code and logs to non-volatile memory through the first high-speed Switch chip; When the backup system takes over the train logic control task, the backup system core control unit reads the startup code and logs in the non-volatile memory of the original primary system through the second high-speed Switch chip.

9. A train logic control method according to claim 7, characterized in that, Also includes: The fan control module collects real-time data on the system temperature, fan speed, and system power consumption of the train's logic control system. The system generates curves showing the changes in system temperature, fan speed, and system power consumption. Based on these curves, a fitting calculation is performed to obtain the optimal operating point of the fan speed as system temperature and system power consumption change. The test fan is based on its own power consumption when operating at its optimal point to determine the final target speed parameters.

10. A train logic control method according to claim 9, characterized in that, Also includes: After adjusting the fan speed based on the operating point, the interval time for temperature polling is set based on the temperature data of the train logic control system. After the temperature polling interval is reached, the power consumption data and temperature data of the train logic control system are collected again, and the fan speed is adaptively readjusted.

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