Flip-chip LED chip and method for manufacturing the same

Abstract

The application relates to the technical field of optoelectronic manufacturing, and particularly discloses a flip LED chip and a preparation method thereof. The flip LED chip comprises a sapphire substrate, an epitaxial layer, a current blocking layer and a first reflection layer arranged on the front surface of the sapphire substrate; the epitaxial layer is provided with a light-emitting structure; the orthographic projection of the light-emitting structure on the sapphire substrate has a first outer edge and a secondary outer edge; the orthographic projection of the first reflection layer on the sapphire substrate has a second outer edge, the second outer edge is located outside the first outer edge, and the distance between the first outer edge and the second outer edge is greater than or equal to 3 micrometers; the back surface of the sapphire substrate is provided with a reflection structure; the orthographic projection of the reflection structure on the sapphire substrate has a third outer edge close to a light-emitting surface and a fourth outer edge away from the light-emitting surface, the secondary outer edge is located outside the third outer edge, the fourth outer edge is located outside the second outer edge, and the distance between the fourth outer edge and the second outer edge is greater than or equal to 2 micrometers. The application can improve the light-emitting brightness.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic manufacturing technology, and in particular to a flip-chip LED and its fabrication method. Background Technology

[0002] Flip-chip LEDs are widely used due to their advantages such as back-emitting light, good solderability, high thrust, and high reliability. Conventional flip-chip LEDs have rectangular light-emitting layers; in recent years, to make flip-chip LEDs suitable for circular applications like flashlights, some solutions have directly fabricated the light-emitting layer into a circle, but this significantly reduces the brightness of the LED chip. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a flip-chip LED with high luminous brightness.

[0004] Accordingly, the present invention also provides a method for preparing the above-mentioned flip-chip LED.

[0005] To solve the above-mentioned technical problems, the present invention provides a flip-chip LED, which includes a sapphire substrate, an epitaxial layer, a current blocking layer, a first reflective layer, a first insulating layer, a P-type metal interconnect layer, an N-type metal interconnect layer, a second insulating layer, a P-type pad layer and an N-type pad layer stacked on the front side of the sapphire substrate.

[0006] The epitaxial layer comprises an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer sequentially stacked on the sapphire substrate. A light-emitting structure, an isolation trench, and an N-type conductive step are formed on the epitaxial layer. The N-type conductive step is located on one side of the light-emitting structure and exposes the N-type semiconductor layer. The first reflective layer covers the light-emitting structure. The orthographic projection of the light-emitting structure onto the sapphire substrate has a first outer edge and a second outer edge. The orthographic projection of the first reflective layer onto the sapphire substrate has a second outer edge, which is located outside the first outer edge, and the distance between the first outer edge and the second outer edge is ≥3 μm.

[0007] The back side of the sapphire substrate is provided with a reflective structure, and the orthographic projection of the light-emitting structure on the sapphire substrate is located inside the orthographic projection of the reflective structure on the sapphire substrate. The back side of the sapphire substrate has a light-emitting surface, and the reflective structure is arranged around the light-emitting surface.

[0008] The orthogonal projection of the reflective structure onto the sapphire substrate has a third outer edge close to the light-emitting surface and a fourth outer edge away from the light-emitting surface. The second outer edge is located outside the third outer edge; the fourth outer edge is located outside the second outer edge, and the distance between the fourth outer edge and the second outer edge is ≥2μm.

[0009] As an improvement to the above technical solution, along the width direction, the reflective structure includes an inner reflective portion close to the light-emitting surface and an outer reflective portion disposed away from the light-emitting surface;

[0010] The inner reflective portion is oblique in shape, and the orthographic projection of the inner reflective portion on the sapphire substrate has a fifth outer edge, which coincides with the second outer edge.

[0011] The external reflective part is parabolic, spherical, pyramidal, or ellipsoidal in shape.

[0012] As an improvement to the above technical solution, the tilt angle of the inner reflective part is 45°~80°; and / or

[0013] The external reflective part is spherical with a radius of 2μm to 4μm.

[0014] As an improvement to the above technical solution, the distance between the first outer edge and the second outer edge is 3μm~5μm.

[0015] As an improvement to the above technical solution, the distance between the fourth outer edge and the second outer edge is 2μm~4μm.

[0016] As an improvement to the above technical solution, along the thickness direction, the reflective structure includes a reflective pattern and a second reflective layer;

[0017] The second reflective layer comprises an Ag metal layer, a Ni metal layer and a Ti metal layer stacked sequentially, wherein the thickness of the Ag metal layer is 1000 Å to 2000 Å, the thickness of the Ni metal layer is 200 Å to 500 Å, and the thickness of the Ti metal layer is 200 Å to 500 Å.

[0018] As an improvement to the above technical solution, the first reflective layer includes an Ag reflective layer and a protective layer stacked sequentially. The protective layer includes alternating Ti and Ni layers. The thickness of the Ag reflective layer is 1000 Å to 2000 Å, the thickness of the Ti layer is 500 Å to 1500 Å, and the thickness of the Ni layer is 500 Å to 2000 Å.

[0019] As an improvement to the above technical solution, the current blocking layer is a SiO2 layer with a thickness ≥5000Å;

[0020] The first insulating layer is a SiO2 layer with a thickness of 8000Å~10000Å;

[0021] The second insulating layer is a SiO2 layer with a thickness of 8000Å~10000Å.

[0022] Accordingly, the present invention also discloses a method for preparing a flip-chip LED, which includes the following steps:

[0023] (1) An epitaxial layer is formed on the front side of a sapphire substrate, the epitaxial layer comprising an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer sequentially stacked on the sapphire substrate;

[0024] (2) Etching forms multiple N-type conductive steps and isolation trenches that expose the N-type semiconductor layer, forming multiple light-emitting structures disposed on the sapphire substrate;

[0025] (3) A current blocking layer is formed on the N-type conductive step, the isolation groove and the sidewall of the light-emitting structure;

[0026] (4) A first reflective layer is formed on the light-emitting structure to obtain a first intermediate body; wherein the first reflective layer covers the top and sidewalls of the light-emitting structure, as well as the N-type conductive step of a preset width and the isolation groove of a preset width;

[0027] (5) A first insulating layer is formed on the first intermediate body, and a first through hole is formed to expose the first reflective layer and a second through hole is formed to expose the N-type conductive step;

[0028] (6) A P-type metal interconnect layer and an N-type metal interconnect layer are formed on the first insulating layer to obtain a second intermediate;

[0029] (7) A second insulating layer is formed on the second intermediate, and a third through-hole and a fourth through-hole are formed to expose the P-type metal interconnect layer;

[0030] (8) A P-type pad layer and an N-type pad layer are formed on the second insulating layer;

[0031] (9) A reflective structure is formed on the back side of the sapphire substrate.

[0032] As an improvement to the above technical solution, step (9) includes:

[0033] (9.1) A reflective pattern is formed on the back side of the sapphire substrate;

[0034] (9.2) A second reflective layer is formed on the reflective pattern.

[0035] Implementing this invention has the following beneficial effects:

[0036] In one embodiment of the present invention, a reflective structure is disposed on the back side of a sapphire substrate, and the reflective structure is arranged around the light-emitting surface. The orthogonal projection of the light-emitting structure onto the sapphire substrate is controlled to be located inside the orthogonal projection of the reflective structure onto the sapphire substrate. Furthermore, the reflective layer on the front side of the light-emitting structure is controlled to cover a predetermined area. Based on this, not only can light incident outside the light-emitting surface be reflected back to the flip-chip LED through the reflective structure, but the number of reflections of the reflected light within the flip-chip LED can also be reduced, thereby improving the brightness of the flip-chip LED. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of the structure of a flip-chip LED in one embodiment of the present invention;

[0038] Figure 2 This is a schematic diagram of the optical path of a flip-chip LED in one embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram of the structure of the first intermediate after step (5) in one embodiment of the present invention;

[0040] Figure 4 This is a schematic diagram of the structure of the second intermediate after step (7) in one embodiment of the present invention;

[0041] In the diagram, 100 is the sapphire substrate, 121 is the N-type semiconductor layer, 122 is the light-emitting layer, 123 is the P-type semiconductor layer, 124 is the N-type conductive step, 125 is the isolation trench, 126 is the light-emitting structure, 130 is the current spreading layer, 140 is the current blocking layer, 150 is the first reflective layer, 160 is the first insulating layer, 161 is the first via, 162 is the second via, 171 is the P-type metal interconnect layer, 172 is the N-type metal interconnect layer, and 180 is... The second insulating layer, 181 is the third through hole, 182 is the fourth through hole, 191 is the P-type pad layer, 192 is the N-type pad layer, 200 is the reflective structure, 210 is the inner reflective part, 220 is the outer reflective part, 230 is the reflective pattern, 240 is the second reflective layer, 300 is the light-emitting surface, 410 is the first outer edge, 420 is the second outer edge, 430 is the second outer edge, 440 is the third outer edge, 450 is the fourth outer edge, and 460 is the fifth outer edge. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. It is hereby declared that the directional terms such as up, down, left, right, front, back, inside, and outside used in this text are based solely on the accompanying drawings and are not intended to specifically limit the invention.

[0043] Please see Figure 1 ,Figure 2 An embodiment of the present invention provides a flip-chip LED, which includes a sapphire substrate 100, an epitaxial layer, a current blocking layer 140, a first reflective layer 150, a first insulating layer 160, a P-type metal interconnect layer 171, an N-type metal interconnect layer 172, a second insulating layer 180, a P-type pad layer 191 and an N-type pad layer 192 disposed on the front side of the sapphire substrate 100, and a reflective structure 200 disposed on the back side of the sapphire substrate 100.

[0044] In the vertical direction (i.e., the thickness direction of the sapphire substrate 100), the epitaxial layer includes an N-type semiconductor layer 121, a light-emitting layer 122, and a P-type semiconductor layer 123 sequentially stacked on the substrate. A light-emitting structure 126, an isolation trench 125, and an N-type conductive step 124 are formed on the epitaxial layer. The isolation trench 125 is used to separate the sapphire substrate 100 and the epitaxial layer to form multiple flip-chip LEDs. The N-type conductive step 124 is located on one side of the light-emitting structure 126, exposing the N-type semiconductor layer 121, and is used to form electrical connections with the N-type metal interconnect layer 172 and the N-type pad layer 192. The light-emitting structure 126 emits light, and its top is a P-type semiconductor layer 123, which is used to form electrical connections with the P-type metal interconnect layer 171 and the P-type pad layer 191.

[0045] Specifically, the N-type semiconductor layer 121 can be an N-type GaAs layer, an N-type GaN layer, or an N-type AlGaN layer, but is not limited to these. The light-emitting layer 122 can be an InGaN-GaN type multiple quantum well layer, an InGaN-AlGaN type multiple quantum well layer, an AlGaN-AlGaN type multiple quantum well layer, or an AlGaInP-AlGaInP type multiple quantum well layer, but is not limited to these. The P-type semiconductor layer 123 can be a P-type GaN layer, a P-type AlGaInP layer, or a P-type AlGaN layer, but is not limited to these. Preferably, in some embodiments, the N-type semiconductor layer 121 is an N-type GaN layer, the light-emitting layer 122 is an InGaN-GaN type multiple quantum well layer, and the P-type semiconductor layer 123 is a P-type GaN layer.

[0046] Preferably, in some embodiments, a current spreading layer 130 is further disposed on the P-type semiconductor layer 123 at the top of the light-emitting structure 126. This current spreading layer 130 is an ITO layer, an IZO layer, or an AZO layer, but is not limited to these. The projection of the current spreading layer 130 onto the sapphire substrate 100 is located inside the projection of the P-type semiconductor layer 123 onto the substrate. The current spreading layer 130 can enhance current diffusion and avoid current congestion.

[0047] The current blocking layer 140 covers the N-type conductive step 124, the isolation trench 125, and the sidewalls of the light-emitting structure 126. Specifically, the surfaces exposed during the etching process of the light-emitting structure 126, the isolation trench 125, and the N-type conductive step 124 (i.e., the MESA lines) are all covered by the current blocking layer 140. This passivates the dangling bonds formed during MESA etching, improving the reliability of the flip-chip LED. Simultaneously, the current blocking layer 140 also covers the partially exposed P-type semiconductor layer 123 and the current spreading layer 130 at the top of the light-emitting structure 126, which enhances current dispersion and reduces current congestion.

[0048] Specifically, the current blocking layer 140 is composed of SiO2 and SiN. x It may be made of Al2O3, but is not limited to this. The thickness of the current blocking layer 140 is ≥5000 Å. Preferably, in some embodiments, the current blocking layer 140 is made of SiO2 with a thickness of 5000 Å to 8000 Å.

[0049] The first reflective layer 150 is located on the light-emitting structure 126, and it transmits light emitted by the light-emitting layer 122 so that the light is emitted from one side of the sapphire substrate 100. The first reflective layer 150 covers the top and sidewalls of the light-emitting structure 126, and covers an N-type conductive step 124 of a predetermined width and an isolation groove 125 of a predetermined width. That is, the orthographic projection of the light-emitting structure 126 on the sapphire substrate 100 is located inside the orthographic projection of the first reflective layer 150 on the sapphire substrate 100. Furthermore, the orthographic projection of the light-emitting structure 126 onto the sapphire substrate 100 has a first outer edge 410 and a second outer edge 420, and the orthographic projection of the first reflective layer 150 onto the sapphire substrate 100 has a second outer edge 430. The second outer edge 430 is located outside the first outer edge 410, and the distance between the first outer edge 410 and the second outer edge 430 is ≥3μm. Based on this, the light reflected by the reflective structure 200 on the back side of the sapphire substrate 100 can be reflected and emitted from the light-emitting surface 300, thereby effectively improving the light extraction efficiency and increasing the brightness of the flip-chip LED.

[0050] Specifically, the distance between the first outer edge 410 and the second outer edge 430 (i.e. Figure 1 L1) refers to the distance between the two in the width direction of the flip-chip LED, which can be 3μm to 6μm, and exemplary values ​​are 3.2μm, 3.6μm, 4μm, 4.4μm, 4.8μm, 5.2μm or 5.6μm, but are not limited thereto. Preferably, it is 3μm to 5μm, and more preferably, it is 3.5μm to 5μm.

[0051] Specifically, the first reflective layer 150 may be a DBR reflective layer or a metal reflective layer, but is not limited thereto. Preferably, in some embodiments, the first reflective layer 150 is a stacked structure formed by one or at least two of Ag reflective layers, Al reflective layers, or Au reflective layers, but is not limited thereto. The thickness of the first reflective layer 150 is 1000 Å to 3000 Å. Preferably, in some embodiments, the first reflective layer 150 includes an Ag reflective layer and a protective layer sequentially stacked on the light-emitting structure 126, wherein the thickness of the Ag reflective layer is 1000 Å to 2000 Å, exemplary of 1200 Å, 1400 Å, 1600 Å, or 1800 Å, but is not limited thereto. The protective layer may be one or more of a Ni metal layer, a TiW alloy layer, or a Pt / Pd alloy layer, but is not limited thereto. The thickness of the protective layer is 5000 Å to 30000 Å. Preferably, in some embodiments, the protective layer comprises alternating layers of Ti and Ni, with a period number of 2 to 5. The thickness of a single Ti layer is 500 Å to 1500 Å, exemplarily 600 Å, 800 Å, 1000 Å, 1200 Å, or 1400 Å, but not limited thereto. The thickness of a single Ni layer is 500 Å to 2000 Å, exemplarily 800 Å, 1100 Å, 1400 Å, 1700 Å, or 1900 Å, but not limited thereto. More preferably, the thickness of the Ag reflective layer is 1500 Å to 2000 Å, the thickness of a single Ti layer is 500 Å to 1000 Å, and the thickness of a single Ni layer is 1000 Å to 2000 Å.

[0052] Specifically, see Figure 1 , Figure 3 The first insulating layer 160 covers the current blocking layer 140 and the first reflective layer 150, and a first through-hole 161 exposing the first reflective layer 150 and a second through-hole 162 exposing the N-type conductive step 124 are formed on the first insulating layer 160. Specifically, the first insulating layer 160 is a SiO2 layer or a SiN layer. x The first insulating layer 160 is a stacked structure composed of one or more of the following: an Al2O3 layer, but is not limited thereto. The thickness of the first insulating layer 160 is 6000 Å to 12000 Å. Preferably, in some embodiments, the first insulating layer 160 is a SiO2 layer with a thickness of 8000 Å to 10000 Å.

[0053] Specifically, both the P-type metal connection layer 171 and the N-type metal connection layer 172 are disposed above the first insulating layer 160. The P-type metal connection layer 171 contacts the first reflective layer 150 through the first through-hole 161, and the N-type metal connection layer 172 contacts the N-type conductive step 124 through the second through-hole 162. Both the P-type metal connection layer 171 and the N-type metal connection layer 172 are common single-layer or multi-layer metal structures in the art, and for example, they can be made of one or more of Cr, Al, Ti, Pt, Ni, Au, Cu, and Ag, but are not limited thereto. Preferably, in some embodiments, both the P-type metal bonding layer 171 and the N-type metal bonding layer 172 include sequentially stacked Cr layer, Al layer, Ti layer, Pt layer, Ti layer, Pt layer, Ti layer, Au layer, Pt layer and Ti layer, with thicknesses of 30Å~50Å, 1200Å~2000Å, 500Å~1000Å, 1000Å~2000Å, 500Å~1000Å, 1000Å~2000Å, 500Å~1000Å, 10000Å~15000Å, 2000Å~3000Å ​​and 30Å~50Å.

[0054] Specifically, see Figure 1 , Figure 4 The second insulating layer 180 covers the P-type metal interconnect layer 171, the N-type metal interconnect layer 172, and the first insulating layer 160. A third through-hole 181 exposing the P-type metal interconnect layer 171 and a fourth through-hole 182 exposing the N-type metal interconnect layer 172 are formed on the second insulating layer 180. Specifically, the second insulating layer 180 is a SiO2 layer or a SiN layer. x The structure is a stacked structure composed of one or more of the following: an Al2O3 layer, but is not limited thereto. Preferably, in some embodiments, the second insulating layer 180 is a SiO2 layer with a thickness of 8000 Å to 12000 Å.

[0055] The P-type pad layer 191 can be disposed above the second insulating layer 180 and contact the P-type metal connection layer 171 through the third through-hole 181, or it can be entirely disposed within the third through-hole 181, but is not limited thereto. Similarly, the N-type pad layer 192 can be disposed above the second insulating layer 180 and contact the N-type metal connection layer 172 through the fourth through-hole 182, or it can be entirely disposed within the fourth through-hole 182, but is not limited thereto. Specifically, the P-type pad layer 191 and the N-type pad layer 192 are common metal pad structures in the art, such as a stacked structure composed of one or more of Ti, Sn, Ni, Au, etc., but are not limited thereto. Preferably, both the P-type pad layer 191 and the N-type pad layer 192 include Ti layer, Al layer, Ti layer, Pt layer, Ni layer and Au layer stacked sequentially, with thicknesses of 1000Å~2000Å, 10000Å~15000Å, 1000Å~2000Å, 1000Å~2000Å, 8000Å~12000Å and 300Å~600Å, respectively.

[0056] The sapphire substrate 100 has a reflective structure 200 and a light-emitting surface 300 on its back side. The orthographic projection of the light-emitting structure 126 on the sapphire substrate 100 is located inside the orthographic projection of the reflective structure 200 on the sapphire substrate 100. The reflective structure 200 is arranged around the light-emitting surface 300. Based on this structure, light emitted by the light-emitting layer 122 that is directed outside the light-emitting surface 300 can be reflected back to the flip-chip LED by the reflective structure 200, and then reflected by the first reflective layer 150 before being emitted through the light-emitting surface 300, thereby effectively improving the light extraction efficiency.

[0057] More specifically, the orthogonal projection of the reflective structure 200 onto the sapphire substrate 100 has a third outer edge 440 close to the light-emitting surface and a fourth outer edge 450 distant from the light-emitting surface, with a secondary outer edge 420 located outside the third outer edge 440; the fourth outer edge 450 is located outside the second outer edge 430, and the distance between the fourth outer edge 450 and the second outer edge 430 (i.e., Figure 1 The light intensity (L2) is ≥2μm. Based on this, not only can light incident on surfaces outside the light-emitting surface 300 be reflected back to the flip-chip LED through the reflective structure 200, but the number of reflections of the reflected light within the flip-chip LED can also be reduced, thus improving the brightness of the flip-chip LED. It should be noted that if the reflective structure 200 is not controlled, the light reflected back by the reflective structure 200 may undergo multiple reflections within the flip-chip LED. These multiple reflections consume light energy, reducing the brightness, and may also cause light dissipation during the multiple reflections, leading to heat generation in the flip-chip LED. This application, through the above-mentioned control, effectively reduces the number of reflections and improves the brightness.

[0058] Specifically, the distance between the fourth outer edge 450 and the second outer edge 430 refers to the distance between them in the width direction of the flip-chip LED, which can be 2μm to 5μm, and exemplary values ​​are 2.4μm, 2.8μm, 3.2μm, 3.6μm, 4μm, 4.4μm or 4.8μm, but is not limited thereto. Preferably, it is 2μm to 4μm.

[0059] Preferably, in some embodiments, along the width direction of the flip-chip LED, the reflective structure 200 includes an inner reflective portion 210 near the light-emitting surface 300 and an outer reflective portion 220 away from the light-emitting surface 300. The inner reflective portion 210 is inclined, and its orthographic projection onto the sapphire substrate 100 has a fifth outer edge 460, which coincides with the second outer edge 420. It should be noted that the other edge of the orthographic projection of the inner reflective portion 210 onto the sapphire substrate 100 is the third outer edge 440, which is located inside the second outer edge 420. The outer reflective portion 220 is parabolic, spherical, pyramidal, or ellipsoidal. Based on this, the number of light reflections can be further reduced, and the emitted light brightness can be improved.

[0060] More specifically, the tilt angle of the inner reflector 210 ( Figure 1 The angle of inclination (α) is 45° to 80°, exemplarily 48°, 53°, 60°, 65°, 70° or 78°, but not limited thereto. Preferably it is 45° to 60°. When the tilt angle of the inner reflector 210 is within this range, the light emission from the light-emitting surface 300 is more uniform.

[0061] Preferably, in some embodiments, the outer reflective portion 220 is spherical, that is, it is composed of multiple hemispheres distributed in an array, and its radius is 2μm~4μm. Based on this structure, not only can the number of reflections of the light reflected by the reflective structure 200 inside the flip LED chip be greatly reduced, thus improving the luminous brightness, but the luminous uniformity can also be effectively improved.

[0062] Specifically, the reflective structure 200 may be a reflective layer formed on the back side of the sapphire substrate 100, such as a DBR reflective layer, a metal reflective layer, etc., but is not limited thereto. Preferably, in some embodiments, along the thickness direction of the flip-chip LED, the reflective structure 200 includes a reflective pattern 230 and a second reflective layer 240. The reflective pattern 230 is formed on the sapphire substrate 100, specifically by an etching process, but is not limited thereto. The second reflective layer 240 may be a DBR reflective layer or a metal reflective layer, but is not limited thereto. Preferably, in some embodiments, the second reflective layer 240 includes an Ag metal layer, a Ni metal layer, and a Ti metal layer stacked sequentially. The thickness of the Ag metal layer is 1000 Å to 2000 Å, exemplary of 1100 Å, 1300 Å, 1500 Å, 1700 Å, or 1900 Å, but is not limited thereto. Preferably, it is 1500 Å to 2000 Å. The thickness of the Ni metal layer is 200 Å to 500 Å, exemplarily 250 Å, 300 Å, 350 Å, 400 Å, or 450 Å, but not limited thereto. Preferably, it is 300 Å to 500 Å. The thickness of the Ti metal layer is 200 Å to 500 Å, exemplarily 250 Å, 300 Å, 350 Å, 400 Å, or 450 Å, but not limited thereto. Preferably, it is 400 Å to 500 Å.

[0063] Specifically, the flip-chip structure described above in this application is applicable to both traditional square flip-chips and circular flip-chips, but is not limited thereto. Preferably, in some embodiments, the flip-chip is circular. It should be noted that the shape of the flip-chip in this application refers to the shape of the cross-section of the light-emitting structure after etching to form the N-type conductive steps 124 and the isolation trench. For example, circular means that the cross-section of the light-emitting structure is circular after etching. The overall shape of the flip-chip can be circular or square, but is not limited thereto.

[0064] Accordingly, the present invention also discloses a method for preparing a flip-chip LED, which specifically includes the following steps:

[0065] (1) An epitaxial layer is formed on the front side of a sapphire substrate;

[0066] Specifically, an epitaxial layer is obtained by sequentially forming an N-type semiconductor layer 121, a light-emitting layer 122, and a P-type semiconductor layer 123 on a sapphire substrate 100 using methods such as MOCVD, MBE, and PVD.

[0067] (2) Etching forms multiple N-type conductive steps and isolation trenches that expose N-type semiconductor layers, forming multiple light-emitting structures on the sapphire substrate;

[0068] Specifically, a mask (photoresist layer or SiO2 layer) can be formed on the epitaxial layer first, and then the P-type semiconductor layer 123, the light-emitting layer 122 and the N-type semiconductor layer 121 of a predetermined thickness in the preset area can be removed by wet etching or dry etching to form an N-type conductive step 124, an isolation trench 125 and a light-emitting structure 126, but it is not limited to this.

[0069] Preferably, in some embodiments, after etching to form the N-type conductive step 124 and the isolation trench 125, a current spreading layer 130 is formed on the surface of the N-type conductive step 124, the isolation trench 125 and the light-emitting structure 126. Then, photolithography is used to etch away the current spreading layer 130 on the sidewall of the N-type conductive step 124, the isolation trench 125 and the light-emitting structure 126, leaving only the current spreading layer 130 on the P-type semiconductor layer 123.

[0070] (3) A current blocking layer is formed on the sidewalls of the N-type conductive step, the isolation groove, and the light-emitting structure;

[0071] Specifically, in some implementations, the current blocking layer 140 is formed by PECVD, and then the current blocking layer 140 above the P-type semiconductor layer 123 / current spreading layer 130 is removed by photolithography etching.

[0072] (4) A first reflective layer is formed on the light-emitting structure to obtain the first intermediate;

[0073] Specifically, the first reflective layer 150 can be obtained by forming a metal stack through electron beam evaporation or PVD processes, but is not limited to this.

[0074] Preferably, in some embodiments, a photoresist layer is first formed using negative photoresist, and then the photoresist layer on the light-emitting structure 126, the photoresist layer of a predetermined width on the N-type conductive step 124, and the photoresist layer of a predetermined width on the isolation trench 125 are removed by exposure and development. Then, multiple metals are sequentially deposited by electron beam evaporation to form a first reflective layer 150. Then, the metals located on the photoresist layer are removed by blue film stripping process, and finally the photoresist layer is removed.

[0075] (5) A first insulating layer is formed on the first intermediate body, and a first through hole exposing the first reflective layer and a second through hole exposing the N-type conductive step are formed;

[0076] Specifically, the first insulating layer 160 can be formed by processes such as ALD, PECVD, and LPCVD, and then etched to form the first through hole 161 and the second through hole 162, but it is not limited to this.

[0077] Preferably, in some embodiments, a SiO2 layer is formed on the first intermediate by PECVD to obtain the first insulating layer 160. Then, a photoresist layer is formed on the first insulating layer 160, the first insulating layer 160 in a predetermined area is exposed by exposure and development, and then the first via 161 and the second via 162 are etched, and then the photoresist layer is removed.

[0078] (6) A P-type metal interconnect layer and an N-type metal interconnect layer are formed on the first insulating layer to obtain a second intermediate;

[0079] Specifically, metal stacks can be formed through electron beam evaporation or PVD processes to obtain a P-type metal interconnect layer 171 and an N-type metal interconnect layer 172, but are not limited to these methods.

[0080] Preferably, in some embodiments, a photoresist layer is first formed in the first insulating layer 160, the first through hole 161, and the second through hole 162. Then, the photoresist layer in the preset area is removed by exposure and development. Then, a metal stack is deposited by electron beam evaporation to form a P-type metal interconnect layer 171 and an N-type metal interconnect layer 172. Then, the metal on the photoresist layer is removed by blue film stripping. Finally, the photoresist layer is removed to obtain the second intermediate.

[0081] (7) A second insulating layer is formed on the second intermediate, and a third through hole and a fourth through hole are formed to expose the P-type metal interconnect layer and the N-type metal interconnect layer, respectively.

[0082] Specifically, the second insulating layer 180 can be formed by processes such as ALD, PECVD, and LPCVD, and then the third through hole 181 and the fourth through hole 182 can be etched, but it is not limited to this.

[0083] Preferably, in some embodiments, a SiO2 layer is first formed on the second intermediate by PECVD as the second insulating layer 180. Then, a photoresist layer is formed on the second insulating layer 180, and the second insulating layer 180 in a predetermined area is exposed by exposure and development. Then, a third via 181 and a fourth via 182 are etched, and then the photoresist layer is removed.

[0084] (8) A P-type pad layer and an N-type pad layer are formed on the second insulating layer.

[0085] Specifically, metal layers can be formed through electron beam evaporation or PVD processes to obtain P-type pad layer 191 and N-type pad layer 192, but are not limited to these.

[0086] Preferably, in some embodiments, a photoresist layer is first formed in the second insulating layer 180, the third through-hole 181 and the fourth through-hole 182, and then the photoresist layer in the preset area is removed by exposure and development. Then, a metal stack is deposited by electron beam evaporation to form a P-type pad layer 191 and an N-type pad layer 192. Then, the metal on the photoresist layer is removed by blue film stripping process, and finally the photoresist layer is removed.

[0087] (9) A reflective structure is formed on the back side of the sapphire substrate.

[0088] Specifically, a DBR reflective layer can be formed on a predetermined area on the back side of the sapphire substrate 100 using PECVD or MOCVD to serve as the reflective structure 200. Alternatively, a metal reflective layer can be formed on a predetermined area on the back side of the sapphire substrate 100 using electron beam evaporation or PVD processes to serve as the reflective structure 200, but this is not the only option.

[0089] Preferably, in some embodiments, step (9) includes:

[0090] (9.1) Forming a reflective pattern on the back side of the sapphire substrate;

[0091] Specifically, in some embodiments, a reflective pattern 230 is formed on the back side of the sapphire substrate 100 by photolithography etching, but it is not limited thereto.

[0092] Preferably, in some embodiments, the back side of the sapphire substrate 100 is first ground and polished, then a photoresist layer is formed, then a photoresist pattern is formed using a nanoimprinting process, then a portion of the sapphire substrate 100 is removed using a dry etching process to form a reflective pattern 230, and then the photoresist layer is removed.

[0093] (9.2) A second reflective layer is formed on the reflective pattern.

[0094] Specifically, the second reflective layer 240 can be obtained by forming a metal stack through electron beam evaporation or PVD processes, but is not limited to these methods.

[0095] Preferably, in some embodiments, a photoresist layer is first formed on the back side of the sapphire substrate 100, then the photoresist layer in a predetermined area is removed by exposure and development, then a metal stack is deposited by electron beam evaporation to form a second reflective layer 240, then the metal on the photoresist layer is removed by blue film stripping, and finally the photoresist layer is removed.

[0096] The present invention will be further described below with reference to specific embodiments:

[0097] Example 1

[0098] This embodiment provides a flip-chip LED, which includes a sapphire substrate, an epitaxial layer, a current blocking layer, a first reflective layer, a first insulating layer, a P-type metal interconnect layer, an N-type metal interconnect layer, a second insulating layer, a P-type pad layer, and an N-type pad layer stacked on the front side of the sapphire substrate.

[0099] The epitaxial layer comprises an N-type GaN layer, an InGaN-GaN type multiple quantum well layer, and a P-type GaN layer sequentially stacked on a sapphire substrate. A light-emitting structure, an isolation trench, and an N-type conductive step are formed on the epitaxial layer. The N-type conductive step is located on one side of the light-emitting structure and exposes the N-type GaN layer. An ITO layer is also disposed on top of the P-type GaN layer.

[0100] The current blocking layer covers the N-type conductive steps, the isolation groove, and the sidewalls of the light-emitting structure. It is made of SiO2 and has a thickness of 6500 Å.

[0101] The first reflective layer covers the top and sidewalls of the light-emitting structure, and also covers an N-type conductive step and an isolation groove of a predetermined width. The orthographic projection of the light-emitting structure onto the sapphire substrate has a first outer edge and a second outer edge. The orthographic projection of the first reflective layer onto the sapphire substrate has a second outer edge, with the first outer edge located inside the second outer edge, and the distance (L1) between the first and second outer edges is 3 μm. The first reflective layer comprises sequentially stacked Ag reflective layers and a protective layer, with the Ag reflective layer having a thickness of 1500 Å. The protective layer comprises alternately stacked Ti and Ni layers with a period of 4, the thickness of a single Ti layer being 800 Å, and the thickness of a single Ni layer being 1400 Å.

[0102] The first insulating layer covers the current blocking layer and the first reflective layer, and a first through-hole exposing the first reflective layer and a second through-hole exposing the N-type conductive step are formed on the first insulating layer. The first insulating layer is a SiO2 layer with a thickness of 8500 Å.

[0103] Both the P-type and N-type metal connection layers are disposed above the first insulating layer. The P-type metal connection layer contacts the first reflective layer through a first via, and the N-type metal connection layer contacts the N-type conductive step through a second via. Both the P-type and N-type metal connection layers comprise sequentially stacked layers of Cr, Al, Ti, Pt, Ti, Pt, Ti, Au, Pt, and Ti, with thicknesses of 40 Å, 1500 Å, 800 Å, 1600 Å, 800 Å, 1300 Å, 800 Å, 13000 Å, 2000 Å~3000 Å, and 45 Å, respectively.

[0104] Specifically, the second insulating layer covers the P-type metal interconnect layer, the N-type metal interconnect layer, and the first insulating layer. A third via exposing the P-type metal interconnect layer and a fourth via exposing the N-type metal interconnect layer are formed on the second insulating layer. The second insulating layer is a SiO2 layer with a thickness of 11000 Å.

[0105] The P-type pad layer is disposed in the third via, and the N-type pad layer is disposed in the fourth via. Specifically, both the P-type and N-type pad layers consist of sequentially stacked Ti, Al, Pt, Ni, and Au layers, with thicknesses of 1500 Å, 14000 Å, 1300 Å, 1500 Å, 9500 Å, and 450 Å, respectively.

[0106] The sapphire substrate has a reflective structure and a light-emitting surface on its back side. The orthographic projection of the light-emitting structure onto the sapphire substrate is located inside the orthographic projection of the reflective structure onto the sapphire substrate. The reflective structure is arranged around the light-emitting surface. The orthographic projection of the reflective structure onto the sapphire substrate has a third outer edge close to the light-emitting surface and a fourth outer edge far from the light-emitting surface. The third outer edge is located inside the second outer edge; the second outer edge is located inside the fourth outer edge, and the distance L2 between the fourth outer edge and the second outer edge is 2 μm.

[0107] Along the width direction of the flip-chip LED, the reflective structure includes an inner reflective portion close to the light-emitting surface and an outer reflective portion away from the light-emitting surface; the inner reflective portion is inclined, and the orthogonal projection of the inner reflective portion on the sapphire substrate has a fifth outer edge, which coincides with the second outer edge; the tilt angle α of the inner reflective portion is 45°, and the outer reflective portion is spherical, that is, it is composed of multiple hemispheres distributed in an array, and its radius is 2μm.

[0108] Along the thickness direction of the flip-chip LED, the reflective structure includes a reflective pattern and a second reflective layer. The reflective pattern is formed on a sapphire substrate, and the second reflective layer includes an Ag metal layer, a Ni metal layer, and a Ti metal layer stacked sequentially. The Ag metal layer has a thickness of 1550 Å, the Ni metal layer has a thickness of 350 Å, and the Ti metal layer has a thickness of 450 Å.

[0109] Specifically, in this embodiment, the flip-chip LED is circular.

[0110] Example 2

[0111] This embodiment provides a flip-chip LED, whose basic structure is the same as that of Embodiment 1. The difference between it and Embodiment 1 is:

[0112] The distance (L1) between the first and second outer edges is 4 μm, and the distance L2 between the fourth and second outer edges is 3 μm. The tilt angle α of the inner reflector is 60°, and the radius of the outer reflector is 3 μm.

[0113] Example 3

[0114] This embodiment provides a flip-chip LED, whose basic structure is the same as that of Embodiment 1. The difference between it and Embodiment 1 is:

[0115] The distance (L1) between the first and second outer edges is 5 μm, and the distance L2 between the fourth and second outer edges is 4 μm. The tilt angle α of the inner reflector is 45°, and the radius of the outer reflector is 4 μm.

[0116] Comparative Example 1

[0117] This comparative example provides a flip-chip LED, whose basic structure is the same as that of Example 1. The difference between it and Example 1 is:

[0118] No reflective structure is provided on the back side of the sapphire substrate. The first reflective layer only covers the P-type GaN layer and ITO layer on top of the light-emitting structure. That is, the orthographic projection of the first reflective layer on the sapphire substrate is included within the orthographic projection of the light-emitting structure on the sapphire substrate.

[0119] The flip-chip LEDs of Examples 1-3 and Comparative Example 1 were fabricated into circular chips with a diameter of 1200 μm and tested at a current of 700 mA. The brightness of these chips is as follows:

[0120]

[0121] The above description is a preferred embodiment of the invention. It should be noted that, for those skilled in the art, several improvements and modifications can be made without departing from the principle of the invention, and these improvements and modifications are also considered to be within the scope of protection of the invention.

Claims

1. A flip-chip LED, characterized in that, It includes a sapphire substrate, an epitaxial layer, a current blocking layer, a first reflective layer, a first insulating layer, a P-type metal interconnect layer, an N-type metal interconnect layer, a second insulating layer, a P-type pad layer, and an N-type pad layer stacked on the front side of the sapphire substrate; The epitaxial layer comprises an N-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer sequentially stacked on the sapphire substrate. A light-emitting structure, an isolation trench, and an N-type conductive step are formed on the epitaxial layer. The N-type conductive step is located on one side of the light-emitting structure and exposes the N-type semiconductor layer. The first reflective layer covers the light-emitting structure. The orthographic projection of the light-emitting structure onto the sapphire substrate has a first outer edge and a second outer edge. The orthographic projection of the first reflective layer onto the sapphire substrate has a second outer edge, which is located outside the first outer edge, and the distance between the first outer edge and the second outer edge is ≥3 μm. The back side of the sapphire substrate is provided with a reflective structure, and the orthographic projection of the light-emitting structure on the sapphire substrate is located inside the orthographic projection of the reflective structure on the sapphire substrate. The back side of the sapphire substrate has a light-emitting surface, and the reflective structure is arranged around the light-emitting surface. The orthogonal projection of the reflective structure onto the sapphire substrate has a third outer edge close to the light-emitting surface and a fourth outer edge away from the light-emitting surface. The second outer edge is located outside the third outer edge; the fourth outer edge is located outside the second outer edge, and the distance between the fourth outer edge and the second outer edge is ≥2μm.

2. The flip-chip LED as described in claim 1, characterized in that, Along the width direction, the reflective structure includes an inner reflective portion close to the light-emitting surface and an outer reflective portion disposed away from the light-emitting surface; The inner reflective portion is oblique in shape, and the orthographic projection of the inner reflective portion on the sapphire substrate has a fifth outer edge, which coincides with the second outer edge. The external reflective part is parabolic, spherical, pyramidal, or ellipsoidal in shape.

3. The flip-chip LED as described in claim 2, characterized in that, The tilt angle of the inner reflector is 45°~80°; and / or The external reflective part is spherical with a radius of 2μm to 4μm.

4. The flip-chip LED as described in claim 1, characterized in that, The distance between the first outer edge and the second outer edge is 3μm~5μm.

5. The flip-chip LED as described in claim 1, characterized in that, The distance between the fourth outer edge and the second outer edge is 2μm~4μm.

6. The flip-chip LED as described in claim 1, characterized in that, Along the thickness direction, the reflective structure includes a reflective pattern and a second reflective layer; The second reflective layer comprises an Ag metal layer, a Ni metal layer and a Ti metal layer stacked sequentially, wherein the thickness of the Ag metal layer is 1000 Å to 2000 Å, the thickness of the Ni metal layer is 200 Å to 500 Å, and the thickness of the Ti metal layer is 200 Å to 500 Å.

7. The flip-chip LED as described in claim 1, characterized in that, The first reflective layer comprises an Ag reflective layer and a protective layer stacked sequentially. The protective layer comprises alternating Ti and Ni layers. The thickness of the Ag reflective layer is 1000 Å to 2000 Å, the thickness of the Ti layer is 500 Å to 1500 Å, and the thickness of the Ni layer is 500 Å to 2000 Å.

8. The flip-chip LED as described in claim 1, characterized in that, The current blocking layer is a SiO2 layer with a thickness ≥5000Å; The first insulating layer is a SiO2 layer with a thickness of 8000Å~10000Å; The second insulating layer is a SiO2 layer with a thickness of 8000Å~12000Å.

9. A method for fabricating a flip-chip LED, used to fabricate the flip-chip LED as described in any one of claims 1 to 8, characterized in that, Includes the following steps: (1) An epitaxial layer is formed on the front side of a sapphire substrate, the epitaxial layer comprising an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer sequentially stacked on the sapphire substrate; (2) Etching forms multiple N-type conductive steps and isolation trenches that expose the N-type semiconductor layer, forming multiple light-emitting structures disposed on the sapphire substrate; (3) A current blocking layer is formed on the N-type conductive step, the isolation groove and the sidewall of the light-emitting structure; (4) A first reflective layer is formed on the light-emitting structure to obtain a first intermediate body; wherein the first reflective layer covers the top and sidewalls of the light-emitting structure, as well as the N-type conductive step of a preset width and the isolation groove of a preset width; (5) A first insulating layer is formed on the first intermediate body, and a first through hole is formed to expose the first reflective layer and a second through hole is formed to expose the N-type conductive step; (6) A P-type metal interconnect layer and an N-type metal interconnect layer are formed on the first insulating layer to obtain a second intermediate; (7) A second insulating layer is formed on the second intermediate, and a third through-hole and a fourth through-hole are formed to expose the P-type metal interconnect layer; (8) A P-type pad layer and an N-type pad layer are formed on the second insulating layer; (9) A reflective structure is formed on the back side of the sapphire substrate.

10. The method for fabricating a flip-chip LED as described in claim 9, characterized in that, Step (9) includes: (9.1) A reflective pattern is formed on the back side of the sapphire substrate; (9.2) A second reflective layer is formed on the reflective pattern.

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