Line adjustment system, method and device and computer readable storage medium
By combining the line controller and the bus multiplexer, the BMC enables flexible bus switching to external devices, solving the BMC access stability problem, reducing the error frequency, and improving the system reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-19
- Publication Date
- 2026-03-27
AI Technical Summary
When the BMC communicates with external devices, high-priority devices occupying the bus prevent access to other devices, causing errors and affecting access stability.
By employing a line controller and a bus multiplexer, and flexibly switching between the common bus and the private bus, the BMC can be adapted to access slot devices, avoiding access problems caused by the exclusive use of the common bus.
This improved the stability of BMC access to external devices, reduced the number of error reports, ensured that BMC could flexibly switch access paths, and enhanced system reliability.
Smart Images
Figure CN121743239A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of circuit technology, and more specifically, to a circuit adjustment system, method, apparatus, and computer-readable storage medium. Background Technology
[0002] Currently, the Baseboard Management Controller (BMC) in servers and other devices can communicate with RAID (Redundant Array of Independent Disks) cards, network cards, etc., via out-of-band management. In this process, the BMC communicates with multiple external devices through a single bus. If a particular external device has high priority or a large data volume, it will occupy the bus, preventing the BMC from accessing other external devices through this bus, thus causing the BMC to report an error.
[0003] In conclusion, improving the stability of BMC access to external devices is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention
[0004] The purpose of this application is to provide a line adjustment system that can, to a certain extent, solve the technical problem of how to improve the stability of BMC access to external devices. This application also provides a line adjustment method, an electronic device, and a computer-readable storage medium.
[0005] To achieve the above objectives, this application provides the following technical solution:
[0006] A line conditioning system includes a line controller and a bus multiplexer;
[0007] The first input terminal of the bus multiplexer is connected to the BMC via a common bus, the second input terminal of the bus multiplexer is connected to the BMC via a private bus, the output terminal of the bus multiplexer is connected to a slot, and the enable terminal of the bus multiplexer is connected to the line controller.
[0008] The line controller is configured to acquire and parse the line control command from the BMC to the slot; in response to the line control command indicating access via a common bus, it controls the first input terminal to be turned on and the second input terminal to be turned off; in response to the line control command indicating access via a private bus, it controls the first input terminal to be turned off and the second input terminal to be turned on.
[0009] In an exemplary embodiment, the line controller and the bus multiplexer are mounted on an expansion board.
[0010] In an exemplary embodiment, the line controller includes a CPLD.
[0011] In an exemplary embodiment, a first bus connector and a second bus connector are also included;
[0012] The first bus connector is installed on the motherboard where the BMC is located, and one end of the first bus connector is connected to the BMC via a private bus;
[0013] The second bus connector is mounted on the expansion board, and one end of the second bus connector is connected to the other end of the first bus connector. The other end of the second bus connector is connected to the second input terminal via a private bus.
[0014] In an exemplary embodiment, it also includes a first gold finger, a second gold finger, and a bus control switch;
[0015] The first gold finger is mounted on the motherboard, and one end of the first gold finger is connected to the BMC via a common bus;
[0016] The second gold finger is mounted on the expansion board, and one end of the second gold finger is connected to the other end of the first gold finger, while the other end of the second gold finger is connected to the bus control switch.
[0017] The bus control switch is mounted on the expansion board and connected to the first input terminal via a common bus.
[0018] In an exemplary embodiment, the line controller is connected to GPIO, and the bus control switch is connected to the line controller via a common bus;
[0019] The line controller is also used to read the status of GPIO and transmit the status of GPIO to BMC via a common bus, so that BMC can generate line control instructions for the slot based on the status of GPIO.
[0020] In an exemplary embodiment, the line controller acquires and parses the line control instructions from the BMC to the slot, including:
[0021] The line controller acquires the line control instructions from the BMC to the slot; the line control instructions include instructions generated when a RAID card is connected to the slot, indicating access via a private bus, or instructions generated when a non-RAID card is connected to the slot, indicating access via a public bus.
[0022] The line control commands are parsed.
[0023] A line adjustment method, applied to a line controller, includes:
[0024] Obtain BMC's line control commands for the slot;
[0025] The line control commands are parsed;
[0026] In response to the line control command indicating access via a common bus, the first input of the control bus multiplexer is turned on, and the second input of the control bus multiplexer is turned off.
[0027] In response to the line control command indicating access via a private bus, the first input terminal is closed and the second input terminal is turned on.
[0028] The first input terminal of the bus multiplexer is connected to the BMC via a common bus, the second input terminal of the bus multiplexer is connected to the BMC via a private bus, the output terminal of the bus multiplexer is connected to the slot, and the enable terminal of the bus multiplexer is connected to the line controller.
[0029] An electronic device, comprising:
[0030] Memory, used to store computer programs;
[0031] A processor for executing the computer program to implement the steps of the circuit adjustment method described above.
[0032] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the circuit adjustment method described above.
[0033] This application provides a line adjustment system, including a line controller and a bus multiplexer. The first input of the bus multiplexer is connected to a BMC via a common bus, the second input of the bus multiplexer is connected to the BMC via a private bus, the output of the bus multiplexer is connected to a slot, and the enable terminal of the bus multiplexer is connected to the line controller. The line controller is used to acquire and parse line control commands from the BMC to the slot. In response to a line control command indicating access via the common bus, the first input is turned on, and the second input is turned off. In response to a line control command indicating access via the private bus, the first input is turned off, and the second input is turned on. In this application, the enable terminal of the bus multiplexer is connected to the line controller, enabling the line controller to manage the bus multiplexer and providing a foundation for subsequent line adjustments. Furthermore, the first input terminal of the bus multiplexer is connected to the BMC via a common bus, the second input terminal is connected to the BMC via a private bus, and the output terminal is connected to the slot. Thus, after parsing the line control commands generated by the BMC, the line controller can, when the line control command indicates access via the common bus, control the first input terminal to be on and the second input terminal to be off, allowing the BMC to access the device on the slot via the common bus. Conversely, when the line control command indicates access via the private bus, it can control the first input terminal to be off and the second input terminal to be on, allowing the BMC to access the device on the slot via the private bus. This achieves flexible adaptive switching of the bus for the BMC to access devices on the slot, avoiding situations where an external device occupies the common bus, preventing the BMC from accessing other external devices. This improves the stability of the BMC's access to external devices and reduces the number of BMC errors. The line adjustment method, electronic device, and computer-readable storage medium provided in this application also solve the corresponding technical problems. Attached Figure Description
[0034] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0035] Figure 1 This is a schematic diagram of the structure of a line adjustment system provided in an embodiment of this application;
[0036] Figure 2 This is a schematic diagram of the existing BMC I2C access external card structure;
[0037] Figure 3A flowchart illustrating a line adjustment method provided in this application embodiment;
[0038] Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;
[0039] Figure 5 This is another structural schematic diagram of an electronic device provided in an embodiment of this application. Detailed Implementation
[0040] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0041] In the era of standalone machines, data storage and read / write operations using a single disk resulted in very low I / O performance and limited storage capacity due to the time consumed in addressing and reading / writing. Furthermore, single disks were extremely susceptible to physical failure, frequently leading to data loss. To address this issue, RAID cards were developed. RAID cards, short for Redundant Independent Disk Array Cards, are a technology that combines multiple hard drives into a single logical drive. RAID cards improve storage capacity, performance, reliability, and manageability. RAID cards play a crucial role in servers, providing more efficient and secure data storage services. Therefore, RAID cards, along with network interface cards (NICs), have become indispensable components in servers. Due to the importance of RAID cards, BMC access to RAID cards has become a top priority in server management.
[0042] Communication between the BMC and the RAID card can be divided into in-band and out-of-band methods. Out-of-band management primarily uses dedicated hardware interfaces such as SGPIO (Serial General Purpose Input / Output) or I2C (Inter-Integrated Circuit) to directly communicate with the RAID card and obtain physical disk status, such as hard drive activity and fault indicator lights. It's worth noting that this is the most basic function, used to illuminate hard drive indicators and obtain simple status information. In-band management primarily uses management agents running within the operating system, such as StorCLI or MegaCLI, to interact with the RAID card driver. The driver then communicates with the RAID card via the PCIe bus. The BMC communicates with these agents indirectly through a network, such as IPMI (Intelligent Platform Management Interface), to indirectly obtain detailed RAID information, such as VD (Virtual Disk) status, BBU (Battery Backup Unit) status, and logs. This method provides richer management functions.
[0043] However, due to the functional limitations of the CPU (Central Processing Unit), the first out-of-band management method is generally adopted, where the BMC directly accesses the RAID card via buses such as I2C. During use, limited by the number of I2C bus interfaces and the overall design of the BMC, a single I2C port on the BMC typically accesses multiple devices such as the RAID card and network card. Because these devices have high priority, complex characteristics, and large data volumes, accessing the RAID card often prevents timely access to other components like the network card, leading to errors. The line adjustment system provided in this application can improve the stability of the BMC's access to external devices and reduce the number of errors.
[0044] Please see Figure 1 , Figure 1 This is a schematic diagram of a line adjustment system provided in an embodiment of this application.
[0045] This application provides a line adjustment system, including a line controller 101 and a bus multiplexer 102;
[0046] The first input terminal Y1 of the bus multiplexer is connected to the BMC via a common bus, the second input terminal Y0 of the bus multiplexer is connected to the BMC via a private bus, the output terminal Z of the bus multiplexer is connected to a slot, and the enable terminal S of the bus multiplexer is connected to the line controller.
[0047] The line controller is used to acquire and parse the line control commands from the BMC to the slot; in response to the line control command indicating access via the common bus, it controls the first input terminal to be turned on and the second input terminal to be turned off; in response to the line control command indicating access via the private bus, it controls the first input terminal to be turned off and the second input terminal to be turned on.
[0048] It should be noted that a single bus multiplexer can only adjust the wiring of a single slot. If wiring adjustment is required for multiple slots, a corresponding bus multiplexer needs to be set up for each slot. The first input of each bus multiplexer is connected to the BMC via a common bus, and the second input is connected to the BMC via a private bus. The output of each bus multiplexer is connected to the slot requiring wiring adjustment, and the enable pin of each bus multiplexer is connected to the line controller so that the line controller can control the bus multiplexer to perform bus wiring switching. It should also be noted that the bus types of the common and private buses can be flexibly determined according to the application scenario; for example, both the common and private buses can be I2C buses or SGPIO buses.
[0049] In an exemplary embodiment, considering that the BMC is installed on the motherboard and the slot is installed on the expansion board, in order to facilitate the line controller to adjust the slot line through the bus multiplexer, both the line controller and the bus multiplexer can be installed on the expansion board in the line adjustment system provided in this application.
[0050] In an exemplary embodiment, the type of line controller can be flexibly determined according to the application scenario. It only needs to be able to acquire and parse the line control instructions from the BMC to the slot, and in response to the line control instructions indicating access via the common bus, control the first input terminal to be turned on and the second input terminal to be turned off; in response to the line control instructions indicating access via the private bus, control the first input terminal to be turned off and the second input terminal to be turned on. For example, considering cost savings and reduced circuit losses, the line controller in the line adjustment system provided in this application may include a CPLD (Complex Programmable Logic Device), or of course, an ARM (Advanced RISC Machine) processor, etc., which is not specifically limited here.
[0051] In an exemplary embodiment, to facilitate the BMC's access to the device on the slot via the private bus, and to facilitate the BMC's compatibility with other items via the private bus, the line adjustment system provided in this application allows the BMC to access the device via private access using a bus connector. Specifically, it may also include a first bus connector 103 and a second bus connector 104. The first bus connector is mounted on the motherboard where the BMC is located, and one end of the first bus connector is connected to the BMC via the private bus. During this process, the BMC can connect to the private bus via bus interface 1. The second bus connector is mounted on an expansion board, and one end of the second bus connector is connected to the other end of the first bus connector. The other end of the second bus connector is connected to a second input terminal via the private bus. In this way, when the BMC accesses external devices on the slot via the private bus, it can use the first bus connector mounted on the motherboard and the second bus connector mounted on the expansion board for data transfer. This avoids the situation where the BMC is directly connected to the bus multiplexer via the private bus. The first bus connector mounted on the motherboard and the second bus connector mounted on the expansion board can assist in data transmission, reducing data transmission fluctuations on the private bus and ensuring the stability of private bus data transmission. Furthermore, the first bus connector mounted on the motherboard and the second bus connector mounted on the expansion board can be used to flexibly expand the application of private lines, improving the applicability of the solution.
[0052] In an exemplary embodiment, considering the application of a common bus, the line adjustment system provided in this application can configure the common bus in the manner of accessing the existing BMC slot, that is, it can also include a first gold finger 105, a second gold finger 106, and a bus control switch 107; the first gold finger is installed on the motherboard, and one end of the first gold finger is connected to the BMC through the common bus. During this process, the BMC can be connected to the common bus through bus interface 0; the second gold finger is installed on the expansion board, and one end of the second gold finger is connected to the other end of the first gold finger, and the other end of the second gold finger is connected to the bus control switch; the bus control switch is installed on the expansion board and is connected to the first input terminal through the common bus. In this way, when the BMC accesses external devices in the slot via the common bus, it can use the first gold finger mounted on the motherboard and the second gold finger mounted on the expansion board, along with the bus control switch, for data transfer. This avoids the situation where the BMC is directly connected to the bus multiplexer via the common bus. The first gold finger mounted on the motherboard and the second gold finger mounted on the expansion board, along with the bus control switch, can assist in data transmission, reducing data transmission fluctuations on the common bus and ensuring the stability of data transmission on the common bus. Furthermore, the first gold finger mounted on the motherboard and the second gold finger mounted on the expansion board, along with the bus control switch, can be used to flexibly expand the application of the common line, improving the applicability of the solution.
[0053] In an exemplary embodiment, considering that both the CPU and BMC need to read the status of GPIO (General Purpose Input / Output) via a common bus to determine location information, Board ID, and the presence status of external cards, etc., to meet this requirement of the BMC and CPU, the line adjustment system provided in this application can be configured to connect a line controller to GPIO, and a bus control switch to the line controller via a common bus. The line controller is also used to read the status of GPIO and transmit the GPIO status to the BMC via the common bus, so that the BMC can generate line control instructions for the slot based on the GPIO status. In this way, after the line controller is connected to GPIO, it can read the GPIO status and, with the help of the bus control switch, the second gold finger, and the first gold finger, transmit the GPIO status to the BMC and CPU via the common bus, so that the BMC and CPU can apply the GPIO status. For example, the BMC can generate line control instructions for the corresponding slot based on the GPIO status.
[0054] In an exemplary embodiment, the type of line control instruction can be flexibly determined according to the application scenario. For example, the line control instruction can be an instruction that only controls the RAID card to occupy the private bus. That is, in the line adjustment system provided in this application, during the process of the line controller obtaining and parsing the BMC's line control instruction to the slot, the line controller can obtain the BMC's line control instruction to the slot. The line control instruction includes an instruction generated when the slot is connected to a RAID card that represents access through the private bus, or an instruction generated when the slot is connected to a non-RAID card that represents access to the public bus. The line control instruction is then parsed. In other words, the line controller can read the GPIO status and transmit it to the BMC via the common bus using the bus control switch, the second gold finger, and the first gold finger. The BMC reads the card's relevant asset information and bus address based on the card's presence information to determine the card type. If the four IDs (Vendor ID, Device ID, Subsystem Vendor ID, and Subsystem Device ID) and bus address of a card match the information of a RAID card that has already been adapted, a line control command is generated indicating access to this slot via the private bus. This line control command is transmitted to the line controller via the common bus using the bus control switch, the second gold finger, and the first gold finger. This causes the line controller to close the first input of the bus multiplexer connected to this slot and turn on the second input of the same multiplexer, thus establishing the private bus between the BMC and this slot, allowing the BMC to access the slot via the private bus. Conversely, if the four IDs (Vendor ID, Device ID, Subsystem Vendor ID, and Subsystem Device ID) of a card are read... If the ID and bus address do not match the information of the already adapted RAID card, a line control command is generated to indicate access to this slot via the common bus. This line control command is transmitted to the line controller via the common bus using the bus control switch, the second gold finger, and the first gold finger. This causes the line controller to turn on the first input of the bus multiplexer connected to this slot and turn off the second input of the bus multiplexer connected to this slot, thereby maintaining the common bus connection between the BMC and this slot, allowing the BMC to access this slot via the common bus.
[0055] In an exemplary embodiment, the type of line control command can be flexibly determined according to the application scenario. For example, the type of external device requiring exclusive private bus access can be preset in the line controller. The line control command sent by the BMC to the line controller carries a signal indicating whether the preset external device requiring exclusive private bus access is present. Accordingly, if the BMC detects that a preset external device requiring exclusive private bus access is online, the presence signal of this preset external device can be adjusted to "yes" in the line control command, for example, by changing the value of the presence signal to 1. In this way, after the line controller obtains and parses the line control command, if the presence signal of this preset external device requiring exclusive private bus access is... Yes, then the slot of the external device that requires exclusive access to the private bus can be connected to the BMC via the private bus by controlling the bus multiplexer. Conversely, if the BMC detects that an external device that requires exclusive access to the private bus is not online, the presence signal of the external device can be adjusted to no in the line control command, for example, by changing the value of the presence signal to 0. In this way, after the line controller obtains and parses the line control command, if the presence signal of the external device that requires exclusive access to the private bus is no, it can connect the slot of the external device that requires exclusive access to the private bus to the BMC via the common bus by controlling the bus multiplexer. In this way, the BMC only needs to send the presence or absence signal of the external device that needs to use the private bus as a line control command to the line controller. The line controller can then adaptively adjust the slot of the external device that needs to use the private bus to connect with the BMC via the public bus or the private bus. Since the presence or absence signal of the external device that needs to use the private bus is small, the time required for the BMC and the line controller to exchange line control commands is short, which makes it easy for the line controller to quickly adjust the private bus or public bus of the slot of the external device that needs to use the private bus.
[0056] This application provides a line adjustment system, including a line controller and a bus multiplexer. The first input of the bus multiplexer is connected to a BMC via a common bus, the second input of the bus multiplexer is connected to the BMC via a private bus, the output of the bus multiplexer is connected to a slot, and the enable terminal of the bus multiplexer is connected to the line controller. The line controller is used to acquire and parse line control commands from the BMC to the slot. In response to a line control command indicating access via the common bus, the first input is turned on, and the second input is turned off. In response to a line control command indicating access via the private bus, the first input is turned off, and the second input is turned on. In this application, the enable terminal of the bus multiplexer is connected to the line controller, enabling the line controller to manage the bus multiplexer and providing a basis for subsequent line adjustments. Furthermore, the first input terminal of the bus multiplexer is connected to the BMC via a common bus, the second input terminal is connected to the BMC via a private bus, and the output terminal is connected to the slot. Thus, after parsing the line control commands generated by the BMC, the line controller can, when the line control command indicates access via the common bus, control the first input terminal to be on and the second input terminal to be off, allowing the BMC to access the device on the slot via the common bus. Conversely, when the line control command indicates access via the private bus, it can control the first input terminal to be off and the second input terminal to be on, allowing the BMC to access the device on the slot via the private bus. This achieves flexible adaptive switching of the bus for the BMC to access devices on the slot, avoiding situations where an external device occupies the common bus, preventing the BMC from accessing other external devices. This improves the stability of the BMC's access to external devices and reduces the number of BMC errors.
[0057] To facilitate understanding of the circuit adjustment scheme provided in this application, it is assumed that the bus is an I2C bus. The existing BMC I2C access to external cards scheme is as follows: Figure 2As shown, the BMC and CPU access the chips and interfaces on the RISE card through the I2C MUX chip. During boot, the CPU accesses the 9555 on the RISE card primarily to determine the location information of external cards, specifically which CPU port the PCIe signals on the J6 / J7 / J8 PCIe slots originate from. After booting, the motherboard CPLD controls the I2C MUX chip to connect the BMC I2C to the RISE I2C. The BMC I2C mainly accesses the RISE's FRU, SENSOR, and the external cards in the slots to read RISE and external card information. Because the BMC doesn't know the type of external card, it can only use one set of I2C to access multiple card types. During use, due to the high priority, complex characteristics, and large data volume of RAID cards, accessing the RAID card often prevents timely access to other components such as the network card, easily leading to I2C errors.
[0058] The route adjustment solution provided in this application can solve this problem. The application process of the route adjustment solution provided in this application can be as follows:
[0059] After power-on, the line controller controls the first input terminal of the bus multiplexer to be turned on and the second input terminal to be turned off, so as to connect the I2C on the slot to the I2C on the bus control switch, so that the BMC can access the slot through the common bus.
[0060] After the line controller is connected to the GPIO, it reads the status of the GPIO and uses the bus control switch, the second gold finger and the first gold finger to transmit the status of the GPIO to the BMC through the common bus;
[0061] The BMC reads the card's asset information and I2C address based on the card's presence information to determine the card type. If the four IDs (Vendor ID, Device ID, Subsystem Vendor ID, and Subsystem Device ID) and bus address of a card match the information of a previously adapted RAID card, it generates a line control command indicating access to the slot via the private bus. For example, in the line control command, the value of the presence signal of the RAID card that needs exclusive access to the private bus is changed to 1, and the line control command is transmitted to the line controller via the common bus using the bus control switch, the second gold finger, and the first gold finger. If the four IDs (Vendor ID, Device ID, Subsystem Vendor ID, and Subsystem Device ID) and bus address of a card do not match the information of a previously adapted RAID card, it generates a line control command indicating access to the slot via the common bus. For example, in the line control command, the value of the presence signal of the RAID card that needs exclusive access to the private bus is changed to 0, and the line control command is transmitted to the line controller via the common bus using the bus control switch, the second gold finger, and the first gold finger.
[0062] The line controller receives and parses the line control commands from the BMC slot via the common bus. If the value of the presence signal of the RAID card that pre-determines the exclusive private bus in the line control command is 1, it controls the first input terminal of the bus multiplexer connected to this slot to close and controls the second input terminal of the bus multiplexer connected to this slot to open, thereby connecting the private bus between the BMC and this slot, allowing the BMC to access the RAID card on this slot through the private bus. If the value of the presence signal of the RAID card that pre-determines the exclusive private bus in the line control command is 0, it controls the first input terminal of the bus multiplexer connected to this slot to open and controls the second input terminal of the bus multiplexer connected to this slot to close, thereby maintaining the connection of the common bus between the BMC and this slot, allowing the BMC to access the external devices on this slot through the common bus.
[0063] It should be noted that this embodiment uses the RAID card's exclusive private bus as an example to illustrate the solution of this application. In practical applications, it is possible to control whether external devices need to exclusively use the private bus as needed. For example, it is possible to control external devices that transmit large amounts of data to exclusively use the private bus. This application does not make any specific limitations here.
[0064] Please see Figure 3 , Figure 3 This is a flowchart of a line adjustment method provided in an embodiment of this application.
[0065] This application provides a line adjustment method, applied to a line controller, which may include the following steps:
[0066] Step S101: Obtain the BMC's line control command for the slot.
[0067] Step S102: Parse the line control commands.
[0068] Step S103: In response to the line control command indicating access via the common bus, the first input of the control bus multiplexer is turned on, and the second input of the control bus multiplexer is turned off.
[0069] Step S104: In response to the line control command indicating access via the private bus, the first control input is closed and the second control input is turned on; the first input of the bus multiplexer is connected to the BMC via the common bus, the second input of the bus multiplexer is connected to the BMC via the private bus, the output of the bus multiplexer is connected to the slot, and the enable terminal of the bus multiplexer is connected to the line controller.
[0070] The description of the corresponding steps in the line adjustment method provided in this application can be found in the above embodiments, and will not be repeated here.
[0071] This application also provides an electronic device and a computer-readable storage medium, both of which have the corresponding effects of the circuit adjustment method provided in the embodiments of this application. Please refer to... Figure 4 , Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.
[0072] An electronic device provided in this application includes a memory 201 and a processor 202. The memory 201 stores a computer program, and the processor 202 executes the computer program to implement the steps of the circuit adjustment method described in any of the above embodiments.
[0073] Please see Figure 5Another electronic device provided in this application embodiment may further include: an input port 203 connected to the processor 202 for transmitting commands input from the outside to the processor 202; a display unit 204 connected to the processor 202 for displaying the processing results of the processor 202 to the outside; and a communication module 205 connected to the processor 202 for enabling communication between the electronic device and the outside. The display unit 204 may be a display panel, a laser scanner, or the like; the communication method used by the communication module 205 includes, but is not limited to, Mobile High-Definition Link (MHL), Universal Serial Bus (USB), High-Definition Multimedia Interface (HDMI), wireless connectivity: Wireless Fidelity (WiFi), Bluetooth communication technology, Bluetooth Low Energy communication technology, and communication technology based on IEEE 802.11s.
[0074] This application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the steps of the line adjustment method described in any of the above embodiments.
[0075] The computer-readable storage media involved in this application include random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs (compact disc read-only memory), or any other form of storage media known in the art.
[0076] This application provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the circuit adjustment method described in any of the above embodiments.
[0077] For descriptions of relevant parts in the line adjustment method, electronic device, and computer-readable storage medium provided in this application's embodiments, please refer to the detailed description of the corresponding parts in the line adjustment system provided in this application's embodiments; they will not be repeated here. Furthermore, parts of the technical solutions provided in this application that are consistent with the implementation principles of corresponding technical solutions in the prior art have not been described in detail to avoid excessive elaboration.
[0078] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0079] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A line adjustment system, characterized in that, This includes line controllers and bus multiplexers; The first input terminal of the bus multiplexer is connected to the BMC via a common bus, the second input terminal of the bus multiplexer is connected to the BMC via a private bus, the output terminal of the bus multiplexer is connected to a slot, and the enable terminal of the bus multiplexer is connected to the line controller. The line controller is used to acquire and parse the line control instructions from the BMC to the slot. In response to the line control command indicating access via a common bus, the first input terminal is turned on and the second input terminal is turned off; in response to the line control command indicating access via a private bus, the first input terminal is turned off and the second input terminal is turned on.
2. The line adjustment system according to claim 1, characterized in that, The line controller and the bus multiplexer are mounted on the expansion board.
3. The line adjustment system according to claim 2, characterized in that, The line controller includes a CPLD.
4. The line adjustment system according to claim 2, characterized in that, It also includes a first bus connector and a second bus connector; The first bus connector is installed on the motherboard where the BMC is located, and one end of the first bus connector is connected to the BMC via a private bus; The second bus connector is mounted on the expansion board, and one end of the second bus connector is connected to the other end of the first bus connector. The other end of the second bus connector is connected to the second input terminal via a private bus.
5. The line adjustment system according to claim 4, characterized in that, It also includes a first gold finger, a second gold finger, and a bus control switch; The first gold finger is mounted on the motherboard, and one end of the first gold finger is connected to the BMC via a common bus; The second gold finger is mounted on the expansion board, and one end of the second gold finger is connected to the other end of the first gold finger, while the other end of the second gold finger is connected to the bus control switch. The bus control switch is mounted on the expansion board and connected to the first input terminal via a common bus.
6. The line adjustment system according to claim 5, characterized in that, The line controller is connected to GPIO, and the bus control switch is connected to the line controller via a common bus. The line controller is also used to read the status of GPIO and transmit the status of GPIO to BMC via a common bus, so that BMC can generate line control instructions for the slot based on the status of GPIO.
7. The line adjustment system according to claim 1, characterized in that, The line controller acquires and parses the line control commands from the BMC to the slot, including: The line controller acquires the line control instructions from the BMC to the slot; the line control instructions include instructions generated when a RAID card is connected to the slot, indicating access via a private bus, or instructions generated when a non-RAID card is connected to the slot, indicating access via a public bus. The line control commands are parsed.
8. A method for adjusting a circuit, characterized in that, Applied to line controllers, including: Obtain BMC's line control commands for the slot; The line control commands are parsed; In response to the line control command indicating access via a common bus, the first input of the control bus multiplexer is turned on, and the second input of the control bus multiplexer is turned off. In response to the line control command indicating access via a private bus, the first input terminal is closed and the second input terminal is turned on. The first input terminal of the bus multiplexer is connected to the BMC via a common bus, the second input terminal of the bus multiplexer is connected to the BMC via a private bus, the output terminal of the bus multiplexer is connected to the slot, and the enable terminal of the bus multiplexer is connected to the line controller.
9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the line adjustment method as described in claim 8 when executing the computer program.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the line adjustment method as described in claim 8.