Pulse activation circuit and energy storage power supply

Abstract

The application relates to a pulse activation circuit and an energy storage power supply. The pulse activation circuit comprises a power supply end, a reset module, a bypass module and a pulse output module; the input end of the reset module is connected with the power supply end, the output end of the reset module is connected with the control end of the bypass module, the bypass end of the bypass module is connected with the input end of the pulse output module, and the input end of the pulse output module is also connected with the power supply end; the reset module is used for outputting a reset signal when the voltage of the power supply end is greater than or equal to a preset voltage; the bypass module is used for bypassing the input electric energy transmitted from the power supply end to the pulse output module when no reset signal is received, and stopping working when the reset signal is received, so that the pulse output module obtains the input electric energy transmitted from the power supply end; and the pulse output module is used for outputting a pulse activation signal based on the received input electric energy. The pulse activation circuit can improve the reliability of the pulse activation signal output by the pulse activation circuit.

Description

Technical Field

[0001] This application relates to the field of electronic power technology, and in particular to a pulse activation circuit and an energy storage power supply. Background Technology

[0002] Pulse activation circuits are widely used in electronic devices. They can output pulse activation signals, which are used to start or switch the state of functional units in electronic devices.

[0003] In related technologies, the power supply terminal of the pulse activation circuit is connected to the pulse output module. When the pulse output module receives a sudden voltage change from the power supply terminal, it outputs a pulse activation signal.

[0004] However, in the pulse activation circuits of related technologies, when the voltage at the power supply terminal rises slowly, the pulse output module may fail to output a pulse activation signal. Therefore, there is a problem in related technologies where the pulse activation circuit cannot reliably output a pulse activation signal. Summary of the Invention

[0005] Based on this, this application provides a pulse activation circuit and an energy storage power supply, which can improve the reliability of the pulse activation signal output by the pulse activation circuit.

[0006] In a first aspect, this application provides a pulse activation circuit, which includes a power supply terminal, a reset module, a bypass module, and a pulse output module; the input terminal of the reset module is connected to the power supply terminal, the output terminal of the reset module is connected to the control terminal of the bypass module, the bypass terminal of the bypass module is connected to the input terminal of the pulse output module, and the input terminal of the pulse output module is also connected to the power supply terminal.

[0007] The reset module is used to output a reset signal when the voltage at the power supply terminal is greater than or equal to a preset voltage.

[0008] The bypass module is used to bypass the input power transmitted from the power supply to the pulse output module when no reset signal is received; and to stop working when a reset signal is received so that the pulse output module can obtain the input power transmitted from the power supply.

[0009] The pulse output module is used to output a pulse activation signal based on the received input electrical energy.

[0010] In some embodiments, the reset module is further configured to output a reset signal when the voltage at the power supply terminal is greater than or equal to a preset voltage and the duration is greater than a preset time.

[0011] In some embodiments, the reset module includes a first Zener diode and a first switching unit;

[0012] The cathode of the first Zener diode is connected to the power supply terminal, and the anode of the first Zener diode is connected to the control terminal of the first switching unit.

[0013] The first conducting terminal of the first switching unit is connected to the power supply terminal, and the first conducting terminal of the first switching unit is also connected to the control terminal of the bypass module. The second conducting terminal of the first switching unit is grounded.

[0014] In some embodiments, the bypass module includes a second switching unit;

[0015] The control terminal of the second switching unit is connected to the output terminal of the reset module, the first conducting terminal of the second switching unit is connected to the input terminal of the pulse output module, and the second conducting terminal of the second switching unit is grounded.

[0016] In some embodiments, the pulse output module includes an isolation capacitor, one end of which is the input terminal of the pulse output module;

[0017] The bypass module is also used to bypass the input power during operation by means of a discharge circuit constructed by the isolation capacitor;

[0018] The pulse output module is also used to output a pulse activation signal in response to the current-carrying time of the isolation capacitor when receiving input electrical energy.

[0019] In some embodiments, the pulse output module further includes a delay unit and an output unit; the input terminal of the delay unit is connected to the other end of the isolation capacitor, and the output terminal of the delay unit is connected to the input terminal of the output unit.

[0020] An isolation capacitor is used to trigger the output current-carrying time when an input electrical energy is received.

[0021] The delay unit is used to delay the transmission of the trigger voltage to the output unit.

[0022] The output unit is used to output a pulse activation signal when a trigger voltage is received.

[0023] In some embodiments, the delay unit includes a resistor and a delay capacitor;

[0024] The first end of the resistor is connected to the other end of the isolation capacitor, and the first end of the resistor is also connected to the input terminal of the output unit; the first end of the delay capacitor is connected to the other end of the isolation capacitor, and the first end of the delay capacitor is also connected to the input terminal of the output unit; the second ends of the resistor and the second ends of the delay capacitor are both grounded.

[0025] In some embodiments, the delay unit further includes a second Zener diode;

[0026] The cathode of the second Zener diode is connected to the other end of the isolation capacitor. The cathode of the second Zener diode is also connected to the input terminal of the output unit, and the anode of the second Zener diode is grounded.

[0027] In some embodiments, the output unit includes a driving subunit and an output subunit;

[0028] The control terminal of the drive subunit is connected to the output terminal of the delay unit, and the output terminal of the drive subunit is connected to the control terminal of the output subunit; the drive subunit is used to output a drive voltage to the output subunit when it receives a trigger voltage.

[0029] The first conducting terminal of the output subunit is connected to a set voltage, and the output subunit is used to conduct when a driving voltage is received, so that the second conducting terminal of the output subunit outputs a pulse activation signal.

[0030] Secondly, this application provides an energy storage power supply, which includes the pulse activation circuit of any one of the first aspects.

[0031] In the technical solution provided in this application embodiment, when the voltage output from the power supply is a soft-start voltage, if the voltage at the power supply is less than a preset voltage, the input power transmitted from the power supply to the pulse output module is bypassed. Thus, the voltage obtained by the pulse output module is 0. This continues until the voltage at the power supply is greater than or equal to the preset voltage, at which point the bypassing of input power from the power supply to the pulse output module ceases. This ensures that the input power transmitted from the power supply can reach the pulse output module. Consequently, the voltage obtained by the pulse output module is a rapid, instantaneous voltage change from 0 to the preset voltage. Therefore, even when the voltage output from the voltage source is a soft-start voltage, as long as the voltage at the power supply reaches the preset voltage, the pulse output... The output module can still output a pulse activation signal. When the voltage output from the power supply is an instantaneous voltage, the power supply can reach the preset voltage instantly. The pulse output module obtains the input power transmitted from the power supply, so that the pulse output module also obtains an instantaneous voltage. Therefore, even when the voltage output from the voltage source is an instantaneous voltage, the pulse output module can still output a pulse activation signal. Thus, in this embodiment, regardless of whether the voltage output from the voltage source is an instantaneous voltage or a soft-start voltage, as long as the voltage of the voltage source is greater than or equal to the preset voltage, the pulse output module can output a pulse activation signal, thereby improving the reliability of the pulse activation signal output by the pulse activation circuit. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 A schematic diagram of the pulse activation circuit provided in the first embodiment;

[0034] Figure 2 A schematic diagram of the pulse activation circuit provided in the second embodiment;

[0035] Figure 3 A schematic diagram of the pulse activation circuit provided in the third embodiment;

[0036] Figure 4 A schematic diagram of the pulse activation circuit provided in the fourth embodiment;

[0037] Figure 5 A schematic diagram of the pulse activation circuit provided in the fifth embodiment;

[0038] Figure 6 A schematic diagram of the pulse activation circuit provided in the sixth embodiment;

[0039] Figure 7 A schematic diagram of the structure of an energy storage power supply provided for some embodiments. Detailed Implementation

[0040] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0042] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined. In the description of the embodiments of this application, "each" means each of the multiple options, unless otherwise explicitly defined.

[0043] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0044] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0045] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0046] When a voltage source is connected, the pulse activation circuit outputs a pulse activation signal. This pulse activation signal can be a short-duration pulse in an electronic circuit, used to trigger / start / wake up a circuit module, device, or specific function. For example, taking the pulse activation signal to control the shutdown of a functional module as an example, this functional module can be connected to a power supply terminal, which is used to connect to a voltage source. Thus, even if the functional module can obtain the voltage output from the power supply terminal, it can still perform a shutdown operation upon receiving the pulse activation signal.

[0047] In related technologies, the power supply terminal of the pulse activation circuit is connected to the pulse output module, and this power supply terminal is used to connect to a voltage source. When the voltage source is used to output an instantaneous voltage, the voltage output from the voltage source can instantaneously change from zero to a preset voltage, allowing the pulse output module to acquire the instantaneous voltage and output a pulse activation signal based on it. However, when the power supply terminal is used to output a gradual voltage, the voltage output from the voltage source changes slowly from zero to the preset voltage, and the pulse output module cannot output a pulse activation signal based on the acquired gradual voltage.

[0048] In this application embodiment, the instantaneous voltage refers to a voltage that changes instantaneously from zero to a preset voltage. For example, the instantaneous voltage can change from zero to the preset voltage within a unit time. In this application embodiment, the gradual voltage refers to a voltage that changes slowly from zero to the preset voltage. For example, the maximum change in the gradual voltage within a unit time is less than a voltage threshold, which is less than the preset voltage. For example, the voltage threshold is less than 0.5 times the preset voltage. For example, the voltage threshold is less than 0.1 times, 0.2 times, or 0.5 times the preset voltage.

[0049] In some embodiments, when the voltage source can provide a preset voltage, if it is necessary to control the relevant functional modules, the pulse output module cannot output a pulse activation signal, which will cause abnormal control of the relevant functional modules and affect the normal use of the product.

[0050] Based on this, embodiments of this application provide a pulse activation circuit and an energy storage power supply, which can improve the reliability of the pulse activation signal output by the pulse activation circuit.

[0051] Figure 1 A schematic diagram of the pulse activation circuit provided in the first embodiment is shown below. Figure 1 As shown, the pulse activation circuit includes a power supply terminal, a reset module, a bypass module, and a pulse output module. The input terminal of the reset module is connected to the power supply terminal, the output terminal of the reset module is connected to the control terminal of the bypass module, the bypass terminal of the bypass module is connected to the input terminal of the pulse output module, and the input terminal of the pulse output module is also connected to the power supply terminal.

[0052] The reset module outputs a reset signal when the voltage at the power supply terminal is greater than or equal to a preset voltage. The bypass module operates to bypass the input power transmitted from the power supply terminal to the pulse output module when no reset signal is received; and stops operating when a reset signal is received, allowing the pulse output module to receive the input power transmitted from the power supply terminal. The pulse output module outputs a pulse activation signal based on the received input power.

[0053] In some embodiments, the power supply terminal can be used to connect a voltage source. This voltage source can be used to output an instantaneous voltage or an early-rising voltage. For example, if the voltage source includes a battery, it can output an instantaneous voltage. For example, if the voltage source includes a photovoltaic module, it can output an early-rising voltage.

[0054] For example, the reset module is further configured to not output a reset signal, or to output a signal other than a reset signal, when the voltage at the power supply terminal is less than a preset voltage. In some embodiments, the reset module may include a detection chip that outputs a reset signal when it detects that the voltage at the power supply terminal is greater than or equal to the preset voltage. In other embodiments, the reset module may include a first Zener diode, the cathode of which is connected to the power supply terminal, and the anode of which is connected to the control terminal of the bypass module.

[0055] In this embodiment, the reset signal can be a low-level signal, and other signals besides the reset signal are high-level signals. In other embodiments, the reset signal can be a high-level signal, and other signals besides the reset signal are low-level signals.

[0056] For example, when the bypass module does not receive a reset signal, it can ground the input terminal of the pulse output module, thereby bypassing the input power transmitted from the power supply to the pulse output module. For example, when the bypass module receives a reset signal, it disconnects the connection between the input terminal of the pulse output module and the ground terminal, so that the pulse output module can obtain the input power transmitted from the power supply.

[0057] In the technical solution provided in this application embodiment, when the voltage output from the power supply is a soft-start voltage, if the voltage at the power supply is less than a preset voltage, the input power transmitted from the power supply to the pulse output module is bypassed. Thus, the voltage obtained by the pulse output module is 0. This continues until the voltage at the power supply is greater than or equal to the preset voltage, at which point the bypassing of input power from the power supply to the pulse output module ceases. This ensures that the input power transmitted from the power supply can reach the pulse output module. Consequently, the voltage obtained by the pulse output module is a rapid, instantaneous voltage change from 0 to the preset voltage. Therefore, even when the voltage output from the voltage source is a soft-start voltage, as long as the voltage at the power supply reaches the preset voltage, the pulse output... The output module can still output a pulse activation signal. When the voltage output from the power supply is an instantaneous voltage, the power supply can reach the preset voltage instantly. The pulse output module obtains the input power transmitted from the power supply, so that the pulse output module also obtains an instantaneous voltage. Therefore, even when the voltage output from the voltage source is an instantaneous voltage, the pulse output module can still output a pulse activation signal. Thus, in this embodiment, regardless of whether the voltage output from the voltage source is an instantaneous voltage or a soft-start voltage, as long as the voltage of the voltage source is greater than or equal to the preset voltage, the pulse output module can output a pulse activation signal, thereby improving the reliability of the pulse activation signal output by the pulse activation circuit.

[0058] In some embodiments, the reset module is further configured to output a reset signal when the voltage at the power supply terminal is greater than or equal to a preset voltage and the duration is greater than a preset time.

[0059] For example, the reset module may include a detection chip that outputs a reset signal when it detects that the voltage at the power supply terminal is greater than or equal to a preset voltage and the duration is greater than a preset time.

[0060] In the technical solution provided in this application embodiment, when the voltage at the power supply terminal is greater than or equal to the preset voltage for a duration greater than the preset time, a reset signal is output. This can reduce the problem of erroneous output of pulse activation signals due to voltage fluctuations at the power supply terminal and improve the reliability of the pulse activation signal output by the pulse activation circuit.

[0061] Figure 2 A schematic diagram of the pulse activation circuit provided in the second embodiment is shown below. Figure 2 As shown, Figure 2 Compared to the example Figure 1 The difference in the embodiments is that: the reset module includes a first Zener diode ZD1 and a first switching unit; the cathode of the first Zener diode ZD1 is connected to the power supply terminal, and the anode of the first Zener diode ZD1 is connected to the control terminal of the first switching unit; the first conducting terminal of the first switching unit is connected to the power supply terminal, the first conducting terminal of the first switching unit is also connected to the control terminal of the bypass module, and the second conducting terminal of the first switching unit is grounded.

[0062] In some embodiments, the first switching unit may include a capacitor C1 and a transistor Q1. The first end of the capacitor C1 is connected to the anode of the first Zener diode ZD1, and the first end of the capacitor C1 is also connected to the base of the transistor Q1. The second end of the capacitor C1 is grounded. The collector of the transistor Q1 is connected to the control terminal of the bypass module, and the collector of the transistor Q1 is also connected to the power supply terminal. The emitter of the transistor Q1 is grounded.

[0063] Through the combination of the first Zener diode ZD1, capacitor C1, and transistor Q1, when the voltage at the power supply terminal is greater than or equal to the preset voltage, the first Zener diode ZD1 breaks down in reverse, charging capacitor C1. When the voltage of capacitor C1 reaches the conduction voltage of transistor Q1, transistor Q1 conducts, pulling the control terminal of the bypass module down to ground, i.e., outputting a reset signal (i.e., a low-level signal) to the control terminal of the bypass module. When the voltage at the power supply terminal is less than the preset voltage, the first Zener diode ZD1 is cut off, unable to charge capacitor C1, and transistor Q1 is cut off. Since the collector of transistor Q1 is still connected to the power supply terminal, a high-level signal is output to the control terminal of the bypass module.

[0064] In some embodiments, the first switching unit further includes resistors R1 and R2. The first end of resistor R1 is connected to the base of transistor Q1, and resistor R1 is the base current limiting resistor of transistor Q1. The second end of resistor R1 is grounded. The first end of resistor R2 is connected to the power supply terminal, and the second end of resistor R2 is connected to the collector of transistor Q1. Resistor R2 is the pull-up resistor of the collector of transistor Q1.

[0065] In some embodiments, the reset module may further include a resistor R3, with the first end of the resistor R3 connected to the power supply terminal and the second end of the resistor R3 connected to the cathode of the first Zener diode ZD1. The resistor R3 may be a current-limiting resistor for the first Zener diode ZD1.

[0066] In the technical solution provided in this application embodiment, by combining the first Zener diode and the first switching unit, a reset signal can be output when the voltage at the power supply terminal is greater than or equal to a preset voltage, without the need to set up a detection chip, thereby eliminating the need to provide power to the reset module. This achieves the effect of automatically detecting the voltage at the power supply terminal and outputting a reset signal when the voltage at the power supply terminal is greater than or equal to a preset voltage, reducing the complexity of the reset module and improving the stability of the reset signal triggering.

[0067] Figure 3 A schematic diagram of the pulse activation circuit provided in the third embodiment is shown below. Figure 3 As shown, Figure 3 Compared to the example Figure 1 The difference in the embodiments is that the bypass module includes a second switching unit; the control terminal of the second switching unit is connected to the output terminal of the reset module, the first conducting terminal of the second switching unit is connected to the input terminal of the pulse output module, and the second conducting terminal of the second switching unit is grounded.

[0068] In some embodiments, the second switching unit may include a metal-oxide-semiconductor field-effect transistor (MOS transistor) Q2. In other embodiments, the MOS transistor Q2 may be replaced by a transistor. The gate of the MOS transistor Q2 is connected to the output terminal of the reset module, the drain of the MOS transistor Q2 is connected to the input terminal of the pulse output module, and the source of the MOS transistor Q2 is grounded. Exemplarily, the MOS transistor Q2 is an N-channel MOS transistor. An N-channel MOS transistor turns on when it receives a high-level signal and turns off when it receives a low-level signal.

[0069] In some embodiments, the second switching unit may further include a capacitor C2, with the first end of the capacitor C2 connected to the gate of the MOSFET Q2 and the second end of the capacitor C2 grounded.

[0070] In some embodiments, the second switching unit may further include a resistor R4, with its first end connected to the gate of the MOSFET Q2 and its second end grounded. Resistor R4 serves as a current-limiting resistor for the gate of the MOSFET Q2.

[0071] In this way, when the bypass module receives a reset signal (low level signal), MOSFET Q2 is in the off state, and the pulse output module receives the input power transmitted from the power supply. When the bypass module receives a high level signal, MOSFET Q2 is in the on state, so that the input terminal of the pulse output module is grounded, thereby bypassing the input power transmitted from the power supply to the pulse output module.

[0072] In the technical solution provided in this application embodiment, the bypass module includes a second switching unit, so that the bypass module works when no reset signal is received to bypass the input power transmitted from the power supply terminal to the pulse output module, and stops working when a reset signal is received, so that the pulse output module can obtain the input power transmitted from the power supply terminal, thereby improving the stability of the input power control of the pulse output module.

[0073] Figure 4 A schematic diagram of the pulse activation circuit provided in the fourth embodiment is shown below. Figure 4 As shown, Figure 4 Compared to the example Figure 1 The difference in the embodiments is that the pulse output module includes an isolation capacitor ( Figure 4 (Cell C3 is shown in the diagram). One end of the isolation capacitor is the input terminal of the pulse output module. The bypass module is also used to bypass the input power through the discharge circuit of the constructed isolation capacitor during operation. The pulse output module is also used to output a pulse activation signal in response to the current-carrying time of the isolation capacitor when the input power is received.

[0074] In some embodiments, the pulse output module includes an isolation capacitor and a pulse output section. One end of the isolation capacitor is the input terminal of the pulse output module, and the other end of the isolation capacitor is connected to the pulse output section. The pulse output section can output a pulse activation signal in response to the current-carrying time of the isolation capacitor. For example, the pulse output section can output a pulse activation signal when the current-carrying time of the isolation capacitor is greater than or equal to a set time.

[0075] Based on the characteristic that the voltage across a capacitor cannot change abruptly, if an isolation capacitor is connected to an instantaneous voltage input, the voltage at one end of the capacitor will rise instantaneously, while the voltage difference across the capacitor remains constant for a very short time. This causes the voltage at the other end of the capacitor to jump instantaneously, resulting in an output voltage. As the capacitor continues to charge, the voltage at the other end gradually decreases until it is fully charged, at which point the output voltage at the other end is 0. However, if a slow-start voltage is applied to the capacitor, the voltage at one end rises slowly due to the extremely slow rise rate. This allows sufficient time for the capacitor to complete charging, resulting in no significant voltage jump at the other end and the output voltage remaining constant at 0.

[0076] In this embodiment, the current-carrying time of the isolation capacitor refers to the duration during which the voltage output at the other end of the isolation capacitor is not zero.

[0077] In the technical solution provided in this application embodiment, the pulse output module includes an isolation capacitor. One end of the isolation capacitor is the input terminal of the pulse output module. When the instantaneous voltage is received, the isolation capacitor can output a voltage with a duration greater than or equal to a set duration. The voltage with the set duration can be transmitted to the pulse output section as an effective trigger signal, so that the pulse output section outputs a pulse activation signal according to the voltage with the set duration. This improves the reliability of the pulse output module outputting a pulse activation signal when it receives an instantaneous voltage.

[0078] In some embodiments, the pulse output module further includes a delay unit and an output unit; the input terminal of the delay unit is connected to the other end of an isolation capacitor, and the output terminal of the delay unit is connected to the input terminal of the output unit. Exemplarily, the pulse output section includes a delay unit and an output unit.

[0079] An isolation capacitor is used to output a trigger voltage for the current-carrying time when input power is received. A delay unit is used to delay the transmission of the trigger voltage to the output unit. The output unit is used to output a pulse activation signal when the trigger voltage is received.

[0080] In the technical solution provided in this application embodiment, by setting a delay unit, when the current carrying time of the isolation capacitor is greater than or equal to a set time, that is, when the duration of the output voltage at the other end of the isolation capacitor is greater than or equal to the set duration, the trigger voltage is transmitted to the output unit, so that the output unit outputs a pulse activation signal based on the trigger voltage. This avoids the situation where the other end of the isolation capacitor temporarily outputs voltage due to voltage fluctuations, resulting in the erroneous output of the pulse activation signal, and improves the reliability of the output pulse activation signal.

[0081] Continue to refer to Figure 4 In some embodiments, the delay unit includes a delay capacitor C4. The first end of the delay capacitor C4 is connected to the other end of the isolation capacitor, and the first end of the delay capacitor C4 is also connected to the input terminal of the output unit. The second end of the delay capacitor C4 is grounded.

[0082] The delay capacitor C4 allows the trigger voltage to be delayed before being transmitted to the output unit. For example, when a trigger voltage is output at the second terminal of the isolation capacitor, the trigger voltage output by the isolation capacitor charges the delay capacitor C4. When the voltage at the first terminal of the delay capacitor C4 is greater than or equal to the trigger operating voltage of the output unit, the delay capacitor C4 can delay the transmission of the trigger voltage output by the isolation capacitor to the output unit, so that the output unit outputs a pulse activation signal upon receiving the trigger voltage.

[0083] Continue to refer to Figure 4In some embodiments, the delay unit includes a resistor R5 and a delay capacitor C4; the first end of the resistor R5 is connected to the other end of the isolation capacitor, and the first end of the resistor R5 is also connected to the input terminal of the output unit; the first end of the delay capacitor C4 is connected to the other end of the isolation capacitor, and the first end of the delay capacitor C4 is also connected to the input terminal of the output unit; the second ends of the resistor R5 and the second ends of the delay capacitor C4 are both grounded.

[0084] In the technical solution provided in this application embodiment, the combination of resistor R5 and delay capacitor C4, and the parameter matching of resistor R5 and delay capacitor C4, can accurately control the delay time of trigger voltage, ensuring that the trigger voltage is transmitted to the output unit in the set sequence, so that the output unit receives the trigger voltage and outputs a pulse activation signal at the specified time, thereby realizing flexible adjustment and precise control of the trigger voltage transmission delay time.

[0085] Continue to refer to Figure 4 In some embodiments, the delay unit further includes a second Zener diode ( Figure 4 (As shown in the diagram, Zener diode ZD2). The cathode of the second Zener diode is connected to the other end of the isolation capacitor. The cathode of the second Zener diode is also connected to the input terminal of the output unit. The anode of the second Zener diode is grounded.

[0086] When the trigger voltage output by the isolation capacitor is greater than the regulated voltage of the second Zener diode, the second Zener diode will be reverse-biased and broken down. At this time, even if the trigger voltage output by the isolation capacitor is greater than the regulated voltage of the second Zener diode, the voltage across the second Zener diode will remain stable at the regulated value. Meanwhile, the voltage at the input of the output unit is consistent with the cathode potential of the second Zener diode, thereby clamping the trigger voltage and strictly limiting the amplitude of the trigger voltage input to the output unit to the regulated value, avoiding excessive voltage input to the output unit, and thus reducing the probability of damage to the output unit.

[0087] In the technical solution provided in this application embodiment, the voltage regulation characteristics of the second Zener diode can be used to precisely clamp the trigger voltage output by the isolation capacitor, effectively limiting the amplitude of the trigger voltage input to the output unit, avoiding damage to the circuit of the output unit due to excessive trigger voltage, and filtering out spike interference signals in the trigger voltage to ensure the stability of the trigger voltage.

[0088] Figure 5 A schematic diagram of the pulse activation circuit provided in the fifth embodiment is shown below. Figure 5 As shown, Figure 5 Compared to the example Figure 4The difference in the embodiments is that: the output unit includes a driving subunit and an output subunit; the control terminal of the driving subunit is connected to the output terminal of the delay unit, and the output terminal of the driving subunit is connected to the control terminal of the output subunit; the driving subunit is used to output a driving voltage to the output subunit when a trigger voltage is received; the first conducting terminal of the output subunit is connected to a set voltage V_S, and the output subunit is used to conduct when a driving voltage is received, so that the second conducting terminal of the output subunit outputs a pulse activation signal.

[0089] In some embodiments, the driving subunit includes a transistor Q3, the base of transistor Q3 is connected to the output terminal of the delay unit, the collector of transistor Q3 is connected to the control terminal of the output subunit, and the emitter of transistor Q3 is grounded.

[0090] In some embodiments, the output subunit includes a transistor Q4, a resistor R6, and a resistor R7. The first end of the resistor R6 is connected to the collector of the transistor Q3, and the second end of the resistor R6 is connected to the base of the transistor Q4. The first end of the resistor R7 is connected to a set voltage V_S, and the second end of the resistor R7 is connected to the base of the transistor Q4. The emitter of the transistor Q4 is connected to the set voltage V_S, and the collector of the transistor Q4 outputs a pulse activation signal.

[0091] In some embodiments, the output subunit further includes a Zener diode ZD3, a resistor R8, and a capacitor C5. The anode of the Zener diode ZD3 is connected to the collector of the transistor Q4, the cathode of the Zener diode ZD3 is connected to the first end of the resistor R8, the second end of the resistor R8 is grounded, and the cathode of the Zener diode ZD3 is also connected to the first end of the capacitor C5, the second end of the capacitor C5 is grounded.

[0092] Figure 6 A schematic diagram of the pulse activation circuit provided in the sixth embodiment is shown below. Figure 6 As shown, Figure 6 The pulse activation circuit in the embodiment includes Figure 2 The reset module in the embodiment Figure 3 The bypass module in the embodiment and Figure 5 The pulse output module in the embodiment.

[0093] In some embodiments, the pulse activation circuit further includes a capacitor C6. A first terminal of capacitor C6 is connected to a power supply terminal, the voltage of which is V_IN, and a second terminal of capacitor C6 is grounded. Exemplarily, capacitor C6 can filter the voltage V_IN at the power supply terminal.

[0094] In some embodiments, the pulse activation circuit further includes a resistor R9. The first end of the resistor R9 is connected to the power supply terminal, the second end of the resistor R9 is connected to the bypass terminal of the bypass module, and the second end of the resistor R9 is also connected to the input terminal of the pulse output module.

[0095] In some embodiments, the pulse activation circuit further includes resistors R9 and R10. The first end of resistor R9 is connected to the power supply terminal, the first end of resistor R10 is connected to the power supply terminal, the second end of resistor R9 is connected to the second end of resistor R10, the second end of resistor R10 is connected to the bypass terminal of the bypass module, and the second end of resistor R10 is also connected to the input terminal of the pulse output module.

[0096] The following is for reference Figure 6 Explain the working principle of the pulse activation circuit:

[0097] The voltage V_IN at the power supply terminal is the instantaneous input voltage, meaning that V_IN increases instantaneously to the preset voltage. After the preset voltage passes through the Zener diode ZD4, it charges capacitor C3 through parallel resistors R9 and R10, allowing current to flow through capacitor C3 and thus charge the delay capacitor C4. On the other hand, it charges capacitor C2 through resistor R2. Since the larger the capacitance, the slower the voltage rises, when the capacitance of capacitor C3 or delay capacitor C4 is greater than that of capacitor C2, the voltage of capacitor C2 will reach the turn-on voltage of MOSFET Q2 first, turning on MOSFET Q2. At this time, the voltage of delay capacitor C4 has not yet reached the turn-on voltage of transistor Q3. After MOSFET Q2 turns on, it will discharge the energy of capacitor C3, and the voltage of delay capacitor C4 will also be discharged through resistor R5. Additionally, after the preset voltage passes through Zener diode ZD4, it is also transmitted to the first Zener diode ZD1 through resistor R3. Since the preset voltage is higher than the Zener voltage of the first Zener diode ZD1, ZD1 breaks down to charge capacitor C1. If the charging efficiency of capacitor C1 is lower than that of capacitor C2, or if the capacitance of capacitor C1 is greater than that of capacitor C2, then the turn-on time of transistor Q1 is later than that of MOSFET Q2. When capacitor C1 is charged to the turn-on voltage of transistor Q1, transistor Q1 turns on, and the voltage of capacitor C2 is discharged through transistor Q1, causing MOSFET Q2 to turn off. Thus, MOSFET Q2 stops discharging the energy from capacitor C3. The preset voltage then passes through the parallel resistor R9 and... After resistor R10, capacitor C3 is charged to allow current to flow through it, charging delay capacitor C4. This continues until the current-carrying time of capacitor C3 is greater than or equal to a set time. At this point, the voltage of delay capacitor C4 reaches the turn-on voltage of transistor Q3, turning on transistor Q3. The base voltage of transistor Q4 becomes 0, turning on transistor Q4, causing its collector to output the set voltage V_S. Since the current-carrying time of capacitor C3 is limited, when capacitor C3 is not carrying current, the energy in delay capacitor C4 is discharged through resistor R5, causing transistor Q3 to turn off, which in turn causes transistor Q4 to turn off. The collector of transistor Q4 then stops outputting voltage. Thus, the short-term set voltage V_S output by the output submodule is the pulse activation signal.

[0098] The voltage V_IN at the power supply terminal is a slow-start voltage, meaning that V_IN will slowly increase to the preset voltage. During the slow increase of V_IN, because V_IN increases slowly, the slowly increasing V_IN will charge capacitor C3 after passing through Zener diode ZD4, and then through parallel resistors R9 and R10. Capacitor C3 cannot carry current. When V_IN increases to the voltage that makes capacitor C2 turn on, MOSFET Q2 turns on. Once MOSFET Q2 is on, it discharges the energy from capacitor C3. Then, as V_IN continues to increase, for example, to the preset voltage, it increases to the voltage regulation value of the first Zener diode ZD1. The first Zener diode ZD1 breaks down to charge capacitor C1 until capacitor C1 is charged to the turn-on voltage of transistor Q1. Then, transistor Q1 turns on, and the voltage of capacitor C2 is discharged through transistor Q1, which in turn turns off MOSFET Q2. In this way, MOSFET Q2 stops discharging the energy from capacitor C3. In this way, the voltage obtained by capacitor C3 instantly switches from 0 to a larger voltage. Even if V_IN is a soft-start voltage, the reset module and bypass module ensure that the voltage obtained by capacitor C3 is an instantaneous voltage, allowing capacitor C3 to conduct current and charge the delay capacitor C4. When the current conduction time of capacitor C3 is greater than or equal to the set time, the voltage of the delay capacitor C4 reaches the conduction voltage of transistor Q3, transistor Q3 conducts, the voltage at the base of transistor Q4 is 0, transistor Q4 conducts, and the collector of transistor Q4 outputs the set voltage V_S. Since the current conduction time of capacitor C3 is limited, when capacitor C3 is not conducting current, the energy of the delay capacitor C4 is discharged through resistor R5, causing transistor Q3 to turn off, which in turn causes transistor Q4 to turn off, and the collector of transistor Q4 stops outputting voltage. Thus, the set voltage V_S output by the output submodule for a short period of time is the pulse activation signal.

[0099] The pulse activation circuit provided in this application embodiment can output a pulse activation signal regardless of whether the voltage at the power supply terminal is an instantaneous voltage or a slow-start voltage, thereby improving the reliability of the pulse activation signal output by the pulse activation circuit.

[0100] Figure 7 Schematic diagrams of the energy storage power supply provided for some embodiments, such as Figure 7 As shown, the energy storage power supply includes the pulse activation circuit in any of the above embodiments.

[0101] In some embodiments, the energy storage power supply further includes a voltage source for connecting to the power supply terminal of the pulse activation circuit. Exemplarily, the voltage source may output a momentary voltage or a soft-start voltage.

[0102] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0103] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A pulse activation circuit, characterized in that, The pulse activation circuit includes a power supply terminal, a reset module, a bypass module, and a pulse output module. The input terminal of the reset module is connected to the power supply terminal, the output terminal of the reset module is connected to the control terminal of the bypass module, the bypass terminal of the bypass module is connected to the input terminal of the pulse output module, and the input terminal of the pulse output module is also connected to the power supply terminal. The pulse output module includes an isolation capacitor, a delay unit, and an output unit. One end of the isolation capacitor is the input terminal of the pulse output module, the input terminal of the delay unit is connected to the other end of the isolation capacitor, and the output terminal of the delay unit is connected to the input terminal of the output unit. The reset module is used to output a reset signal when the voltage at the power supply terminal is greater than or equal to a preset voltage. The bypass module is used to operate when the reset signal is not received. It discharges the electrical energy in the isolation capacitor through the discharge circuit of the constructed isolation capacitor, and bypasses the input electrical energy transmitted from the power supply terminal to the pulse output module. And it stops working when the reset signal is received, so that the pulse output module can obtain the input power transmitted from the power supply terminal; The isolation capacitor is used to output a trigger voltage for the current-carrying time when the input electrical energy is received; The delay unit is used to transmit the trigger voltage to the output unit when the duration of the voltage output at the other end of the isolation capacitor is greater than or equal to a set duration; the current-carrying time refers to the duration during which the voltage output at the other end of the isolation capacitor is not zero. The output unit is used to output a pulse activation signal when the trigger voltage is received.

2. The pulse activation circuit according to claim 1, characterized in that, The reset module is further configured to output the reset signal when the voltage at the power supply terminal is greater than or equal to the preset voltage and the duration is greater than the preset time.

3. The pulse activation circuit according to claim 1, characterized in that, The reset module includes a first Zener diode and a first switching unit; The cathode of the first Zener diode is connected to the power supply terminal, and the anode of the first Zener diode is connected to the control terminal of the first switching unit. The first conducting terminal of the first switching unit is connected to the power supply terminal, and the first conducting terminal of the first switching unit is also connected to the control terminal of the bypass module. The second conducting terminal of the first switching unit is grounded.

4. The pulse activation circuit according to claim 1, characterized in that, The bypass module includes a second switching unit; The control terminal of the second switching unit is connected to the output terminal of the reset module, the first conducting terminal of the second switching unit is connected to the input terminal of the pulse output module, and the second conducting terminal of the second switching unit is grounded.

5. The pulse activation circuit according to any one of claims 1-4, characterized in that, The delay unit includes a resistor and a delay capacitor; The first end of the resistor is connected to the other end of the isolation capacitor, and the first end of the resistor is also connected to the input terminal of the output unit; the first end of the delay capacitor is connected to the other end of the isolation capacitor, and the first end of the delay capacitor is also connected to the input terminal of the output unit; the second end of the resistor and the second end of the delay capacitor are both grounded.

6. The pulse activation circuit according to claim 5, characterized in that, The delay unit also includes a second Zener diode; The cathode of the second Zener diode is connected to the other end of the isolation capacitor, and the cathode of the second Zener diode is also connected to the input terminal of the output unit. The anode of the second Zener diode is grounded.

7. The pulse activation circuit according to any one of claims 1-4, characterized in that, The output unit includes a driver subunit and an output subunit; The control terminal of the driving subunit is connected to the output terminal of the delay unit, and the output terminal of the driving subunit is connected to the control terminal of the output subunit; the driving subunit is used to output a driving voltage to the output subunit when it receives the trigger voltage; The first conducting terminal of the output subunit is connected to a set voltage, and the output subunit is used to conduct when the driving voltage is received, so that the second conducting terminal of the output subunit outputs the pulse activation signal.

8. An energy storage power source, characterized in that, The energy storage power supply includes the pulse activation circuit according to any one of claims 1-7.

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