Circuit arrangement and microcontroller

Abstract

The invention relates to a circuit device and a microcontroller. A circuit arrangement in combination with the microcontroller, the circuit arrangement comprising a first transistor and a second transistor arranged in series and having a signal I / O between the first transistor and the second transistor; wherein the first transistor is configured to output a first state to the signal I / O in accordance with a first (sensor) signal; wherein the second transistor is configured to output a second state to the signal I / O according to a second signal; wherein the signal I / O is configured to provide a third state if the first transistor and the second transistor are disabled.

Description

Technical Field

[0001] Embodiments of the present invention relate to circuit devices, and particularly to sensor circuit devices combined with microcontrollers. Another embodiment relates to methods for operating circuit devices and methods for operating microcontrollers, as well as corresponding computer programs. Background Technology

[0002] Some sensors, such as magnetic switches, are often used in combination with or integrated into sensor circuit devices.

[0003] These sensor circuitry devices enable chip-to-chip communication. An example is a magnetic switch used in a three-pin package. This three-pin package performs chip-to-chip communication with a microcontroller, which, for example, collects sensor signals and determines or monitors fault conditions. This can be addressed by consuming an additional pin. However, this operation incurs additional cost. In other examples, so-called real-time signals are used. They operate in timing schemes, which implies significant effort on the microcontroller side to continuously measure time. Therefore, an improved approach is needed. Summary of the Invention

[0004] Embodiments of the present invention provide a (sensor) circuit device combined with a microcontroller. The circuit device includes a first transistor and a second transistor arranged in series, and a signal I / O of the circuit device is provided between the first transistor and the second transistor. The first transistor is configured to output a first state to the signal I / O of the circuit device according to a first signal, wherein the second transistor is configured to output a second state to the signal I / O of the circuit device according to a second signal. If the first transistor and the second transistor are disabled, the signal I / O of the circuit device is configured to provide a third state. The microcontroller includes a signal I / O of the microcontroller and a third transistor. The signal I / O of the microcontroller includes an input configured to distinguish between the first state and the second state or a third state provided by the circuit device via a signal line. Here, the third transistor is coupled to the signal line via the signal I / O of the microcontroller, wherein the signal I / O of the microcontroller is configured to distinguish between the second state and the third state by using the third transistor.

[0005] Another embodiment provides a method for operating a circuit device combined with a microcontroller. The circuit device includes a first transistor and a second transistor arranged in series, and has a signal I / O of the circuit device between the first transistor and the second transistor; the microcontroller includes a signal I / O of the microcontroller and a third transistor, the signal I / O of the microcontroller including an input, wherein the third transistor is coupled to a signal line via the signal I / O of the microcontroller, comprising the following steps: By using a first transistor, a first state is output to the signal I / O of the circuit device according to a first signal; By using a second transistor, the second state is output to the signal I / O of the circuit device according to the second signal; If the first and second transistors are disabled, a third state is provided; as well as Distinguish between the first state and the second state, or the third state provided by the circuit device via a signal line; The second state and the third state are distinguished by using a third transistor.

[0006] Another embodiment provides a computer program for performing the methods defined above when a computer is running.

[0007] Other improvements are defined by the subject matter of the dependent claims. Attached Figure Description

[0008] The following embodiments of the invention will be discussed with reference to the accompanying drawings, wherein...

[0009] Figure 1 A typical combination of sensor circuitry and a microcontroller is illustrated to illustrate the basic principles.

[0010] Figure 2 A schematic block diagram illustrating a basic implementation of a sensor circuit device combined with a microcontroller according to an embodiment;

[0011] Figure 3a shows a schematic block diagram of an enhanced sensor circuit device according to an embodiment;

[0012] Figure 3b shows a schematic block diagram of a microcontroller according to an embodiment;

[0013] Figure 4 The combination of sensor circuitry and microcontroller according to Figures 3a and 3b is shown.

[0014] Figure 5a shows a schematic block diagram of the combination of sensor circuitry and a microcontroller, wherein faults are illustrated exemplary to discuss embodiments; and

[0015] Figure 5b shows a schematic matrix illustrating how the fault shown in Figure 5a can be detected according to an embodiment.

[0016] The following embodiments of the invention will be discussed with reference to the accompanying drawings, wherein the same reference numerals are provided to objects having the same or similar functions, such that their descriptions are mutually applicable and interchangeable. Detailed Implementation

[0017] Figure 1The combination of sensor circuitry 10 and microcontroller 20 is shown. The sensor circuitry 10 is a so-called three-pin circuitry 10, which may include an integrated sensor 5 such as a magnetic switch. It is assumed here that sensor 5 is integrated into sensor circuitry 10. The sensor circuitry 10 is coupled to GND via a first pin 17, coupled to VDD via a second pin 18, and includes a third pin 19 forming signal I / O (input / output signal) 16.

[0018] The microcontroller 20 is also powered via GND (reference pin 28) and VDD (reference pin 27) and has a third pin 29 leading to pin 19 (reference signal line 9). The microcontroller here includes general-purpose inputs / outputs 22. This may include, for example, a comparator to distinguish between GND (low level) and VDD (high level).

[0019] Signal line 9 is connected via the so-called pull-up resistor 7 (R) pu It is coupled to VDD.

[0020] Regarding the sensor circuitry 10, it should be noted that it includes a transistor 12, such as an open-drain transistor (S1). For example, the emitter or drain is coupled to 17, and the collector is coupled to 19 or a signal input / output. Control contacts, such as the base or gate, are coupled to the sensor 5.

[0021] Since the structure of the sensor circuit device 10 and the microcontroller has already been discussed, functionality will be discussed.

[0022] For example, if sensor 5 (e.g., a magnetic switch) is closed and / or turned on, transistor 12 can be closed, where signal input / output 16 is configured to transmit sensor data from sensor 5. In this example, sensor 5 provides data to microcontroller 20 via the open drain (S1) of transistor 12 and an external pull wire of resistor 7. The signal or state applied to pin 19 is also referred to as indicating the first state of closing transistor 12. Of course, transistor 12 can be closed due to the presence of a signal, i.e., when sensor 5 / magnetic switch is activated. According to another implementation, this can be reversed, such that transistor 12 is closed when sensor 5 is disabled. This depends on the exact implementation of sensor 5 and transistor 12, which, for example, is an open-drain transistor in this document.

[0023] The microcontroller 20 includes GPIO 22 configured as inputs. A first state is determined, for example, by a low signal (below a threshold), current, or a short circuit.

[0024] As indicated above, the first state at pin 19 can be, for example, a ground signal applied to pin 19, where another signal, also referred to as the third state, can be configured as an unstable VDD potential. This unstable VDD potential, also referred to as a high potential, can be pulled particularly low or grounded. For example, when the signal at pin 19 is below a threshold, the comparator of GPIO 22 mentioned above determines a low signal (first state), or when the signal is above a threshold, the comparator of GPIO 22 mentioned above determines a high signal (hereinafter referred to as the third signal). For example, a low signal (generated from the closed transistor 12 that sets the potential of pin 9 to GND) indicates the first state, while a high signal (generated from the open transistor 12, thus the pull-up resistor 7 limits the potential of signal line 9 to high) indicates the third state. In other words, this means that the third state is a signal provided by an external component (i.e., through an external component (relative to the sensor circuitry 10)), here the pull-up resistor 7 coupled between VDD and signal line 9. Depending on the implementation, the comparator may include a hysteresis.

[0025] A common problem is that, on the microcontroller side, it is impossible to determine whether the first state is generated by sensor 5 that applies GND to 19 or whether a fault (such as a damaged cable) causes the first state signal.

[0026] Conversely, it is often difficult to distinguish between the third state caused by the switching state of transistor 12 and the open circuit at pin 19. Therefore, sensor circuitry 10 typically includes a microcontroller or diagnostic controller configured to transmit so-called real-time signals. Here, timing schemes are applied depending on whether the states are the same or different; for example, a first state or a third state is applied to pin 19. However, this timing scheme implies a significant effort on the microcontroller side for continuing time measurement and / or for synchronizing sensor circuitry 10 and microcontroller 20.

[0027] From this point onward, according to an embodiment, the sensor circuitry 10 is adapted to provide another state, for example, a state used to transmit diagnostic information (such as condition information or fault information). This state is referred to as the second state.

[0028] Figure 2 A sensor circuit device 10' comparable to sensor circuit device 10 is shown, but with the following enhancements. In addition to including a first transistor 12, sensor circuit device 10' includes a second transistor 14, wherein the first transistor 12 and the second transistor 14 are coupled in series, with a signal I / O 16 between them. The second transistor 14 is configured to provide a second state.

[0029] The sensor circuitry 10' is read out via the microcontroller 20'. The microcontroller 20' is substantially identical to the microcontroller 20, but also includes a third transistor 25. Transistor 25 is coupled between the microcontroller 20's signal I / O 22' and a first pin 28 having GND (the signal for the first state). The transistor 25 connected to signal I / O 22' enables the differentiation between the second and third states provided by the sensor circuitry 10'. Figure 1 In contrast, signal line 9 can be coupled to pull-up resistor 7.

[0030] The structure and functionality of the sensor circuitry 10' will be discussed below. The collector contact of transistor 14 is coupled to pin 18, while the emitter contact of transistor 12 is coupled to pin 17. The emitter contact of transistor 14 is coupled to the collector contact of transistor 12, and both are coupled to signal I / O 16. Similarly, sensor signals from sensor 5 can be received using the control or base contact of transistor 12 (here indicated by reference numeral 12g). Transistor 14 receives diagnostic signals, particularly fault or condition signals, via its control or base contact 14g.

[0031] Transistor 12 is a pull-down resistor configured to connect normal data using a first state (e.g., if it is closed). Here, the first state can be GND. Therefore, the signal I / O is configured to provide a GND potential (low level) in the first state. The second transistor 14 is a push-up transistor configured to provide a second state, such as pushing up VDD or stabilizing VDD or stabilizing a high level. Both the first and second states are activated according to the signals applied to the corresponding control contacts 12g and 14g.

[0032] If no signal is supplied to 12g and 14g, a third state is provided to signal I / O 16, such as a pull-up VDD, an unstable VDD, or an unstable high level. Figure 1 Compared to the description of the sensor circuit device 10, this third state signal depends on an external component, namely resistor 7. Therefore, as... Figure 1 and Figure 2 The pull-up resistor 7 shown in the diagram is used at pin 19. Note that GND (generally low) and VDD (generally high) are just examples and are interchangeable.

[0033] In other words, the sensor circuitry 10' uses a push-pull stage to provide three states.

[0034] In the following text, the microcontroller 20' will be discussed. It includes signal I / O 22' (with...) in its basic implementation method. Figure 1 Compared to signal I / O 22 and transistor 25, it is already... Figure 1 As discussed in the context, signal I / O 22' is configured, for example, to use a comparator to distinguish between a first state (low level) and a third / second state (high level). Transistor 25 can be utilized or controlled by signal I / O 22' to distinguish between a second state (push-up VDD) and a third state (pull-up VDD).

[0035] The difference between push-up VDD and pull-up VDD is that the second state is the so-called stable state, while the third state is the so-called unstable state. For example, the second state can be a high signal, the first state a low signal, and the third state an unstable high signal. When 19 is coupled to a low level, for example via the third transistor 25, the unstable high signal can be pulled low. For a stable high level, this coupling to a low level will result in a short circuit, which can be detected on the microcontroller side or in a low signal detected by the comparator of 22'. In this way, a stable high level (second state) and an unstable high level (third state) can be distinguished from each other. Therefore, when transistor 25 is closed, if the signal is high, signal I / O 22' can determine the second state. When transistor 25 is open, it is also possible to determine either the first state or the third state (see above).

[0036] According to an embodiment, the sensor circuit device 10' includes two transistors 12 and 14, which are connected in series to form a common node connected to a signal I / O 16 between transistors 12 and 14. The signal I / O 16 is capable of outputting a first state, a second state, and a third state. The first state depends on, for example, a first signal from sensor 5, and is output via the signal I / O using the first transistor 12. The second state depends on a second signal and is provided via the signal I / O 16 using the second transistor 14. The third state is provided via the signal I / O 16, and the first transistor 12 and the second transistor 14 are turned off / disabled. In the above embodiment, it is assumed that 17 is coupled to a low level (e.g., ground), while 18 is coupled to a high level (e.g., VDD). Of course, this could be reversed, such that 17 is coupled to a high level or VDD, and 18 is coupled to a low level / GND. Independent of the question of whether 17 is coupled to a low level (GND) or a high level (VDD), according to an embodiment, the first and second states are stable states when the third state is an unstable state.

[0037] In other words, GPIO 22' uses a push-pull stage to read out the three states.

[0038] When sensor circuit device 10' is used to transmit signals (e.g., sensor signals from sensor 5), the first signal and the third signal represent two different states of sensor 5. According to an embodiment, it is certainly possible that another (data) signal can be transmitted instead of the sensor signal. According to an embodiment, the second signal generated by using transistor 14 is a status signal, particularly a diagnostic signal or a fault signal. However, according to another embodiment, it is also possible that another sensor signal can be transmitted using the second state. According to another embodiment, it is also possible that signals other than the sensor signal can be transmitted as the first signal or the second signal.

[0039] In other words, embodiments of the invention are based on the principle that an open-drain and push-pull combination is used in the sensor circuitry to transmit at least two independent signals. This is achieved by implementing a high-side switch 14 on the sensor side to shorten the external pull-up resistor 7 used for open-drain communication. On the microcontroller side, the pull-down transistor of the GPIO can detect whether this high-side switch 14 is ON or OFF. This can be used for fault condition communication or to transmit another signal. Advantageously, this option can be used to obtain additional information without consuming additional microcontroller pins (μC-pins).

[0040] According to another embodiment, the output of the signal I / O 16 of the sensor circuitry 10', 10" includes a third pin 19 coupled to VDD via a pull-up resistor 7. The resistor 7 advantageously defines the signal belonging to the third state.

[0041] According to the embodiments, the following operating modes are used:

[0042] Mode 1 - Data is transmitted from sensor circuitry 10' to microcontroller 20'. In this mode, the second transistor 14 (S2) is OFF (off), i.e., inactive, so the first transistor 12 (S1) can be used to transmit data from sensor circuitry 10' to microcontroller 20', as... Figure 1 The context in which this is discussed.

[0043] Mode 2 - If an error occurs in sensor circuitry 10', the first transistor 12 (S1) is switched OFF, and the second transistor 14 (S2) is switched ON. Microcontroller 20' can identify this error state (second state) in sensor circuitry 10' by switching on the third transistor 25 (T1) (T1=ON): i. If the signal on line 9 is (still) high => Error ii. If the signal on line 9 is low => no error

[0044] It should be noted that, Figure 1 All the details discussed in the context can be applied to the sensor circuit device 10' and the microcontroller 20' according to the embodiments. Optional features and other details of the sensor circuit device 10' and the microcontroller 20' in Figures 3a and 3b will be discussed below.

[0045] Figure 3a illustrates an enhanced embodiment, particularly regarding... Figure 2 Enhancement. Here, there is a sensor circuit device 10”, which includes three pins: pin 17 coupled to GND, pin 18 coupled to VDD, and pin 19 coupled to signal line 9. The sensor circuit device 10” includes two transistors: transistor 14 with control contact 14g and transistor 12 with control contact 12g. Transistors 14 and 12 are arranged in series, with a signal I / O 16 between them. In this embodiment, at the node where the emitter of 14 and the collector of 12 are coupled to each other to form the signal I / O, an additional resistor 12r (R1) is provided between this node and the collector of transistor 12.

[0046] Similar to Figure 1 For example, at signal output line 9, a pull-up resistor 7 (R) is coupled between 9 and VDD. PU The embodiment of Figure 3a can be described in other words as follows: A series connection of the first transistor 12 and the second transistor 14 is arranged between a first pin 17 for applying GND or a low level and a second pin 19 for applying VDD or a high level. Signal I / O 16 includes a third pin 19 coupled to VDD via a pull-up resistor 7. It should be noted that, according to the embodiment, the R1 of resistor 12r is greater than the R of resistor 7. PU Small.

[0047] Transistor 14 (S2) is configured to shorten resistor 7 (R) PUAdditional information is provided via output pin 19. Therefore, signal S2 can be output via pin 19. As a result, 16 can transmit a first signal S1 as a first state, a second signal S2 as a second state, and another signal S3 forming a corresponding portion of S1 as a third state. According to an embodiment, signal I / O 16 is configured to provide GND or a low potential in the first state. According to another embodiment, signal I / O 16 is configured to provide a stable VDD potential or a stable high level in the second state. Note that a stable VDD potential can be characterized such that the stable VDD potential cannot be pulled low. According to other embodiments, signal I / O 16 is configured to provide an unstable VDD potential in the third state, or is configured to provide an unstable VDD potential or an unstable high level in the third state, where the unstable VDD potential is characterized such that the unstable VDD potential (generally an unstable third state) can be pulled low because the potential is provided by pull-up resistor 7, which is not bypassed by the second transistor 14.

[0048] In other words, this means that, according to an embodiment, the input of signal I / O 22' includes or is coupled to a first transistor 25, which is coupled between signal I / O 22' and a first pin 28 having a first state and is configured to be closed, thereby determining current flow in a second or third state. According to other embodiments, the input of signal I / O 22' includes or is coupled to a first transistor 25, which is coupled between signal I / O 22' and a first pin 28 having a first state and is configured to be closed, thereby determining current flow in a second or third state, and distinguishing between the second and third states based on the possibility that the third state can be pulled to the first state and / or the second state causing a short circuit.

[0049] According to an embodiment, the sensor circuit device 10” may include a controller that performs diagnostics to determine the condition or fault of the sensor circuit device 10”. This condition may be output as a signal S2 via transistor 14. For example, in a fault condition, S2 is generated to provide a signal corresponding to a second state. Preferably, transistor 12 is off in this case. According to an embodiment, the controller 11 may be triggered by a received trigger signal to perform diagnostics. According to an embodiment, the controller may output a condition signal (such as a simple confirmation signal) in response to a trigger. For example, when a first state is activated, the controller 11 is configured to output a signal different from the first state as confirmation via a second state. In the case of a second or third state being activated, the controller may output a second state signal as confirmation. For example, the signal's time period may be limited, for example, 100 ms or less. Therefore, according to an embodiment, the trigger signal may be configured to trigger the controller 11 for an internal process. Here, the internal process may be defined, for example, as the following process: For example, if the first state is active, then disable or temporarily disable the first state; For example, if the first state is active, then the second state is activated or briefly activated. For example, if the third state is active, then the first state is activated or briefly activated.

[0050] This principle is advantageous because in this approach, timely scheduling of real-time signals can be avoided, as the microcontroller can verify the real-time status based on requests / triggers.

[0051] According to an embodiment, the trigger is received on the circuit device side via signal I / O 16. For this purpose, signal I / O 16 includes input 16i, for example, a GPIO configured to receive the trigger signal via signal line 9 and pin 19. Input 69 of signal I / O 16 can be connected to controller 11. According to an embodiment, 16i is configured to identify an error check of microcontroller 20”, for example, via a trigger such as current flow in transistor 14 (S2). If sensor circuit device 10’ identifies an error check, this can be used to initiate an additional process in the sensor (e.g., outputting an acknowledgment pulse). Additionally or alternatively, sensor circuit device 10’ can be configured to identify a trigger of T2 in such a way that when the fourth transistor 23 (T2) is switched ON. This can be accomplished, for example, via current flow through transistor 12 (S1) in the sensor, for example, to verify the connection line 9 between sensor circuit device 10’ and microcontroller 20”.

[0052] Figure 3b illustrates a microcontroller 20" as an enhancement of microcontroller 20". Microcontroller 20" includes three pins 27, 28, and 29, wherein, for example, 27 is coupled to VDD or a high level, and 28 is coupled to GND or a low level. Of course, according to an embodiment, this can be reversed. Pin 29 is coupled to signal line 9 and is configured to receive a status signal, such as a first status signal, a second status signal, or a third status signal. Such a status signal can be determined by using GPIO 22' in combination with two transistors 23 and 25. Transistor 23 (the third transistor) and transistor 25 (the fourth transistor) are arranged in series between pins 27 and 28, wherein signal I / O 22' is arranged between pins 27 and 28. This means that, according to an embodiment, the control contact of 23 is coupled to 27, wherein the collector of 25 is coupled to 28. The emitter of 23 is coupled to the collector of 25 and is coupled to signal I / O 22' via a common node. By switching between the two channels 23 (T2) and 25 (T1), or especially channel 25, three different states received via signal line 9 can be read.

[0053] For example, signal detection can be as follows. A second transistor S2 (refer to FIG. 3a) providing the second state can provide additional information via an output pin through a shortened pull-up resistor 7. Whether S2 is on can be identified by turning on transistor 25 (T1), i.e., when a short circuit is caused or when the signal remains high if T1 is closed. A short circuit indicates a stable high signal. This means that, according to the embodiment, transistor 25, used to read the second state provided by transistor 14, may have direct coupling to different high / low potentials. Transistor 25 can be controlled by 22'. Advantageously, the fault condition S2 can be provided from sensor circuit device 10” to microcontroller 20” via an output pin. This would be very helpful in products such as magnetic switches, where, for example, the fault condition can be provided without additional pins.

[0054] For completeness, it should be noted that transistor 23 (T2) can be used to read out the first state, i.e., when current flows from 17 through 12 via 12r, 16, 19, 9 to 29 and then through 23 to 27. This current flow can be determined using 22'. Note that the above discussion is for the case where S2 provides a stable high signal as the second state. With 14 connected to a low level, it may provide a stable low signal. In this case, 25 may be connected to a high level for reading out the stable low signal.

[0055] According to an embodiment, the distinction between a stable high level (second state) and a high level (third state) can be achieved using transistor 25 and signal I / O 22'. It determines a short circuit. In the case of a short circuit, a stable high level is present, making the second state active. An unstable high level (i.e., the third state) is present where current may flow through 22', but the signal can be pulled low. Therefore, the distinction between a stable high level and a high state that can be pulled low by microcontroller 20" is achieved. In other words, this means that when the sensor output is high, current will always flow once microcontroller 20" attempts to pull the wire; a large current exists via pull-up resistor 7 or push-up transistor 14. Therefore, the three signals corresponding to the second state, third state, and first state—high, pull-up, and low—can be transmitted from circuit device 10" to 20" by microcontroller 20" and determined in a unique manner.

[0056] According to other embodiments, if the signal from signal line 9 is in a third state, the third transistor 25 is configured to close, thereby pulling the signal from signal line 9 to a first state; additionally or alternatively, if the signal from signal line 9 is in a second state, and if the third transistor 25 coupled between the signal I / O 22” of microcontroller 20' and the first pin 28 having the first state and being closed does not pull the signal from signal line 9 to the first state, then the input of the signal I / O 22” of microcontroller 20' is configured to determine the second state.

[0057] According to other embodiments, the output of 22' is configured to output a trigger signal to sensor circuit device 10' or 10" to initiate an internal process, or is configured to read out sensor circuit device 10', 10" in particular regarding the activation of the second state.

[0058] According to an embodiment, a signal (e.g., a first state) may be continuously provided. In this case, it is advantageous when the controller 20” is enabled to start or trigger internal processes (such as diagnostic processes). According to an embodiment, the signal I / O is configured to provide a trigger signal to the sensor circuitry 10” via pin 29. For this purpose, a continuously high signal can be provided using transistor 23. Alternatively, a continuously low signal can be applied using transistor 25.

[0059] This serves the purpose described above, to initiate internal processes (such as diagnostic processes) or respond to real-time signals, for example, by briefly disabling the first state and switching to the third or second state, or by briefly activating the second state. In the case of activation of the third or second state, it may also be triggered to briefly activate the first state in response. When the microcontroller 20” moves to the detection of sensor errors, the microcontroller 20” no longer needs to monitor the sensor signal relative to time, thus requiring less intervention on the microcontroller side. Therefore, the microcontroller is always in a charging state.

[0060] According to other embodiments, the output of signal I / O 22' includes or is coupled to a third transistor 25, which is coupled between signal I / O 22' and a first pin 28 having a first state, wherein triggering includes: outputting the first state via signal I / O 22' using the third transistor 25. According to other embodiments, the output of signal I / O 22' includes or is coupled to a fourth transistor 23, which is coupled between signal I / O 22' and a second pin 27 having a second state, wherein triggering includes: outputting the second state via signal I / O 22' using the second transistor 23.

[0061] According to an embodiment, signal I / O 22' is configured to receive feedback as a response to an internal process via a first state or preferably a second or third state. This means that sensor 10" responds to the analysis of microcontroller 10" with a predefined answer to confirm the analysis request (perform diagnostics such as fault detection or detection)

[0062] According to other embodiments, the input of signal I / O 22' includes or is coupled to a fourth transistor 23, which is coupled between signal I / O 22' and a second pin 27 having a second state and is configured to be closed, thereby determining a first state if a short circuit is present. Note that signal I / O 22' is configured to receive and transmit signals via 19, i.e., including both input and output, both of which are connected to pin 19 of signal I / O.

[0063] Figure 4 The combination of 10” and 20” is shown. As can be seen, signal line 9 connects pins 19 and 29. The 10” signal I / O is located at pin 19, while the 20” signal I / O is located at pin 29.

[0064] It should be noted that on both the circuit side of circuit 10” and the microcontroller side of microcontroller 20”, signal I / O includes inputs and outputs, both of which are correspondingly coupled to signal pins 19 and 29.

[0065] like Figure 4As illustrated, another embodiment provides a system including circuits 10” and 20”.

[0066] As mentioned above, in R1 and R PU In the dimensions, R1 is preferably chosen to be greater than R. PU Smaller, or significantly smaller. Regarding transistor 14 and the corresponding transistor 25, it should be mentioned that 14 is "more powerful" than transistor 25.

[0067] The advantages of the above embodiments are that additional information (such as diagnostic information) can be transmitted to both the microcontroller 20” and the circuit device 10” based on existing standards.

[0068] Similarly, in the above embodiments, the emitter and collector contacts for circuits 10' and 10" and 20 have been clearly discussed. For example, in the discussed embodiments, a bipolar NPN transistor is used. Alternatively, different transistors (such as PNP) can also be used. It should be noted that the emitter and collector connections may be different, for example, or vice versa. Preferably, control contacts (also referred to as base contacts) 12g and 14g are connected to the sensor or configured to receive the transmitted signals S1 and S2. According to alternative embodiments, different transistors, such as FETs, can be used, having a source contact instead of a collector, a gate contact instead of a base (generally a control contact), and a drain contact instead of an emitter.

[0069] Referring to Figures 5 and 5b, seven different stages will be discussed. Figure 5a shows... Figure 4 The system is illustrated with faults F1 through F7. According to fault F1, the line used for pull-up resistor 7 is disconnected. According to fault F2, signal line 9 is connected to VDD. According to fault F3, signal line 9 is set to GND. According to F4, signal line 9 is disconnected. According to F5, the signal line is disconnected near pin 19. According to F6, the FDD line is disconnected at pin 18 on the sensor side. According to fault F7, the GND line is disconnected at pin 17. Figure 5 shows the possible combinations of conditions for detecting F1 through F7.

[0070] The following discussion focuses on potential triggering based on the open / closed states of S1 and S2. With S1 closed and S2 open, a T2 closing pulse can be sent, generating state 1 (also known as the first state). When the 20” input is functioning correctly, some current is obtained, but limited by R1. With S1 open and S2 closed, a T1 closing pulse may be sent, generating state 2 (also known as the second state). When the microcontroller 20” input is functioning correctly, high current can be detected, potentially activating internal short-circuit protection. With S1 open and S2 open, a T1 closing pulse can be sent, generating state 3 (also known as the third state). The result of correct functioning is that low current is detected at the microcontroller 20” input. All these three different triggering methods and expected responses make it possible to identify some of the aforementioned faults. Specifically, as shown in the matrix in Figure 5, faults F1, F2, F5, F6, and F7 can be detected based on states S1 and S2. The shaded areas are always incorrectly assumed in this case; without shaded areas, fault detection is impossible.

[0071] For example, for fault F1, no pull-up signal line can float. Here, some states may theoretically work, but the sensor detects the missing pull-up and can switch to fault state 2. To determine this fault, the distinction between different states is implemented. With S1 closed and S2 open, the current flowing to input 22' of microcontroller 20” is limited by R1. With S1 open and S2 closed, the current flowing to input 22' of microcontroller 20” is high, which may activate the internal short-circuit protection. With S1 open and S2 open, if no transistor is closed, it may cause floating at microcontroller 20”.

[0072] In the case of fault F2, good detection is possible if S1 is open and S2 is closed. In this case, the second-state behavior can be determined if the microcontroller 20” determines the second-state behavior at its input 22' regardless of the sensor signal.

[0073] Although some aspects have been described in the context of the apparatus, it is clear that these aspects also represent a description of the corresponding method, where a block or device corresponds to a method step or a feature of a method step. Similarly, aspects described in the context of method steps also represent a description of a corresponding block or item or a feature of a corresponding apparatus. Some or all steps may be performed by (or using) hardware means, such as, for example, a microprocessor, a programmable computer, or electronic circuitry. In some embodiments, some or more of the most important method steps may be performed by such means.

[0074] Depending on certain implementation requirements, embodiments of the present invention can be implemented in hardware or software. Such implementation can be achieved using digital storage media with electrically readable control signals stored thereon, such as floppy disks, DVDs, Blu-ray discs, CDs, ROMs, PROMs, EPROMs, EEPROMs, or FLASH memories, which cooperate (or are capable of cooperating with) a programmable computer system to enable the execution of the corresponding methods. Therefore, the digital storage medium can be computer-readable.

[0075] Some embodiments of the invention include a data carrier having electronically readable control signals, which enables cooperation with a programmable calculator system to perform one of the methods described herein.

[0076] Typically, embodiments of the present invention can be implemented as a computer program product having program code that, when run on a computer, is operable to perform one of the methods. The program code may, for example, be stored on a machine-readable medium.

[0077] Other embodiments include a computer program stored on a machine-readable medium for performing one of the methods described herein.

[0078] In other words, therefore, an embodiment of the method of the present invention is: when a computer program product is run on a computer, the computer program has program code for performing one of the methods described herein.

[0079] Therefore, another embodiment of the method of the present invention is a data carrier (or digital storage medium, or computer-readable medium) comprising a computer program recorded thereon for performing one of the methods described herein. The data carrier, digital storage medium, or recorded medium is typically tangible and / or non-transitional.

[0080] Therefore, another embodiment of the method of the present invention represents a data stream or signal sequence for performing one of the methods described herein. The data stream or signal sequence may, for example, be configured to be transmitted via a data communication connection (e.g., via the Internet).

[0081] Another embodiment includes a processing device, such as a computer or a programmable logic device, configured or adapted to perform one of the methods described herein.

[0082] Another embodiment includes a computer having a computer program installed thereon for performing one of the methods described herein.

[0083] Another embodiment of the invention includes an apparatus or system configured to transmit (e.g., electronically or optically) a computer program for performing one of the methods described herein to a receiver. The receiver may be, for example, a computer, a mobile device, a memory device, etc. The apparatus or system may, for example, include a file server for transmitting the computer program to the receiver.

[0084] In some embodiments, a programmable logic device (e.g., a field-programmable gate array) may be used to perform some or all of the functions of the methods described herein. In some embodiments, the field-programmable gate array may cooperate with a microprocessor to perform one of the methods described herein. Generally, the method is preferably performed by any hardware device.

[0085] The above embodiments are merely illustrative of the principles of the invention. It should be understood that modifications and variations of the apparatus and the detailed description herein will be apparent to those skilled in the art. Therefore, the intent is limited only by the scope of the forthcoming patent claims and not by the specific details provided by way of the description and explanation of the embodiments herein.

Claims

1. A circuit arrangement (10', 10") combined with a microcontroller (20'), The circuit device (10', 10") includes a first transistor (12) and a second transistor (14), the first transistor and the second transistor being arranged in series, and having a signal I / O (16) of the circuit device (10', 10") between the first transistor and the second transistor; wherein the first transistor (12) is configured to output a first state to the signal I / O (16) of the circuit device (10', 10) according to a first signal; wherein the second transistor (14) is configured to output a second state to the signal I / O (16) of the circuit device (10', 10) according to a second signal; wherein if the first transistor and the second transistor (14) are disabled, the signal I / O (16) of the circuit device (10', 10) is configured to provide a third state; The microcontroller (20') includes a signal I / O (22') and a third transistor (25), the signal I / O (22') of the microcontroller (20') including an input configured to distinguish between a first state and a second state or a third state provided by the circuit device via a signal line; wherein the third transistor (25) is coupled to a signal line (9) via the signal I / O (22') of the microcontroller (20'), wherein the signal I / O (22') of the microcontroller (20') is configured to distinguish between the second state and the third state by using the third transistor (25).

2. The circuit (10', 10") according to claim 1, wherein the second signal includes a status signal, particularly a diagnostic signal or a fault signal.

3. The circuit device (10', 10") according to any one of the preceding claims, wherein the first signal includes a sensor signal, particularly a magnetic sensor signal.

4. The circuit device (10', 10") according to any one of the preceding claims, wherein the signal I / O (16) of the circuit device (10', 10") includes a third pin (19) coupled to VDD via a pull-up resistor (7).

5. The circuit arrangement (10', 10') according to any one of the preceding claims, wherein the third transistor (25) is coupled between the signal I / O (22') of the microcontroller (20') and the first pin (28) having the first state and is configured to be closed so that if the signal from the signal line (9) is in the third state, the signal from the signal line (9) is pulled to the first state; and / or The input of the signal I / O (22') of the microcontroller (20') is configured such that, when the signal from the signal line (9) is in the second state, if the third transistor (25), which is coupled between the signal I / O (22') of the microcontroller (20') and the first pin (28) having the first state and is closed, does not pull the signal from the signal line (9) to the first state, then the second state is determined.

6. The circuit arrangement (10', 10") according to any one of the preceding claims, wherein the signal I / O (16) of the circuit arrangement (10', 10") is configured to provide a stable VDD potential in the second state, the stable VDD potential being characterized in that the stable VDD potential cannot be pulled low by the third transistor (25); and / or The signal I / O (16) of the circuit device (10', 10") is configured to provide an unstable VDD potential in the third state, wherein the unstable VDD potential is provided by a pull-up resistor (7), which is not bypassed by the second transistor (14) or can be pulled low by the third transistor (25).

7. The circuit arrangement (10', 10") according to any one of the preceding claims, wherein the series connection of the first transistor (12) and the second transistor (14) is arranged between the first pin (17) for applying GND and the second pin (18) for applying VDD.

8. The circuit device (10', 10") according to any one of the preceding claims, wherein the second signal and / or the first signal is applied to the control contacts (12g, 14g) of the corresponding first transistor and / or second transistor.

9. The circuit arrangement (10', 10') according to any one of the preceding claims, wherein the drain contact or emitter contact of the first transistor (12) is coupled to the first pin (17); and / or The source contact or collector contact of the second transistor (14) is coupled to the second pin (18); and / or The source or collector contact of the first pin (17) is coupled to the drain or emitter contact of the second transistor (14).

10. The circuit device (10', 10") according to any one of the preceding claims further includes a controller (11) configured to determine a condition, particularly a diagnostic condition or a fault condition, and / or the controller (11) is connected to the second transistor (14) and configured to provide the second signal.

11. The circuit device (10', 10") according to any one of the preceding claims, wherein the signal I / O (16) of the circuit device (10', 10") is configured to receive a trigger signal, particularly via a third pin (19). The trigger signal is configured to trigger the controller (11) for an internal process.

12. The circuit device (10', 10") according to claim 11, wherein the internal process is one of the following: If the first state is active, then disable or temporarily disable the first state; If the first state is active, then the second state is activated or briefly activated. If the third state is active, then the first state is activated or briefly activated.

13. The circuit device (10', 10") according to any one of the preceding claims, wherein the signal I / O (22') of the microcontroller (20') includes an output configured to output the trigger signal to the circuit device (10', 10") to initiate the internal process, or the output configured to read out the circuit device (10', 10"), particularly with respect to the second state.

14. The circuit arrangement (10', 10') of claim 13, wherein the output of the signal I / O (22') of the microcontroller (20') is coupled to a fourth transistor (23), the fourth transistor being coupled between the signal I / O (22') of the microcontroller (20') and a second pin (29) having the second state, wherein the triggering comprises: The second state is output via the signal I / O (22') of the microcontroller (20') using the second transistor (23); or the output of the signal I / O (22') of the microcontroller (20') is coupled to the third transistor (25), which is coupled between the signal I / O (22') of the microcontroller (20') and the first pin (28) having the first state, wherein the triggering includes: outputting the first state via the signal I / O (22') of the microcontroller (20') using the first transistor (25).

15. The circuit device (10', 10") according to any one of claims 11 to 14, wherein the circuit device (10', 10") is configured to receive feedback as a response to or trigger of the internal process via the first state or preferably the second state or the third state.

16. A method for operating a circuit device (10', 10") combined with a microcontroller (20'), The circuit device (10', 10) includes a first transistor (12) and a second transistor (14), the first transistor and the second transistor being arranged in series, and having a signal I / O (16) of the circuit device (10', 10) between the first transistor and the second transistor. The microcontroller (20') includes a signal I / O (22') and a third transistor (25), the signal I / O (22') of the microcontroller (20') including an input, wherein the third transistor (25) is coupled to a signal line (9) via the signal I / O (22') of the microcontroller (20'), comprising the following steps: By using the first transistor (12), a first state is output to the signal I / O (16) of the circuit device (10', 10") according to the first signal. By using the second transistor (14), the second state is output to the signal I / O (16) of the circuit device (10', 10") according to the second signal. If the first transistor and the second transistor (14) are disabled, a third state is provided; Distinguish between the first state and the second state or the third state provided by the circuit device (10', 10") via the signal line (9); as well as The second state and the third state are distinguished by using the third transistor (25).

17. A computer program for performing the method of claim 16 when run on a computer.

Images