Boron emitter passivation structure and preparation method thereof

Abstract

The invention provides a boron emitter passivation structure and a preparation method thereof.The passivation structure comprises a boron emitter, the boron emitter comprises silicon, boron, carbon and hydrogen, a nano silicon oxide layer is arranged on the surface of the boron emitter, the boron emitter comprises an electric injection region and a doped region, a conductive layer is arranged at the corresponding position of the electric injection region, and the doped region is arranged on the surface of the nano silicon oxide layer. The conductive layer is used for being connected with a metal electrode, a passivation anti-reflection layer is arranged at the corresponding position of the doped region, and the carbon concentration of the doped region is higher than that of the electric injection region. According to the invention, a partitioned passivation technology is adopted, and carbon is introduced into the doped region of the boron emitter, so that an excellent passivation effect can be realized, and surface recombination is reduced; the electric injection region is not doped with carbon and is not provided with a passive film, so that the contact resistivity of the metal electrode is improved; a conductive channel is introduced into the electric injection region for electric injection, so that the defect state of the boron emitter can be further eliminated, and the recombination current is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of surface passivation of crystalline silicon solar cells, in particular to a boron emitter passivation structure and a preparation method thereof. BACKGROUND

[0002] Surface passivation technology plays a crucial role in improving the performance of silicon-based semiconductor devices, especially in the field of crystalline silicon solar cells. The quality of surface passivation directly affects the improvement of photoelectric conversion efficiency. When evaluating the quality of surface passivation, two physical quantities need to be considered: saturation current density (J0) and implied open-circuit voltage (iV oc ). The value of J0 reflects the degree of surface recombination, while iV oc represents both surface recombination and bulk recombination. Therefore, lower J0 value and higher iV oc value mean lower surface recombination and bulk recombination, which helps to improve the performance and stability of the cell.

[0003] Tunnel oxide passivated contact (TOPCon) cells are one of the mainstream solar cells in the industry. The passivation of the back side of the TOPCon cell is already very good, while the boron emitter on the front side of the cell usually adopts an aluminum oxide and silicon nitride stack passivation structure, and the surface recombination is still significant. Taking a sheet resistance of 200-400Ω / sq emitter as an example, the J0 of the passivated boron emitter is about 8-12fA / cm 2 (industrial low resistance silicon wafer, resistivity about 1-3Ωcm), which becomes the main source of photogenerated carrier recombination in the cell, restricting the further improvement of cell efficiency. In addition, due to the poor conductivity of the passivation film, it will have an adverse effect on the contact resistivity of the cell. SUMMARY

[0004] In view of the deficiencies of the prior art, the technical problem to be solved by the present application is how to reduce the recombination loss of the boron emitter of the TOPCon cell and improve the contact resistivity of the electrode.

[0005] To solve the above problems, the present application provides a boron emitter passivation structure, which comprises a boron emitter, the composition of the boron emitter includes silicon, boron, carbon and hydrogen, a nano-silicon oxide layer is provided on the surface of the boron emitter, the boron emitter includes an electrical injection region and a doped region, a conductive layer is provided at the corresponding position of the electrical injection region, the conductive layer is used to connect a metal electrode, a passivation and anti-reflection layer is provided at the corresponding position of the doped region, and the carbon concentration of the doped region is higher than that of the electrical injection region.

[0006] The present application adopts the partition passivation technology, introduces carbon element in the doped region of the boron emitter, can realize excellent passivation effect, reduces the surface recombination; the carbon doping is not carried out in the electrical injection region, and the passivation film is not set, which is beneficial to improve the contact resistivity of the metal electrode; the electrical injection region introduces the conductive channel, is used for carrying out electrical injection, can further eliminate the defect state of the boron emitter, and reduces the recombination current.

[0007] Further, the carbon concentration of the doped region is higher than 1*10 18 cm -3 , the hydrogen concentration is higher than 1*10 19 cm -3 , and the carbon concentration of the electrical injection region is lower than 1*10 17 cm -3 . The high-concentration carbon doping in the doped region can inhibit boron defects, improve hydrogen concentration, and reduce the surface saturation current density.

[0008] Further, in the doped region, the farther from the surface, the lower the carbon element concentration, and the carbon concentration of the near-surface part of the doped region is higher than 1*10 19 cm -3 . The near-surface part refers to the region close to the surface of the boron emitter, generally refers to the region within 10nm or 20nm from the surface.

[0009] Further, the thickness of the boron emitter is 100-2000nm.

[0010] In order to reduce parasitic absorption, the carbon element in the boron emitter is injected later, which has a downward trend from the surface to the body, but still has a high concentration at a certain depth, which can inhibit the boron defects of the emitter, realize excellent passivation effect, and improve the structural chemical stability.

[0011] Further, the thickness of the nanometer silicon oxide layer is 1-5nm, and the absorption coefficient k of the nanometer silicon oxide layer at a wavelength of 500nm or more is less than 0.1cm -1 . The existence of the nanometer silicon oxide layer is beneficial to improve the interface hydrogen concentration, thereby improving the passivation performance, and the thickness of the nanometer silicon oxide layer is small, and the influence on optical absorption is small.

[0012] Further, the material of the conductive layer is boron-doped polysilicon or transparent conductive oxide. The conductive layer reserves a conductive channel, which is used for subsequent electrical injection to eliminate the defect state of the boron emitter.

[0013] The preparation method of the above-mentioned boron emitter passivation structure comprises the following steps:

[0014] Cleaning the N-type silicon wafer, and texturing or polishing the surface;

[0015] The silicon wafer is transferred to a diffusion furnace for boron diffusion, and a boron emitter is formed on the surface of the silicon wafer, and then the boron source is removed by cleaning;

[0016] A nano-silicon oxide layer is prepared on the surface of the boron emitter;

[0017] An electric injection area and a doped area of the boron emitter are selected, a carbon-silicon layer is prepared on the doped area, and a conductive layer is prepared on the electric injection area;

[0018] High-temperature annealing is performed in an inert gas atmosphere, so that carbon atoms in the carbon-silicon layer diffuse into the doped area of the boron emitter;

[0019] The carbon-silicon layer is etched and removed;

[0020] A passivation and anti-reflection layer is prepared on the surface of the substrate, and then the passivation and anti-reflection layer corresponding to the conductive layer is removed;

[0021] An external electrode acts on the conductive layer to perform electric injection under dark field conditions or under strong light irradiation.

[0022] The method can introduce carbon atoms into the doped area of the boron emitter, the carbon atoms can react with silicon interstitial atoms in the boron emitter to reduce the concentration of boron clusters, and the carbon can also capture hydrogen atoms to passivate deep level defects through the hydrogen atoms; the conductive layer is prepared on the position corresponding to the metal electrode to form a conductive channel, and the boron emitter is electrically injected through the conductive layer, which can further eliminate the defect states of the boron emitter and reduce the recombination current, and the partition passivation technology can avoid the influence of the passivation structure on the contact resistivity, which is beneficial to improve the cell efficiency.

[0023] The second aspect of the present application provides another boron emitter passivation structure, which is different from the above-mentioned boron emitter passivation structure in that a carbon-silicon layer is arranged at a position corresponding to the doped area, the carbon-silicon layer is located between the nano-silicon oxide layer and the passivation and anti-reflection layer, and the composition of the carbon-silicon layer includes silicon, carbon, hydrogen and oxygen.

[0024] The carbon-silicon layer can provide carbon elements for the doped area of the boron emitter, has the effect of inhibiting boron defects and improving hydrogen concentration, so as to achieve the effect of improving the passivation performance of the doped area.

[0025] Further, the carbon-silicon layer is composed of one or more carbon-silicon thin films, and the carbon content of each carbon-silicon thin film is 1at% to 50at%.

[0026] Further, the thickness of the carbon-silicon layer is 1 to 50 nm, and the refractive index is 1.5 to 3.5.

[0027] Further, the hydrogen concentration in the carbon-silicon layer is higher than 1×10 20 cm -3 .

[0028] In the passivation structure, the carbon-silicon layer mainly provides carbon elements, suppresses boron emitter defects, and increases hydrogen concentration; the carbon element content of each carbon-silicon thin film in the carbon-silicon layer can be adjusted, so as to change the doping effect of the doped region and the optical performance of the carbon-silicon layer.

[0029] The preparation method of the above boron emitter passivation structure comprises the following steps:

[0030] Cleaning the N-type silicon wafer, and texturing or polishing the surface;

[0031] Preparing a nano-silicon oxide layer on the surface of the boron emitter;

[0032] Selecting an electrical injection region and a doped region of the boron emitter, preparing a carbon-silicon layer on the doped region, and preparing a conductive layer on the electrical injection region;

[0033] Performing high-temperature annealing in an inert gas atmosphere, so that carbon atoms in the carbon-silicon layer diffuse into the doped region of the boron emitter;

[0034] Preparing a passivation and anti-reflection layer on the surface of the substrate, and then removing the passivation and anti-reflection layer corresponding to the conductive layer;

[0035] The external electrode acts on the conductive layer to perform electrical injection under dark field conditions or electrical injection under strong light irradiation.

[0036] In summary, the present application has the following beneficial effects relative to the prior art:

[0037] (1) The present application adopts a partition passivation technology, introduces carbon elements into the doped region of the boron emitter, and prepares a passivation structure, so that excellent passivation effect can be achieved, surface recombination is reduced, and the performance and stability of the battery are improved.

[0038] (2) The present application introduces a conductive channel in the electrical injection region of the boron emitter, which is used for electrical injection, so that the defect states of the boron emitter can be further eliminated, the recombination current is reduced, and the single-side saturation current density can reach 2-5 fA / cm 2 , which is much better than that of a conventional boron emitter.

[0039] (3) The present application does not perform carbon doping in the electrical injection region (position corresponding to the metal electrode) of the boron emitter, and does not set a passivation film, but directly sets a conductive layer, which is beneficial to improve the contact resistivity of the metal electrode.

[0040] (4) The parasitic absorption of the passivation structure of the present application is mainly derived from the passivation and anti-reflection film of aluminum oxide and silicon nitride, and the optical parasitic absorption is small, which has little effect on the short-circuit current.

[0041] (5) The passivation technology of the present application is fully compatible with the existing battery production line, has good industrial application prospects, and other transparent dielectric films can be stacked on the passivation structure to form a more complex film system structure, and the technology has strong expandability. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the structure of the passivation sheet prepared in Example 2 of the present invention.

[0043] Figure 2 This is a schematic diagram of the passivation sheet prepared in Comparative Example 1 of the present invention.

[0044] Figure 3 This is a schematic diagram of the structure of the TOPCon battery prepared in Example 5 of the present invention.

[0045] Figure 4 This is a schematic diagram of the TOPCon battery prepared in Comparative Example 2 of the present invention.

[0046] Explanation of reference numerals in the attached figures:

[0047] 1-Silicon wafer, 2-Boron emitter, 3-Nano silicon oxide layer, 4-Silicon carbon layer, 5-Conductive layer, 6-Alumina layer, 7-Silicon nitride layer, 8-Tunneling oxide layer, 9-Phosphorus-doped polycrystalline silicon layer. Detailed Implementation

[0048] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the following embodiments are only used to illustrate the implementation methods and typical parameters of the present invention, and are not intended to limit the parameter range described in the present invention. Reasonable variations derived therefrom are still within the protection scope of the claims of the present invention.

[0049] It should be noted that the endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of the various ranges, the endpoint values ​​of the various ranges and individual point values, and individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed herein.

[0050] This invention provides a boron emitter passivation structure, including a boron emitter, which can be located on the front or back side of a silicon wafer. The boron emitter is divided into an electro-injection region and a doped region. A nano-silicon oxide layer is provided on the surface of the boron emitter, and a conductive layer is provided on the nano-silicon oxide layer at a position corresponding to the electro-injection region for connection with a metal electrode; a silicon carbide layer (optional) and a passivation anti-reflection layer are provided at a position corresponding to the doped region. The doped region, nano-silicon oxide layer, and silicon carbide layer of the boron emitter all contain high concentrations of carbon and hydrogen elements, which reduces the interface state density of the boron emitter surface region and improves the bulk lifetime, thereby improving the passivation performance of the boron emitter. The electro-injection region of the boron emitter is not carbon-doped, which helps to improve the contact resistivity of the electro-injection region, and a conductive channel is reserved in the electro-injection region for electro-injection, which can further eliminate defect states of the boron emitter and reduce recombination current.

[0051] The typical process for preparing the above-mentioned boron emitter passivation structure includes the following steps:

[0052] (1) Prepare an N-type silicon wafer and texturize or polish its surface.

[0053] (2) The silicon wafer is transferred to a diffusion furnace for boron diffusion, forming a boron emitter on the wafer surface. The boron source is then removed by cleaning. The boron concentration in the boron emitter is higher than 1 × 10⁻⁶. 18 cm -3 The thickness of the boron emitter is 100–2000 nm, preferably 600–1000 nm.

[0054] (3) A nano-silicon oxide layer is prepared on the surface of the boron emitter. A typical preparation method for the nano-silicon oxide layer is plasma-enhanced chemical vapor deposition (PECVD). The thickness can range from 1 to 5 nm, preferably from 1 to 2 nm, and its absorption coefficient k at wavelengths above 500 nm is less than 0.1 cm⁻¹. -1 The nano-silicon oxide layer mainly serves to improve surface passivation.

[0055] (4) Select the injection region and doping region of the boron emitter, prepare a silicon-carbon layer on the doped region, and prepare a conductive layer on the injection region. The silicon-carbon layer consists of one or more silicon-carbon thin films. The typical preparation method for the silicon-carbon layer is PECVD. The carbon element ratio in each silicon-carbon thin film can be adjusted, with a preferred carbon content of 1 at% to 50 at%. The thickness of the silicon-carbon layer can range from 1 to 50 nm, with a preferred thickness range of 1 to 5 nm, and a refractive index range of 1.5 to 3.5. Optional materials for the conductive layer include boron-doped polycrystalline silicon, transparent conductive oxides, etc.

[0056] (5) High-temperature annealing is performed to allow carbon elements in the silicon carbide layer to diffuse into the doped region of the boron emitter, thereby suppressing boron emitter defects and facilitating subsequent increases in hydrogen concentration. The typical temperature range for high-temperature annealing is 600℃~1100℃, with a nitrogen atmosphere. After high-temperature annealing, the carbon concentration in the nano-silicon oxide layer is higher than 1×10⁻⁶. 19 cm -3 Furthermore, carbon is enriched at the interface between the nano-silica layer and the boron emitter, where the carbon concentration exceeds 1×10⁻⁶. 19 cm -3 The carbon in the doped region was implanted later, and its concentration decreases from the surface to the bulk. Even at a depth of 100 nm below the surface of the doped region, the carbon concentration remains above 5 × 10⁻⁶. 18 cm -3 The carbon concentration in the doped region is higher than 1×10⁻⁶. 18 cm -3 The electro-injection region does not actively introduce carbon atoms; the carbon concentration in this region is less than 1 × 10⁻⁶. 17 cm -3 .

[0057] (6) A passivation antireflection layer is prepared on the substrate surface, and the passivation antireflection layer at the corresponding part of the conductive layer is removed. Common passivation antireflection layers are composed of aluminum oxide thin films and silicon nitride thin films.

[0058] (7) The external electrode is applied to the conductive layer for electro-injection under dark field conditions or under strong light irradiation.

[0059] In some embodiments, after high-temperature annealing in step (5), the silicon carbide layer is etched away to reduce parasitic absorption.

[0060] This invention employs a partitioned passivation technique, introducing carbon elements into the doped region of the boron emitter to achieve excellent passivation and reduce surface recombination. A conductive channel is provided in the electro-injection region for electro-injection to further eliminate defect states in the boron emitter and reduce recombination current. Furthermore, the electro-injection region does not undergo carbon doping or have a passivation film, which helps improve the contact resistivity of the electro-injection region. Applying this invention to the fabrication of N-type tunneling oxide passivated contact batteries can improve battery efficiency, and the process method is fully compatible with existing battery production lines, demonstrating excellent industrial application prospects.

[0061] The technical solution and effects of the present invention will be described below through specific embodiments.

[0062] Example 1

[0063] (1) Take an N-type silicon wafer with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and double-sided texturing.

[0064] (2) The silicon wafer is transferred to a diffusion furnace for boron diffusion, and then the surface boron source (usually borosilicate glass BSG) is removed, forming boron emitters on both sides with a sheet resistance of 200-250 Ω / sq.

[0065] (3) Clean and etch both sides of the silicon wafer with BSG, and place it in PECVD to deposit a nano silicon oxide layer with a thickness of 2nm.

[0066] (4) A carbon silicon layer is deposited on the nano-silicon oxide layer. The carbon silicon layer consists of a carbon silicon thin film with a thickness of 3 nm and a carbon content of 20 at%.

[0067] (5) Place the sample in an annealing furnace and anneal at 900°C for 30 minutes under a nitrogen atmosphere.

[0068] (6) Place the cleaned sample into an ALD and deposit an alumina layer on both sides.

[0069] (7) The sample is placed in PECVD and silicon nitride layers are deposited on both sides to obtain a passivated wafer.

[0070] The performance of the passivation sheet prepared in this embodiment was tested, and the surface saturation current density was 2.1 fA / cm². 2 The hidden open-circuit voltage is 746mV, and the sample lifetime is approximately 1400μs at an injection level of 1E15.

[0071] Example 2

[0072] (1) Take an N-type silicon wafer 1 with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and double-sided texturing.

[0073] (2) Transfer silicon wafer 1 to a diffusion furnace for boron diffusion, then remove the surface boron source, and form boron emitters 2 on both sides with a sheet resistance of 200-250 Ω / sq.

[0074] (3) Clean and etch both sides of silicon wafer 1 with BSG, and place it in PECVD to deposit a nano silicon oxide layer 3 with a thickness of 2nm.

[0075] (4) Select the electro-injection region and doping region of boron emitter 2, prepare a carbon silicon layer 4 on the doping region, the carbon silicon layer 3 is composed of a carbon silicon thin film with a thickness of 3nm, and the carbon element content is 20at%; prepare a boron-doped amorphous silicon thin film as a conductive layer 5 on the electro-injection region.

[0076] (5) The sample was placed in an annealing furnace and annealed at 900°C for 30 minutes under a nitrogen atmosphere to convert boron-doped amorphous silicon into boron-doped polycrystalline silicon.

[0077] (6) Place the cleaned sample into an ALD and deposit an alumina layer 6 on both sides.

[0078] (7) The sample is placed in PECVD, and silicon nitride layers 7 are deposited on both sides to obtain a passivation wafer, the structure of which is as follows: Figure 1 As shown.

[0079] (8) Apply voltage to conductive layer 5 for electro-injection.

[0080] The performance of the passivation sheet prepared in this embodiment was tested, with a surface saturation current density of 1.5 fA / cm². 2 The hidden open-circuit voltage is 748mV, and the sample lifetime is approximately 2200μs at an injection level of 1E15.

[0081] Example 3

[0082] (1) Take an N-type silicon wafer with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and double-sided texturing.

[0083] (2) The silicon wafer is transferred to a diffusion furnace for boron diffusion, and then the surface boron source is removed to form boron emitters on both sides with a sheet resistance of 200-250 Ω / sq.

[0084] (3) Clean and etch both sides of the silicon wafer with BSG, and place it in PECVD to deposit a nano silicon oxide layer with a thickness of 2nm.

[0085] (4) A carbon silicon layer is deposited on the nano-silicon oxide layer. The carbon silicon layer consists of a carbon silicon thin film with a thickness of 6 nm and a carbon content of 30 at%.

[0086] (5) Place the sample in an annealing furnace and anneal at 900°C for 30 minutes under a nitrogen atmosphere.

[0087] (6) Etch the silicon carbide layer clean and clean the substrate surface.

[0088] (7) Place the cleaned sample into an ALD and deposit an alumina layer on both sides.

[0089] (8) The sample is placed in PECVD and silicon nitride layers are deposited on both sides to obtain a passivated wafer.

[0090] The performance of the passivation sheet prepared in this embodiment was tested, and the surface saturation current density was 2.9 fA / cm². 2 The hidden open-circuit voltage is 746mV, and the sample lifetime is approximately 1500μs at an injection level of 1E15.

[0091] Example 4

[0092] (1) Take an N-type silicon wafer with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and double-sided texturing.

[0093] (2) The silicon wafer is transferred to a diffusion furnace for boron diffusion, and then the surface boron source (usually borosilicate glass BSG) is removed, forming boron emitters on both sides with a sheet resistance of 200-250 Ω / sq.

[0094] (3) Clean and etch both sides of the silicon wafer with BSG, and place it in PECVD to deposit a nano silicon oxide layer with a thickness of 2nm.

[0095] (4) Select the electro-injection region and doping region of the boron emitter, prepare a silicon carbon layer on the doping region. The silicon carbon layer consists of a silicon carbon film with a thickness of 6 nm and a carbon content of 30 at%. Prepare a TCO conductive layer on the electro-injection region.

[0096] (5) Place the sample in an annealing furnace and anneal at 900°C for 30 minutes under a nitrogen atmosphere.

[0097] (6) Etch the silicon carbide layer clean and clean the substrate surface.

[0098] (7) Place the cleaned sample into an ALD and deposit an alumina layer on both sides.

[0099] (8) The sample is placed in PECVD and silicon nitride layers are deposited on both sides to obtain a passivated wafer.

[0100] (9) Apply voltage to conductive layer 5 under strong LED light irradiation to perform electro-injection.

[0101] The performance of the passivation sheet prepared in this embodiment was tested, with a surface saturation current density of 1.3 fA / cm². 2 The hidden open-circuit voltage is 749mV, and the sample lifetime is approximately 2300μs at an injection depth of 1E15.

[0102] Comparative Example 1

[0103] (1) Take an N-type silicon wafer 1 with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and double-sided texturing.

[0104] (2) Transfer silicon wafer 1 to a diffusion furnace for boron diffusion, then remove the surface boron source, and form boron emitters on both sides with a sheet resistance of 200-250 Ω / sq.

[0105] (3) Clean and etch both sides of silicon wafer 1 with BSG and perform standard RCA cleaning.

[0106] (4) Place the cleaned sample into an ALD and deposit an alumina layer 6 on both sides.

[0107] (5) The sample is placed in PECVD, and a silicon nitride layer 7 is deposited on both sides to obtain a passivation wafer, the structure of which is as follows. Figure 2 As shown.

[0108] The performance of the passivated sheet prepared in this comparative example was tested, and the surface saturation current density was 7.1 fA / cm². 2 The hidden open-circuit voltage is 735mV, and the sample lifetime is approximately 1200μs at an injection level of 1E15.

[0109] The performance of the passivated sheets prepared in Examples 1-4 and Comparative Example 1 is shown in Table 1 below. The results demonstrate that the method of the present invention can achieve excellent passivation effect on boron emitters and reduce surface saturation current density.

[0110] Table 1 Comparison of passivation performance between the examples and comparative examples

[0111] Sample J 0,s (fA / cm 2 )]]> iV oc (mV)]]> τeff (μs) Example 1 2.1 746 ～1400 Example 2 1.5 748 ～2200 Example 3 2.9 746 ～1500 Example 4 1.3 749 ～2300 Comparative Example 1 7.1 735 ～1200

[0112] Example 5

[0113] (1) Take an N-type silicon wafer 1 with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and texturing on the front side.

[0114] (2) The silicon wafer 1 is transferred to a diffusion furnace for boron diffusion, and then the surface boron source is removed to form a boron emitter 2 on the front side with a sheet resistance of 200-250 Ω / sq.

[0115] (3) Polish the back side of silicon wafer 1 and transfer it into PECVD to deposit a tunnel oxide layer 8 and a phosphorus-doped amorphous silicon layer on the back side.

[0116] (4) Clean and etch the front side of silicon wafer 1 with BSG, and place it in PECVD to deposit a nano silicon oxide layer 3 with a thickness of 2nm on the boron emitter 2.

[0117] (5) Select the electro-injection region and doping region of boron emitter 2, deposit a carbon silicon layer 4 on the doping region. The carbon silicon layer 4 consists of a carbon silicon thin film with a thickness of 3 μm and a carbon element content of 20 at%. Deposit a boron-doped amorphous silicon thin film as a conductive layer 5 on the electro-injection region.

[0118] (6) The sample was placed in an annealing furnace and annealed at 950°C for 30 minutes under a nitrogen atmosphere. The phosphorus-doped amorphous silicon layer was converted into a phosphorus-doped polycrystalline silicon layer 9, and the boron-doped amorphous silicon was converted into a boron-doped polycrystalline silicon layer 9.

[0119] (7) Place the cleaned sample into an ALD and deposit an alumina layer 6 on both sides.

[0120] (8) The sample is placed in PECVD and a silicon nitride layer 7 is deposited on both sides to obtain a passivated wafer.

[0121] (9) Apply voltage to conductive layer 5 for electro-injection.

[0122] (10) The passivated sheet is screen-printed with electrode grid lines, wherein the electrode grid lines on the front side are printed on the conductive layer 5, pre-sintered, and then LECO forms electrode contacts.

[0123] (11) After hydrogenation, a TOPCon battery is prepared, the structure of which is as follows: Figure 3 As shown.

[0124] The performance of the battery prepared in this embodiment was tested, and the surface saturation current density was 2.8 fA / cm². 2 The open-circuit voltage is 742mV, and the short-circuit current density is 42.3fA / cm². 2 The fill factor is 84%, and the contact resistivity of the electrodes is ~1 mΩ·cm. 2 The battery efficiency is 26.5%.

[0125] Example 6

[0126] The difference between this embodiment and embodiment 1 is that the carbon silicon layer prepared in step (5) consists of three carbon silicon films with a thickness of 1 nm. The carbon content in the three carbon silicon films is 15 at%, 20 at%, and 25 at, respectively. The carbon content in the carbon silicon film closer to the nano-silicon oxide layer is higher. Other steps and processes are the same.

[0127] The performance of the battery prepared in this embodiment was tested, and the surface saturation current density was 2.9 fA / cm². 2 The open-circuit voltage is 742mV, and the short-circuit current density is 42.2fA / cm². 2 The fill factor is 84%, and the contact resistivity of the electrodes is ~1 mΩ·cm. 2 The battery efficiency is 26.5%.

[0128] Example 7

[0129] (1) Take an N-type silicon wafer with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and texturing on the front side.

[0130] (2) The silicon wafer is transferred to a diffusion furnace for boron diffusion, and then the surface boron source is removed to form a boron emitter on the front side with a sheet resistance of 200-250 Ω / sq.

[0131] (3) Polish the back side of the silicon wafer and transfer it into the PECVD internal back side to deposit a tunneling oxide layer and a phosphorus-doped amorphous silicon layer.

[0132] (4) Clean and etch the front side of the silicon wafer with BSG, and place it in PECVD to deposit a nano-silicon oxide layer on the boron emitter with a thickness of 2nm.

[0133] (5) Select the electro-injection region and doping region of the boron emitter, deposit a silicon carbon layer on the doping region. The silicon carbon layer consists of a silicon carbon film with a thickness of 10 nm and a carbon content of 20 at%. Prepare an ITO conductive layer on the electro-injection region.

[0134] (6) The sample was placed in an annealing furnace and annealed at 920°C for 30 minutes under a nitrogen atmosphere. The phosphorus-doped amorphous silicon layer was converted into a phosphorus-doped polycrystalline silicon layer.

[0135] (7) Etch the silicon carbide layer clean and clean the substrate surface.

[0136] (8) Place the cleaned sample into an ALD and deposit an alumina layer on both sides.

[0137] (9) The sample is placed in PECVD and silicon nitride layers are deposited on both sides to obtain a passivated wafer.

[0138] (10) Apply voltage to the conductive layer under laser irradiation to perform electro-injection.

[0139] (11) The passivated sheet is screen-printed with electrode grid lines, wherein the electrode grid lines on the front side are printed on the conductive layer, pre-sintered, and then LECO forms electrode contacts.

[0140] (12) Perform hydrogenation post-treatment to obtain TOPCon battery.

[0141] The performance of the battery prepared in this embodiment was tested, and the surface saturation current density was 3.1 fA / cm². 2 The open-circuit voltage is 741mV, and the short-circuit current density is 42.2fA / cm². 2 The fill factor is 83.9%, and the contact resistivity of the electrodes is ~1 mΩ·cm. 2 The battery efficiency is 26.4%.

[0142] Comparative Example 2

[0143] (1) Take an N-type silicon wafer 1 with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and double-sided texturing.

[0144] (2) The silicon wafer 1 is transferred to a diffusion furnace for boron diffusion, and then the surface boron source is removed to form a boron emitter 2 on the front side with a sheet resistance of 200-250 Ω / sq.

[0145] (3) Polish the back side of silicon wafer 1 and transfer it into PECVD to deposit a tunnel oxide layer 8 and a phosphorus-doped amorphous silicon layer on the back side.

[0146] (4) The sample was placed in an annealing furnace and annealed at 950°C for 30 minutes under a nitrogen atmosphere. The phosphorus-doped amorphous silicon layer was converted into a phosphorus-doped polycrystalline silicon layer.

[0147] (5) Place the cleaned sample into an ALD and deposit an alumina layer 6 on both sides.

[0148] (6) The sample is placed in PECVD and a silicon nitride layer 7 is deposited on both sides to obtain a passivated wafer.

[0149] (7) The passivated sheet is screen-printed with electrode grid lines and pre-sintered, and then LECO forms electrode contacts.

[0150] (8) Perform hydrogenation post-treatment to obtain a TOPCon battery, the structure of which is as follows: Figure 4 As shown.

[0151] The performance of the comparative-scale prepared battery was tested, with a surface saturation current density of 8.5 fA / cm². 2 The open-circuit voltage is 738mV, and the short-circuit current density is 41.8fA / cm². 2 The fill factor is 83.8%, and the contact resistivity of the electro-injected region is ~1 mΩ·cm. 2 The battery efficiency is 26.2%.

[0152] Comparative Example 3

[0153] (1) Take an N-type silicon wafer with a thickness of 210μm and a resistivity of 2Ω·cm and perform standard RCA cleaning and texturing on the front side.

[0154] (2) The silicon wafer is transferred to a diffusion furnace for boron diffusion, and then the surface boron source is removed to form a boron emitter on the front side with a sheet resistance of 200-250 Ω / sq.

[0155] (3) Polish the back side of the silicon wafer and transfer it into the PECVD internal back side to deposit a tunneling oxide layer and a phosphorus-doped amorphous silicon layer.

[0156] (4) Clean and etch the front side of the silicon wafer with BSG, and place it in PECVD to deposit a nano-silicon oxide layer on the boron emitter with a thickness of 2nm.

[0157] (5) A carbon silicon layer is deposited on the nano-silicon oxide layer. The carbon silicon layer consists of a carbon silicon thin film with a thickness of 3 nm and a carbon content of 20 at%.

[0158] (6) A hydrogen-rich dielectric layer is deposited on the silicon carbon layer, the hydrogen-rich dielectric layer consisting of a thin film of hydrogenated silicon nitride.

[0159] (7) The sample was placed in an annealing furnace and annealed at 950°C for 30 minutes under a nitrogen atmosphere. The phosphorus-doped amorphous silicon layer was converted into a phosphorus-doped polycrystalline silicon layer.

[0160] (8) Place the cleaned sample into an ALD and deposit aluminum oxide layers on the front and back sides respectively.

[0161] (9) The sample is placed in PECVD, and silicon nitride layers are deposited on the front and back sides respectively to obtain a passivated wafer.

[0162] (10) The passivated sheet is screen-printed with electrode grid lines and pre-sintered, and then LECO forms electrode contacts.

[0163] (11) Perform hydrogenation post-treatment to obtain TOPCon battery.

[0164] The performance of the battery prepared in this comparative example was tested, and the surface saturation current density was 3.5 A / cm². 2 The open-circuit voltage is 740mV, and the short-circuit current density is 41.8fA / cm². 2 The fill factor is 83.9%, and the contact resistivity of the electrodes is ~2 mΩ·cm. 2 The battery efficiency is 26.3%.

[0165] The performance of the TOPCon batteries prepared in Examples 5-7 and Comparative Examples 2-3 is shown in Table 1 below. The results demonstrate that the technology of the present invention can achieve excellent passivation effect in the doped region of the boron emitter, reduce the surface saturation current density, and increase the contact resistivity, thereby improving the battery efficiency.

[0166] Table 1 Comparison of passivation performance between the examples and comparative examples

[0167]

[0168]

[0169] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A boron emitter passivation structure, characterized in that, The device includes a boron emitter composed of silicon, boron, carbon, and hydrogen. The surface of the boron emitter is provided with a nano-silicon oxide layer. The boron emitter includes an electrical injection region and a doped region. A conductive layer is provided at the corresponding position of the electrical injection region for connecting a metal electrode. A passivation antireflection layer is provided at the corresponding position of the doped region. The carbon concentration of the doped region is higher than that of the electrical injection region.

2. The boron emitter passivation structure according to claim 1, characterized in that, The carbon concentration in the doped region is higher than 1×10⁻⁶. 18 cm -3 Hydrogen concentration higher than 1×10 19 cm -3 The carbon concentration in the electro-injection region is less than 1×10⁻⁶. 17 cm -3 .

3. The boron emitter passivation structure according to claim 2, characterized in that, In the doped region, the carbon concentration decreases with distance from the surface, and the carbon concentration near the surface of the doped region is higher than 1×10⁻⁶. 19 cm -3 .

4. The boron emitter passivation structure according to claim 1, characterized in that, The thickness of the boron emitter is 100–2000 nm.

5. The boron emitter passivation structure according to claim 1, characterized in that, The thickness of the nano-silicon oxide layer is 1–5 nm, and the absorption coefficient k of the nano-silicon oxide layer at wavelengths above 500 nm is less than 0.1 cm. -1 .

6. The boron emitter passivation structure according to claim 1, characterized in that, The conductive layer is made of boron-doped polycrystalline silicon or a transparent conductive oxide.

7. The boron emitter passivation structure according to any one of claims 1-6, characterized in that, A silicon carbon layer is provided at the corresponding position of the doped region. The silicon carbon layer is located between the nano-silicon oxide layer and the passivation antireflection layer. The silicon carbon layer is composed of silicon, carbon, hydrogen and oxygen.

8. The boron emitter passivation structure according to claim 7, characterized in that, The silicon carbide layer consists of one or more silicon carbide films, and the carbon content of each silicon carbide film is 1 at% to 50 at%.

9. The boron emitter passivation structure according to claim 8, characterized in that, The thickness of the silicon carbide layer is 1–50 nm, and the refractive index is 1.5–3.

5.

10. The boron emitter passivation structure according to claim 9, characterized in that, The hydrogen concentration in the silicon carbide layer is higher than 1×10⁻⁶. 20 cm -3 .

11. A method for preparing a boron emitter passivation structure as described in any one of claims 1-6, characterized in that, Includes the following steps: N-type silicon wafers are cleaned, and their surfaces are texturized or polished. The silicon wafer is transferred to a diffusion furnace for boron diffusion, forming a boron emitter on the silicon wafer surface. The boron source is then removed by cleaning. A nano-silicon oxide layer was prepared on the surface of a boron emitter. Select the electro-injection region and doping region of the boron emitter, prepare a silicon carbide layer on the doped region, and prepare a conductive layer on the electro-injection region; High-temperature annealing is performed in an inert gas atmosphere to allow carbon atoms in the silicon carbon layer to diffuse into the doped region of the boron emitter. Etching removes the silicon carbide layer; A passivation and antireflection layer is prepared on the substrate surface, and then the passivation and antireflection layer at the corresponding part of the conductive layer is removed; The external electrode is applied to the conductive layer for electro-injection under dark field conditions or under strong light irradiation.

12. A method for preparing a boron emitter passivation structure as described in any one of claims 7-10, characterized in that, Includes the following steps: N-type silicon wafers are cleaned, and their surfaces are texturized or polished. The silicon wafer is transferred to a diffusion furnace for boron diffusion, forming a boron emitter on the silicon wafer surface. The boron source is then removed by cleaning. A nano-silicon oxide layer was prepared on the surface of a boron emitter. Select the electro-injection region and doping region of the boron emitter, prepare a silicon carbide layer on the doped region, and prepare a conductive layer on the electro-injection region; High-temperature annealing is performed in an inert gas atmosphere to allow carbon atoms in the silicon carbon layer to diffuse into the doped region of the boron emitter. A passivation and antireflection layer is prepared on the substrate surface, and then the passivation and antireflection layer at the corresponding part of the conductive layer is removed; The external electrode is applied to the conductive layer for electro-injection under dark field conditions or under strong light irradiation.

Images