Heat dissipation module of power module

Abstract

According to the power module heat dissipation module provided by the invention, the chip is arranged on the surface of the integrated radiator type metal substrate or embedded in the integrated radiator type metal substrate, and then the first insulating layer and the first conductive layer are pressed above the combination body formed by the chip and the integrated radiator type metal substrate, so that the chip is packaged; a first blind hole is formed in the first insulating layer and the first conducting layer in a penetrating mode, the first blind hole is filled with a first conducting medium, one end of the first conducting medium is electrically connected with the chip, and the other end of the first conducting medium is electrically connected with a circuit formed by etching the first conducting layer, so that fan-out of chip signals is achieved; according to the packaging scheme, the heat of the chip can be more directly and quickly transferred to the heat dissipation device, and the heat dissipation efficiency is improved; meanwhile, the heat dissipation device has the advantages of being small in size and high in integration level, and the power density of the system can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip packaging, and in particular to a power module heat dissipation module. BACKGROUND

[0002] As a core component of power electronic conversion, the packaging mode of the power tube directly affects the power density, heat dissipation performance and reliability of the system.

[0003] At present, the common TO-247 power tube has problems such as large packaging volume and low heat dissipation efficiency, and the method of pasting the power tube on the water channel through glue cannot meet the high power density demand of the product. With the development of advanced packaging technology, the chip embedded PCB packaging has developed rapidly in the new energy automobile field due to its lower transmission loss, smaller packaging size and lower cost advantage.

[0004] Directly embedding the chip into the printed circuit board (PCB) has the following problems: first, the difference between the coefficient of thermal expansion (CTE) of the PCB and the chip is large, and the warping of the PCB during the packaging process can easily cause the chip to bend and break. Second, the thermal conductivity of the PCB and the filling material (such as epoxy resin) is low, and the heat of the chip cannot be dissipated in time, causing local overheating and burning out the chip.

[0005] In related technologies, the heat dissipation and insulation problems are solved by adding a rigid substrate (for example, a copper block or an AMB substrate) and a heat-conducting adhesive material (for example, a heat-conducting insulating adhesive film), but the heat resistance of the intermediate layer and the adhesive material is increased, resulting in reduced heat dissipation efficiency.

[0006] Therefore, the present application is proposed. SUMMARY

[0007] The present application provides a power module heat dissipation module, a power supply module and a chip embedded packaging method. The power module heat dissipation module directly welds the chip on the integrated heat sink type metal substrate, so that the heat of the chip can be quickly transferred to the heat dissipation device, solving the chip heat dissipation problem.

[0008] In a first aspect, the present application provides a power module heat dissipation module, comprising:

[0009] An integrated heat sink type metal substrate;

[0010] At least one chip, the chip is carried by the integrated heat sink type metal substrate;

[0011] A first insulating layer is arranged on the surface of the combination of the chip and the integrated heat sink type metal substrate;

[0012] The first conductive layer is arranged on the side of the first insulating layer away from the assembly;

[0013] The chip wire-out structure comprises a first blind hole penetrating through the first insulating layer and the first conductive layer, and a first conductive medium filled in the first blind hole. One end of the first conductive medium is electrically connected with the chip, and the other end of the first conductive medium is electrically connected with the circuit etched on the first conductive layer.

[0014] The difference between the thermal expansion coefficient of the integrated heat sink type metal substrate and the thermal expansion coefficient of the chip is obviously smaller than the difference between the thermal expansion coefficient of the PCB and the thermal expansion coefficient of the chip. By directly bearing the chip through the integrated heat sink type metal substrate, the thermal stress concentration is reduced, and the warping is reduced. In addition, the integrated heat sink type metal substrate serves as a carrier and a heat dissipation device, and the heat of the chip can be quickly transferred to the heat dissipation device, thereby improving the heat dissipation efficiency.

[0015] In a possible embodiment, the integrated heat sink type metal substrate comprises:

[0016] The heat dissipation device comprises a heat dissipation surface.

[0017] The heat-conducting insulating layer is arranged on the heat dissipation surface.

[0018] The circuit layer is arranged on the side of the heat-conducting insulating layer away from the heat dissipation device.

[0019] The at least one chip is arranged on the surface of the circuit layer or embedded in the circuit layer.

[0020] In a possible embodiment, the heat dissipation device is arranged as an air-cooled heat sink or a water-cooled heat sink.

[0021] In a possible embodiment, the circuit layer is provided with a chip embedding frame, and the chip is arranged in the chip embedding frame.

[0022] In a possible embodiment, the circuit layer is provided with an intermediate part arranged at intervals along the arrangement direction of the chip, and the first insulating layer is filled in the intermediate part.

[0023] In a possible embodiment, the circuit layer is arranged as a continuous whole, the chip embedding frame is formed by etching or pattern plating on the surface of the circuit layer, the chip embedding frame comprises at least one chip mounting groove, the chip is arranged in the chip mounting groove, and the first insulating layer covers the surface of the assembly formed by the circuit layer, the chip embedding frame and the chip.

[0024] In a possible embodiment, the chip is fixed in the chip embedding frame by sintering or welding, and the height of the chip embedding frame is 0-30 .

[0025] In a possible embodiment, the upper aperture of the first blind hole is 150 -250 The lower aperture of the first blind hole is more than 75% of the upper aperture.

[0026] In a possible embodiment, the chip is directly sintered or welded to be fixed on the circuit layer far away from the thermally conductive insulating layer.

[0027] In a possible embodiment, the power module heat dissipation module further comprises:

[0028] The second insulating layer is arranged on the side of the first conductive layer away from the first insulating layer along the thickness direction;

[0029] The second conductive layer is arranged on the side of the second insulating layer away from the first conductive layer along the thickness direction;

[0030] The second blind hole is formed through the second insulating layer and the second conductive layer, and the second blind hole is filled with a second conductive medium, one end of the second conductive medium is electrically connected with the circuit formed by etching the first conductive layer, and the other end of the second conductive medium is electrically connected with the circuit formed by etching the circuit layer.

[0031] The power module heat dissipation module provided by the embodiment of the present application solves the problems of warping and cracking of the bare chip embedded in the PCB and heat dissipation by packaging the chip on the integrated heat sink type metal substrate to form an integrated heat dissipation packaging structure, improves the heat dissipation efficiency, improves the power density, and reduces the system cost. BRIEF DESCRIPTION OF DRAWINGS

[0032] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application.

[0033] Figure 1 FIG. 1 is a structural schematic diagram of a power module heat dissipation module in the related art;

[0034] Figure 2 FIG. 2 is a structural schematic diagram of a power module heat dissipation module in an embodiment of the present application;

[0035] Figure 3 FIG. 3 is a structural schematic diagram of another power module heat dissipation module in an embodiment of the present application;

[0036] Figure 4 FIG. 4 is a structural schematic diagram of another power module heat dissipation module in an embodiment of the present application;

[0037] Figure 5 FIG. 5 is a structural schematic diagram of another power module heat dissipation module in an embodiment of the present application.

[0038] Explanation of Reference Signs:

[0039] 100 - integrated heat sink metal base plate; 1 - heat sink device; 2 - base plate; 3 - chip;

[0040] 4 - first insulating layer; 5 - first conductive layer;

[0041] 21 - heat conductive insulating layer; 22 - circuit layer; 23 - chip embedding frame;

[0042] 6 - chip lead-out structure; 24 - intermediate portion; 103 - printed circuit board;

[0043] 61 - first blind hole; 62 - first conductive medium; 63 - second blind hole;

[0044] 64 - second conductive medium; 7 - second insulating layer; 8 - second conductive layer; 9 - solder mask layer;

[0045] 101 - soldering layer; 102 - component.

[0046] The specific embodiments described herein have been shown by way of illustration, and thus, there are more specific embodiments of the present application, which can be practiced without specific reference to the above Examples. These embodiments and what is described herein are not meant to be limiting but rather are illustrative of the present application. DETAILED DESCRIPTION

[0047] It should be understood that the specific embodiments described herein are merely exemplary and do not limit the scope of the present application.

[0048] It should be noted that if the present application has directionality indications (such as up, down, left, right, front, back, etc.) in the embodiments, the directionality indications are only used to explain the relative position relationship, movement, etc. between the components in a certain posture, and if the certain posture changes, the directionality indications also change accordingly. If the present application has descriptions of "first", "second", etc. in the embodiments, the "first", "second", etc. descriptions are only for description purposes and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features with "first", "second" can explicitly or implicitly include at least one of the features. In addition, "and / or" or "and / or" appears throughout the text, which means that the three parallel schemes include A scheme, or B scheme, or A and B schemes are satisfied at the same time. In addition, the technical solutions of each embodiment can be combined with each other, but it must be based on the realization of ordinary skilled in the art, when the combination of technical solutions appears contradictory or unachievable, it should be considered that the combination of technical solutions does not exist, nor within the scope of protection claimed by the present application.

[0049] For better understanding of the technical solutions of the present application, the following will be described in detail in combination with the drawings of the specification and specific embodiments.

[0050] The chip packaging technology involved in the power module of the embodiments of the present application is mainly applied to high-power-density power electronic systems, such as electric vehicle electric drive systems, industrial motor drives, renewable energy inverters (for example, photovoltaic inverters and wind power converters), and high-power power supply modules in data centers.

[0051] In the related art, the printed circuit board includes a substrate, a conductive circuit layer, a solder resist layer, and a silk screen layer. The substrate is the physical skeleton of the printed circuit board. The conductive circuit layer is made of copper foil through an etching process and is responsible for connecting electronic components.

[0052] In the above scenarios, in order to improve the integration, as shown in Figure 1 , the chip 3 is directly embedded in the printed circuit board 103, the line conduction of the chip 3 and the printed circuit board 103 is realized through double-sided laser drilling, and epoxy resin or other materials are used for filling and packaging. However, due to the significant difference in the thermal expansion coefficient between the substrate (for example, FR4, Flame Retardant 4, glass fiber reinforced epoxy resin substrate 2 material) of the printed circuit board 103 and the material (for example, Si, SiC, GaN) of the chip 3, the thermal expansion coefficient of FR4 is 17 ppm / k, and the thermal expansion coefficient of silicon is 2.6 ppm / k, which easily leads to warping of the printed circuit board 103 in high-temperature processes, and further causes the chip 3 to bend or even break. The thermal conductivity of the printed circuit board 103 and the filling material is extremely low, usually less than 1 W / m·K, and the heat of the chip 3 cannot be dissipated in time, resulting in local overheating and chip burning failure.

[0053] Based on the above, the embodiments of the present application propose a power module heat dissipation module. The power module heat dissipation module integrates the heat dissipation device 1 and the substrate 2 of the printed circuit board 103 in structure to form an integrated heat sink type metal substrate 100, uses the high thermal conductivity of the heat dissipation device 1 as the carrier for embedding the chip 3, directly replaces the substrate 2 of the traditional printed circuit board 103, solves the warping problem of the chip 3 and the printed circuit board 103 caused by the thermal expansion coefficient, and simultaneously realizes rapid heat transfer.

[0054] At the same time, the method of printing solder or placing solder pieces is adopted, the chip 3 is directly embedded into the metal substrate 2 through a single pressing process, the traditional step-by-step sintering copper block process is replaced, the manufacturing complexity and cost are reduced, and the packaging efficiency is improved.

[0055] As shown in Figure 2 , Figure 3 , Figure 4 , Figure 2Fig. 1 is a structural schematic diagram of a power module heat dissipation module according to an embodiment of the present application, Figure 3 Fig. 2 is a structural schematic diagram of another power module heat dissipation module according to an embodiment of the present application, Figure 4 Fig. 3 is a structural schematic diagram of another power module heat dissipation module according to an embodiment of the present application.

[0056] The power module heat dissipation module according to an embodiment of the present application comprises an integrated heat sink type metal substrate 100, at least one chip 3, a first insulating layer 4, a first conductive layer 5 and a chip wire-out structure 6.

[0057] The chip 3 is carried by the integrated heat sink type metal substrate 100; the first insulating layer 4 is arranged on the surface of the combination of the chip 3 and the integrated heat sink type metal substrate 100; and the first conductive layer 5 is arranged on the side of the first insulating layer 4 away from the integrated heat sink type metal substrate 100.

[0058] The chip wire-out structure 6 comprises a first blind hole 61 penetrating through the first insulating layer 4 and the first conductive layer 5, and a first conductive medium 62 filled in the first blind hole 61. One end of the first conductive medium 62 is electrically connected with the chip 3, and the other end of the first conductive medium 62 is electrically connected with the circuit etched in the first conductive layer 5.

[0059] The chip 3 is directly arranged on the surface of the integrated heat sink type metal substrate 100 or embedded in the interior of the integrated heat sink type metal substrate 100 by sintering or welding, the heat generated by the chip 3 can be directly transmitted to the integrated heat sink type metal substrate 100, and the heat is dissipated by the heat dissipation device 1 of the integrated heat sink type metal substrate 100, so that the heat dissipation efficiency is high and the heat is rapidly transmitted.

[0060] In some embodiments, the integrated heat sink type metal substrate 100 comprises:

[0061] The heat dissipation device 1 comprises a heat dissipation surface;

[0062] A heat-conducting insulating layer 21 arranged on the heat dissipation surface;

[0063] and a circuit layer 22 arranged on the side of the heat-conducting insulating layer away from the heat dissipation device;

[0064] The at least one chip 3 is arranged on the surface of the circuit layer 22 or embedded in the circuit layer 22.

[0065] Preferably, in an embodiment, the metal substrate is an aluminum substrate, the heat dissipation device is made of aluminum material, and the upper surface of the heat dissipation device serves as the metal substrate layer of the aluminum substrate, and the heat-conducting insulating layer 21 and the circuit layer 22 together form the integrated heat sink type metal substrate 100.

[0066] The heat dissipation device 1 is arranged as an air-cooled radiator or a water-cooled radiator.

[0067] In some embodiments, the heat dissipation device 1 employs, for example... Figure 2 The water-cooled heat sink shown has an internal flow channel structure. The surface of the heat dissipation device 1 away from the chip 3 is configured as a flow channel, which is used to circulate the cooling medium to enhance convective heat dissipation. For example, the flow channel width is 0.5mm-2mm and the depth is 1mm-3mm.

[0068] In some embodiments, the heat dissipation device 1 is provided with multiple parallel water channels, which enhances the flow efficiency of the coolant through the layered flow channel design. The multiple water channels can cover a larger area of ​​the chip 3, improving local temperature uniformity and preventing the formation of hot spots.

[0069] Reference Figure 2 , Figure 3 As shown, Figure 2 This is a schematic diagram of the power module heat dissipation module in an embodiment of this application. Figure 3 This is a schematic diagram of the structure of another power module heat dissipation module in an embodiment of this application.

[0070] The power module heat dissipation module includes an integrated heat sink aluminum substrate, a chip 3 embedded in the integrated heat sink aluminum substrate, a first insulating layer 4, a first conductive layer 5, and a chip lead-out structure 6.

[0071] Specifically, an aluminum substrate is formed on one side of the heat dissipation device 1 along the thickness direction. A chip embedding frame 23 is formed on the circuit layer of the aluminum substrate. The chip 3 is disposed in the chip embedding frame 23. The chip embedding frame 23 is part of the circuit layer 22. It is formed by etching or pattern electroplating on the upper surface of the circuit layer 22 so that the chip 3 can be embedded inside the circuit layer 22.

[0072] Reference Figure 2 As shown, Figure 2 This is a schematic diagram of the power module heat dissipation module in the embodiment of this application. The chip embedding frame 23 includes a number of chip mounting slots, and the number of chip mounting slots is the same as the number of chips 3.

[0073] By using an integrated heat sink-type aluminum substrate as the carrier for chip 3, the traditional solution of first placing the chip on the printed circuit board 103 and then connecting the printed circuit board to the heat sink through a thermally conductive medium is directly replaced. On the one hand, the heat dissipation path can be shortened, the thermal resistance can be reduced, and rapid heat dissipation can be achieved; on the other hand, the warping problem caused by the difference in thermal expansion coefficients between chip 3 and printed circuit board 103 is solved.

[0074] Chip 3 is electrically connected to circuit layer 22 via a solder layer, which is formed on the bottom surface of chip 3 using a conductive material. The solder layer consists of at least one of nano solder paste, nano copper paste, gold-tin solder, or solder pads.

[0075] Preferably, the solder layer printing thickness is 100 mm. Chip 3 is electrically connected to circuit layer 22 via solder layer by sintering or welding. For example, the sintering process parameters are 250℃-300℃, holding time 5min~10min, and the thermal conductivity of the solder layer after sintering is ≥200W / m·K.

[0076] The above-mentioned method uses selective printing of solder or placement of solder pads on the entire board to directly embed the chip 3 into the integrated heat sink type aluminum substrate 100 through a single lamination process, replacing the traditional step-by-step sintering of copper blocks, reducing manufacturing complexity and cost, while improving packaging efficiency.

[0077] By replacing nano-silver paste with gold-tin solder, the chip 3 is fixed to the substrate 2 through reflow soldering. Gold-tin solder has a high melting point and is suitable for higher temperature processes. The thermal conductivity of gold-tin solder is 60W / m·K, which is better than that of nano-silver paste, thus improving heat dissipation performance.

[0078] In some implementations, to achieve embedded packaging of chip 3, the height of the chip mounting groove of the chip embedding frame 23 is 0-30 mm higher than the sum of the solder layer and the thickness of chip 3. .

[0079] In some embodiments, chip 3 is fixed in a chip mounting groove by a solder layer, the height of which is greater than or equal to the sum of the thickness of the solder layer and the thickness of chip 3. For example, the height of the chip embedding frame 23 is 0-30 mm higher than the sum of the solder layer thickness and the chip 3 thickness. .

[0080] The first insulating layer 4 is configured to cover the upper surface of the assembly formed by the integrated heat sink type aluminum substrate and at least one chip by a PCB lamination process.

[0081] The first insulating layer 4 is set as a dielectric layer with high voltage resistance and low expansion coefficient, usually PP corresponding to the PCB board.

[0082] The first conductive layer 5 is disposed on the side of the first insulating layer 4 away from the substrate 2. For example, the first conductive layer 5 is a copper foil.

[0083] The thickness of the first conductive layer 5 is typically 70 mm. ~140 The gap between the chip mounting slot of the chip embedding frame 23 and the chip 3 is set to 0.1mm-0.15mm, and the gap is filled tightly by PP adhesive during the pressing of the first insulating layer 4.

[0084] Reference Figure 2 As shown, Figure 2Fig. 1 is a structural schematic diagram of a power module heat dissipation module according to an embodiment of the present application. The chip wire-out structure 6 includes a first blind hole 61 penetrating through the first insulating layer 4 and the first conductive layer 5, and a first conductive medium 62 filled in the first blind hole 61. One end of the first conductive medium 62 is electrically connected with a signal Pin on the chip 3, and the other end of the first conductive medium 62 is electrically connected with an inner layer circuit etched in the first conductive layer 5, thereby realizing vertical interconnection of the chip 3 signal.

[0085] The first conductive medium 62 is a copper metallization layer formed by hole-filling electroplating.

[0086] The above realizes integration by forming the aluminum substrate 2 on the heat dissipation device 1 and directly embedding the chip 3 into the chip embedding frame 23 of the aluminum substrate 2. Then, a series of processing technologies such as PCB blind hole windowing, laser drilling and hole-filling electroplating are used to realize interconnection of the pin of the chip 3 and the inner layer circuit of the first conductive layer 5, and wire-out of the chip.

[0087] This packaging mode shortens the signal transmission path, is beneficial to reducing parasitic inductance and transmission loss, reduces the packaging volume, and can further improve the power density.

[0088] The present application packages the chip 3 into the integrated heat sink type metal substrate through the above packaging process, is a system integrated heat dissipation structure, directly bears the chip 3 through the integrated heat sink type metal substrate, reduces the warping and cracking possibility existing in the direct embedding packaging of the bare chip, and at the same time, the heat of the chip 3 is timely transmitted to the heat dissipation device through the copper foil and the high-thermal-conductivity adhesive film, so that the problem of poor heat dissipation effect of the current power tube can be solved.

[0089] In the above structure, the chip 3 realizes insulation and heat dissipation with the heat dissipation device through the circuit layer 22 and the heat-conductive insulating layer 21. The thermal conductivity coefficient of the heat-conductive insulating layer 21 is much higher than that of the epoxy resin in the related art, thereby improving the heat dissipation efficiency.

[0090] The upper hole diameter of the first blind hole 61 is 150 -250 The lower hole diameter of the first blind hole 61 is more than 75% of the upper hole diameter.

[0091] In some embodiments, the circuit layer 22 is provided as a copper foil. Through an anti-plating dry film, exposure, development, pattern electroplating and film removal process, the chip embedding frame 23 is made on the circuit layer 22 of the integrated heat sink type metal substrate 100.

[0092] In the embodiment of the present application, the materials of the first insulating layer 4 and the second insulating layer 7 are not limited, and only need to meet the insulation requirement. The heat-conductive insulating layer 21 requires to use a high-thermal-conductivity insulating material, and the thermal conductivity coefficient is ≥ 6 W / m .K, it should be noted that the high thermal conductivity mentioned in the embodiments of the present application refers to the thermal conductivity of the material ≥ 6W / m . K.

[0093] Further, referring to Figure 2 , Figure 2 is a structural schematic diagram of the power module heat dissipation module of the embodiments of the present application. The circuit layer 22 is provided with an intermediate part 24 along the arrangement direction of the chip 3, the intermediate part 24 penetrates the circuit layer 22 and the chip embedding frame 23, the first insulating layer 4 is filled to the intermediate part 24, and is connected with the heat-conducting insulating layer 21.

[0094] Referring to Figure 3 , Figure 3 is a structural schematic diagram of another power module heat dissipation module of the embodiments of the present application. The circuit layer 22 is provided as a continuous whole, the chip embedding frame 23 is provided on one side of the circuit layer 22, and the first insulating layer 4 is connected with the circuit layer 22 and the chip 3 respectively. The first insulating layer 4 covers the surface of the combination of at least one chip 3, the chip embedding frame 23 and the circuit layer 22.

[0095] In some embodiments, referring to Figure 2 , Figure 3 , Figure 2 is a structural schematic diagram of the power module heat dissipation module of the embodiments of the present application, Figure 3 is a structural schematic diagram of another power module heat dissipation module of the embodiments of the present application.

[0096] The power module heat dissipation module further comprises a second insulating layer 7 and a second conductive layer 8, the second insulating layer 7 is provided on the side of the first conductive layer 5 away from the first insulating layer 4 along the thickness direction, and the second conductive layer 8 is provided on the side of the second insulating layer 7 away from the first conductive layer 5 along the thickness direction.

[0097] The second insulating layer 7 comprises, but is not limited to, PP and insulating heat-conducting adhesive film. The second conductive layer 8 is provided as a copper foil. The second insulating layer 7 and the second conductive layer 8 are single-sidedly laminated on the first conductive layer 5, then the outer layer circuit is made through the exposure, development and etching process, and the solder resist and surface treatment are performed.

[0098] The second insulating layer 7 and the second conductive layer 8 are provided to realize the integrated heat sink type metal substrate build-up, and the second blind hole 63 is provided through the second insulating layer 7 and the second conductive layer 8.

[0099] In the limited space, the chip signal can be completely fanned out to the PCB surface, and at the same time, the PCB surface-mounted device is away from the chip heat generating end, prolonging the service life of the electronic element.

[0100] Referring to Figure 2 , Figure 3 , Figure 2FIG. 1 is a structural schematic diagram of a power module heat dissipation module according to an embodiment of the present application. Figure 3 FIG. 2 is a structural schematic diagram of another power module heat dissipation module according to an embodiment of the present application.

[0101] The chip wire-out structure 6 further includes a second blind hole 63 and a second conductive medium 64. The second blind hole 63 is formed through the second insulating layer 7 and the second conductive layer 8, and the second blind hole 63 is filled with the second conductive medium 64. Preferably, the first blind hole 61 and the second blind hole 63 are both laser blind holes.

[0102] One end of the second conductive medium 64 is electrically connected to the inner layer circuit etched in the first conductive layer 5, and the other end of the second conductive medium 64 is electrically connected to the inner layer circuit etched in the circuit layer 22.

[0103] In some embodiments, referring to Figure 2 , Figure 2 FIG. 1 is a structural schematic diagram of a power module heat dissipation module according to an embodiment of the present application.

[0104] The solder resist layer 9 serves as a non-soldering area on the surface of the second conductive layer 8, which can protect the circuit from oxidation or corrosion, and also can prevent the non-soldering area from being tinned to avoid short circuit.

[0105] Referring to Figure 4 , Figure 4 FIG. 2 is a structural schematic diagram of another power module heat dissipation module according to an embodiment of the present application.

[0106] The chip 3 is directly soldered to the side of the circuit layer 22 away from the heat-conductive insulating layer 21. The chip mounting surface of the circuit layer 22 is sequentially provided with the first insulating layer 4 and the second conductive layer 8.

[0107] The first insulating layer 4 is arranged to cover the surface of the combination of the chip 3 and the integrated heat sink type metal substrate by a PCB pressing process.

[0108] The first insulating layer 4 is arranged as a medium layer with high pressure resistance and low expansion coefficient, which is usually PP corresponding to the PCB material.

[0109] The first conductive layer 5 is arranged on the side of the first insulating layer 4 away from the substrate 2. Exemplarily, the first conductive layer 5 is arranged as a copper foil.

[0110] The power module heat dissipation module includes a chip wire-out structure 6, which includes a first blind hole 61 penetrating through the first insulating layer 4 and the first conductive layer 5, and a first conductive medium 62 filled in the first blind hole 61. One end of the first conductive medium 62 is electrically connected to the signal Pin on the chip 3, and the other end of the first conductive medium 62 is electrically connected to the inner layer circuit etched in the first conductive layer 5, realizing vertical interconnection of the signals of the chip 3.

[0111] The first conductive dielectric 62 is configured as a copper metallization layer formed by through-hole electroplating.

[0112] An integrated heat dissipation structure is achieved by sintering or welding chip 3 onto an integrated heat sink-type metal substrate. A series of processes, including blind hole opening, laser drilling, and hole-filling electroplating, are used to interconnect the conductive areas of chip 3 with the inner layer circuitry of the first conductive layer 5.

[0113] Embedded PCB packaging shortens the signal transmission path, which helps reduce parasitic inductance, reduce transmission loss, and decrease package size, thereby further improving power density.

[0114] By encapsulating the chip 3 on the integrated heat sink metal substrate 100, the heat generated by the chip 3 can be directly transferred to the integrated heat sink metal substrate 100, and the heat dissipation device 1 of the integrated heat sink metal substrate 100 can be used for heat dissipation, which has high heat dissipation efficiency and realizes rapid heat transfer.

[0115] Reference Figure 5 As shown, Figure 5 This is a schematic diagram of another power module heat dissipation module in this application embodiment. The heat dissipation device is configured as an air-cooled heat sink with heat dissipation fins. The metal substrate is an AMB substrate, which includes a circuit layer 22, a thermally conductive insulating layer 21, and another circuit layer 22 arranged sequentially. The chip is supported by the AMB substrate. A first insulating layer 4 covers the surface of the assembly formed by the AMB substrate and the chip, and a component 102 is disposed on the side of the first conductive layer 5 away from the first insulating layer 4.

[0116] by Figure 5 The structure in the diagram illustrates the location of the weld layer.

[0117] A solder layer 101 is provided between the circuit layer 22, which is located on the side of the thermally conductive insulating layer 21 near the heat dissipation device 1, and the heat dissipation device 1.

[0118] A solder layer 101 is provided between the chip 3 and the circuit layer 22 located on the side of the thermally conductive insulating layer 21 away from the heat dissipation device 1.

[0119] In this embodiment, an AMB substrate is soldered onto the surface of the heat dissipation device, and then the chip 3 is soldered, sintered, or bonded and fixed into the integrated heat sink metal substrate 100 by printing solder, nano silver paste or copper paste, or placing solder pads. There is no need to sinter copper blocks or sinter AMB substrate 2 for each chip 3 before embedding it individually. At the same time, there is no need to separately process the connection between the printed circuit board 103 with the embedded chip 3 and the heat dissipation device 1. This can realize large-area board-level embedded packaging of chip 3 and integrated packaging with heat dissipation device 1.

[0120] Example 2

[0121] The difference between the embodiment and embodiment 1 is that the structure of the embodiment includes double-sided packaging chips.

[0122] In the embodiment, the PCB is integrated on the upper and lower surfaces of the heat dissipation device 1 to realize double-sided integrated substrate 2.

[0123] Chips 3 can be embedded on both surfaces, and a first insulating layer 4 and a first conductive layer 5 are arranged in sequence from the substrate 2 to the chip 3 on each surface.

[0124] The embodiment sets double-sided chips 3 to realize double-sided heat dissipation and power density improvement through space utilization.

[0125] In the embodiment, refer to Figure 2 , it is shown that Figure 2 The single-sided integration scheme is shown, and the double-sided integration scheme is to symmetrically arrange the metal substrate 2 on the other surface of the heat dissipation device 1.

[0126] The specific structure of the metal substrate 2 is the same as the technical scheme in embodiment 1, which will not be repeated here.

[0127] In the single-sided integration scheme, the difference in the coefficient of thermal expansion (CTE) of the metal substrate 2 and the chip 3 only acts on one surface of the heat dissipation device 1, which is easy to cause the heat dissipation device 1 to produce one-way warping. The thermal stress generated by the metal substrate 2 and the chip 3 under temperature cycling is transmitted to the heat dissipation device 1 through the single-sided substrate 2, so that the heat dissipation device 1 bends to the side without the substrate 2.

[0128] The double-sided integration scheme symmetrically arranges the metal substrate 2 and the chip 3 on both sides to realize bidirectional compensation of thermal stress and further solve the problem of one-way warping.

[0129] Embodiment 3

[0130] The embodiment provides a power module. The power module includes a power module heat dissipation module.

[0131] The detailed structure of the power module heat dissipation module can refer to embodiments 1 and 2, which will not be repeated here.

[0132] It can be understood that since the above-mentioned power module heat dissipation module is used in the power module of the embodiment of the application, the embodiment of the power module of the embodiment includes all the technical schemes of all the embodiments of the above-mentioned power module heat dissipation module, and the technical effects achieved are also exactly the same, which will not be repeated here.

[0133] It should be noted that the above examples are only for understanding the application and do not constitute a limitation on the power module heat dissipation module, the power module and the chip embedded packaging method of the application. Based on this technical concept, more forms of simple transformation are within the protection scope of the application.

[0134] The above merely illustrates some embodiments of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation, direct / indirect application in other related technical fields, or the like, which is made based on the technical concept of the present application and the content of the specification and drawings, is included in the patent protection scope of the present application.

Claims

1. A power module heat dissipation module, characterized in that, include: Integrated heat sink type metal substrate; At least one chip, said chip being supported by the integrated heat sink type metal substrate; A first insulating layer is disposed on the surface of the assembly formed by the chip and the integrated heat sink metal substrate; A first conductive layer is disposed on the side of the first insulating layer away from the assembly; The chip wiring structure includes a first blind via penetrating the first insulating layer and the first conductive layer, and a first conductive medium filling the first blind via. One end of the first conductive medium is electrically connected to the chip, and the other end of the first conductive medium is electrically connected to the circuit formed by etching the first conductive layer.

2. The power module heat dissipation module as described in claim 1, characterized in that, The integrated heat sink type metal substrate includes: A heat dissipation device, the heat dissipation device including a heat dissipation surface; A thermally conductive insulating layer disposed on the heat dissipation surface; And, a circuit layer disposed on the side of the thermally conductive insulating layer away from the heat dissipation device; At least one of the chips is disposed on the surface of the circuit layer or embedded in the circuit layer.

3. The power module heat dissipation module according to claim 2, characterized in that, The heat dissipation device is configured as an air-cooled radiator or a water-cooled radiator.

4. The power module heat dissipation module according to claim 2, characterized in that, A chip embedding frame is provided on the circuit layer away from the thermally conductive insulating layer, and the chip is disposed in the chip embedding frame.

5. The power module heat dissipation module according to claim 4, characterized in that, The circuit layer has intermediate portions spaced apart along the arrangement direction of the chip, and the first insulating layer fills the intermediate portions.

6. The power module heat dissipation module according to claim 4, characterized in that, The circuit layer is configured as a continuous whole, and the chip embedding frame is formed by etching or patterning on the surface of the circuit layer. The chip embedding frame includes at least one chip mounting slot, and the chip is disposed in the chip mounting slot. The first insulating layer covers the surface of the assembly formed by the circuit layer, the chip embedding frame and the chip.

7. The power module heat dissipation module according to claim 6, characterized in that, The chip is fixed within the chip embedding frame by sintering or soldering. The thickness of the chip embedding frame is 0-30 mm greater than the sum of the solder layer thickness and the chip thickness. .

8. The power module heat dissipation module according to claim 1, characterized in that, The upper diameter range of the first blind hole is 150. -250 The lower diameter of the first blind hole is more than 75% of the upper diameter.

9. The power module heat dissipation module according to claim 2, characterized in that, The chip is directly sintered or soldered to the side of the circuit layer away from the thermally conductive insulating layer.

10. The power module heat dissipation module according to any one of claims 1-9, characterized in that, Also includes: The second insulating layer is disposed on the side of the first conductive layer away from the first insulating layer along the thickness direction; The second conductive layer is disposed on the side of the second insulating layer away from the first conductive layer along the thickness direction; A second blind via is formed through the second insulating layer and the second conductive layer. The second blind via is filled with a second conductive medium. One end of the second conductive medium is electrically connected to the circuit formed by etching the first conductive layer, and the other end of the second conductive medium is electrically connected to the circuit formed by etching the circuit layer.

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