Power conversion device

Abstract

This power conversion device is provided with: a semiconductor package having a semiconductor element and constituting upper and lower arm circuits, respectively; and a wiring substrate having a wiring layer and electrically connecting the wiring layer and one surface of the semiconductor package, the semiconductor package having a first conductor connected to a main electrode formed on one surface of the semiconductor element and to a high potential side of the upper and lower arm circuits, and a second conductor connected to a second electrode formed on one surface of the semiconductor element and to a high potential side of the upper and lower arm circuits. The second conductor is connected to a main electrode formed on the other surface of the semiconductor element and to the low potential side of the upper and lower arm circuit. The wiring substrate and the semiconductor package are connected to the wiring layer through the second conductor connected to the low potential side to form a conductive path of an inverter main circuit including the upper and lower arm circuits.

Description

Technical Field

[0001] This invention relates to an electric power conversion device. Background Technology

[0002] In inverter structures, for example, when a structure is adopted in which terminals protruding from semiconductor modules are bent in the stacking direction, there is an advantage in that the stress at the solder joints of the terminals and wiring substrates can be mitigated, thereby ensuring the reliability of the solder joints. Patent Document 1 below discloses a configuration in which multiple semiconductors are simultaneously molded and hermetically packaged to improve reliability and yield in an inverter having the above-described structure.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent No. 5370308 Summary of the Invention

[0006] The problem the invention aims to solve

[0007] The structure described in Patent Document 1 ensures the reliability of the welded joint, but it results in an increase in the size of the semiconductor module. Furthermore, it is also necessary to address the issue of ensuring the insulation distance between terminals.

[0008] Problem-solving methods

[0009] A power conversion device includes: a semiconductor package having semiconductor elements that respectively constitute upper and lower arm circuits; and a wiring substrate having a wiring layer electrically connecting the wiring layer and a surface of the semiconductor package, the semiconductor package having a first conductor and a second conductor, the first conductor being connected to a main electrode formed on one surface of the semiconductor element and a high-potential side of the upper and lower arm circuits; the second conductor being connected to a main electrode formed on another surface of the semiconductor element and a low-potential side of the upper and lower arm circuits, the wiring substrate and the semiconductor package forming a conductive path of an inverter main circuit including the upper and lower arm circuits by connecting the wiring layer to the second conductor connected to the low-potential side.

[0010] The effects of the invention

[0011] This invention provides a power conversion device that achieves reduced size, ensures insulation distance, reduces inductance, and improves the reliability of welded joints. Attached Figure Description

[0012] Figure 1This is a cross-sectional view showing the connection structure of the semiconductor package and the wiring substrate in a power conversion device according to one embodiment of the present invention, and a power circuit diagram showing the upper and lower arm circuits.

[0013] Figure 2 This is a top view showing the configuration of a terminal disposed on the first conductor side according to one embodiment of the present invention.

[0014] Figure 3 This is a cross-sectional view showing a configuration of a cooler connected to a wiring substrate according to one embodiment of the present invention.

[0015] Figure 4 This is a cross-sectional view showing a two-sided cooling structure according to one embodiment of the present invention.

[0016] Figure 5 This is the first variation.

[0017] Figure 6 This is the second variation.

[0018] Figure 7 This is the third variation. Detailed Implementation

[0019] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. The following description and drawings are examples for illustrating the present invention; appropriate omissions and simplifications have been made for clarity of explanation. The present invention may also be implemented in various other ways. Unless otherwise specified, each constituent element may be a single element or a plurality of elements.

[0020] The positions, sizes, shapes, and extents of the constituent elements shown in the accompanying drawings are sometimes not representations of actual positions, sizes, shapes, or extents for ease of understanding of the invention. Therefore, the present invention is not necessarily limited to the positions, sizes, shapes, and extents disclosed in the accompanying drawings.

[0021] (One embodiment and overall structure of the present invention)

[0022] ( Figure 1 , Figure 2 )

[0023] Figure 1 (a) is a diagram showing a semiconductor package mounted on a wiring substrate. Figure 1 (b) is Figure 1 The power circuit diagram of the upper and lower arm circuits of (a).

[0024] The wiring substrate 1 has multiple wiring layers 2. An upper arm semiconductor package 11 and a lower arm semiconductor package 12 are mounted on the wiring substrate 1, and one side of each is electrically connected to the uppermost wiring layer 2 located on the surface side of the substrate. This forms a conductive path for the main circuit of a power conversion device containing upper and lower arm circuitry. The upper arm semiconductor package 11 and the lower arm semiconductor package 12 respectively constitute the upper and lower arm circuitry within the semiconductor package, having a first conductor 4, a second conductor 5, a semiconductor element 6, a high-potential side terminal 9, and a signal terminal 13. These components are molded and sealed by a resin sealing member 3.

[0025] In each semiconductor package, the first conductor 4 is connected to the high-potential side of the upper and lower arm circuits; in the case of an IGBT, it is the collector side, and in the case of a MOSFET, it is the drain side. The second conductor 5 is connected to the low-potential side of the upper and lower arm circuits; in the case of an IGBT, it is the emitter side, and in the case of a MOSFET, it is the source side. In the description of this invention, the case where the semiconductor package is a MOSFET structure will be described.

[0026] The first conductor 4 is connected to a main electrode and a high-potential side terminal 9 formed on one surface of the semiconductor element 6. In the sealing member 3, a portion of the high-potential side terminal 9 protrudes outward from a surface different from the surface on which the exposed surface of the second conductor 5 connected to the wiring layer 2 is disposed. The high-potential side terminal 9, by having a bend 9a that bends in the stacking direction, can reduce the rigidity of the terminal portion, thereby improving soldering reliability.

[0027] The high-potential side terminal 9 is electrically connected to the wiring layer 2 of the wiring substrate 1 via the bonding member 8 at the tip of the terminal protruding outward from the sealing member 3. The bonding member 8 is made of a thermally conductive and electrically conductive material, such as solder or sintering material.

[0028] Semiconductor element 6 is connected to signal terminal 13 via bonding wire. In the semiconductor package, signal terminal 13, which protrudes from the surface opposite to the high-potential side terminal 9 toward the outside of sealing member 3, also has a bent portion 13a that bends in the stacking direction. At the top of the terminal, it is electrically connected to the wiring layer 2 of the wiring substrate 1 via bonding member 8.

[0029] like Figure 2 As shown, the high-potential side terminals 9 and signal terminals 13 are configured such that, for example, three high-potential side terminals 9 and two signal terminals 13 protrude outward from opposing surfaces within the semiconductor package. The three high-potential side terminals are adjacent to each other in the planar direction, thereby distributing the stress load applied to the terminals.

[0030] Signal terminal 13 protrudes outward from sealing member 3 and, like high-potential side terminal 9, has a structure with a bent portion that bends in the stacking direction. Signal terminal 13 is electrically connected to wiring board 1 via connecting member 8 at the terminal tip protruding outward from sealing member 3.

[0031] The second conductor 5 is connected to the surface opposite to the surface of the semiconductor element 6 that is connected to the first conductor 4. The wiring substrate 1 has a first through-hole 7a in the thickness direction in the portion where it connects to the exposed surface of the second conductor 5 disposed on a surface of the semiconductor package. The first through-hole 7a is configured to penetrate the thickness direction of the wiring substrate 1. The second conductor 5 is electrically and thermally connected to each wiring layer 2 of the wiring substrate 1 via the first through-hole 7a.

[0032] In this way, by using the first conductor 4 as the electrical connection on the drain side and the second conductor 5 as the electrical connection on the source side, and thus concentrating the same potential on different surfaces of the semiconductor package, not only can the insulation distance be ensured in advance, but also noise can be reduced because the signal terminal 13 is far from the source side. In addition, by increasing the current path through multiple drain terminals, and further connecting the second conductor 5, which is connected to the low-potential side of the semiconductor package, to the wiring substrate 1 to form the inverter main circuit, the currents of the positive and negative terminals in the wiring substrate 1 are opposite, which helps to reduce inductance.

[0033] ( Figure 3 )

[0034] The first wiring substrate 1 is thermally connected to the first cooler 20a via an insulating heat dissipation member 10 on the surface opposite to the surface connected to the upper arm semiconductor package 11 and the lower arm semiconductor package 12. The heat dissipation member 10 is, for example, an insulating member made of heat-dissipating resin, ceramic plate, etc. This ensures insulation between the upper arm semiconductor package 11, the lower arm semiconductor package 12 and the first cooler 20a, and allows heat generated by the semiconductor element 6 and the wiring substrate 1 within the semiconductor package to be dissipated to the first cooler 20a through the through-hole 7, thereby reducing the temperature.

[0035] ( Figure 4 )

[0036] The upper arm semiconductor package 11 and the lower arm semiconductor package 12 are thermally connected to the second cooler 20b via a heat dissipation member 10 on the surfaces opposite to the surface connected to the wiring substrate 1. Thus, the power conversion device not only has… Figure 3 Such a single-sided cooling structure can also have a double-sided cooling structure.

[0037] (First variation)

[0038] ( Figure 5 )

[0039] exist Figure 4 In the dual-sided cooling structure shown, for example, the second cooler 20b ( Figure 4 The upper arm semiconductor package 11 and the lower arm semiconductor package 12 are configured to be thermally connected to the cooling heat sink 22 via an insulating heat dissipation member 10 on the surfaces opposite to the surface connected to the wiring substrate 1. The cooling heat sink 22 is divided and arranged corresponding to the upper arm semiconductor package 11 and the lower arm semiconductor package 12, and a segmented cooler 21 is provided between each of the cooling heat sink 22.

[0040] The segmented cooler 21 forms a flow path through the cooler cover 23, allowing refrigerant to circulate internally and ensuring heat dissipation of the semiconductor package via the cooling fins 22. Furthermore, the segmented cooler 21 ensures the water channel is sealed by filling the connection between the upper arm semiconductor package 11 and the lower arm semiconductor package 12 with a sealing member 23a. This configuration not only ensures heat dissipation adaptability to each semiconductor package but also minimizes the thickness of the heat dissipation member 10 between the semiconductor package and the cooling fins 22, thereby reducing thermal resistance.

[0041] (Second variation)

[0042] ( Figure 6 )

[0043] Figure 6 (a) is a cross-sectional view showing examples of through holes of different sizes provided on the wiring substrate 1. Figure 6 (b) is an explanation Figure 6 (a) Top view of vias of different sizes. The wiring substrate 1 includes a first via 7a connecting the upper arm semiconductor package 11 and the lower arm semiconductor package 12, as well as the heat dissipation component 10 and the first cooler 20a. Figure 1 In addition to the above, it may also have a second through hole 7b disposed at the same position as the semiconductor element 6 in the stacking direction, extending through the plate thickness direction.

[0044] The second via 7b has a larger diameter than the first via 7a and is connected to the second conductor 5. The second via 7b may also be filled with a bonding member 8 that has high thermal conductivity. In this way, by separating the current path formed by the first via 7a and the thermal path formed by the second via 7b, and by aligning the second via 7b with the stacking direction of the semiconductor package and the semiconductor element 6, the heat dissipation of the semiconductor package can be improved.

[0045] (Third variation)

[0046] ( Figure 7 )

[0047] It can also replace the above. Figure 6 The second through-hole 7b is located at the same position as the semiconductor element 6 in the stacking direction of the wiring substrate 1, and a thermally conductive conductor 24 is provided that extends through the substrate along the thickness direction. The conductor 24 is, for example, a copper insert or a metal block. In this way, the current path formed by the first through-hole 7a and the thermal path formed by the conductor 24 are separated, ensuring electrical connection and heat dissipation respectively, and further improving heat dissipation.

[0048] According to the embodiments of the present invention described above, the following effects are achieved.

[0049] (1) The power conversion device includes: semiconductor packages 11 and 12, each having a semiconductor element 6 forming upper and lower arm circuits respectively; and a wiring substrate 1 having a wiring layer 2 electrically connecting the wiring layer 2 and one surface of the semiconductor packages 11 and 12. The semiconductor packages 11 and 12 have a first conductor 4 and a second conductor 5. The first conductor 4 is connected to the main electrode formed on one surface of the semiconductor element 6 and the high-potential side of the upper and lower arm circuits; the second conductor is connected to the main electrode formed on the other surface of the semiconductor element 6 and the low-potential side of the upper and lower arm circuits. The wiring substrate 1 and the semiconductor packages 11 and 12 are connected to the wiring layer 2 via the second conductor 5 connected to the low-potential side to form a conductive path for an inverter main circuit including the upper and lower arm circuits. Thus, a power conversion device that achieves reduced size, ensures insulation distance, reduces inductance, and improves the reliability of the welded joints can be provided.

[0050] (2) Semiconductor packages 11 and 12 have a high-potential side terminal 9 and a sealing member. The high-potential side terminal 9 is electrically connected to the first conductor 4. The sealing member seals the first conductor 4, the second conductor 5, the semiconductor element 6, and the high-potential side terminal 9. The high-potential side terminal 9 protrudes to the outside of the sealing member 3 from a surface different from the surface where the second conductor 5 is exposed. This helps to ensure an insulation distance.

[0051] (3) The high-potential side terminal 9 includes a plurality of terminals that are adjacent to each other in the planar direction. As a result, the load of stress applied to the terminals can be distributed.

[0052] (4) In the portion of the wiring substrate 1 that is connected to the second conductor 5, a first through hole 7a is provided in the thickness direction. The second conductor 5 is electrically and thermally connected to each wiring layer 2 of the wiring substrate 1 through the first through hole 7a. This helps to improve heat dissipation.

[0053] (5) The wiring substrate 1 is thermally connected to the first cooler 20a via an insulating heat dissipation member 10. This helps to improve heat dissipation.

[0054] (6) The semiconductor package is thermally connected to the second cooler 20a via an insulating heat dissipation member 10. This helps to improve heat dissipation.

[0055] (7) The second cooler 20b has cooling heat sinks 22 respectively provided corresponding to the upper and lower arm circuits in the semiconductor packages 11 and 12. As a result, thermal resistance can be reduced.

[0056] (8) In the portion of the wiring substrate 1 connected to the second conductor 5, and at the same position as where the semiconductor element 6 is disposed in the stacking direction, there is a second through hole 7b with a larger diameter than the first through hole 7a, and the interior of the second through hole 7b is filled with a thermally conductive bonding member 8. As a result, heat dissipation can be improved.

[0057] (9) In the portion of the wiring substrate 1 connected to the second conductor 5, and at the same position as where the semiconductor element 6 is disposed in the stacking direction, a thermally conductive conductor member 24 is disposed through the substrate in the thickness direction. As a result, heat dissipation can be improved.

[0058] Furthermore, the present invention is not limited to the embodiments described above, and various modifications and other configurations can be combined without departing from its spirit. Additionally, the present invention is not limited to the structure possessing all the configurations described in the above embodiments, but also includes structures in which a portion of the configuration has been omitted.

[0059] Explanation of symbols

[0060] 1. Wiring substrate, 2. Wiring layer, 3. Sealing member, 4. First conductor, 5. Second conductor, 6. Semiconductor element, 7. Through hole, 7a. First through hole, 7b. Second through hole, 8. Bonding member, 9. High-potential side terminal, 9a. Bending portion, 10. Heat dissipation member, 11. Upper arm semiconductor package, 12. Lower arm semiconductor package, 13. Signal terminal, 13a. Bending portion, 20. Cooler, 20a. First cooler, 20b. Second cooler, 21. Split cooler, 22. Cooling fin, 23. Cooler cover, 23a. Sealing member, 24. Conductor member.

Claims

1. A power conversion device, characterized in that, have: A semiconductor package having semiconductor elements that respectively constitute upper and lower arm circuits; and A wiring substrate having a wiring layer electrically connecting the wiring layer and one surface of the semiconductor package. The semiconductor package has a first conductor and a second conductor, the first conductor being connected to a main electrode formed on a surface of the semiconductor element and the high-potential side of the upper and lower arm circuits. The second conductor is connected to the main electrode formed on another surface of the semiconductor element and to the low-potential side of the upper and lower arm circuits. The wiring substrate and the semiconductor package are connected to the wiring layer via a second conductor connected to the low-potential side to form a conductive path for the inverter main circuit, which includes the upper and lower arm circuits.

2. The power conversion device according to claim 1, characterized in that, The semiconductor package has a high-potential side terminal and a sealing member. The high-potential side terminal is electrically connected to the first conductor, and the sealing member seals the first conductor, the second conductor, the semiconductor element, and the high-potential side terminal. The high-potential side terminal protrudes outward from a surface different from the surface in the sealing member where the second conductor is exposed.

3. The power conversion device according to claim 2, characterized in that, The high-potential side terminal comprises a plurality of terminals that are adjacent to each other in the planar direction.

4. The power conversion device according to claim 1, characterized in that, The wiring substrate has a first through-hole in the thickness direction at the portion connected to the second conductor. The second conductor is electrically and thermally connected to each wiring layer of the wiring substrate via the first through-hole.

5. The power conversion device according to claim 1, characterized in that, The wiring substrate is thermally connected to the first cooler via an insulating heat dissipation component.

6. The power conversion device according to claim 5, characterized in that, The semiconductor package is thermally connected to the second cooler via the insulating heat dissipation component.

7. The power conversion device according to claim 6, characterized in that, The second cooler has cooling fins respectively disposed corresponding to the upper and lower arm circuits in the semiconductor package.

8. The power conversion device according to claim 4, characterized in that, The wiring substrate has a second through-hole with a larger diameter than the first through-hole in the portion connected to the second conductor, and at the same position as where the semiconductor element is disposed in the stacking direction. The interior of the second through hole is filled with a thermally conductive component.

9. The power conversion device according to claim 1, characterized in that, The wiring substrate has a thermally conductive conductor member that extends through the substrate in the thickness direction at the same position as the semiconductor element is disposed in the stacking direction in the portion connected to the second conductor.

Images