Printing control method and electronic equipment

Abstract

The invention discloses a printing control method and electronic equipment, the electronic equipment is provided with a receiving buffer area and an execution buffer area, and the method comprises the steps that a printing control instruction is acquired; the printing control instruction is stored in a receiving buffer area; when the printing control instruction is stored in the receiving buffer area, the execution buffer area is awakened, so that the execution buffer area writes the printing control instruction; the instruction type of the printing control instruction is analyzed; and executing the printing control instruction according to the instruction type. According to the method and the device, by arranging a double-buffer parallel architecture of the receiving buffer area and the execution buffer area, decoupling of instruction receiving and analysis execution is realized; the complete length of an instruction is deduced through a pre-analysis mechanism, and in combination with state machine monitoring and hierarchical execution strategies, priority response to a real-time instruction, cross-frame splicing of a long instruction and automatic fusing of an abnormal instruction are realized. And the throughput and robustness of the system are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of embedded printer control, and particularly relates to a printing control method and electronic equipment. BACKGROUND

[0002] In related technologies, the printing thread of a printer adopts a serial architecture of'receiving-analyzing-executing', which is prone to cause receiving delay due to execution block in a dense instruction scenario, and has problems of low efficiency and thread congestion in the execution process, which seriously affects the performance of a printing task. SUMMARY

[0003] The present application aims to solve the technical problem of providing a printing control method and electronic equipment to improve the real-time performance of instruction processing and the stability of analysis efficiency.

[0004] To solve the above technical problem, one technical solution adopted by the present application is as follows: A printing control method applied to an electronic equipment, wherein the electronic equipment is provided with a receiving buffer and an execution buffer, and the method comprises the following steps: acquiring a printing control instruction; storing the printing control instruction into the receiving buffer; when the receiving buffer stores the printing control instruction, waking up the execution buffer to write the printing control instruction into the execution buffer; analyzing the instruction type of the printing control instruction; executing the printing control instruction according to the instruction type.

[0005] To solve the above technical problem, another technical solution adopted by the present application is as follows: An electronic equipment comprising a memory, a processor and a computer program stored in the memory and running on the processor, wherein the processor implements each step of the above printing control method when executing the computer program.

[0006] The application has the beneficial effects that: the application acquires a print control instruction, saves the print control instruction to a receiving buffer, wakes up an execution buffer when the receiving buffer saves the print control instruction, so that the execution buffer writes the print control instruction, analyzes the instruction type of the print control instruction, and executes the print control instruction according to the instruction type. By using the method of the application, the print control instruction is saved to the receiving buffer by setting the double buffering structure of the receiving buffer and the execution buffer, combined with the instruction pre-analysis mechanism, the analysis and execution of the instruction are realized in the execution buffer, and during the execution, the print control instruction is executed according to the instruction type, so that the physical separation and parallel processing of the instruction receiving and execution links are realized, the blockage problem caused by the traditional serial processing is avoided, the efficiency in the execution process is improved, and the problem of thread congestion is avoided. At the same time, the complete length of the instruction is accurately inferred by the pre-analysis mechanism, so that the integrity and reliability of the instruction in the processing process are guaranteed. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1 A step flow chart of a print control method provided for the embodiment of the application; Figure 2 A first part of an instruction processing flow chart of a print control method provided for the embodiment of the application; Figure 3 A second part of an instruction processing flow chart of a print control method provided for the embodiment of the application; Figure 4 A third part of an instruction processing flow chart of a print control method provided for the embodiment of the application; Figure 5 An instruction analysis flow chart of a print control method provided for the embodiment of the application; Figure 6 A structure schematic diagram of an electronic device provided for the embodiment of the application. DETAILED DESCRIPTION

[0008] In order to make the technical problems, technical solutions and beneficial effects of the application clearer, the application is further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the application, and are not used to limit the application.

[0009] In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular architectures, technologies, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. However, it will be apparent to those skilled in the art that the present application can be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.

[0010] It is to be understood that the terminology “including”, when used in the present specification and in the accompanying claims, does not exclude the presence of other features, integers, steps, operations, elements, and / or groups thereof.

[0011] Reference in the specification to “one embodiment” or “some embodiments” etc. means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the application. The appearances of the phrases “in one embodiment” or “in some embodiments” in various places in the specification are not necessarily all referring to the same embodiment, however, it is contemplated that the application will cover all possible combinations of these features, structures, and characteristics, and that one or more features, structures, or characteristics of one embodiment can be combined with one or more features, structures, or characteristics of other embodiments. The terms “including”, “comprising”, “having” and variations thereof herein are meant to encompass the inclusion of one or more features, integers, steps, operations, elements, and / or groups thereof but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, and / or groups thereof.

[0012] In the related art, the ESC / POS instruction set is widely used in retail, catering, logistics and other scenarios as a general standard for POS printing devices. With the diversified development of embedded POS devices, higher requirements are put forward for the compatibility and reliability of the printing control system. However, the ESC / POS instruction analysis scheme in the related art has the following technical defects, which is difficult to meet the printing requirements of multiple scenarios and high reliability.

[0013] Firstly, the analysis efficiency in the related art is low. Most schemes adopt a serial processing mode of “receiving-analysis-executing”, when the instruction flow is intensive (such as batch printing of labels), the instruction receiving process will be blocked by the execution link, resulting in printing delay. At the same time, the instruction matching usually depends on linear traversal of the preset instruction table, and when facing complex command groups, the matching time increases significantly with the number of instructions, resulting in slow system response.

[0014] Secondly, the related art lacks an effective checking mechanism for the integrity of instruction parameters. When the instruction is missing parameters (for example, the barcode width parameter is not transmitted in the barcode printing instruction), the analysis logic will often fall into a dead loop waiting for the subsequent parameters, causing the printer to be stuck, and the device needs to be restarted manually to recover, which seriously affects business continuity.

[0015] And the buffer management mechanism in the related art is relatively chaotic. The ESC / POS instruction set contains fixed-length instructions and variable-length instructions, and the existing buffer scheme mostly uses fixed-length buffer, which is prone to problems such as waste of cache space for short instructions and buffer overflow for long instructions, and cannot dynamically adapt to the splicing requirements of instruction parameters. In addition, the existing system is mostly strongly coupled with a specific hardware platform or operating system, and a large amount of core code needs to be modified when cross-platform adaptation is performed, and the development and maintenance cost is high.

[0016] The present application provides a kind of printing control method and electronic equipment to solve the above problems. The following specific introduction is a kind of printing control method of the present application.

[0017] A kind of printing control method in the present application can be used in printer instruction flow processing scene. The electronic equipment of the present application can be electronic equipment that needs to efficiently analyze print instruction, such as cash desk thermal printer (such as supermarket, convenience store), kitchen ticket printer, front desk settlement printer, face sheet printer (support bar code / 2D code ESC / POS instruction), POS terminal built-in printer (such as bank card terminal).

[0018] The following specifically introduces a kind of printing control method in the present application, refers to Figure 1 , including steps 110-150.

[0019] Step 110, obtain print control instruction. Electronic equipment listens to the instruction stream data input externally through physical interface (such as serial port, USB interface or network interface).

[0020] Step 120, save print control instruction to receiving buffer. The step will store the instruction stream data to the pre-allocated memory area, i.e. in the receiving buffer, to prevent data loss during processing.

[0021] Step 130, when receiving buffer saves print control instruction, wake up execution buffer to make execution buffer write print control instruction. At this time, the task responsible for receiving notifies the task responsible for execution that the data is ready, and the execution buffer reads the data from the receiving buffer.

[0022] Step 140, analyze the instruction type of print control instruction. Analyze the instruction data entering the execution buffer to identify which function category the instruction belongs to (such as print command, setting command or state query command).

[0023] Step 150, execute print control instruction according to instruction type. According to the type parsed, call the corresponding hardware driver or logic processing function to complete specific printing action or state feedback.

[0024] The application constructs an asynchronous double-buffer processing mechanism through steps 110 to 150. The print control instruction is acquired, saved to a receiving buffer, and when the receiving buffer saves the print control instruction, the execution buffer is woken up to make the execution buffer write the print control instruction. The instruction type of the print control instruction is parsed, and the print control instruction is executed according to the instruction type. By using the method of the application, the double-buffer structure of the receiving buffer and the execution buffer is set, the instruction pre-parsing mechanism is combined, the print control instruction is saved to the receiving buffer, then the instruction is parsed and executed in the execution buffer, and when the instruction is executed, the print control instruction is executed according to the instruction type, so that the physical separation and parallel processing of the instruction receiving and execution links are realized, the jamming problem caused by the traditional serial processing is avoided, the efficiency in the execution process is improved, and the thread congestion problem is avoided. Meanwhile, the complete length of the instruction is accurately inferred through the pre-parsing mechanism, so that the integrity and reliability of the instruction in the processing process are ensured.

[0025] In an embodiment of the application, the parsing process in step 140 is further refined. Step 140 includes steps 141 to 143.

[0026] Step 141, the starting byte of the print control instruction is determined to determine the command group to which the print control instruction belongs. Different function modules in the ESC / POS instruction set usually have specific frame header identifiers. The first byte of the current data to be processed is read by the system as a primary index, and is matched to the corresponding command group (such as a print control command group, a barcode command group, etc.).

[0027] Step 142, in the command group, the subcommand is determined according to the subcommand identifier composed of one or more bytes after the starting byte. After the primary command group is determined, the subsequent bytes are read and compared with the predefined subcommand table in the command group, so as to accurately lock the specific instruction function.

[0028] Step 143, the length of the command group and the length of each subcommand in the command group are recorded as the complete length of the print control instruction. After the specific subcommand is identified, the system queries the parameter format definition of the subcommand, adds the instruction header length and the parameter length, and calculates the total number of bytes required by the current instruction, that is, the complete length.

[0029] In this way, a pre-parsing based instruction length inference mechanism is realized through steps 141 to 143. In view of the indefinite length characteristic of the ESC / POS instruction set, the system does not rely on a fixed frame structure, but dynamically calculates the complete length of the current instruction through a hierarchical progressive manner of locking specific instructions by starting byte positioning command group combined with sub-command identification. This mechanism enables the system to accurately know the boundary of each instruction before execution, thereby accurately splitting independent instruction frames from continuous data streams, avoiding parsing errors caused by sticky or half-packet, and providing a reliable quantitative basis for subsequent instruction integrity verification.

[0030] In an embodiment of the present application, the execution logic in step 150 is specifically expanded. Step 150 includes steps 151 to 154.

[0031] Step 151, based on the command group and the sub-command, quickly locates the execution logic corresponding to the sub-command through the hierarchical hash table. The system pre-constructs an index structure composed of a primary hash table and a secondary hash table for storing the mapping relationship between instructions and execution functions.

[0032] Step 152, taking the starting byte as the hash key, searches for the command group in the primary hash table of the hierarchical hash table. The frame header byte of the instruction is taken as the Key value, and the corresponding primary node is directly located through the hash algorithm.

[0033] Step 153, taking the sub-command identification as the hash key, searches for the corresponding sub-command execution logic from the command group in the secondary hash table of the hierarchical hash table. In the located primary node, the sub-command identification is taken as the Key value to further locate the specific execution function entry.

[0034] Step 154, executes the sub-command execution logic. The found function pointer or processing module is called to drive the printer action with the parsed parameters.

[0035] In this way, a hierarchical hash lookup strategy is introduced through steps 151 to 154. Compared with the traditional linear traversal matching method, the starting byte and the sub-command identification are used as hash keys for two-level fast indexing, reducing the time complexity of instruction matching from O(n) to close to O(1). Even in the scenario of supporting hundreds of complex ESC / POS instructions, this method can still maintain a matching speed of microseconds, eliminating the bottleneck of performance degradation caused by instruction set expansion, and significantly improving the execution throughput of the printing control system under high load.

[0036] In an embodiment of the present application, an exception monitoring mechanism is added to the process of parsing the instruction type in step 140. Step 140 further includes steps 144 to 146.

[0037] Step 144: Monitor the parsing process of the printing control commands through a state machine. The state machine includes a state for receiving command parameters. The system maintains a parsing state machine. When the command header is recognized, the state machine switches to the state for receiving command parameters, waiting for subsequent data to be filled in.

[0038] Step 145: When insufficient parameter length is detected in the received instruction parameter status, a timeout timer is triggered. If the amount of data in the current receive buffer is less than the complete length inferred in step 143, the system starts a timer of a preset duration (e.g., 100ms).

[0039] Step 146: If the complete parameters are not received after the timeout timer expires, the print control command is discarded. When the timeout ends, if the subsequent data stream still does not complete the required parameter length, the system determines that the current command is invalid or the transmission is interrupted, resets the state machine, and discards the cached incomplete data.

[0040] In this way, a fault-tolerant mechanism based on state machine and timeout monitoring is constructed through steps 144 to 146. In embedded printing scenarios, missing parameters often cause the parsing logic to enter an infinite loop. By introducing timeout monitoring of the received instruction parameter status, the system can automatically trigger circuit breaker protection, discard erroneous instructions, and restore to the initial state when it detects abnormal interruption of the data stream or incomplete parameters. This mechanism ensures that the printing control system has self-recovery capabilities, preventing the entire device from freezing due to a single abnormal instruction, and greatly improving the robustness of the system and the operational stability in industrial settings.

[0041] In one embodiment of this application, steps 161 and 162 are also included. Steps 161 to 162 can be executed synchronously with step 140.

[0042] Step 161: When the state machine is in the state of waiting for instruction frame header, set the receive buffer size to the minimum length. When the system is idle or searching for the start of a new instruction, only a very small buffer window (e.g., 2 bytes) is needed to match the frame header.

[0043] Step 162: When the state machine is in the state of receiving instruction parameters, set the size of the receive buffer to the maximum length. Once the instruction header is confirmed and the parameter receiving stage begins, the system dynamically expands the effective window of the buffer according to the inferred full length of the instruction to accommodate all the parameter data of the instruction.

[0044] In this way, intelligent dynamic adaptation of the buffer is achieved through steps 161 and 162. Traditional fixed-length buffer schemes are prone to wasting space for short instructions or causing overflow risks for long instructions. By using a state machine to drive the buffer size to dynamically switch between the minimum and maximum lengths, the system can accurately match the memory requirements of the current parsing stage. This design maximizes memory utilization with limited embedded resources, while providing flexible space support for processing ESC / POS instructions of different lengths and avoiding memory fragmentation.

[0045] In one embodiment of this application, the parsing process in step 140 further includes steps 147 and 148.

[0046] Step 147: When the instruction type is a real-time instruction, insert the real-time instruction at the front of the execution buffer. During the parsing phase, once the current instruction is identified as a real-time instruction, the system does not place it at the tail of the regular queue, but instead places it at the head of the execution buffer through a priority queue mechanism.

[0047] Step 148: When the instruction type is a long instruction and the data length of the print control instruction meets the full length requirement, the print control instruction is added to the end of the instruction queue in the execution buffer. For instructions whose data has been completely received, the system adds them to the queue according to the standard first-in-first-out principle, waiting for sequential execution.

[0048] In this way, a priority-based dual-track execution mechanism is constructed through steps 147 and 148. On the one hand, step 147 establishes a preemptive execution mechanism for real-time commands. During normal sequential printing, if an urgent device status query or print cancellation request is encountered, the traditional FIFO (First-In-First-Out) queue will cause a response delay. By identifying real-time commands and inserting them at the front of the execution buffer, it is ensured that urgent commands can bypass the currently queued ordinary print data and be processed immediately. This mechanism guarantees millisecond-level response of the printer to user control operations (such as pause, paper shortage query), significantly improving user experience and device controllability. On the other hand, step 148 establishes an ordered execution mechanism for regular commands. For complete commands that do not require concatenation, the system follows strict timing logic to ensure that printing operations (such as printing text and images sequentially) will not be out of order, guaranteeing the stability and logical correctness of basic printing functions.

[0049] In one embodiment of this application, the parsing process in step 140 includes step 149.

[0050] Step 149: When the instruction type is a long instruction and the data length of the print control instruction is less than the full length, record the received instruction fragments and append subsequent frame data to the end of the instruction fragment until the length of the instruction fragment meets the full length; then execute the print control instruction. For large data volume instructions such as bitmap printing or custom character downloading, when a single transmitted data frame cannot contain the complete instruction, the system temporarily stores the currently received partial data and marks the parsing status as incomplete. As subsequent data packets arrive, the system continuously appends them to the recorded fragments and updates the current cumulative length in real time until the cumulative data volume reaches the preset full length, at which point it is marked as an executable complete instruction.

[0051] In this way, step 149 achieves cross-frame splicing processing for long instructions. Many ESC / POS instructions exceed the size limit of the underlying communication packet (such as image printing), causing the instructions to be physically segmented at the transport layer. By recording fragments and continuously splicing them, the system shields the complexity of underlying data packetization, enabling the reconstruction of complete long instructions in the upper-layer logic. This processing method ensures the integrity of image or complex format printing, avoids garbled characters or printing misalignments caused by data breaks, and achieves seamless support for ESC / POS instructions of arbitrary length.

[0052] In one embodiment of this application, an error log recording function is added based on steps 110-150, and step 170 is also included.

[0053] Step 170: When a print control command has missing parameters, record the type of the missing parameter and the command information in the error log. When the parsing logic detects that the command structure does not conform to the preset specification, or when a timeout is triggered in step 146, the system automatically captures the current command hexadecimal code stream and the definition of the missing parameters, and writes them to the log file in non-volatile memory.

[0054] In this way, a comprehensive anomaly tracing mechanism is established through step 170. In practical applications, missing command parameters are often difficult to reproduce and troubleshoot. By recording the type of missing parameters and the original command information in real time, developers can quickly locate vulnerabilities in the host computer software's transmission logic or interference problems in the transmission line based on the error log. This provides detailed data support for the later maintenance and fault diagnosis of the equipment, greatly reducing operation and maintenance costs.

[0055] In one embodiment of this application, based on steps 110-150, the thread architecture of the system is described, and step 180 is also included.

[0056] Step 180: The first thread executes the process of writing print control instructions to the receive buffer, while the second thread executes the process of waking up the execution buffer, parsing the instruction type of the print control instructions, and executing them. The first and second threads process in parallel. The system starts two independent execution threads (or tasks). The first thread focuses on I / O data handling, storing external data into the receive buffer; the second thread focuses on logical operations, retrieving data from the receive buffer and parsing and executing it. The two are synchronized through semaphores or message queues.

[0057] In this way, a parallelized dual-threaded processing architecture was constructed through step 180. The I / O-intensive receiving task and the computationally intensive parsing and execution task were separated into different threads and run in parallel, maximizing the utilization of processor resources. The first thread ensures real-time data reception, preventing data loss due to parsing delays; the second thread focuses on complex instruction parsing and hardware control. This parallel architecture eliminates the blocking wait of the single-threaded model, significantly improving the overall throughput and operating efficiency of the print control system under high-concurrency data flow.

[0058] The following combination Figure 2 (Flowchart of instruction processing for a printing control method, Part 1) Figure 3 (Part 2 of the instruction processing flowchart of a printing control method) Figure 4 (Flowchart of instruction processing for a printing control method, Part 3) Figure 5 (A flowchart of instruction parsing for a printing control method) and the aforementioned specific steps, detailing the specific implementation logic of the present invention step by step.

[0059] Step 1: Parsing layer initialization and architecture construction ( Figure 2 Step 1 in the code indicates that the system starts the parsing service; Figure 2 Step 2 in the above corresponds to the basic construction process in step 151 above, which uses a hierarchical hash table to quickly locate the execution logic based on command groups and sub-commands. Figure 2 Step 3 in the above corresponds to the initialization environment preparation in step 144, which involves monitoring the parsing process of the print control instructions via a state machine.

[0060] After system startup, the initialization of the ESC / POS parsing layer is performed first. During this phase, the system registers supported ESC / POS commands to the main parser based on a hierarchical hash structure, constructing a two-level index system of "command group - subcommand". Simultaneously, the system initializes the state machine for error recovery and provides a unified command parsing and command judgment interface. At this point, the parsing environment is ready and awaits data input.

[0061] Step 2: Multi-channel instruction access and asynchronous buffering ( Figure 3Step 1 in the text represents data access through the physical interface; Figure 3 Step 2 in the above steps corresponds to obtaining the print control command in step 110 and saving the print control command to the receiving buffer in step 120.

[0062] Electronic devices receive print control command streams from external sources via physical interfaces such as UART (Universal Asynchronous Receiver / Transmitter), USB (Universal Serial Bus), or BT (Bluetooth). The first thread (receiver thread) listens for these interfaces and immediately saves the data to the receive buffer upon arrival. To ensure high throughput in the underlying communication, the first thread returns to the interface call immediately after storing the data, without performing any parsing operations, thus avoiding blocking of the receiving process by time-consuming business logic.

[0063] Step 3: Thread wake-up and task scheduling Figure 3 Step 2 in the above corresponds to waking up the execution buffer when the receive buffer contains print control instructions in step 130 above; Figure 4 Step 1 in the above corresponds to the process in step 180 where the second thread executes the wake-up execution buffer, parses the instruction type of the print control instruction, and executes it.

[0064] When new instruction data is stored in the receive buffer, the system wakes up the suspended second thread (i.e., the execution thread in the diagram) through a semaphore or event mechanism. At this point, control of the data flows to the execution thread, and the system enters parallel processing mode. The first thread continues to receive subsequent data, while the execution thread begins to process the buffered data.

[0065] Step 4: Data Transfer and Intelligent Pre-parsing ( Figure 4 Steps 1 and 2 in the text correspond to the data reading process; Figure 5 Step 5 in the above steps corresponds to determining the sub-command in step 142 and inferring the complete length of the instruction in step 143.

[0066] After the execution thread is awakened, it first checks if there are any new instructions in the receive buffer. If so, it reads the data from the receive buffer into the execution buffer. During this process, the main parser pre-parses the data, identifies the command group by the start byte, and infers the full length of the current instruction by combining it with the subcommand identifier. Meanwhile, the buffer size is dynamically adjusted between the minimum and maximum lengths based on the parsing status to adapt to the current instruction requirements.

[0067] Step 5: Hierarchical Strategy and Queue Management Figure 5 Steps 4.1 and 7 in the above correspond to the trigger timeout timer in step 145 above; Figure 5 Step 7 in the above corresponds to the timeout-discard print control instruction in step 146 above; Figure 3Step 9 in the above corresponds to the insertion of the real-time instruction at the very beginning in step 147 above.

[0068] During pre-parsing, the system executes a hierarchical processing strategy based on the instruction type. If the parsed result is a real-time instruction, the system directly inserts it at the front of the execution queue to ensure priority response. If it is a long instruction spanning multiple frames, the system records the fragments and waits for subsequent data concatenation until the complete length is met. If the state machine detects missing parameters and a timeout, it performs a discard operation and logs the result to prevent queue congestion. Complete, validated ordinary instructions are then added sequentially to the tail of the execution queue.

[0069] Step 6: Instruction Distribution and Hardware Execution ( Figure 4 Step 4 in the text represents queue polling; Figure 4 Step 5 in the above steps corresponds to the first-level hash lookup in step 152, the second-level hash lookup in step 153, and the execution subcommand logic in step 154.

[0070] The execution thread continuously checks the execution queue. If there are unexecuted instructions in the queue, the system retrieves the instruction from the head of the queue, searches the hierarchical hash table, quickly locates the specific sub-command execution logic, and calls the underlying printer interface to complete the physical action (such as printing and paper feeding).

[0071] Step 7: Resource Release and Cyclic Monitoring Figure 4 The "suspend thread" in steps 1 to 4 corresponds to the reverse process of waking up the execution buffer in step 130 above, that is, releasing resources when there is no data and waiting for the next wake-up.

[0072] When all instructions in the execution queue have been processed and there is no new data input in the receive buffer, the execution thread automatically enters a suspended state, releasing CPU resources until it is awakened by the receiving thread again, thus forming an efficient event-driven loop.

[0073] This application constructs a parallel pipeline of "receive-pre-parsing-execution" through steps 1 to 7. Utilizing the double-buffered asynchronous mechanism in steps 2 and 3, it eliminates the receiving blockage caused by instruction execution in the single-threaded model, solving the packet loss problem under high-frequency data streams. Simultaneously, a modular design decouples the parsing logic from the underlying input method, facilitating cross-platform adaptation across different operating systems (such as Android and RTOS). Combined with intelligent pre-parsing, dynamic buffer adaptation, and hierarchical queue management in steps 4 and 5, and leveraging instruction length inference and state machine monitoring, it achieves accurate segmentation and cross-frame splicing of variable-length ESC / POS instructions, avoiding the waste of space and overflow risks in fixed buffers, while ensuring millisecond-level interleaving response capability for real-time instructions and automatic circuit breaker recovery in case of missing parameters. Through fast hash indexing in step 6, the instruction matching time complexity is reduced to constant level. This solution significantly optimizes the throughput and real-time performance of the printer in complex business scenarios while ensuring system robustness. Furthermore, the solution adopts a hierarchical instruction organization structure, which allows the extension of the instruction set without modifying the core matching logic, greatly reducing the cost of secondary development. Combined with the error log recording function, it enables on-site tracing of abnormal operating conditions, solving the pain point of device jamming caused by missing parameters in existing technologies. While improving memory utilization and processing efficiency, it meets the needs of large-scale application of various POS products in complex network environments.

[0074] Please refer to Figure 6 The present invention also provides an electronic device 400, including a memory 402 and a processor 401, and a computer program stored in the memory 402 and running on the processor 401. When the processor 401 executes the computer program, it implements the various steps in the printing control method described above.

[0075] The beneficial effects of the electronic device of the present invention are the same as those of the method described above, and will not be repeated here.

[0076] In summary, the printing control method provided in this application achieves comprehensive optimization of printing control logic by constructing a parallel processing pipeline of "receive-pre-parsing-execution". In terms of process, the system utilizes an independent first thread to quickly store externally input printing control commands into the receive buffer, and asynchronously wakes up a second thread via a signal mechanism to write data into the execution buffer. Subsequently, the second thread uses intelligent pre-parsing technology to accurately infer the command type and full length, and combines state machine logic to distribute the commands: real-time commands are inserted at the head of the queue for priority response, cross-frame length commands are buffered and concatenated, abnormal commands with missing parameters are timed out and circuit-broken, and finally, ordinary commands are quickly located and executed using a hierarchical hash table. By combining this dual-buffered parallel architecture with an intelligent hierarchical strategy, the instruction receiving and parsing execution stages are decoupled, eliminating the risk of data loss at the receiving end due to execution time and significantly improving the system's data throughput in high-concurrency scenarios. On the other hand, by handling real-time instructions in queues and automatically recovering abnormal instructions, the technical pain points of large response latency and poor fault tolerance in traditional serial solutions are solved, ensuring the real-time performance, stability, and robustness of the printing device in complex business environments.

[0077] The above are merely embodiments of the present invention and do not limit the patent scope of the present invention. Any equivalent modifications made based on the content of the present invention's specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A printing control method, characterized in that, Applied to an electronic device, the electronic device being provided with a receive buffer and an execution buffer, the method includes: Obtain print control commands; Save the print control instructions to the receive buffer; When the receive buffer contains the print control instruction, the execution buffer is woken up so that the execution buffer writes the print control instruction. Parse the instruction type of the print control command; The printing control instruction is executed according to the instruction type.

2. The printing control method according to claim 1, characterized in that, The instruction types for parsing the print control instructions include: The command group to which the print control instruction belongs is determined based on the start byte of the print control instruction; Within the command group, a subcommand is determined based on a subcommand identifier consisting of one or more bytes following the start byte; The length of the command group and the length of each subcommand in the command group are recorded as the complete length of the print control instruction.

3. The printing control method according to claim 2, characterized in that, The execution of the print control instruction according to the instruction type includes: Based on the command group and sub-commands, the execution logic corresponding to the sub-commands can be quickly located using a hierarchical hash table; Using the starting byte as the hash key, search for the command group in the first-level hash table of the hierarchical hash table; Using the sub-command identifier as the hash key, the corresponding sub-command execution logic is searched for in the second-level hash table of the hierarchical hash table from the command group; Execute the logic of the subcommand.

4. The printing control method according to claim 1, characterized in that, The method of parsing the instruction type of the print control instruction also includes: The parsing process of the printing control command is monitored by a state machine, which includes a state for receiving command parameters. When insufficient parameter length is detected in the received instruction parameter status, a timeout timer is triggered; If the complete parameters are not received after the timeout timer expires, the print control command is discarded.

5. The printing control method according to claim 4, characterized in that, Also includes: When the state machine is in the waiting state for the instruction frame header, the size of the receive buffer is set to the minimum length. When the state machine is in the state of receiving instruction parameters, the size of the receive buffer is set to the maximum length.

6. The printing control method according to claim 1, characterized in that, The execution of the print control instruction according to the instruction type includes: When the instruction type is a real-time instruction, the real-time instruction is inserted at the beginning of the execution buffer; When the instruction type is a long instruction and the data length of the print control instruction meets the full length, the print control instruction is added to the end of the instruction queue of the execution buffer; Execute the print control command.

7. A printing control method according to claim 6, characterized in that, The step of executing the print control instruction according to the instruction type further includes: When the instruction type is a long instruction and the data length of the print control instruction is less than the full length, the received instruction fragment is recorded, and subsequent frame data is appended to the end of the instruction fragment until the length of the instruction fragment meets the full length. Execute the print control command.

8. The printing control method according to claim 1, characterized in that, Also includes: When a missing parameter occurs in the print control command, the type of the missing parameter and the command information are recorded in the error log.

9. A printing control method according to claim 1, characterized in that, Also includes: The process of writing the print control instruction into the receive buffer is executed by the first thread, and the process of waking up the execution buffer, parsing the instruction type of the print control instruction, and executing it is executed by the second thread. The first thread and the second thread process in parallel.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements each step of the printing control method according to any one of claims 1 to 9.

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