Model visualization method and system, electronic equipment and readable storage medium

Abstract

The invention relates to a model design technology, in particular to a model visualization method and system, electronic equipment and a readable storage medium. The model visualization method comprises the steps that a graphical model is converted into a vector diagram format, a mapping configuration file and a mapping table are generated in the conversion process, and the mapping table comprises number information of each connecting line in a vector diagram and signal information of the corresponding connecting line in the graphical model; loading the mapping configuration file through a simulation process so as to visualize the model; and loading the mapping table through a simulation process so as to display the real-time simulation signal value corresponding to each connecting line in a visual model during simulation of a binary file exported based on the graphical model.

Description

[0001] Cross-references to related applications This application is based on and claims priority to Chinese Patent Application No. 202510968868.9, filed July 15, 2025, and Chinese Patent Application No. 202511476833.X, filed October 16, 2025. The entire contents of the above applications are incorporated herein by reference. Technical Field

[0002] This invention relates to model design technology, and more specifically to a model visualization method, system, electronic device, and readable storage medium. Background Technology

[0003] The industry currently faces the following challenges in model sharing and collaboration: the FMU (Functional Mock-up Unit) standard only supports static bitmap embedding, making it impossible to display signal values ​​in real time at the original location. This leads to the problem that during model review, integration testing, and fault diagnosis, engineers cannot intuitively observe signal changes on the model topology diagram and must rely on independent curve windows for signal analysis, resulting in inefficient problem localization and a high risk of misjudgment.

[0004] For example, in ABS anti-lock braking system calibration and fault location scenarios, after FMU delivery, the viewer only displays the model's static diagram and independent curve window, failing to show key signals such as "wheelSpeed," "slip," and "valveCmd" at connection / branch locations. When "slip > threshold," engineers struggle to quickly determine which decision branch was triggered and on which connection the signal was clamped or delayed. They must mentally compare the static diagram and curves one by one, significantly increasing troubleshooting time. Furthermore, it's difficult to correlate millisecond-level abnormal instantaneous triggers with specific connection locations, easily leading to misdiagnosis of the root cause.

[0005] Therefore, existing technologies have the technical problem of not being able to display signal values ​​in real time at the original location of the model.

[0006] It should be noted that the information disclosed in this background section is only for understanding the background technology of the present invention, and therefore, the above description is not considered to constitute prior art information. Summary of the Invention

[0007] The purpose of this invention is to provide a model visualization method, system, electronic device, and readable storage medium.

[0008] To address the aforementioned technical problems, this invention provides a model visualization method, comprising: convert the graphical model into a vector graph format, and generate a mapping configuration file and a mapping table in the process of conversion, the mapping table comprising: number information of each connection line in the vector graph and signal information of the corresponding connection line in the graphical model; load the mapping configuration file by a simulation process to visualize the model; load the mapping table by the simulation process to display real-time simulation signal values corresponding to each connection line in the visualized model when simulating a binary file derived based on the graphical model.

[0009] In another aspect, the present application also provides a model visualization system, comprising: a computer device configured to comprise: a conversion module configured to convert the graphical model into a vector graph format, and generate a mapping configuration file and a mapping table in the process of conversion, the mapping table comprising: number information of each connection line in the vector graph and signal information of the corresponding connection line in the graphical model; a loading module configured to load the mapping configuration file by a simulation process to visualize the model, and load the mapping table by the simulation process to display real-time simulation signal values corresponding to each connection line in the visualized model when simulating a binary file derived based on the graphical model.

[0010] In a third aspect, the present application also provides a non-transitory computer readable storage medium storing instructions, which, when executed by a processor, cause the processor to perform the model visualization method according to the foregoing.

[0011] In a fourth aspect, the present application also provides an electronic device, comprising: a non-transitory computer readable storage medium; a processor; wherein the non-transitory computer readable storage medium stores instructions, which, when executed by the processor, cause the processor to perform the model visualization method according to the foregoing.

[0012] In a fifth aspect, the present application also provides a computer program product comprising instructions, which, when executed by a processor, cause the processor to perform the model visualization method according to the foregoing.

[0013] The model visualization method of the present application can display the real-time simulation signal value corresponding to each connection in the visualized model by path-drawing vectorization of the vector diagram, mapping table binding of the number information of each connection in the vector diagram and the signal information of the corresponding connection in the graphical model, and simulation process loading of the vector diagram and the mapping table, that is, the model topology and the simulation data are "in situ, real-time, and interactive" associated display, which can significantly shorten the problem positioning and review cycle and improve the cross-organizational collaboration efficiency.

[0014] Other features and advantages of the present application will be set forth in the following description, and in part will become apparent to those skilled in the art from the description, or can be learned by practice of the present application. The objects and other advantages of the present application will be realized and attained by the structure particularly pointed out in the description and the drawings.

[0015] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the following preferred embodiments are specifically described below, and the accompanying drawings are described in detail as follows. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor.

[0017] Figure 1 A step diagram of the model visualization method involved in some embodiments is shown; Fig. 2(a) shows a case schematic diagram of the model visualization method involved in some embodiments (Chinese); Fig. 2(b) shows a case schematic diagram of the model visualization method involved in some embodiments (English); Figure 3 A case schematic diagram of the model visualization method involved in some embodiments is shown; Figure 4 A principle block diagram of the model visualization system involved in some embodiments is shown; Figure 5 A principle block diagram of the electronic device involved in some embodiments is shown; Figure 6 A principle block diagram of the electronic device involved in some embodiments is shown. DETAILED DESCRIPTION

[0018] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions of the present application will be clearly and completely described below with reference to the drawings. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of the present application.

[0019] The current industry is facing the following problems in model sharing and cooperation: the FMU (Functional Mock-up Unit) standard only supports static bitmap embedding, and cannot display signal values in the original position in real time. This brings the problem that in the model review, joint debugging and fault diagnosis process, engineers cannot intuitively observe the signal change on the model topology graph, and can only rely on independent curve windows for signal analysis, resulting in low problem positioning efficiency and easy misjudgment.

[0020] For example, in the ABS anti-lock braking system calibration and fault positioning scene, after the FMU is delivered, the viewer only displays the static graph of the model and the independent curve window, and cannot display the key signals such as "wheelSpeed", "slip" and "valveCmd" in the original position of the connection / branch. When "slip>threshold", it is difficult for engineers to quickly determine which judgment branch is triggered, and the signal is clamped or delayed on which connection, and it is necessary to compare the static graph and the curve one by one in the mind, which significantly increases the troubleshooting time, and it is difficult to correspond to the specific connection position for the abnormal transient trigger of milliseconds, and it is easy to misjudge the root cause.

[0021] Therefore, at least one embodiment provides a model visualization method, comprising: converting a graphical model into a vector graph format through path drawing, and generating a mapping configuration file and a mapping table in the process of conversion, the mapping table comprising: the number information of each connection in the vector graph and the signal information of the corresponding connection in the graphical model; loading the mapping configuration file through a simulation process to enable model visualization; loading the mapping table through the simulation process to display the real-time simulation signal values corresponding to each connection in the visualized model when simulating based on the binary file derived from the graphical model.

[0022] The model visualization method realizes the display of real-time simulation signal values corresponding to each connection in the visualized model, that is, the "original position, real-time and interactive" correlation display of the model topology and simulation data, can significantly shorten the problem positioning and review period, and improve the cross-organization cooperation efficiency, without revealing the core algorithm.

[0023] The various non-limiting embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0024] like Figure 1 As shown, some embodiments provide a model visualization method, including: Step S101: Convert the graphical model into a vector graph format by drawing paths, and generate a mapping configuration file and a mapping table during the conversion process. The mapping table includes: the numbering information of each line in the vector graph and the signal information of the corresponding line in the graphical model. Step S102: Load the mapping configuration file through the simulation process to make the model visible; Step S103: Load the mapping table through the simulation process to display the real-time simulation signal values ​​corresponding to each connection in the visualized model when simulating a binary file exported from a graphical model.

[0025] Specifically, in step S101, the graphical model is first converted into a vector graph format through path drawing. The "Export Vector Graph" function is selected in the tool menu of the model design software to save the model as a vector graph format such as Scalable Vector Graphics (SVG). During the conversion process, a mapping table is generated, which contains the numbering information of each connection in the vector graph and the signal information of the corresponding connection in the graphical model.

[0026] In some embodiments, a method for converting a graphical model into a vector graph format by drawing paths includes: drawing the model module by module and line by line on a vector drawing board to convert the graphical model into a vector graph format, and generating the mapping configuration file containing the drawn paths.

[0027] Specifically, the method for converting a graphical model into a vector graph format through path drawing includes: drawing the model module by module and line by line on a vector drawing board. The size of the vector drawing board is adapted to the boundary rectangles of all modules and lines within the model. The specific steps are as follows: First, calculate the model's "total display boundary rectangle" to set the display parameters for the vector graphics whiteboard. For example, the pseudocode is as follows: stream = OpenFileStream(FileName, create=true) / / Create a file stream, ready for writing data. bounds = Diagram.GetTotalDisplayRect() / / Get the rectangular boundaries of all content in the canvas. Wherein the FileName refers to the file path to be operated, create = true refers to creating a new file if the file does not exist.

[0028] Based on the rectangle, create an SVG canvas, and enable the "Convert text to path" option, so that in the saved vector graph, the text is also encoded by path, the pseudo code is as follows: canvas = CreateSvgCanvas(bounds, stream, convertTextToPaths=true) Wherein convertTextToPaths = true means to force text to path conversion.

[0029] Translate the canvas to the positive coordinate system with the origin as the starting point (ensure non-negative coordinates), so that when the user opens the vector graph, the model diagram can be displayed from the position of the origin (0, 0), the pseudo code is as follows: canvas.Translate(-bounds.Left, -bounds.Top) / / Translate to the left and up to the origin (0, 0) at the top left corner Call the rendering routine in the order of modules and connection lines to output the module frame, port, connection line, etc. as path (path): RenderDiagram(canvas) Wherein, RenderDiagram draws the model by path: canvas.DrawRect(blk.Position, FPainterStroke); / / Use canvas.DrawRec to draw a rectangle canvas.DrawLine(ln.SrcPoint, ln.DstPoint, PainterStroke) / / Use canvas.DrawLine to draw a straight line Wherein blk.Position represents the position and size of the module blk in the canvas; FPainterStroke is used to define the style of the rectangular border, including border color, border line width, border line dash style, etc.

[0030] Wherein ln.SrcPoint refers to the starting point coordinates of the connection line; ln.DstPoint refers to the end point coordinates of the connection line; PainterStroke is used to define the style of the connection line, including connection line color, connection line width, connection line dash style, etc.

[0031] Finally, close the canvas and output stream, and return the save success status, the pseudo code is as follows: Close(stream) / / Close the file stream return true After the vector graph is output, the mapping configuration file is also output: parse the "path" in the vector graph, extract single line segments, group line segments with shared endpoints according to their connection relationship (i.e., a logical connection may be composed of multiple line segments), and output the mapping configuration file, such as the mapping.csv file.

[0032] Specifically, in step S102, the simulation tool loads the generated vector graph file and visualizes the model as a vector graphic. Vector graphs have good scaling performance and will not be distorted by magnification, ensuring the quality of the visualization effect.

[0033] Specifically, in step S103, the simulation process loads the mapping table. When simulating based on the binary file exported from the graphical model, the real-time signal value is obtained through the signal read / write interface provided by the binary file. Based on the correspondence between the signal ID and the vector graph element in the mapping table, the real-time simulation signal value corresponding to each connection is displayed in the visualization model.

[0034] The following case illustrates the application process of model visualization methods: Assuming that a graphical engine control system model is designed in modeling software such as Simulink, the graphical model is first converted into a vector graph format using the model visualization method provided in this embodiment. During the conversion process, the system automatically generates a mapping table to record the correspondence between each graphical element in the vector graph and the connecting lines in the original model. The graphical elements include line segment vectors and module components.

[0035] The following is an example of a partial mapping table generated during the conversion process: In the table, the graphic element number No refers to the number value of the line segment vector related to the signal in the vector diagram, and the signal Id refers to the unique identifier of the signal associated with the corresponding connection in the model. As shown in Figures 2(a) and 2(b), the line segment vector with graphic element number No. 10 represents the signal output line, and the graphic element numbers No. 14, 11, 12 and 13 are the branch lines of this output line. Since they are all associated with the same signal (signal Id=5), the mapping value of these five lines is 5 during the export.

[0036] Then, as shown in Figures 2(a) and 2(b), the vector graph and mapping table are loaded using simulation tools to visualize the model and display a list of signals containing signal IDs. During simulation based on the binary file exported from the model, the signal values ​​output by each module component are obtained in real time through the signal read / write interface provided by the binary file, and the signal values ​​are displayed in the lower right corner of the corresponding module component's signal output point.

[0037] For example, as shown in Figure 2(a) and Figure 2(b), when the simulation reaches 25.000000 seconds, the real-time value of the EngSwitch signal of the module component is "-10.630205". This value is directly displayed in the lower right corner of the EngSwitch signal output point of the module component, and users can intuitively observe the signal change.

[0038] In some embodiments, when simulating a binary file derived from a graphical model, the corresponding connection is highlighted in the visualized model when any mapping entry in the mapping table is activated.

[0039] For example, in the above cases, as shown in Figures 2(a) and 2(b), when the entry AP_Eng is selected by the user, the corresponding connection is highlighted in the visualized model, making it easier to focus on specific signal paths.

[0040] Specifically, highlighting methods include, but are not limited to, color highlighting and bold line width highlighting.

[0041] In some embodiments, after filtering out the visual information that needs to be protected within the graphical model through desensitization, the graphical model is then converted into a vector graph format through path drawing.

[0042] In some embodiments, the visualization information to be protected includes one or more of the following: module parameter values, algorithm logic within the module, and module name.

[0043] Specifically, for core algorithm modules that require protection, the visual information within the graphical model that needs protection can be filtered out using anonymization methods. After selecting the "Export Protection" option in the module property editor, the module's visual information will be selectively drawn during the conversion process.

[0044] For example, in the case above, such as Figure 3 As shown, after the simulation tool is loaded, module 301 displays the algorithm logic OR, module 302 displays the specific parameter value -6, while module 303 is a protected module that only displays the component type Const, without showing the specific parameter value or algorithm logic. Filtering the visual information that needs protection within the graphical model through anonymization ensures both the visualization effect of the model and the confidentiality of its core content.

[0045] like Figure 4As shown, some embodiments also provide a model visualization system, including: A computer device, the computer device being configured to include: The conversion module is configured to convert the graphical model into a vector graph format by drawing paths, and generate a mapping configuration file and a mapping table during the conversion process. The mapping table includes: the numbering information of each connection in the vector graph and the signal information of the corresponding connection in the graphical model. The loading module is configured to load the mapping configuration file via the simulation process to visualize the model, and to load the mapping table via the simulation process to display the real-time simulation signal values ​​corresponding to each connection in the visualized model during simulation of binary files exported from the graphical model.

[0046] The specific implementation functions of the conversion module and the loading module are implemented in the computer device. For details, please refer to the aforementioned model visualization method. It will not be repeated here.

[0047] The electronic devices in the embodiments of this disclosure are described below from the perspective of hardware processing: The embodiments disclosed herein do not limit the specific implementation of the electronic device.

[0048] like Figure 5 As shown, some embodiments also provide an electronic device, including: a processor, a non-transitory computer-readable storage medium, a communication bus, and a communication interface; wherein the processor, the non-transitory computer-readable storage medium, and the communication interface communicate with each other through the communication bus; the non-transitory computer-readable storage medium stores instructions that, when executed by the processor, cause the processor to perform the aforementioned model visualization method.

[0049] like Figure 6 As shown, some embodiments also provide an electronic device, including: Processor, display communicating with processor to render web pages, and non-transitory computer-readable storage medium; wherein The non-transitory computer-readable storage medium stores instructions that, when executed by a processor, cause the processor to perform the following operations: The graphical model is converted into a vector graph format by path drawing, and a mapping configuration file and mapping table are generated during the conversion process. The mapping table includes: the number information of each connection in the vector graph and the signal information of the corresponding connection in the graphical model. The mapping configuration file is loaded through the simulation process to make the model visible; loading the mapping table through a simulation process to display real-time simulation signal values corresponding to each connection in the visualized model during simulation of a binary file derived based on the graphical model; and The display is configured to display the visualized model.

[0050] In some embodiments, the computer device (for example, an industrial computer) can be one of the electronic devices, and can be a server.

[0051] Figure 5 and Figure 6 The electronic device shown is a schematic structure for illustration only and does not constitute a limitation on the electronic device; the electronic device can include fewer or more components than shown, or combine components, or adopt a different component arrangement.

[0052] In some embodiments, the communication interface can include a RS-232, RS-485, USB (including Type-C), and the like physical interface for connecting external devices or bus adapters; can also include an Ethernet and the like wired network interface, or a Wi-Fi, Bluetooth and the like wireless network interface, for establishing a communication connection between the computer device and other electronic devices.

[0053] In some embodiments, the non-transitory computer readable storage medium includes, but is not limited to, a flash memory, a hard disk, a magnetic memory, a disk, an optical disk, and a card type memory (such as a multimedia card, a secure digital (SD) memory, and the like). In some embodiments, the storage medium can be used as an internal storage unit of the computer device, such as a built-in hard disk; in other embodiments, it can be used as an external storage device, such as a plug-in hard disk, a smart memory card (SMC), a secure digital SD card, a flash memory card, and the like. Further, the storage medium can also include an internal storage unit and an external storage device. The storage medium can be used to store application software and various data (such as computer program codes) installed on the computer device, and can also be used to temporarily store data that has been output or will be output.

[0054] In some embodiments, the processor can be a central processing unit (CPU), a controller, a microcontroller, a microprocessor, or other data processing chip, used to run program codes in the storage medium and / or process data, such as executing computer programs.

[0055] In some embodiments, the communication bus can be an input / output bus, such as a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, and the like. The bus can be divided into an address bus, a data bus, and a control bus, and the like.

[0056] Optionally, the computer device further comprises a user interface. The user interface can include a display, an input unit (e.g., a keyboard), and a standard wired interface and / or a wireless interface. Optionally, the display (or display module) can be an LED display, a liquid crystal display, a touch liquid crystal display, or an OLED display. The display (or display module) can also be referred to as a display screen or a display unit, for displaying information processed by the computer device and presenting a visualized user interface.

[0057] The processor implements the above-described Figure 1 The processor implements the above-described

[0058] Some embodiments also provide a non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the above-described model visualization method.

[0059] For specific descriptions of the model visualization method, please refer to the specific description of the model visualization method.

[0060] Some embodiments also provide a non-transitory computer-readable storage medium storing computer-readable instructions that, when executed by at least one processor, cause the above-described model visualization method to be performed, specifically as follows: The graphical model is converted into a vector graph format by path drawing, and a mapping configuration file and a mapping table are generated in the conversion process, the mapping table including: numbering information of each connection line in the vector graph and signal information of the corresponding connection line in the graphical model; The mapping configuration file is loaded by the simulation process to enable model visualization; The mapping table is loaded by the simulation process to display real-time simulation signal values corresponding to each connection line in the visualized model when simulating based on the binary file derived from the graphical model.

[0061] Some embodiments also provide a computer program product including instructions that, when executed by a processor, cause the processor to perform the above-described model visualization method.

[0062] For specific descriptions of the model visualization method, please refer to the specific description of the model visualization method.

[0063] Some embodiments also provide a computer program product including a readable storage medium having readable program code stored thereon, the readable program code including instructions that cause at least one processor (one or more computer devices) to perform the following operations: The graphical model is converted into a vector graph format by path drawing, and a mapping configuration file and a mapping table are generated in the conversion process, the mapping table including: number information of each line in the vector graph and signal information of a corresponding line in the graphical model; The mapping configuration file is loaded by a simulation process to visualize the model; The mapping table is loaded by the simulation process to display real-time simulation signal values corresponding to each line in the visualized model when simulating a binary file derived based on the graphical model.

[0064] It should be understood that the disclosed apparatus and method can also be implemented in other manners in the embodiments of the present application. The above-described apparatus embodiments are merely illustrative. For example, the flowcharts and block diagrams in the accompanying drawings illustrate the possible implementation architectures, functions and operations of the apparatus, method and computer program product according to the embodiments of the present application. In this regard, each block in the flowcharts or block diagrams can represent a module, a program segment or a part of code, which contains one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur in a different order than that shown in the figures. For example, two consecutive blocks can actually be executed substantially in parallel, and sometimes in reverse order, depending on the functions involved. In addition, it should be noted that each block in the block diagrams and / or flowcharts, and combinations of these blocks, can be implemented by a dedicated hardware-based system for performing the specified functions or actions, or by a combination of dedicated hardware and computer instructions.

[0065] In addition, in the embodiments of the present application, the organization manner of each functional module can be flexibly selected: all can be integrated into one independent part, or can exist independently, or at least two modules can be integrated into one independent part.

[0066] When the functions are implemented as software functional modules and sold or used as independent products, they can be stored in a non-transitory computer-readable storage medium. Based on this, the overall technical scheme of the present application and the improved part of the prior art can be embodied by a software product. The software product is stored in the above-mentioned storage medium and contains instructions for causing a computer device (such as a personal computer, a server or a network device) to execute all or part of the steps of the method described in the embodiments of the present application.

[0067] Based on the above description of the ideal embodiments of the present application, those skilled in the art can make various changes and modifications without deviating from the technical idea of the present application. The technical scope of the present application is not limited by the description, but should be determined by the scope of the claims.

Claims

1. A model visualization method, characterized in that, include: The graphical model is converted into a vector graph format, and a mapping configuration file and a mapping table are generated during the conversion process. The mapping table includes: the numbering information of each line in the vector graph and the signal information of the corresponding line in the graphical model. The mapping configuration file is loaded through the simulation process to make the model visible; The mapping table is loaded through the simulation process to display the real-time simulation signal values ​​corresponding to each connection in the visualized model during simulation of binary files exported from the graphical model.

2. The model visualization method according to claim 1, characterized in that, Converting graphical models to vector graph format includes: The model is drawn module by module and line by line on the vector drawing board to convert the graphical model into a vector graph format and generate the mapping configuration file containing the drawn paths.

3. The model visualization method according to claim 2, characterized in that, The size of the vector drawing board is adapted to the size of the boundary rectangle containing all modules and connections within the model.

4. The model visualization method according to claim 1, characterized in that, When simulating binary files derived from a graphical model, the corresponding connection is highlighted in the visualized model when any mapping entry in the mapping table is activated.

5. The model visualization method according to claim 1, characterized in that, After filtering out the visual information that needs to be protected within the graphical model through desensitization, the graphical model is then converted into a vector graph format through path drawing.

6. The model visualization method according to claim 5, characterized in that, The visual information that needs to be protected includes: module parameter values, algorithm logic within the module, and one or more of the module names.

7. A model visualization system, characterized in that, include: A computer device, the computer device being configured to include: The conversion module is configured to convert the graphical model into a vector graph format and generate a mapping configuration file and a mapping table during the conversion process. The mapping table includes: the numbering information of each line in the vector graph and the signal information of the corresponding line in the graphical model. The loading module is configured to load the mapping configuration file via the simulation process to visualize the model, and to load the mapping table via the simulation process to display the real-time simulation signal values ​​corresponding to each connection in the visualized model during simulation of binary files exported from the graphical model.

8. The model visualization system according to claim 7, characterized in that, Converting graphical models to vector graph format includes: The model is drawn module by module and line by line on the vector drawing board to convert the graphical model into a vector graph format and generate the mapping configuration file containing the drawn paths.

9. The model visualization system according to claim 7, characterized in that, The size of the vector drawing board is adapted to the size of the boundary rectangle containing all modules and connections within the model.

10. The model visualization system according to claim 7, characterized in that, When simulating binary files derived from a graphical model, the corresponding connection is highlighted in the visualized model when any mapping entry in the mapping table is activated.

11. The model visualization system according to claim 7, characterized in that, After filtering out the visual information that needs to be protected within the graphical model through desensitization, the graphical model is then converted into a vector graph format through path drawing.

12. The model visualization system according to claim 11, characterized in that, The visual information that needs to be protected includes: module parameter values, algorithm logic within the module, and one or more of the module names.

13. A non-transitory computer-readable storage medium, characterized in that, The system stores instructions that, when executed by a processor, cause the processor to perform the model visualization method according to any one of claims 1-6.

14. An electronic device, characterized in that, include: Non-transitory computer-readable storage medium; processor; The non-transitory computer-readable storage medium stores instructions that, when executed by a processor, cause the processor to perform the model visualization method according to any one of claims 1-6.

15. A computer program product, characterized in that, Includes instructions that, when executed by a processor, cause the processor to perform the model visualization method according to any one of claims 1-6.

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