Switching control method and device of switching tube

By providing different absolute values ​​of drive voltage at different time periods for the switching transistor, the problem of current spikes during the driving process of the switching transistor is solved, thereby improving the reliability and conduction efficiency of the switching transistor.

CN121813828APending Publication Date: 2026-04-07SHANGHAI YINGHENG ELECTRONICS
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-31
Publication Date
2026-04-07

AI Technical Summary

Technical Problem

During the driving process of power semiconductor switching devices, the influence of parasitic parameters such as internal parasitic capacitance can cause current spikes to be generated during the switching process, affecting their reliability.

Method used

A switching control method is adopted, which provides drive voltages of different absolute values ​​when the switching transistor is in the off state. A higher first drive voltage is provided in the first time period to improve the channel conduction capability. A second drive voltage lower than the first drive voltage is provided in the second time period to stabilize the current value and avoid current spikes. A third drive voltage higher than the second drive voltage is provided in the third time period to quickly turn on the switching transistor.

Benefits of technology

The current waveform of the switching transistor has been optimized, which improves the reliability and turn-on speed of the switching transistor, reduces the risk of current oscillation, and extends its service life.

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Abstract

The invention discloses a switching control method and device for a switching tube, and the method comprises the steps: providing a first driving voltage for a control electrode of the switching tube in a first time period when the switching tube is in an off state; in a second time period, providing a second driving voltage for the control electrode of the switching tube; in a third time period, providing a third driving voltage for the control electrode of the switch tube so as to control the switch tube to be in a conduction state; wherein the absolute value of the first driving voltage and the absolute value of the third driving voltage are both larger than the absolute value of the second driving voltage, and the first time period, the second time period and the third time period are continuous. According to the technical scheme, the voltage and current waveforms in the switching process of the switching tube can be optimized, the working safety of the switching tube is improved, and the service life of the switching tube is prolonged.
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Description

Technical Field

[0001] This invention relates to the field of switch drive technology, and in particular to a switching control method and apparatus for a switching transistor. Background Technology

[0002] Power semiconductor devices are widely used in power supplies, motor drives, new energy, energy storage and other fields. Commonly used power semiconductor devices include silicon IGBTs, silicon MOSFETs, SiC MOSFETs, GaN FETs and so on.

[0003] The driving process of power semiconductors involves channel switching and changes in internal parasitic parameters. During the driving process of power semiconductor switching devices, the influence of parasitic parameters such as internal capacitance can easily lead to unfavorable waveform optimization such as current spikes during switching, resulting in current oscillations and other problems that affect the reliability of the switching device. Summary of the Invention

[0004] This invention provides a switching control method and apparatus for a switching transistor, which can optimize the current waveform during the switching process and improve the reliability of the switching transistor.

[0005] In a first aspect, the present invention provides a switching control method for a switching transistor, comprising:

[0006] When the switching transistor is in the off state, a first driving voltage is provided to the control electrode of the switching transistor during a first time period;

[0007] During the second time period, a second drive voltage is provided to the control electrode of the switching transistor;

[0008] During the third time period, a third driving voltage is provided to the control electrode of the switching transistor to control the switching transistor to be in the on state;

[0009] Wherein, the absolute values ​​of the first driving voltage and the third driving voltage are both greater than the absolute value of the second driving voltage, and the first time period, the second time period, and the third time period are continuous.

[0010] Optionally, the absolute value of the second driving voltage is greater than or equal to the absolute value of the threshold voltage of the switching transistor.

[0011] Optionally, the absolute value of the third driving voltage is greater than or equal to the absolute value of the first driving voltage.

[0012] Optionally, both the third driving voltage and the first driving voltage are voltage values ​​required when the switching transistor is in a stable on-state.

[0013] Optionally, the first time period is T1;

[0014] Where 0 < T1 ≤ 10 μs.

[0015] Optionally, the second time period is T2;

[0016] Where 0 < T2 ≤ 10 μs.

[0017] Based on the same inventive concept, the present invention also provides a switching control device for a switching transistor, comprising:

[0018] The first drive voltage providing module is used to provide a first drive voltage to the control electrode of the switch transistor during a first time period when the switch transistor is in the off state.

[0019] The second drive voltage providing module is used to provide a second drive voltage to the control electrode of the switching transistor during a second time period.

[0020] The third driving voltage providing module is used to provide the third driving voltage to the control electrode of the switching transistor during the third time period, so as to control the switching transistor to be in the on state;

[0021] The first time period, the second time period, and the third time period are consecutive.

[0022] Optionally, the switching control device for the switching transistor also includes:

[0023] The first timing unit is electrically connected to the first driving voltage providing module. The first driving voltage providing module is used to output the first driving voltage to the control electrode of the switching transistor during a first timing duration of the first timing unit.

[0024] Optionally, the switching control device for the switching transistor also includes:

[0025] The second timing unit is electrically connected to the second driving voltage providing module. The second driving voltage providing module is used to output the second driving voltage to the control electrode of the switching transistor during the second timing duration of the second timing unit.

[0026] The technical solution provided by this invention provides the following steps: When the switching transistor is in the off state, a first driving voltage with a relatively high absolute value is provided to the control electrode of the switching transistor during a first time period to improve the conduction capability of the internal channel of the switching transistor; during a second time period, a second driving voltage is provided to the control electrode of the switching transistor to keep the gate current at a fixed current value, avoid current spikes in the gate current, and optimize the current waveform; during a third time period, a third driving voltage with an absolute value greater than the second driving voltage is provided to the control electrode of the switching transistor to control the switching transistor to turn on quickly, thereby improving the turn-on speed and conduction efficiency of the switching transistor. Attached Figure Description

[0027] Figure 1 A flowchart illustrating a switching control method for a switching transistor provided in an embodiment of the present invention;

[0028] Figure 2 A schematic diagram of a switching transistor provided in an embodiment of the present invention;

[0029] Figure 3 A voltage and current waveform diagram of a switching transistor during switching is provided in an embodiment of the present invention;

[0030] Figure 4 This is a schematic diagram of the structure of a switching control device for a switching transistor provided in an embodiment of the present invention;

[0031] Figure 5 This is a schematic diagram of another switching control device for a switching transistor provided in an embodiment of the present invention. Detailed Implementation

[0032] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0033] This invention provides a switching control method for a switching transistor. This method is applicable to the drive control of switching transistors from an off state to an on state. The switching control method for the switching transistor can be executed using the switching control device for the switching transistor provided in the embodiments of this invention. The switching control device for the switching transistor can be implemented in hardware and / or software. Figure 1 This is a flowchart illustrating a switching control method for a switching transistor according to an embodiment of the present invention. Figure 2 This is a schematic diagram of a switching transistor provided in an embodiment of the present invention. Figure 3 A voltage and current waveform diagram of a switching transistor during switching is provided in an embodiment of the present invention, for reference. Figure 1 , Figure 2 and Figure 3 The switching control method for this switching transistor includes:

[0034] S101. When the switching transistor is in the off state, a first drive voltage is provided to the control electrode of the switching transistor during the first time period.

[0035] The switching transistors include, but are not limited to, MOSFETs and IGBTs, and can be configured according to actual needs. For example, a MOSFET is included as a switching transistor. The switching transistor Q includes a control electrode, a first electrode, and a second electrode. The control electrode is the gate G of the switching transistor Q, the first electrode is the drain D of the switching transistor Q, and the second electrode is the source S of the switching transistor Q. The first and second electrodes can be interchanged. Here, we will use the first electrode as the drain D of the switching transistor Q, the second electrode as the source S of the switching transistor Q, and the switching transistor Q as an N-type switching transistor as an example for explanation.

[0036] Specifically, when the switch Q is in the off state, the voltage difference between the control electrode G and the secondary electrode S of the switch Q is less than the threshold voltage Vth of the switch Q. Therefore, a higher drive voltage can be directly applied to the control electrode G of the switch Q to switch the switch Q from the off state to the on state. However, since there are gate-source parasitic capacitances Cgs, gate-drain parasitic capacitances Cgd, and drain-source parasitic capacitances Cds inside the switch Q, after a higher drive voltage is applied to the control electrode G, the drive voltage first charges the gate-source parasitic capacitance Cgs inside the switch Q until the voltage across the gate-source parasitic capacitance Cgs reaches the threshold voltage Vth. At this time, the drain current Id begins to gradually increase. At this time, the drain-source voltage Vds drops sharply from high voltage to close to 0V. Igd is provided by the drive module, so the control electrode G will draw charge from the drive module to charge the gate-source parasitic capacitances Cgs and Cgd. To maintain the voltage of the control electrode G, the drive module needs to output a large current to simultaneously meet the charging requirements of the gate-source parasitic capacitance Cgs and the gate-drain parasitic capacitance Cgd. At this time, the voltage change of the drive module causes the parasitic capacitance to change, causing the drain current Id to form a current spike. The current spike will impact the output stage of the drive module and will also cause current oscillations in the switching transistor Q, affecting the service life of the switching transistor Q.

[0037] Therefore, this application applies a first driving voltage U1 to the control electrode G of the switching transistor Q during the first time period T1. After the gate-source parasitic capacitance Cgs is charged to the threshold voltage Vth by the first driving voltage U1, the drain current Id begins to gradually increase. The main function of the first driving voltage U1 during the first time period T1 is to rapidly increase the driving voltage of the switching transistor Q, thereby improving the overall switching speed of the switching transistor Q and reducing switching losses. The current has not yet reached its peak during this time. (Refer to...) Figure 3 The time required to charge the gate-source parasitic capacitance Cgs to the threshold voltage Vth is called the charging duration T0.

[0038] S102, In the second time period, a second drive voltage is provided to the control electrode of the switching transistor.

[0039] The absolute value of the first driving voltage U1 is greater than the absolute value of the second driving voltage U2. The specific voltage values ​​of the first driving voltage U1 and the second driving voltage U2 can be set according to actual needs. For example, when the switching transistor Q is an N-type switching transistor, both the first driving voltage U1 and the second driving voltage U2 are greater than zero, the first driving voltage U1 is greater than the second driving voltage U2, the first driving voltage U1 is 10V, and the second driving voltage U2 is 5V. When the switching transistor Q is a P-type switching transistor, both the first driving voltage U1 and the second driving voltage U2 are less than zero, the first driving voltage U1 is less than the second driving voltage U2, the first driving voltage U1 is -10V, and the second driving voltage U2 is -5V. Other values ​​are also possible and are not specifically limited here.

[0040] Specifically, at the end of the first time period T1, the drain current Id has increased to the first current I1, and the channel inside the switching transistor Q has a certain conduction capability. During the second time period T2, a second driving voltage U2, which is less than the first driving voltage U1, can be applied to the control electrode G of the switching transistor Q. Since there is a parasitic capacitance inside the switching transistor Q, the drain current Id remains at the first current I1 to charge the parasitic capacitance inside the switching transistor Q, thereby avoiding current spikes in the drain current Id, optimizing the current waveform, and reducing the oscillation risk of the switching transistor Q.

[0041] S103. During the third time period, a third driving voltage is provided to the control electrode of the switching transistor to control the switching transistor to be in the on state.

[0042] The absolute value of the third driving voltage U3 is greater than the absolute value of the second driving voltage U2. The specific voltage values ​​of the second driving voltage U2 and the third driving voltage U3 can be set according to actual needs. For example, the second driving voltage U2 is 5V and the third driving voltage U3 is 11V, but other values ​​are also possible and are not specifically limited here. The first time period T1, the second time period T2, and the third time period T3 are continuous, that is, the end time of the first time period T1 is the start time of the second time period T2, and the end time of the second time period T2 is the start time of the third time period T3.

[0043] Specifically, to maintain the drain current Id at the first current I1, the duration of the second drive voltage U2 supplied to the control electrode G of the switching transistor Q is a second time period T2. At the end of the second time period T2, a third drive voltage U3 greater than the second drive voltage U2 is supplied to the control electrode G of the switching transistor Q, which can rapidly improve the conduction capability of the internal channel of the switching transistor Q and the channel impedance R between the first electrode D and the second electrode S. ds By gradually reducing the voltage, the switching transistor Q can be turned on quickly, thus improving the turn-on speed and efficiency of the switching transistor Q.

[0044] Understandably, during the initial period T30 of the third time period T3, the drain current Id gradually decreases from the first current I1. This is mainly because during the second time period T2, the parasitic capacitance inside the switching transistor Q is gradually charged. During the initial period T30 of the third time period T3, the drain current Id first gradually decreases, indicating that the charging and discharging current required for the parasitic capacitance gradually decreases, and the parasitic capacitance is fully charged and discharged. Afterwards, the channel resistance R... ds As the speed decreases, the switching transistor Q completes the switching from the off state to the on state.

[0045] The technical solution provided in this invention provides that, when the switching transistor is in the off state, a first driving voltage with a relatively high absolute value is provided to the control electrode of the switching transistor during a first time period to improve the conduction capability of the internal channel of the switching transistor; during a second time period, a second driving voltage is provided to the control electrode of the switching transistor to keep the gate current at a fixed current value, avoid current spikes in the gate current, optimize the current waveform, reduce current oscillation of the switching transistor, improve the driving safety of the switching transistor, and extend the service life of the switching transistor; during a third time period, a third driving voltage with an absolute value greater than the second driving voltage is provided to the control electrode of the switching transistor to control the switching transistor to turn on quickly, thereby improving the turn-on speed and conduction efficiency of the switching transistor.

[0046] In an optional embodiment, the absolute value of the second drive voltage U2 is greater than or equal to the absolute value of the threshold voltage Vth of the switch Q.

[0047] The threshold voltage Vth is the gate voltage required to switch the transistor from the off state to the on state. For an N-type transistor, the drain current Id begins to flow significantly when Vgs ≥ Vth; for a P-type transistor, the drain current Id begins to flow significantly when Vgs ≤ Vth.

[0048] Specifically, if the absolute value of the second driving voltage U2 is less than the absolute value of the threshold voltage Vth of the switch Q, it may cause the switch Q to turn off during the second time period T2, failing to effectively control the switch Q to be in the conducting state. Therefore, by setting the absolute value of the second driving voltage U2 to be greater than the absolute value of the threshold voltage Vth of the switch Q, the control electrode G of the switch Q is kept at a voltage value with an absolute value greater than or equal to the threshold voltage during the second time period T2, thereby improving the turn-on reliability of the switch Q.

[0049] In an optional embodiment, the absolute value of the third driving voltage U3 is greater than or equal to the absolute value of the first driving voltage U1.

[0050] The specific values ​​of the third driving voltage U3 and the first driving voltage U1 can be set according to actual needs. For example, when the switching transistor Q is an N-type switching transistor, the third driving voltage U3 is 15V and the first driving voltage U1 is 10V. They can also be other values, which are not specifically limited here.

[0051] Specifically, by setting the absolute value of the third driving voltage U3 to be greater than the absolute value of the first driving voltage U1, the first driving voltage U1 can effectively improve the conduction capability of the internal channel of the switching transistor Q in the first time period T1. The third driving voltage U3, whose absolute value is greater than or equal to the first driving voltage U1, can rapidly and further improve the conduction capability of the internal channel of the switching transistor Q in the third time period T3, ensuring the conduction speed and conduction efficiency of the switching transistor Q.

[0052] In an optional embodiment, both the third driving voltage U3 and the first driving voltage U1 are the voltage values ​​required for the switch Q to be in a stable on-state.

[0053] Specifically, when the switching transistor Q is in a stable conducting state, the constant voltage value of the control electrode G of the switching transistor Q can reduce the channel impedance R inside the switching transistor Q. ds The resistance value is stabilized at the designed value. The third driving voltage U3 is directly set to a constant voltage value when the switch Q is stably turned on. After the third driving voltage U3 is provided in the third time period T3, the third driving voltage U3 can be continuously input to the control electrode G of the switch Q, so that the switch Q can be stably and continuously turned on, simplifying the control process.

[0054] In an optional embodiment, the first time period is T1; wherein, 0 < T1 ≤ 10 μs.

[0055] Specifically, if the first time interval T1 is greater than a certain value, the drain current Id will continue to increase, which may lead to current spikes and is not conducive to waveform optimization. Therefore, by setting the first time interval T1 in the range of 0~10μs, it is possible to optimize the waveform while shortening the conduction time of the switch Q and improving the conduction speed of the switch Q.

[0056] In an optional embodiment, the second time period is T2; where 0 < T2 ≤ 10 μs.

[0057] Specifically, if the second time period T2 is greater than 10μs, it will cause the switching transistor Q to have an excessively long conduction time, affecting the user experience. Therefore, by setting the second time period T2 within the range of 0~10μs, it is possible to maintain the current waveform while shortening the conduction time of the switching transistor Q, thereby improving the conduction speed of the switching transistor Q.

[0058] Based on the same inventive concept, the present invention also provides a switching control device for a switching transistor. Figure 4 This is a schematic diagram of the structure of a switching control device for a switching transistor provided in an embodiment of the present invention, as shown below. Figure 4 As shown, the switching control device for the switching transistor includes:

[0059] The first drive voltage providing module 10 is used to provide a first drive voltage U1 to the control electrode of the switch transistor during a first time period when the switch transistor is in the off state.

[0060] The second drive voltage providing module 20 is used to provide a second drive voltage U2 to the control electrode of the switching transistor during a second time period.

[0061] The third drive voltage providing module 30 is used to provide a third drive voltage U3 to the control electrode of the switching transistor during a third time period, so as to control the switching transistor to be in the on state.

[0062] Among them, the absolute values ​​of the first driving voltage U1 and the third driving voltage U3 are both greater than the absolute value of the second driving voltage U2, and the first time period T1, the second time period T2 and the third time period T3 are continuous.

[0063] The switching control device for the switching transistor provided in this embodiment of the invention can execute the switching control method for the switching transistor provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the method. The similarities can be referred to the above description.

[0064] Optional, Figure 5 A schematic diagram of another switching control device for a switching transistor provided in an embodiment of the present invention is shown below. Figure 5 As shown, the switch control device 100 also includes a first timing unit 11, which is electrically connected to the first driving voltage supply module 10. The first driving voltage supply module 10 is used to output a first driving voltage U1 to the control electrode of the switch tube during a first timing duration of the first timing unit 11.

[0065] The first timing unit 11 may include a timing device such as a digital timer, which can be set according to actual needs.

[0066] Specifically, the timing unit of the first timing duration can be at the μs or ns level. The first timing unit 11 can provide the first timing duration to the first driving voltage supply module 10 so that the holding duration of the first driving voltage U1 output by the first driving voltage supply module 10 is the first timing duration, thereby achieving accurate control of the output duration of the first driving voltage U1.

[0067] Optional, see reference Figure 5The switch control device 100 also includes a second timing unit 21, which is electrically connected to the second drive voltage supply module 20. The second drive voltage supply module 20 is used to output a second drive voltage U2 to the control electrode of the switch tube during the second timing duration of the second timing unit 21.

[0068] The second timing unit 21 may include a timing device such as a digital timer, which can be set according to actual needs.

[0069] Specifically, the timing unit of the second timing duration can be at the μs or ns level. The second timing unit 21 can provide the second timing duration to the second driving voltage supply module 20 so that the holding duration of the second driving voltage U2 output by the second driving voltage supply module 20 is the second timing duration, thereby achieving accurate control of the output duration of the second driving voltage U2.

[0070] It should be noted that the above explanation only uses the switching transistor from the off state to the on state as an example. Conversely, the process of switching transistor from the on state to the off state is similar to the above process. For example, when the switching transistor is in the on state, a fourth driving voltage is provided to the control electrode of the switching transistor in the fourth time period; a fifth driving voltage is provided to the control electrode of the switching transistor in the fifth time period; and a sixth driving voltage is provided to the control electrode of the switching transistor in the sixth time period to control the switching transistor to be in the on state. The absolute values ​​of the fourth and sixth driving voltages are both less than the absolute value of the fifth driving voltage. The fourth, fifth, and sixth time periods are continuous, and the control principle is similar to the conduction process described above, so it will not be repeated here.

[0071] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A switching control method for a switching transistor, characterized in that, include: When the switching transistor is in the off state, a first driving voltage is provided to the control electrode of the switching transistor during a first time period; During the second time period, a second drive voltage is provided to the control electrode of the switching transistor; During the third time period, a third driving voltage is provided to the control electrode of the switching transistor to control the switching transistor to be in the on state; Wherein, the absolute values ​​of the first driving voltage and the third driving voltage are both greater than the absolute value of the second driving voltage, and the first time period, the second time period, and the third time period are continuous.

2. The switching control method according to claim 1, characterized in that, The absolute value of the second driving voltage is greater than or equal to the absolute value of the threshold voltage of the switching transistor.

3. The switching control method according to claim 1, characterized in that, The absolute value of the third driving voltage is greater than or equal to the absolute value of the first driving voltage.

4. The switching control method according to claim 1, characterized in that, Both the third driving voltage and the first driving voltage are the voltage values ​​required for the switching transistor to be in a stable conducting state.

5. The switching control method according to claim 1, characterized in that, The first time period is T1; Where 0 < T1 ≤ 10 μs.

6. The switching control method according to claim 1, characterized in that, The second time period is T2; Where 0 < T2 ≤ 10 μs.

7. A switching control device for a switching transistor, characterized in that, include: The first drive voltage providing module is used to provide a first drive voltage to the control electrode of the switch transistor during a first time period when the switch transistor is in the off state. The second drive voltage providing module is used to provide a second drive voltage to the control electrode of the switching transistor during a second time period. The third driving voltage providing module is used to provide the third driving voltage to the control electrode of the switching transistor during the third time period, so as to control the switching transistor to be in the on state; Wherein, the absolute values ​​of the first driving voltage and the third driving voltage are both greater than the absolute value of the second driving voltage, and the first time period, the second time period, and the third time period are continuous.

8. The switch control device according to claim 7, characterized in that, Also includes: The first timing unit is electrically connected to the first driving voltage providing module. The first driving voltage providing module is used to output the first driving voltage to the control electrode of the switching transistor during a first timing duration of the first timing unit.

9. The switch control device according to claim 7, characterized in that, Also includes: The second timing unit is electrically connected to the second driving voltage providing module. The second driving voltage providing module is used to output the second driving voltage to the control electrode of the switching transistor during the second timing duration of the second timing unit.