High-voltage power supply control system and method based on FPGA

Abstract

The invention provides a high-voltage power supply control system and method based on an FPGA, and relates to the technical field of high-voltage power supplies, and the system comprises a core control module which takes an SoC type FPGA chip integrated with a PS end and a PL end as a control core; the signal acquisition module synchronously acquires analog monitoring signals of an external high-voltage power supply and converts the analog monitoring signals into multiple paths of digital signals; the control signal output module outputs an adjusting signal; the PL end realizes synchronous processing of multiple paths of digital signals through a hardware parallel processing architecture, and directly generates synchronous driving instructions for a plurality of external high-voltage power supplies based on real-time closed-loop control logic; the PS end runs an operating system, processes the advanced control instruction and sets control parameters for the PL end; a real-time protection function is integrated at the PL end, and when the transient fault is judged to occur, the control signal output module is directly controlled to execute a protection action by bypassing the PS end, so that synchronous adjustment and transient fault protection of the multi-path high-voltage power supply are realized, and high reliability and high flexibility are realized.

Description

Technical Field

[0001] This invention relates to the field of high-voltage power supply technology, and in particular to a high-voltage power supply control system and method based on FPGA. Background Technology

[0002] In cutting-edge scientific research fields such as heavy-ion accelerator spectrometers and nuclear physics experiments, the performance of high-voltage power supply systems directly affects the signal acquisition efficiency of detector arrays and the final accuracy of experimental data. Complex detection terminals, such as semiconductor detector arrays and multi-wire proportional chamber matrices, not only require multiple independently adjustable high-precision high-voltage biases, but also need the system to respond in real time to changes in experimental conditions, enabling rapid adjustment and synchronous coordination of high-voltage parameters. Furthermore, real-time monitoring of the high-voltage output status and instantaneous protection against abnormal conditions such as short circuits and breakdowns are crucial for protecting expensive detection equipment and ensuring experimental continuity.

[0003] Currently, traditional high-voltage power supply control schemes suffer from significant technical bottlenecks. On one hand, regarding performance and real-time capabilities, the commonly used discrete architecture of "microcontroller + dedicated control chip" relies on external buses (such as RS485 and CAN) for multi-channel control. This results in substantial data transmission delays and low inter-channel synchronization accuracy, making it difficult to meet the stringent microsecond-level timing requirements of multi-detector array collaborative operation. On the other hand, in terms of flexibility and scalability, the control logic is fixed in the hardware circuit, resulting in poor flexibility. When experimental requirements change, circuit design and PCB fabrication often need to be redesigned, leading to long development cycles and hindering rapid adaptation to diverse experimental scenarios. Furthermore, regarding integration and reliability, the monitoring and protection functions of traditional schemes are usually independent of the main control module. This not only increases system size and power consumption but also causes delays in fault response, making it impossible to effectively mitigate instantaneous high-voltage anomalies and posing a high risk of damage to detectors. Summary of the Invention

[0004] This invention provides an FPGA-based high-voltage power supply control system and method to solve the defects in the prior art, such as large multi-channel control delay, low synchronization accuracy, poor system flexibility, and slow protection response, and to realize synchronous regulation and instantaneous fault protection of multiple high-voltage power supplies.

[0005] This invention provides an FPGA-based high-voltage power supply control system, comprising: The core control module uses a SoC-type FPGA chip that integrates the processing system PS terminal and the programmable logic PL terminal as a unified control core. The signal acquisition module, connected to the core control module, is used to synchronously acquire analog monitoring signals from multiple external high-voltage power supplies and convert them into multiple digital signals. A control signal output module, connected to the core control module, is used to output adjustment signals to the external high-voltage power supply; The PL terminal, through its hardware parallel processing architecture, realizes synchronous parallel processing of multiple digital signals, and directly generates time-synchronized drive instructions for multiple external high-voltage power supplies based on preset real-time closed-loop control logic. The PS terminal runs an operating system to process advanced control instructions and set the control parameters required for the operation of the hardware logic of the PL terminal. The PL terminal integrates a real-time protection function in its hardware logic. When a transient fault is detected, it bypasses the PS terminal and directly controls the control signal output module to perform protection actions through an independent hardware protection path.

[0006] According to the FPGA-based high-voltage power supply control system provided by the present invention, the hardware parallel processing architecture implemented at the PL end includes: multiple sets of independent control logic circuits, each set of control logic circuits corresponding to one digital signal, and the multiple sets of independent control logic circuits being driven by a common clock signal.

[0007] According to the FPGA-based high-voltage power supply control system provided by the present invention, the real-time protection function is implemented through at least one digital comparator circuit; the first input terminal of the digital comparator circuit is directly connected to the real-time data output terminal of the signal acquisition module. The second input terminal is connected to a threshold register, which stores the protection threshold dynamically set by the PS terminal; The output of the digital comparator circuit is directly connected to the hardware shutdown pin of the control signal output module, which is used to immediately perform protection actions when a fault is detected, without the need for the PS terminal to participate.

[0008] According to the FPGA-based high-voltage power supply control system provided by the present invention, the number of the multiple independent control logic circuits is not less than 8 sets, and they are synchronously driven by the common clock signal, so that the output time error between any two drive commands generated by the multiple independent control logic circuits is less than 1 microsecond.

[0009] According to the FPGA-based high-voltage power supply control system provided by the present invention, the internal logic, quantity, or interface timing of the multiple independent control logic circuits can be dynamically modified by online reprogramming of the FPGA chip to adapt to the multi-channel high-voltage power supply control requirements under different experimental scenarios.

[0010] According to the FPGA-based high-voltage power supply control system provided by the present invention, the signal acquisition module includes at least one analog-to-digital converter with a sampling resolution of not less than 16 bits; the control signal output module includes at least one digital-to-analog converter with a resolution of not less than 12 bits and / or a pulse width modulation signal generation circuit.

[0011] According to the FPGA-based high-voltage power supply control system provided by the present invention, the FPGA chip of the core control module is a Zynq-7000 series chip; the PS terminal runs an embedded Linux operating system; and the PL terminal and the PS terminal interact with each other via an AXI bus.

[0012] According to the FPGA-based high-voltage power supply control system provided by the present invention, the transient fault includes at least one of high-voltage arcing, output short circuit, overvoltage, or overcurrent.

[0013] According to the FPGA-based high-voltage power supply control system provided by the present invention, the protection action is to immediately shut off the high-voltage output of the corresponding channel.

[0014] According to the FPGA-based high-voltage power supply control system provided by the present invention, the system further includes a communication module connected to the PS terminal; the communication module integrates at least one of an Ethernet interface and an RS-485 interface.

[0015] This invention also provides an FPGA-based high-voltage power supply control method, applied to any of the systems described above, comprising the following steps: Within the PL side of a SoC-type FPGA chip that integrates a processing system (PS) side and a programmable logic (PL) side, monitoring signals from multiple external high-voltage power supplies are synchronously acquired and processed through a hardware parallel processing architecture, and synchronous drive instructions are generated based on real-time closed-loop control logic. The synchronous drive command is output to perform synchronous closed-loop regulation of the multiple external high-voltage power supplies; An operating system runs within the PS terminal, processes advanced control instructions, and sets the control parameters required for the hardware logic operation of the PL terminal. The monitoring signal is continuously monitored through the real-time protection function integrated in the PL terminal hardware logic. When a transient fault is detected, the control signal output module is directly controlled to perform protection actions through an independent hardware protection path, bypassing the PS terminal.

[0016] According to the FPGA-based high-voltage power supply control method provided by the present invention, when a transient fault is detected, bypassing the PS terminal and directly controlling the control signal output module to perform protection actions through an independent hardware protection path, specifically includes: A digital comparator circuit continuously compares the real-time acquired monitoring signal with a preset threshold to determine whether there is a momentary fault. When a transient fault is detected, the protection action is directly triggered by the output signal of the digital comparator circuit without the intervention of the PS terminal.

[0017] The FPGA-based high-voltage power supply control system and method provided by this invention utilizes the hardware parallel processing architecture at the PL end to simultaneously perform microsecond-level real-time control and status monitoring of multiple high-voltage channels. It achieves high synchronization accuracy between channels and fast system response, effectively solving the delay and timing problems of traditional serial solutions. By implementing real-time protection functions in the hardware logic at the PL end, it achieves tight coupling between monitoring and protection, reducing fault response time to sub-microsecond levels. Furthermore, it is independent of upper-level software, greatly improving the protection capability for expensive equipment and the overall reliability of the system. The reconfigurable nature of FPGA allows for online upgrades of control algorithms and system functions through software programming, significantly enhancing system flexibility and lifespan. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the FPGA-based high-voltage power supply control system provided by the present invention.

[0020] Figure 2 This is a specific embodiment of the FPGA-based high-voltage power supply control system provided by the present invention.

[0021] Figure 3 This is a schematic diagram of the working principle of the FPGA-based high-voltage power supply control system provided by the present invention.

[0022] Figure 4 This is a flowchart of the FPGA-based high-voltage power supply control system provided by the present invention.

[0023] Figure 5 This is a flowchart illustrating the FPGA-based high-voltage power supply control method provided by the present invention. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0025] The present invention will now be described in detail with reference to the accompanying drawings. The specific operation methods in the method embodiments can also be applied to the device embodiments or system embodiments. In the description of the present invention, unless otherwise stated, "at least one" includes one or more. "Multiple" refers to two or more. For example, at least one of A, B, and C includes: A existing alone, B existing alone, A and B existing simultaneously, A and C existing simultaneously, B and C existing simultaneously, and A, B, and C existing simultaneously. In the present invention, " / " means "or". For example, A / B can mean A or B. "And / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone.

[0026] In the detection system of heavy-ion accelerator spectrometers and nuclear physics experimental terminals, the comprehensive control performance of the high-voltage power supply system directly determines the signal acquisition efficiency of the detector array and the accuracy of experimental data. Complex detection terminals, such as semiconductor detector arrays, large-area scintillator detectors, and multi-wire proportional chamber matrices, not only require multiple independent high-precision high-voltage DC biases, but also need to respond in real time to changes in experimental conditions (such as detector target switching and beam intensity adjustment) to achieve rapid calibration, dynamic adjustment, and synchronous coordination of high-voltage parameters. Simultaneously, during the experiment, millisecond-level monitoring of the high-voltage output status (voltage stability, load current, ripple coefficient) is required, along with instantaneous protection against abnormal conditions (such as detector short circuits and high-voltage breakdown) to prevent damage to valuable detector components and ensure continuous and stable experimental operation. Therefore, constructing a high-voltage power supply control system with high integration, high response speed, and high reliability is the core support for the efficient operation of nuclear physics experimental platforms.

[0027] Current traditional high-voltage power supply control schemes have significant limitations: On the one hand, the discrete architecture of "microcontroller + dedicated control chip" requires complex external communication buses (such as RS485 and CAN) to control multiple high-voltage channels, resulting in large data transmission delays (usually greater than 10ms) and low synchronization accuracy (synchronization error between channels exceeding 5ms), failing to meet the timing requirements of multi-detector array collaborative operation. On the other hand, the control logic is fixed in the hardware circuit. When experimental requirements change, such as adding detection channels or adjusting the high-voltage regulation range, the circuit schematic and PCB must be redesigned, resulting in long development cycles, poor flexibility, and difficulty in adapting to the diverse operating conditions of nuclear physics experiments. In addition, the monitoring and protection functions of traditional schemes are independent of the control module, requiring additional data acquisition and protection circuits. This not only increases the system size and power consumption but also leads to fault response delays, such as protection action response times exceeding 20ms, failing to effectively prevent damage to detectors from instantaneous high-voltage anomalies.

[0028] Therefore, to address the control challenges of high-voltage power supply systems for heavy-ion accelerator spectrometers and nuclear physics experimental terminals, a high-voltage power supply system based on FPGA needs to be designed. This system must leverage the high parallel processing capabilities, reconfigurable logic characteristics, and high-speed interface resources of FPGAs to integrate real-time control, synchronous adjustment, high-precision monitoring, and rapid protection functions for multiple high-voltage parameters. Simultaneously, it should support flexible iteration of control algorithms and expansion and adaptation of detection channels, optimize electromagnetic compatibility and radiation interference resistance for the experimental environment, and ultimately provide efficient, coordinated, stable, and reliable high-voltage power supply control for complex detection terminals, ensuring the accuracy, repeatability, and continuity of nuclear physics experimental data and processes.

[0029] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0030] In some specific embodiments of the present invention, reference is made to... Figure 1 This solution provides an FPGA-based high-voltage power supply control system, including: The core control module 100 uses a SoC-type FPGA chip that integrates the processing system PS terminal and the programmable logic PL terminal as a unified control core. The signal acquisition module 200 is connected to the core control module and is used to synchronously acquire analog monitoring signals from multiple external high-voltage power supplies and convert them into multiple digital signals. The control signal output module 300 is connected to the core control module and is used to output an adjustment signal to the external high-voltage power supply. The PL terminal, through its hardware parallel processing architecture, realizes synchronous parallel processing of multiple digital signals, and directly generates time-synchronized drive instructions for multiple external high-voltage power supplies based on preset real-time closed-loop control logic. The PS terminal runs an operating system to process advanced control instructions and set the control parameters required for the operation of the hardware logic of the PL terminal. The PL terminal integrates a real-time protection function in its hardware logic. When a transient fault is detected, it bypasses the PS terminal and directly controls the control signal output module to perform protection actions through an independent hardware protection path.

[0031] In some specific embodiments of the present invention, the architecture for hardware parallel processing implemented at the PL end includes: multiple sets of mutually independent control logic circuits, each set of control logic circuits corresponding to one of the digital signals, and the multiple sets of mutually independent control logic circuits being driven by a common clock signal.

[0032] Specifically, to achieve synchronous control of multiple high-voltage power supplies, a digital logic circuit for controlling a single channel was first designed. Then, in the top-level design of the PL (Power Producer), this circuit was replicated multiple times, generating multiple independent control logic circuits within the FPGA chip. These circuits are physically parallel and can operate simultaneously. Crucially, all these circuits are driven and synchronized by a unified common clock signal within the PL. Therefore, when a broadcast command is issued within one clock cycle, it reaches all circuits simultaneously, ensuring a high degree of synchronization in their operations.

[0033] In some specific embodiments of the present invention, the real-time protection function is implemented by at least one digital comparator circuit; the first input terminal of the digital comparator circuit is directly connected to the real-time data output terminal of the signal acquisition module; The second input terminal is connected to a threshold register, which stores the protection threshold dynamically set by the PS terminal; The output of the digital comparator circuit is directly connected to the hardware shutdown pin of the control signal output module, which is used to immediately perform protection actions when a fault is detected, without the need for the PS terminal to participate.

[0034] Specifically, this real-time protection function is implemented through a digital comparator circuit within the PL terminal. Its first input is directly connected to the data output bus of the signal acquisition module 200. Its second input is connected to a threshold register, the value of which can be written to and updated by the PS terminal via the AXI bus. The digital comparator circuit continuously compares the values ​​at the two inputs at the FPGA's clock frequency.

[0035] In some specific embodiments of the present invention, the transient fault includes at least one of high-voltage arcing, output short circuit, overvoltage, or overcurrent.

[0036] Specifically, high-voltage arcing or output short circuit can be determined by monitoring sudden changes in the current acquisition channel value; overvoltage can be determined by monitoring whether the voltage acquisition channel value exceeds the safe range.

[0037] In some specific embodiments of the present invention, the protection action is to immediately shut off the high voltage output of the corresponding channel.

[0038] Specifically, the comparator's output signal is directly connected to the emergency shutdown pin of the control signal output module or a GPIO pin that controls an external relay during wiring, thereby achieving the protection action of immediately shutting off the high voltage output of the corresponding channel without passing through the PS terminal.

[0039] In some specific embodiments of the present invention, the signal acquisition module includes at least one analog-to-digital converter with a sampling resolution of not less than 16 bits; the control signal output module includes at least one digital-to-analog converter with a resolution of not less than 12 bits and / or a pulse width modulation signal generation circuit.

[0040] Specifically, the signal acquisition module 200 uses a 16-bit resolution ADC chip that supports 8-channel synchronous sampling. The control signal output module 300 uses a 12-bit resolution DAC chip that provides multiple outputs. Additionally, the PL terminal has reserved multiple PWM output pins, the frequency and duty cycle of which can be precisely configured by the internal counter logic of the PL.

[0041] In some specific embodiments of the present invention, such as Figure 2 As shown, the FPGA chip of the core control module is a Zynq-7000 series chip; the PS terminal runs an embedded Linux operating system; the PL terminal and the PS terminal communicate with each other via an AXI bus.

[0042] Specifically, the core control module 100 in this embodiment preferably uses a Xilinx Zynq-7020 chip; the PS runs embedded Linux; and the data interaction between the PS and PL is achieved through a high-performance AXI bus.

[0043] A Xilinx Zynq-7000 series SoC chip was selected as the unified control core. This chip integrates a processing system (PS) terminal (based on an ARM Cortex-A9 dual-core processor) and a programmable logic (PL) terminal (based on an FPGA logic cell array).

[0044] Signal acquisition module 200: This module is electrically connected to the PL terminal of the core control module 100. It is responsible for acquiring analog monitoring signals (such as output voltage and current) from multiple external high-voltage power supplies and converting them into multiple digital signals through the built-in ADC chip.

[0045] Control signal output module 300: This module is also electrically connected to the PL terminal of the core control module 100. It is responsible for receiving the drive commands generated by the PL terminal and outputting corresponding adjustment signals (such as analog voltage or PWM wave) to the external high voltage power supply.

[0046] PL-side configuration: Internally, the PL-side uses a hardware description language (such as Verilog HDL) to program its hardware parallel processing architecture. This architecture is configured to synchronously acquire and process multiple digital signals from the signal acquisition module 200, and generate synchronous drive commands in real time according to preset closed-loop control logic (such as PID algorithm), and then transmit them to the control signal output module 300.

[0047] PS-side configuration: A custom embedded Linux operating system runs on the PS-side. This operating system is responsible for running upper-layer applications, such as a web server and the EPICS (Experimental Physics and Industrial Control Systems) protocol stack, to handle complex network communication and human-machine interaction, and to issue high-level commands (such as setting target voltage) and configuration parameters (such as PID parameters and protection thresholds) to the PL-side.

[0048] Real-time protection function on the PL side: The hardware logic on the PL side also integrates a real-time protection function. This function continuously monitors the data of the signal acquisition module 200. Once a momentary fault is detected, its hardware logic will immediately generate a protection command and directly control the control signal output module 300 to execute the protection action. The entire process completely bypasses the PS side.

[0049] To ensure stable system operation, the system also includes a power supply module 400 that supplies power to the entire system and a communication module 500 that is responsible for communicating with external devices, such as... Figure 3 As shown, each module can be integrated into a housing made of metal materials such as aluminum alloy to shield external electromagnetic interference and protect internal circuits. Power module 400 is the module that supplies power to the various components within the high-voltage power control system.

[0050] It should be noted that the high-voltage power supply control system described in this invention does not directly generate high voltage. The system outputs low-voltage analog or digital pulse signals through the control signal output module 300, which are then sent to an external high-voltage power supply submodule. This external high-voltage power supply submodule (e.g., a high-voltage module with 24VDC input and 0-6000VDC output) ultimately outputs adjustable high-voltage DC power to the load based on the received control signal.

[0051] In some specific embodiments of the present invention, the architecture for hardware parallel processing implemented at the PL end includes: multiple sets of mutually independent control logic circuits, each set of control logic circuits corresponding to one of the digital signals, and the multiple sets of mutually independent control logic circuits being driven by a common clock signal.

[0052] In some specific embodiments of the present invention, the number of the multiple independent control logic circuits is no less than 8 sets, and they are synchronously driven by the common clock signal, so that the output time error between any two drive instructions generated by the multiple independent control logic circuits is less than 1 microsecond.

[0053] Specifically, due to the use of eight independent control logic circuits, the system can control no fewer than eight channels simultaneously. Since all circuits are driven by a common clock, their synchronization error mainly originates from the clock offset within the chip, which is typically on the nanosecond level. Therefore, it can easily meet the synchronization time error requirement of less than 1 microsecond.

[0054] In some specific embodiments of the present invention, the internal logic, quantity, or interface timing of the multiple sets of independent control logic circuits can be dynamically modified by online reprogramming of the FPGA chip to adapt to the multi-channel high-voltage power supply control requirements under different experimental scenarios.

[0055] Specifically, this embodiment fully utilizes the online reprogramming capability of FPGAs. When it is necessary to modify the control algorithm or add / remove channels, developers only need to modify the HDL code in a development environment such as Vivado to generate a new configuration file (Bitstream). The Linux system on the PS can read this new file from the SD card or via the network, and write it to the PL terminal through the internal PCAP (Processor Configuration Access Port) interface without power loss, thereby completing the "hot update" of hardware functions.

[0056] In some specific embodiments of the present invention, the system further includes a communication module connected to the PS terminal; the communication module integrates at least one of an Ethernet interface and an RS-485 interface.

[0057] Specifically, the communication module 500 integrates an Ethernet physical layer chip, which is connected to the built-in Ethernet MAC controller on the PS side; at the same time, it is connected to the UART controller on the PS side through an RS-485 transceiver chip to support long-distance differential signal communication.

[0058] In some specific embodiments of the present invention, the power supply module 400 adopts a multi-stage DC-DC conversion circuit to sequentially convert the external 24V DC power into 12V, 5V, 3.3V and 1.8V, providing a clean and stable power supply for each module.

[0059] In some specific embodiments of the present invention, in terms of system interfaces and expansion, the system also has an onboard JTAG debugging interface, a Micro-SD card slot supporting up to 128GB, as well as a GPIO interface and two sets of expansion connectors, reserving sufficient interface resources for subsequent function upgrades.

[0060] In some specific embodiments of the present invention, intelligent heat dissipation can also be configured. The system also includes a fan control circuit. The core control module 100 dynamically adjusts the fan speed by outputting a PWM signal based on the collected internal temperature signal to achieve intelligent heat dissipation.

[0061] Reference Figure 4 The workflow of the FPGA-based high-voltage power supply control system provided by this invention begins with system power-on initialization. The PS terminal starts the Linux system and runs the upper-layer application, while simultaneously writing initial configuration parameters to the threshold register and other components in the PL terminal via the AXI bus. Within the PL terminal, through its hardware parallel processing architecture (i.e., multiple independent control logic circuits), driven by a common clock, it synchronously acquires and processes monitoring signals from multiple external high-voltage power supplies, generating synchronous drive command outputs to achieve synchronous closed-loop regulation of multiple high-voltage power supplies. In parallel, within the PL terminal, a digital comparator circuit continuously compares the acquired monitoring signals with preset thresholds to determine the presence of transient faults. Once a fault is detected, the comparator's output signal directly triggers a protection action; the entire process is independent of and requires no intervention from the PS terminal. While the PL terminal continuously executes the above steps at nanosecond or microsecond speeds, the PS terminal operates independently at millisecond or second speeds, with the two interacting asynchronously via the AXI bus.

[0062] Reference Figure 5 The present invention provides a high-voltage power supply control method based on FPGA, which is applied to the system described in any of the above embodiments, and the steps are as follows: Step S510: In the PL terminal of the SoC-type FPGA chip that integrates the processing system PS terminal and the programmable logic PL terminal, the monitoring signals from multiple external high-voltage power supplies are synchronously acquired and processed through a hardware parallel processing architecture, and synchronous drive instructions are generated based on real-time closed-loop control logic. Step S520: Output the synchronous drive command to perform synchronous closed-loop regulation on the multiple external high-voltage power supplies; Step S530: Run the operating system in the PS terminal, process advanced control instructions and set the control parameters required for the operation of the hardware logic in the PL terminal; Step S540: Through the real-time protection function integrated in the PL terminal hardware logic, the monitoring signal is continuously monitored, and when a momentary fault is determined to occur, the control signal output module is directly controlled to perform protection actions through an independent hardware protection path, bypassing the PS terminal.

[0063] The FPGA-based high-voltage power supply control system and method provided by this invention utilizes a hardware parallel processing architecture on the PL side to simultaneously perform microsecond-level real-time control and status monitoring of multiple high-voltage channels. It features high synchronization accuracy between channels and fast system response, effectively solving the delay and timing problems of traditional serial solutions, and exhibiting high performance and high real-time capability. Real-time protection functions are implemented in the hardware logic on the PL side, achieving tight coupling between monitoring and protection, reducing fault response time to sub-microsecond levels, and is independent of upper-level software, greatly improving the protection capability for expensive equipment and the overall reliability of the system, demonstrating high reliability and fast protection. The control, monitoring, protection, and communication functions are highly integrated into a single FPGA chip, simplifying the hardware. The reconfigurable nature of the FPGA allows for online upgrades of the control algorithm and system functions through software programming, greatly improving the system's flexibility and lifespan.

[0064] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0065] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0066] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high-voltage power supply control system based on FPGA, characterized in that, include: The core control module uses a SoC-type FPGA chip that integrates the processing system PS terminal and the programmable logic PL terminal as a unified control core. The signal acquisition module, connected to the core control module, is used to synchronously acquire analog monitoring signals from multiple external high-voltage power supplies and convert them into multiple digital signals. A control signal output module, connected to the core control module, is used to output adjustment signals to the external high-voltage power supply; The PL terminal, through its hardware parallel processing architecture, realizes synchronous parallel processing of multiple digital signals, and directly generates synchronous drive commands for multiple external high-voltage power supplies based on preset real-time closed-loop control logic. The PS terminal runs an operating system to process advanced control instructions and set the control parameters required for the operation of the hardware logic of the PL terminal. The PL terminal integrates a real-time protection function in its hardware logic. When a transient fault is detected, it bypasses the PS terminal and directly controls the control signal output module to perform protection actions through an independent hardware protection path.

2. The FPGA-based high-voltage power supply control system according to claim 1, characterized in that, The architecture for hardware parallel processing at the PL end includes: multiple sets of independent control logic circuits, each set of control logic circuits corresponding to one of the digital signals, and the multiple sets of independent control logic circuits are driven by a common clock signal.

3. The FPGA-based high-voltage power supply control system according to claim 1 or 2, characterized in that, The real-time protection function is implemented through at least one digital comparator circuit; the first input terminal of the digital comparator circuit is directly connected to the real-time data output terminal of the signal acquisition module. The second input terminal is connected to a threshold register, which stores the protection threshold dynamically set by the PS terminal; The output of the digital comparator circuit is directly connected to the hardware shutdown pin of the control signal output module, which is used to immediately perform protection actions when a fault is detected, without the need for the PS terminal to participate.

4. The FPGA-based high-voltage power supply control system according to claim 2, characterized in that, The number of the multiple independent control logic circuits is no less than 8 sets, and they are synchronously driven by the common clock signal, so that the output time error between any two drive instructions generated by the multiple independent control logic circuits is less than 1 microsecond.

5. The FPGA-based high-voltage power supply control system according to claim 2, characterized in that, The internal logic, quantity, or interface timing of the multiple independent control logic circuits can be dynamically modified by online reprogramming of the FPGA chip to adapt to the multi-channel high-voltage power supply control requirements under different experimental scenarios.

6. The FPGA-based high-voltage power supply control system according to claim 1, characterized in that, The signal acquisition module includes at least one analog-to-digital converter with a sampling resolution of not less than 16 bits; the control signal output module includes at least one digital-to-analog converter with a resolution of not less than 12 bits and / or a pulse width modulation signal generation circuit.

7. The FPGA-based high-voltage power supply control system according to claim 1, characterized in that, The FPGA chip of the core control module is a Zynq-7000 series chip; the PS terminal runs an embedded Linux operating system; the PL terminal and the PS terminal exchange data via an AXI bus.

8. The FPGA-based high-voltage power supply control system according to claim 1, characterized in that, The transient fault includes at least one of high-voltage arcing, output short circuit, overvoltage, or overcurrent.

9. The FPGA-based high-voltage power supply control system according to claim 1, characterized in that, The protection action is to immediately shut off the high-voltage output of the corresponding channel.

10. The FPGA-based high-voltage power supply control system according to claim 1, characterized in that, The system also includes a communication module connected to the PS terminal; the communication module integrates at least one of an Ethernet interface and an RS-485 interface.

11. A high-voltage power supply control method based on FPGA, applied to the system as described in any one of claims 1-10, characterized in that, Includes the following steps: Within the PL side of a SoC-type FPGA chip that integrates a processing system (PS) side and a programmable logic (PL) side, monitoring signals from multiple external high-voltage power supplies are synchronously acquired and processed through a hardware parallel processing architecture, and synchronous drive instructions are generated based on real-time closed-loop control logic. The synchronous drive command is output to perform synchronous closed-loop regulation of the multiple external high-voltage power supplies; An operating system runs within the PS terminal, processes advanced control instructions, and sets the control parameters required for the hardware logic operation of the PL terminal. The monitoring signal is continuously monitored through the real-time protection function integrated in the PL terminal hardware logic. When a transient fault is detected, the control signal output module is directly controlled to perform protection actions through an independent hardware protection path, bypassing the PS terminal.

12. The FPGA-based high-voltage power supply control method according to claim 11, characterized in that, When a transient fault is detected, the protection action is bypassed at the PS terminal and the control signal output module is directly controlled to perform protection actions through an independent hardware protection path. Specifically, this includes: A digital comparator circuit continuously compares the real-time acquired monitoring signal with a preset threshold to determine whether there is a momentary fault. When a transient fault is detected, the protection action is directly triggered by the output signal of the digital comparator circuit without the intervention of the PS terminal.

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