Plasma cutting bus transient shaping regulation and control method and regulation and control circuit

Abstract

The invention discloses a plasma cutting bus transient shaping regulation and control method and a regulation and control circuit. According to the method, before point arc triggering, a point arc window and an arc stabilizing window are set based on sampling of an alternating-current end and a direct-current bus end, and a bus voltage reference and a regulation and control target are determined; generating a sag compensation reference trajectory in a point arc window and generating a lifting peak clipping reference trajectory in a stable arc window to limit the amplitude and the duration; the primary side power conversion unit and the secondary side synchronous rectification and modulation unit are cooperatively driven according to the reference trajectory to change the current slope and the current trajectory of the series inductor by adjusting the equivalent voltage difference between the primary side power conversion unit and the secondary side synchronous rectification and modulation unit so as to realize bus transient sag compensation or lifting peak clipping; energy is concentrated on a carrier wave and a sideband of the carrier wave in a frequency spectrum so as to suppress a low-frequency component and direct-current bias; the method can improve the arc striking success rate and the arc stabilizing stability and reduce electromagnetic interference and device stress.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of plasma cutting, and particularly relates to a method and a circuit for transient shaping and regulation of a bus voltage in plasma cutting. BACKGROUND

[0002] The transient requirements of a direct-current bus voltage are different in the stages of a point arc and a stable arc in plasma cutting. A voltage short-time dip and subsequent recovery often occur in the point arc moment, and load fluctuations in the stable arc process cause the bus voltage to rise and spike. The traditional method relies on increasing the capacitance and passive absorption or improving the control margin, which can alleviate the average fluctuation, but the response to transient depression and rise is lagging, the amplitude and duration are difficult to accurately limit, and the volume and loss are increased.

[0003] The Chinese patent application file with the publication number CN119538826A discloses a method and device for generating the current-voltage characteristics of a transient arc. The technical solution first constructs an arc model with an external electromotive force source, internal resistance, and plasma geometry and temperature, derives the energy conservation and current model, and converts it into a direct-current arc temperature model through thermal relationships such as Joule's law. Then, the temperature model is combined with the current model to obtain the temperature distribution and generate the current-voltage characteristics of the arc by pre-regressing the conductivity model from the finite element data. This technical solution focuses on generating the I-V characteristics of the transient arc using physical and regression models, which is an offline or computational result and does not involve controllable shaping and low-frequency component suppression mechanisms for the amplitude and duration of bus depression and rise. It is difficult to directly improve the success rate of point arc, the stability of stable arc, and EMI performance.

[0004] Existing solutions are mostly adjusted in a single link, lacking the coordinated quantization of primary side differential excitation and secondary side modulation, and it is difficult to shape the rising and falling trends of series inductance current as needed. Point arc triggering and voltage shaping are often not coupled in a clear time window, and short-time mismatches between rectified current and load current are easily amplified, forming overshoot or undervoltage. Low-frequency disturbances on the frequency spectrum easily penetrate the power channel and filter link, causing magnetic bias and low-frequency electromagnetic interference. Fixed modulation is difficult to concentrate energy in the carrier and sideband regions, and low-frequency components are not suppressed enough.

[0005] Therefore, a method and circuit for transient adjustment of the transient depression of the bus voltage at the moment when the plasma air gap is suddenly formed (point arc starts) and the transient rise of the bus voltage at the moment when the high-frequency alternating current required by the point arc exits and only the direct current required for stable arc cutting remains are needed. SUMMARY

[0006] According to a first aspect of the present disclosure, a method for transient shaping and regulation of a bus voltage in plasma cutting is provided, which is used for transient depression compensation and transient rise peak clipping control of a direct-current bus voltage in the stages of a point arc and a stable arc to form a bus voltage change with limited amplitude and controllable duration, the method comprising:

[0007] establishing timing boundaries of the sparkover window and the sustaining window based on sampling signals of the AC input end and the DC bus end before the sparkover is triggered, and determining corresponding bus voltage reference states and control target types;

[0008] generating a dip compensation reference trajectory according to a transient dip feature of the bus voltage in the sparkover window, and generating a lift clipping reference trajectory according to a transient lift feature of the bus voltage in the sustaining window, so that amplitudes and durations of the two types of reference trajectories satisfy preset limit conditions;

[0009] According to the reference trajectory, the primary side power conversion unit and the secondary side synchronous rectification and modulation unit are cooperatively controlled to adjust the equivalent voltage difference between the primary side differential excitation voltage and the secondary side modulation voltage to change the change trend of the series inductance current, so that the difference between the rectification current and the load current realizes the transient dip compensation or transient lift clipping of the DC bus voltage.

[0010] According to a second aspect of the present disclosure, a plasma cutting bus transient shaping control circuit is provided, which performs the method according to the first aspect of the present disclosure, and the circuit comprises:

[0011] an AC input end for accessing an AC power supply and obtaining a real-time AC voltage;

[0012] two input inductors including a first input inductor and a second input inductor; the two input inductors are configured to shape the input current waveform, limit the commutation current change rate, provide a natural commutation current path for the corresponding bridge arm in the positive half cycle and the negative half cycle of the power grid respectively, and improve the soft switching condition together with the clamping branch;

[0013] a primary side power conversion unit including at least one group of staggered power switching devices, for synthesizing the voltage of the AC input end into a primary side differential excitation voltage under the action of a control signal, and forming a pair of primary side differential nodes at the output end thereof;

[0014] a clamping branch, which is arranged in parallel between the primary side differential nodes, and includes a clamping capacitor and a unidirectional conduction device, for maintaining the stability of the primary side midpoint potential and absorbing the commutation transient energy during the switching commutation process;

[0015] an isolation power channel including a series inductor and an isolation transformer, one end of the series inductor being electrically connected to the primary side differential nodes, and the other end being coupled to the secondary side through the isolation transformer, for establishing a controllable energy difference channel between the primary side differential excitation voltage and the secondary side modulation voltage;

[0016] The secondary side synchronous rectification and modulation unit comprises a set of full-bridge configured power switching devices, which are controlled under pulse width modulation to modulate the DC bus voltage into a secondary side modulation voltage and selectively conduct according to the polarity to form a rectification current;

[0017] The DC bus branch comprises a DC capacitor of the bus DC output end, which is used to absorb the secondary side rectification current and form a DC bus voltage;

[0018] The equivalent voltage difference formed by the primary side differential excitation voltage and the secondary side modulation voltage through the isolation power channel determines the current change trend in the series inductor, and then the difference between the rectification current and the load current is used to regulate and control the transient change process of the DC bus voltage. BRIEF DESCRIPTION OF DRAWINGS

[0019] In the following, the present application will be described in more detail based on embodiments and with reference to the accompanying drawings. In which:

[0020] Figure 1 The DC bus transient state in the plasma cutting process mentioned in the background of the present disclosure;

[0021] Figure 2 The schematic diagram of the plasma cutting bus transient shaping and regulating circuit according to the embodiment of the present disclosure;

[0022] Figure 3 The soft and hard switching conditions of the regulating circuit in mode A according to the embodiment of the present disclosure are shown;

[0023] Figure 4 The soft and hard switching conditions of the regulating circuit in mode B according to the embodiment of the present disclosure are shown;

[0024] Figure 5 The flow chart of the plasma cutting bus transient shaping and regulating method 100 according to the embodiment of the present disclosure is shown;

[0025] Figure 6 The flow chart of the method 200 for determining the timing boundary of the point arc window and the stable arc window and synchronously determining the bus voltage reference state and the regulating target based on the AC end and the DC bus end sampling before the point arc according to the embodiment of the present disclosure is shown;

[0026] Figure 7 The parameter change conditions of the primary side in one AC power supply cycle in the time domain are shown;

[0027] Figure 8 The flow chart of the method 300 for forming the reference trajectory in the point arc window and the stable arc window according to the embodiment of the present disclosure is shown;

[0028] Figure 9 A flowchart of a method 400 for mapping a secondary-side differential switching function to a sinusoidal PWM and parameterizing its spectrum is shown.

[0029] Figure 10 The time-domain correspondence between the duty cycle reference waveform, gate drive pulse differential switching function, and equivalent modulation voltage formed by the DC bus voltage of the secondary-side full-bridge synchronous rectification and modulation unit in one power supply cycle is shown.

[0030] Figure 11 A schematic diagram illustrating the control effect of the control circuit according to an embodiment of the present disclosure is shown;

[0031] Figure 12 The control situation is shown when each parameter with different PWM spectrum coefficients is adjusted individually.

[0032] Figure 13 A method 500 is shown for establishing a piecewise linear model of the current slope of a series inductor and determining the current trajectory from critical boundary moments;

[0033] Figure 14 The current slope of the series inductor changes over one switching cycle;

[0034] Figure 15 A flowchart of a method 600 for bus dip compensation and peak lifting is shown. The method involves coordinating the primary and secondary sides based on a reference trajectory and adjusting the equivalent voltage difference between them.

[0035] Figure 16 A flowchart of a method 700 for setting a symmetrical or asymmetrical time window associated with a point arc trigger according to an embodiment of the present disclosure and providing a target profile of a bus voltage constrained by amplitude and duration is shown.

[0036] Figure 17 A flowchart of a method 800 for calculating the required energy and periodic power adjustment amount according to an embodiment of the present disclosure and obtaining the duty cycle correction amount from the power and modulation relationship is shown.

[0037] Figure 18 This illustrates the modulation of the method according to embodiments of the present disclosure. The actual voltage change at the bus output. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] like Figure 1 As shown, DC bus voltage Under normal operating conditions, it remains approximately constant. When the point arc trigger arrives, it first forms an amplitude of approximately [value missing] within a preset time window. The transient voltage dip, followed by a voltage drop of approximately [value missing] during the load current build-up phase. The transient voltage rise. The duration of both transient processes is much shorter than the sinusoidal period of the power supply, which is used to absorb the energy of the arc spike and compensate for load changes, respectively, and has little impact on the overall average bus voltage.

[0041] To overcome the aforementioned technical deficiencies, this disclosure provides a bus transient shaping and control circuit with the following three access methods, such as... Figure 2 As shown, the bus transient shaping and control circuit includes an AC input terminal and a first input inductor. Second input inductor The system consists of five parts: a primary-side power conversion unit, a clamping branch, an isolated power channel, a secondary-side synchronous rectification and modulation unit, and a DC bus terminal. The first input inductor... The second input inductor is connected in series between the AC input terminal and the first differential node PRI1 on the primary side. It is connected in series between the AC input terminal and the second differential node PRI2 on the primary side. The AC input terminal is used to connect to an AC power supply, and its real-time output voltage is... via the first input inductor With the second Two input branches are connected to the primary-side power conversion unit to shape the input current and limit the rate of change of the commutation current. The primary-side power conversion unit consists of power switching devices Q1 to Q4 forming interleaved bridge arms. The two sets of bridge arms constitute the primary-side differential excitation structure, and primary-side differential nodes PRI1 and PRI2 are formed at its output terminals, thereby establishing a controllable primary-side differential excitation voltage between the first node PRI1 and the second node PRI2. , The real-time voltage of the first node of the primary differential circuit. This is the real-time voltage of the second node of the primary differential bridge. Clamping capacitors are located in the middle of both bridge arms. The co-power switching devices Q5 and Q6 cooperate to form a clamping branch, the clamping branch is used as overvoltage clamping and commutation energy absorption channel, and slowly varying envelope potentials of the primary side differential first node PRI1 and the primary side differential second node PRI2 are restrained on the power frequency scale, so that the bridge arm midpoint potential is stabilized and voltage spikes in the switching transition are suppressed. The isolation power channel refers to an equivalent energy path between the primary side power conversion unit and the DC bus end, which is used for transmitting controllable differential energy, and is formed by the primary side differential nodes PRI1 and PRI2, the clamping capacitor , the series inductance , the series inductance , the series inductance and the primary side winding of the isolation transformer, and the series inductance is connected to the primary side differential excitation end of the primary side differential first node PRI1 and the primary side differential second node PRI2. The series inductance forms a controllable inductance current under the action of the equivalent voltage difference between the primary side differential excitation voltage and the secondary side modulation voltage , so as to adjust the energy flowing into the DC bus. , , The isolation power channel takes the node voltage and equivalent energy relationship as the modeling object, and does not limit the implementation form of specific switching devices; the primary side power conversion unit and the secondary side synchronous rectification unit are respectively used to generate the equivalent voltage states of the nodes PRI1, PRI2, SEC1 and SEC2, but do not constitute part of the isolation power channel.

[0042] The secondary side synchronous rectification and modulation unit is composed of power switching devices Q7 to Q10 to form a full-bridge synchronous rectification unit, which is connected to the two ends of the secondary side of the isolation transformer and forms the secondary side equivalent modulation first node SEC1 and the second node SEC2, and is connected to the DC bus end and is connected in parallel with the bus capacitor , and is used to apply the voltage state obtained by the secondary side modulation to the secondary side equivalent modulation first node SEC1 and the second node SEC2, and when needed, charges the bus capacitor or feeds back energy from the bus to form the DC bus voltage , so as to realize transient reduction or lifting of the bus voltage in the point arc window and the stable arc window, and provide stable DC energy for the rear load.Figure 2 The equivalent current channel and modulation interval under different half cycles are also given.

[0043] Regarding the device types of Q1 to Q10, full-control power semiconductor switching devices such as N-type IGBT or N-channel trench MOSFET can be selected in engineering implementation. Generally, MOSFET is preferred in high-frequency switching scenarios to reduce switching loss, but for the convenience of description, the three-terminal structure of IGBT is described in this embodiment, and when MOSFET is used, the collector and emitter of IGBT can be corresponded to the drain and source of MOSFET, and the gate corresponds to the gate. In the primary side, the gate of each power switching device and Q5 and Q6 of the isolated power channel are connected to the primary side driving and control circuit to receive the PWM or phase shift control signal, and the collector and emitter thereof are connected to the AC input branch and the primary side differential node network as the two ends of the main current channel, so that the upper bridge arm device and the lower bridge arm device are paired to form a bridge arm and switch the potential of the primary side differential nodes PRI1 and PRI2 during commutation; at the same time, the power switching devices can be connected in parallel with anti-parallel diodes or use the device body diode to form a natural freewheeling path to provide a current commutation channel in the soft switching interval and reduce the commutation stress. In the secondary side synchronous rectification and modulation unit, the gates of Q7 to Q10 are connected to the secondary side driving and control circuit, and the collectors and emitters thereof form four bridge arm switching channels of the full-bridge, so that the polarity and amplitude of the equivalent modulation first node SEC1 and the second node SEC2 of the secondary side are switched according to the modulation law, and the DC capacitor connected between the two ports of the bus DC output forms a rectified current path; when the current direction of the secondary side needs to be injected from the AC side to the bus, the corresponding diagonal devices are turned on to form a synchronous rectification channel, and when the bus energy needs to be fed back or suppressed, another pair of diagonal devices are switched to change the equivalent voltage difference and energy flow direction. In order to avoid overvoltage and ringing, an absorption network or a buffer branch can be configured between the collector and emitter of each power switching device, and the and the unidirectional conduction device together suppress the overshoot and peak of the primary side node, thereby improving the bus transient controllability and device reliability in the point arc and stable arc switching process.

[0044] For the power supply, the real-time voltage output by the AC source is , which can be an AC bus or an output after the output of the electromagnetic interference or isolation unit; it can also be the secondary side of an existing isolation transformer in the whole machine after filtering to be provided to the bus transient shaping and regulation circuit; it can also be an independent small isolation power supply specially used for the bus transient shaping and regulation circuit according to the embodiment of the present disclosure. In the prototype verification, the Vac, = 50 Hz, at this time the DC voltage output by the bus transient shaping and regulation circuit according to the embodiment of the present disclosure is The transient voltage dip variation is approximately 400Vdc and is achieved within the point arc window. The transient voltage rise is approximately 30V to 50V within the arc stabilization window. Approximately 15V to 30V.

[0045] This application divides one power frequency cycle of the entire machine into two modes. Mode A corresponds to the positive half-cycle of the power grid voltage. The dominant operation during the positive half-cycle is to examine the commutation behavior of the upper branch, Q1, and Q4, with ds1 representing the soft-switching margin. Mode B corresponds to the commutation behavior of Q2 and Q3 during the primary-side power switching device regulation when the grid voltage is in the negative half-cycle, with ds2 representing the input voltage in the negative half-cycle. The soft-switching margin within the cycle. To provide the controller with continuous handover information and demonstrate the complementary relationship of conditions within the two half-cycles, the attached figure plots both ds1 and ds2 at zero to twice the circumference angle. The curve segments in the non-dominant half-cycle are used for analysis and switching transitions and are not considered as the main control variables for that half-cycle. Therefore, small hard-switching or soft-switching contrast areas appear to indicate the control strategy's attention window near the handover.

[0046] In this topology, soft switching refers to the situation where, at the instant power switching devices Q1 to Q4 are turned on or off, the voltage at the bridge arm node is naturally pulled to near zero by the inductor current and the body diode. That is, the opposite arm device turns off first, and the inductor current establishes a freewheeling current through the opposite body diode, clamping the capacitor C on the clamping branch. aux Natural charging and discharging of the node capacitance is achieved through the parasitic capacitance of the circuit, allowing the target device to conduct under low voltage and low stress, achieving near-zero voltage commutation. Hard switching, on the other hand, occurs when the above natural commutation conditions are insufficient, forcing the target device to switch under higher junction voltage or larger junction current. The node capacitance needs to be forcibly charged and discharged by the device itself, leading to increased turn-on losses and stress. Power switching devices Q5 and Q6 are power frequency switching elements, their function being to select the envelope polarity of the midpoint of the first differential node PRI1 and the second differential node PRI2 on the primary side, and to clamp the capacitor C. aux They are clamped together; they do not undertake high-frequency zero-voltage commutation, but only create or weaken conditions for soft and hard switching.

[0047] During the positive and negative half-cycles of the input voltage, the operating characteristics are dominated by soft switching and hard switching, respectively.

[0048] The following will combine Pattern A With Pattern B The conduction state, energy flow direction, and current changes in each typical sub-interval are further explained.

[0049] The dominant half-cycle is the zero-to-circular angle when the mains voltage is positive. During the positive half-cycle of the AC input voltage, the first input inductor... The current in the circuit is positive, and the upper channel formed by the bridge arms containing Q1 and Q4 handles the main energy transfer. The controller provides the phase shift angle. Then, the body diodes of the opposite switches (Q2, Q3) first establish a commutation channel to achieve zero-voltage commutation. That is, before the body diodes of Q2 and Q3 are both turned off, the inductor current naturally transfers to the body diodes of the opposite transistors, clamping the voltage across the transistor to near zero. Then, it is turned on to achieve zero-voltage commutation. At this time, Q6 is on and Q5 is off, and the first input inductor... The current direction is the same as the primary differential excitation voltage obtained from the primary differential first node PRI1 and the primary differential second node PRI2. Voltage switching occurs in tandem. The body diodes of the primary arm can initially accept current, clamping the node voltage to near zero. Q1 and Q4 turn on or off under low voltage conditions, forming the wide soft-switching region shown in pink in the diagram. At this time, a voltage is formed across the primary side bridge arm. (Envelope) Modulation), series inductor current The energy rises and is fed into the isolation transformer. Because the turns ratio of the primary and secondary transformers is... Therefore, the amplitude of the secondary-side modulation voltage is approximately: The current amplitude is approximately On the secondary side, synchronous rectifier devices Q7 and Q10 are turned on in polarity to rectify the current. Injected DC capacitor Formed on the DC side Power is supplied to the load; the return current through the body diodes of Q9 and Q8 is then returned to the lower primary arm body diode via the isolation transformer, thus forming a closed loop. Clamping capacitor. Maintaining the midpoint potential and absorbing energy from the commutation gap; if a sudden voltage surge occurs, the anti-parallel diodes in the clamping branch provide a clamping channel, limiting the voltage swing of the bridge arm nodes. Throughout the entire positive half-cycle, due to the input current polarity being consistent with the commutation direction, a large zero-voltage commutation window, a high proportion of soft-switching intervals, low turn-on and turn-off losses, and low EMI.

[0050] After entering the negative half-cycle, Q5 turns on and Q6 turns off, and the first input inductor... The current direction is the same as the primary differential excitation voltage obtained from the primary differential first node PRI1 and the primary differential second node PRI2. The voltage coordination decreases, and ds1 shows a light blue hard-switching region in certain electrical angle segments, indicating that Q1 or Q4 is forced to switch under higher voltage. Therefore, by Figure 3 It can be seen that soft switching accounts for a larger proportion in mode A, and the turn-on losses and electromagnetic interference of Q1 and Q4 are lower. Meanwhile, the primary side differential excitation voltage... Through series inductor With the coupling of the isolation transformer, the secondary side synchronous rectification and modulation unit is conducted by Q7 and Q9, thereby leading to the main rectification and charging the DC capacitor Supplementing energy, the DC bus voltage is kept stable.

[0051] At the same time, by Figure 4 the negative half cycle of the input voltage entering the AC input end, , the current direction in the second input inductor is reversed, thereby realizing the switching of the power switch device conduction under low voltage conditions, forming Figure 4 the wide soft switching area shown in pink in the figure. Control the conduction of power switch devices Q2 and Q3 in the primary side power conversion unit, at this time Q5 of the isolation power channel is on and Q6 is off, the primary side differential first node PRI1 is changed from positive to negative, and the primary side differential second node PRI2 is changed from negative to positive, the current direction of the second input inductor is consistent with the primary side differential excitation voltage obtained by the primary side differential first node PRI1 and the primary side differential second node PRI2. At this time, the primary side differential excitation voltage is opposite to its polarity in the positive half cycle, and after sending energy to the isolation transformer through the series inductor , the polarity of the voltage received by the secondary side is also reversed, and the current is sent to the DC capacitor by Q8, (or its body diode) synchronous rectification, and returned to the circuit through Q10 and Q7 body diode. The clamping capacitor is still used to suppress the overshoot and ring vibration of the bridge arm midpoint; when the primary side commutation transition is steep, the clamping capacitor and the absorption of leakage inductance are more obvious. When the positive half cycle of the input voltage entering the AC input end, at this time control Q6 is on and Q5 is off, the current direction of the second input inductor is consistent with the primary side differential excitation voltage obtained by the node PRI1 and the node PRI2, and the cooperative property of the primary side differential excitation voltage is weakened, and the light blue hard switching area in the partial angle section of ds2 indicates that the switching stress of Q2 or Q3 rises.

[0052] Figure 3 As can be seen from Figure 4 , the soft switch plays a major role in the positive half cycle and the negative half cycle of the input voltage of the AC input end, and is mainly used for leading the commutation and energy transfer of the corresponding bridge arm; while the hard switch only appears in the narrow angle interval near the phase intersection and the insufficient cooperative property, as a transition and fault tolerance window, the proportion is small, the duration is short, and the influence on the bus energy and electromagnetic interference is controllable under the limitation of the clamping branch.

[0053] In the process of plasma cutting power supply, the point arc trigger and the arc establishment will cause the transient depression or uplift of the DC bus voltage, Figure 2 The bus transient shaping regulation circuit shown has the following three access modes: one is to realize soft access through control strategy on the DC bus side, that is, after detecting the point arc trigger or the bus voltage deviation, a small bias is made to the duty cycle of the previous stage converter in the controller, and a controlled transient voltage depression or uplift is formed within a preset time window. The required voltage or current signal is generally taken from the two ends of the DC bus energy storage capacitor, sampled into a closed loop through resistance division and isolation; this mode does not change the connection relationship of the main power loop, and is convenient for cooperation with the whole machine. The second is to parallel a small power bidirectional buffer (such as a synchronous Buck circuit, a Boost circuit or an active clamp) across the DC bus, which only absorbs or releases energy to shape the bus waveform within the transient window, and is in standby at ordinary times, which is suitable for stronger local processing of peak and transient voltage depression or transient current depression. The third is to set an active or passive voltage shaping unit on the secondary side (close to the electrode or blade side) after isolation, which compensates for the voltage on the load side in place, and realizes short-time uplift or depression through synchronization with the point arc control signal, but needs to be designed in cooperation with the isolation and safety specifications. The above access modes can be used independently or combined according to the needs of the existing plasma cutting power supply, and the common feature of the three access modes is that, without changing the basic topology of the power supply, by selecting appropriate sampling and execution nodes on the DC bus or the secondary side after isolation, the voltage transient during the point arc is shaped synchronously to reduce the overvoltage or overcurrent stress and stabilize the output.

[0054] Figure 5 A flow chart of the plasma cutting bus transient shaping regulation method 100 of the embodiments of the present disclosure is shown. For step 101, the sampling positions and frequencies on the AC side and the bus side are not limited, and can be triggered by high-frequency point arc, DC threshold or load mutation. The window can be symmetric or asymmetric, and the reference and target are determined by threshold, table or strategy. For step 102, the reference trajectory can be segmented linear, cosine window or spline, and the amplitude and time length are limited by the rating and device constraints or process recipe, and the maximum change rate and minimum holding can be set. For step 103, small adjustments are realized through primary side duty cycle adjustment, secondary side modulation or combination of the two, supporting feedforward scheduling or amplitude limiting closed loop, timing or threshold exit reset to steady state. It is applicable to full-bridge, half-bridge, interleaved bridge and single-stage or multi-stage isolation channels, and is realized by analog, digital or hybrid, and the device model is not limited.

[0055] Figure 6A flow chart of a method 200 for determining the timing boundaries of the point-arc window and the steady-arc window and synchronously determining the bus voltage reference state and the control target based on the sampling of the AC terminal and the DC bus terminal before the point-arc is shown. In order to quantify the amplitude and duration of the transient voltage dip and the transient voltage rise of the bus output DC in the point-arc window, it is necessary to functionally express how the switch is turned on and at what voltage it is turned on, thereby establishing an analytical relationship of the primary side power supply voltage switch output of the regulating circuit. Therefore, in step 201, the on-off state of the staggered configuration of the power device switches Q1-Q4 of the primary side power conversion unit is modeled by a switch function:

[0056] ;

[0057] Switch function for 50% duty ratio After Fourier expansion, we get :

[0058] ; wherein, is the equivalent polarity waveform function of the switch function for 50% duty ratio; n is the odd harmonic order number, is the switching angular frequency. By switch function modeling, the on-off state of the staggered bridge arm of the bus transient shaping and regulating circuit is characterized by a switch function whose polarity changes with time , and further represented as a Fourier series containing only odd harmonics . However, the primary side power supply voltage of the regulating circuit also depends on which low-frequency envelope is modulated. This envelope is determined by the rectified power supply voltage of the clamping capacitor , so it is necessary to further give the relationship between the clamping capacitor voltage and and its spectral expansion.

[0059] The clamping capacitor C aux is connected between the primary side differential first node PRI1 and the primary side differential second node PRI2, and functions to clamp the potential difference formed between the two nodes on the power frequency scale, absorb the commutation transient energy, and transmit the DC envelope of the primary side input voltage waveform to the isolation power channel. Since in the positive half cycle and the negative half cycle, the node PRI1 and the node PRI2 are respectively connected to the AC source through diodes (or body diodes), on the power frequency scale (relative to the clamping capacitor C aux , which is very large and the switching harmonic average drops), the slowly varying potential of the primary side differential excitation voltage between the primary side differential first node PRI1 and the primary side differential second node PRI2 respectively follows and , so the clamping capacitor C auxThe envelope voltage of both ends is determined by , and there is an approximate relationship . The approximation is valid when the clamping capacitor C aux is large enough, the voltage drop and leakage inductance of the device are negligible, and the switching ripple is averaged; the actual waveform will have slight ripple and slight deviation.

[0060] In step 202, the relationship between the clamping capacitor voltage of the clamping capacitor C aux and the real-time voltage of the primary side power supply of the rectification regulation circuit is constructed. The amplitude and angular frequency of the real-time voltage of the primary side power supply are used to express the real-time voltage of the primary side power supply :

[0061] ;

[0062] The envelope voltage of both ends of the clamping capacitor is the absolute value of the supply voltage:

[0063] ;

[0064] wherein is the real-time voltage across the clamping capacitor; is the real-time supply voltage; is the peak value of the real-time supply voltage; , is the angular frequency of the supply, and is the supply frequency;

[0065] The even harmonic expansion of is obtained as follows:

[0066] ;

[0067] wherein m is the even harmonic order number. Through the processing of step 202, the modulated carrier obtained by selecting the opening of different switches and the clamping capacitor voltage obtained by modulating the envelope with a direct current component and superimposing several even harmonics are simultaneously mastered. Multiplying the two can obtain the equivalent waveform of the primary side differential excitation voltage , which provides a reference for subsequent modulation.

[0068] Therefore, in step 203, according to the structure of the isolated power channel, the primary side differential excitation voltage is the product of the clamping capacitor voltage and the switching function , which is expanded as follows: ​​​

[0069] ;

[0070] Further expansion yields:

[0071] ;

[0072] The spectrum is based on the switching angular frequency. The central sideband , , ...After this step, the low-frequency components are suppressed.

[0073] in, The amplitude weighting coefficient is determined by both the odd-order terms of the switching function and the even-order terms of the envelope. . Figure 7 The time-domain perspective presents the changes in various parameters of the primary side during one AC power supply cycle. The first coordinate system shows the alternating drive relationship between bridge arm devices Q1, Q4 and Q2, Q3, which alternately conduct at 0.5Ts intervals within half a power frequency cycle. The curve in the third coordinate system represents the voltage across the clamping capacitor Caux. The change in its envelope is related to the input voltage. It exhibits double rectification characteristics with consistent absolute values, and the peak voltage stabilizes at approximately 2V. g,p The primary differential excitation voltage is given in the fourth coordinate system. , its origin With differential switching function The product is formed, and its envelope is strictly controlled while maintaining high-frequency polarity. Modulation. From Figure 7 It can be seen that this invention does not directly adjust the amplitude of the AC input voltage to control the formation of the primary-side excitation. Instead, it utilizes a clamping capacitor to form a stable envelope on the power frequency scale, and then modulates the polarity of this envelope through a high-frequency differential switching function to make the primary-side differential excitation voltage... It possesses both high-frequency controllability and low-frequency energy following characteristics. This method, mathematically speaking, makes... It can be represented as and The product of these factors provides an analytical voltage model basis for subsequent fine-tuning of energy injection or extraction through switching phase or duty cycle adjustments. This structure avoids the problem of high-frequency modulation being directly affected by transient disturbances in the power grid, as is common in traditional schemes, and significantly improves the stability and controllability of voltage regulation within the arc-point and stable arc windows.

[0074] Figure 8A method 300 of forming reference trajectory within point-arc window and steady-arc window according to embodiments of the present disclosure is shown. In step 301, gate signals of secondary side full-bridge diagonal switches can be abstracted as differential switching function to uniformly represent output polarity; direct current bus voltage can be mapped to secondary side modulation voltage by using sinusoidal PWM or equivalent modulation (such as phase-shifted PWM, SVPWM). Adjustable PWM spectrum coefficients include at least frequency ratio of carrier and fundamental, sampling phase and sequence number, duty cycle or phase-shifted bias, and parameters can be from preset table, sampling and modulation timing can be set to angular frequency of switches synchronization or fixed frequency. In step 302, voltage difference between primary side differential excitation voltage and secondary side modulation voltage (or voltage after transformation by isolation transformer ) is used as driving, one switching period is divided into several subintervals defined by commutation events, and equivalent voltage across series inductance is regarded as constant in each subinterval to obtain piecewise linear model of inductance current slope. Current trajectory can be determined by current values at a small number of representative boundaries, and subsequent intervals can be supplemented if necessary by using periodic or sign symmetry. In step 303, average current at rectifier side is obtained by half-period integration (such as trapezoidal method) according to current trajectory determined in step 302, and multiplied by bus DC voltage at output end to obtain instantaneous power at DC side, which can quantify injection or feedback of bus energy, and provide target quantity for transient voltage sag compensation of DC bus for plasma cutting or transient voltage lift peak cutting of point-arc voltage cut-off time. The above process is applicable to full-bridge, half-bridge or interleaved topology, and parameter limiting and exit conditions can be set according to device rating and device stress, and specific devices and control implementation forms are not limited.

[0075] To establish a calculable corresponding relationship between modulation action of secondary side full-bridge and transient change of bus voltage, conduction state of secondary side switches needs to be abstracted as differential switching function, and direct current bus voltage is further mapped to secondary side modulation voltage , so as to lay a foundation for subsequent calculation and of difference and energy exchange of series inductance. Figure 9 A method 400 of mapping secondary side differential switching function and sinusoidal PWM and parameterizing spectrum is shown.

[0076] In step 401, differential switching function of switches Q7, Q9 of secondary side synchronous rectification and modulation unit is defined as follows:

[0077] and ​These are the gate signals of the diagonal switches Q7 and Q9 in the full-bridge structure of the secondary-side synchronous rectification and modulation unit. Step 401 has unified the gate drive states of the secondary-side diagonal switches as follows: However, this differential function still only reflects the polarity of the output on the secondary side at a certain moment, and cannot yet reflect the DC bus voltage. The actual amplitude and spectral distribution of the voltage converted into a high-frequency AC voltage under PWM modulation. Therefore, it is necessary to further introduce a sinusoidal PWM modulation expression to... Together with the modulation coefficient, it can be written as the secondary output voltage. The parsing form of .

[0078] In step 402, the secondary-side modulation voltage is obtained through sinusoidal PWM modulation. :

[0079] ;

[0080] in, This refers to the DC bus voltage. Common power supplies in this field can obtain the DC bus voltage from a single AC source via power conversion. Alternatively, a split power supply can be used: one supply provides high-voltage AC to improve the success rate of arc ignition, and the other provides a stable DC bus. Used for stable arc cutting. Regardless of... Regardless of the acquisition path, the bus transient shaping and control circuit described in this application is based on... The DC state is being regulated, that is, the bus capacitor... The DC voltage applied is used to create an amplitude-limited and duration-controllable signal within the arc-pointing and arc-stabilizing window by slightly injecting or extracting energy or slightly biasing the switching modulation. and . Figure 10 The time-domain correspondence between the duty cycle reference waveform, gate drive pulse, differential switching function, and equivalent modulation voltage formed by the DC bus voltage of the secondary-side full-bridge synchronous rectification and modulation unit within one power supply cycle is shown. The curves in the first coordinate system at the top illustrate the phase relationship between the carrier and the modulation signal. The modulation envelope trajectory of the duty cycle reference value before the triggering moment is under the desired steady-state control as the power frequency changes; The phase shift control quantity (power adjustment degree of freedom) between the primary and secondary sides is represented by the overall translation of the secondary side carrier and gate sequence; in the first coordinate system The high-frequency triangular carrier wave used by the secondary side to generate switching pulses has a time reference that is either delayed or advanced relative to the primary side (or the system's unified clock). ; To and The second carrier wave has the same frequency and amplitude, but is additionally out of phase by π (half a carrier cycle). The second and third coordinate systems respectively show the step curves of the conduction signal changes of the four power switching devices on the secondary side within one cycle. Q7, Q9, Q8, and Q10 constitute a differential switching function. The fourth coordinate system represents the secondary-side modulation voltage. The magnitude of the change is determined by multiplying the DC bus voltage Vsec(t) by the differential switching function. The control coefficients related to the Fourier expansion of the sinusoidal PWM control formed by the gate switch. This determines that it exhibits bipolar pulse characteristics at high-frequency scales. Figure 10 It is clear that this invention does not involve the DC bus V. sec (t) is not directly used for load power supply, but is instead remodulated into a controlled high-frequency AC quantity on the secondary side through a synchronous full-bridge circuit. Furthermore, this modulation process is uniformly characterized by PWM spectrum coefficients. The modulation coefficients are simultaneously affected by the frequency ratio mf, the sampling phase β, and the harmonic weights H. n (d) and sampling number q n The combined influence of these factors led to It exhibits a designable sideband distribution in the frequency domain. This mechanism allows for a clear energy bias on the high-frequency side with small adjustments to the duty cycle, laying the foundation for controlling the equivalent voltage difference across the series inductor Ls. This achieves bus transient shaping through a spectrum-controllable method.

[0081] DC bus voltage On the secondary side of the control circuit provided according to embodiments of the present disclosure, a full-bridge auxiliary circuit composed of secondary-side power switching devices Q7, Q8, Q9, and Q10 is used. As a control coefficient, it is modulated into alternating current to obtain a high-frequency alternating voltage on the secondary side. ;

[0082] Exchange Source A clamping capacitance C is formed at the power frequency scale through the bridge arm and the diode path. aux Its voltage The voltage is synthesized into a primary-side differential excitation voltage by switches Q1, Q2, Q3, Q4, Q5, and Q6. Primary differential excitation voltage Through series inductor The voltage difference between the isolation transformer and the secondary side of the control circuit is synthesized by the transformation ratio n of the isolation transformer. The signal energy input to the AC source is determined to be injected into the bus ( ) or is fed back by the bus ( ),because:

[0083] ; therefore, by measuring , post-integration can be obtained transient trajectory.

[0084] is the instantaneous current injected into the DC bus after rectification on the secondary side, and the low-resistance shunt resistance is connected in series with the loop of the bus DC capacitor to which the rectified output is output to the bus output terminal, and differential amplification sampling is performed, with the bandwidth covering the target transient to directly obtain the waveform; when the current value output by the bus output terminal is large or bidirectional measurement is required and electrical isolation is provided, open-loop or closed-loop Hall current sensors can also be arranged on the positive electrode of the bus or the return branch to measure ; in some embodiments, on the circuit where the secondary side synchronous rectification and modulation unit is located, the secondary side AC current is collected by a current transformer or a Rogowski coil, and the switching cycle average value of or can also be obtained by combining the known transformation ratio and rectification gating timing conversion; is the instantaneous current taken away by the DC bus from the load, which can be measured by connecting a shunt resistance or a Hall sensor in series on the load circuit of the plasma cutting (i.e., the circuit from the bus to the load) . Figure 11 The control effect is given. The first coordinate system shows the waveforms of the input voltage and the input current , which are highly in-phase throughout the cycle, the power factor PF is close to 1, and the input current has no obvious low-frequency ripple. The second coordinate system simultaneously gives the phase shift relationship between the primary side differential excitation voltage and the secondary side modulation voltage , which has a phase shift of , and alternately forms positive and negative voltage differences on the high-frequency scale. The lower curve gives the rectified current and the DC load current , wherein the high-frequency pulsation of is smoothed by the bus capacitor , and only in V sec (t) is embodied as a controlled slow change. Figure 11 It is intuitively shown that the present application controls the relative relationship between and , so that the series inductance Ls presents a segmented linear current change within a switching cycle, and its average value directly determines the charging and discharging trend of the bus capacitor. The experimental curve shows that within the point arc window, decreases relative to , corresponding to the controllable recess of ; in the early stage of stable arc establishment, exceeds V sec (t) A limited rise occurs. Throughout the process, the input side maintains a high power factor and low harmonic characteristics, indicating that the bus transient shaping does not cause the energy input from the AC source to be dissipated, thus reducing the quality factor. This method of achieving bus transient control and shaping through energy redistribution via series inductors achieves a dynamic balance between suppressing point arc impacts and rapidly establishing a stable arc.

[0085] The result obtained through step 402 It can be represented as The product of this and a set of modulation coefficients is superimposed, where the modulation coefficients determine the... The harmonic envelope and sideband distribution. To ensure that the control input for subsequent bus transient shaping falls onto specific adjustable parameters, the modulation coefficient also needs to be expanded into a calculable PWM spectrum coefficient. The correspondence between these coefficients and the frequency ratio, sampling phase, sampling sequence number, and pulse width weight is clearly defined. Therefore, in step 403, the PWM spectrum coefficients are defined. :

[0086] ;

[0087] Due to the half-wave symmetry and odd symmetry of the PWM waveform, the even-order harmonic coefficients are zero. Therefore, the summation can be equivalently represented as n=1,3,5,…; where, For frequency ratio, , This determines the carrier frequency position and spacing of the spectral lines; q is the sampling sequence number, that is, the phase position of the q-th sampling window. β represents the sampling phase (relative time within one fundamental period) corresponding to the q-th sampling window, which determines the phase offset of each sampling window on the carrier, thus affecting the phase and amplitude weights of each sideband; n represents the odd harmonic index. Q represents the total number of sampling windows; The Fourier coefficients of the nth-order rectangular pulse (determined only by the duty cycle d(t)) , The amplitude envelope of the nth carrier harmonic is given.

[0088] like Figure 12 As shown, the horizontal axis represents the oscilloscope's main scale division DIV, denoted as... The actual time corresponding to each cell is... (Determined by your current time base settings), therefore the overall view window The time at any position is If the base time is 0.6ms / DIV, then The main window is Approximately equal to power frequency =0.3 cycles of 50Hz ( =20ms); if the time base is different, the above formula still holds. The vertical axis represents the time base under different parameters ( , q, β and Secondary side full-bridge output voltage under regulation The waveform of the value change is displayed with vertical offset in the four channels for easier observation. The amplitude reference is... (In this embodiment) Under this coordinate definition, each of the four channels changes only one modulation parameter, while the rest remain the same (unless otherwise specified, this is the default). =12kHz, and then = =240, β=0, q=0, duty cycle adjustment in each switching cycle =0). Figure 12 The blue channel is for adjustment only. under parameter conditions The value changes, specifically the number of high-frequency pulses within any given cell. Follow Proportional change, when When adjusted to 9kHz, by Figure 12 It can be seen that within the same 6ms window, compared to adjusting only other parameters, the carrier pulsation is sparser, the fundamental peak is more pronounced upward, and the valley is more concave. This is because... Determine the carrier frequency position and sideband spacing to reduce Equivalent to a series inductor The number of pulse fluctuations is reduced, and the filtering is insufficient, resulting in a more rounded peak and a steeper zero crossing near the peaks and valleys. For Figure 12 The pink curve corresponds to adjusting only the β parameter. In this example, β is set to π / 5 ≈ 36°. It can be seen that when only the β parameter is adjusted... The value exhibits a stepped or plateau waveform within a certain phase. The timing of this waveform's appearance corresponds to a general shift in the fundamental phase, with sudden rises or falls at certain points. This is because parameter β represents the sampling phase within the fundamental period; changing it rearranges the sideband phases and relative weights. For the pink curve, only the q parameter is adjusted, assuming the sampling window phase is offset by 0.35 / ... At this time, each sampling window is offset by approximately 29 μs relative to the original sampling window. This results in sharper, brief rises or sudden drops at several fixed phases, but the overall waveform phase remains unchanged. This is because q controls the position of the sampling window within the carrier, altering the relative amplitudes of adjacent paired sidebands at the carrier frequency. For the green curve, only adjustment... Parameter, when only d is adjusted bias =0.10, indicating that the peak is flattened and the valley is deepened, showing an asymmetry in the residence time of the positive and negative half-cycles. This is The direct modulation results of the amplitude envelopes of each harmonic result in a redistribution of energy weights for different n values, thereby altering... The intensity of energy exchange with the busbar.

[0089] Therefore, it can be seen that the secondary-side modulation voltage The spectral structure is composed of Its carrier frequency position and sideband spacing are determined by the sampling phase. With sampling number The relative weights of each sideband are determined by... The amplitude envelopes for different harmonic orders are given. Therefore, the phase shift or duty cycle offset is... Minor adjustments can effectively change The contribution intensity to the energy exchange of the busbar provides a key modulation parameter that can be directly adjusted for shaping the concavity of the arc window and the lifting of the stable arc initiation window.

[0090] Complete secondary voltage After modulation modeling, the AC source voltage provided by the bus is further enveloped by the clamping capacitor to obtain the primary side differential excitation voltage. , The equivalent output of the secondary side is obtained after transformation by an isolation transformer. Primary differential excitation voltage With secondary side regulating voltage Energy exchange between them is achieved through series inductors. This is reflected in the changes in the current slope and current trajectory. Therefore, the next step is to base it on... Segmented values ​​within a switching cycle, establishing The piecewise linear evolution model. Figure 13 A method 500 is shown for establishing a piecewise linear model of the current slope of a series inductor and determining the current trajectory from critical boundary moments.

[0091] In step 501, the current slope during one switching cycle is... Follow Compared with transformer turns ratio DC voltage after The value changes according to the difference between them, corresponding to the piecewise expression in the formula:

[0092] ;

[0093] In a switching cycle Internally, the combination of the secondary-side full bridge and the primary-side bridge arm undergoes multiple effective voltage polarity switching, making... It remains constant over several time periods. To describe this piecewise constant voltage, the moment of each switching commutation or equivalent voltage reversal is usually recorded as the interval boundary point, i.e. is the starting time of the switching period; , , , and are the first, second, third, fourth and fifth boundary time respectively caused by the subsequent commutation of the series inductor ; between any two adjacent boundaries and (k=0,1,2,3,4), the voltage across the series inductor is considered as a constant, thus the series inductor current varies linearly with a fixed slope in the interval.

[0094] In step 502, only the first half of the switching period is analyzed, and the series inductor current at is respectively:

[0095] ;

[0096] ; where is the phase shift angle, is the switching period. Because the inductor current trajectory in a switching period is approximately a broken line, the whole curve can be determined by knowing the current values at several key inflection points. Usually the first half of the switching period covers the key process of the current from the starting point to the peak or valley value, and can determine the main shape of the broken line. The inductor current in the second half of the switching period is usually mirror or sign symmetric to the first half. That is, , and corresponding current values can be directly derived by symmetry from the results of , , without having to write a new set of expressions; when calculating the average rectified current, the integral interval is often divided into two main intervals, for example, from 0 to and from to . At this time, only the current values at the interval endpoints are needed to simplify the integral to the calculation of the trapezoidal area, so that the analytical expression is obtained without having to calculate cumulatively.

[0097] When the current trajectory of the series inductor s in a period T is determined, the secondary side synchronous rectification is equivalent to integrating the series inductor current The positive and negative polarities are selected and injected into the DC bus. Thus, the average current on the rectifier side can be obtained by integrating the inductor current over half a switching cycle, thereby obtaining the corresponding instantaneous power transfer expression. This provides a quantifiable power adjustment basis for peak clipping or gain adjustment during the initial stage of arc stabilization.

[0098] In some embodiments, step 303 of method 300 can further calculate the average current on the rectifier side based on the series inductor current trajectory obtained in method 500. :

[0099] ;

[0100] The average current on the rectifier side is calculated using this formula. Only for 0 to Integrating over half a period and extending to the entire period using symmetry coefficients, thus extending the second half period using symmetry coefficients... , and The rectified current at each moment is known, therefore, as long as the key point current of the first half of the cycle is known, it is sufficient to obtain the average value and power expression for the whole cycle.

[0101] Further obtain the instantaneous power on the DC side :

[0102] ;

[0103] Rectified current flowing into the bus By primary differential excitation With secondary side modulation voltage ( For coefficient formula The synthetic difference was obtained by The values ​​are obtained through conversion using transformers and synchronous rectification, and are related to V. sec The specific power source of (t) is irrelevant.

[0104] like Figure 14 As shown, Figure 14 (a) is for one switching cycle Inside ~ The series inductor belonging to the isolated power channel at any given time Current slope The changes are due to the multiple commutations occurring between the primary side bridge arm and the secondary side full bridge in different sub-sections, affecting the series inductor. The equivalent voltage across the two ends varies in segments, causing the inductor current slope to change. exist ~ To keep approximately constant in each time interval separated by the demarcation, and transition occurs at commutation time. Influenced by the non-ideal characteristics of the device, parasitic parameters and modulation timing jitter, the current slope With the superposition of a certain amplitude of high-frequency ripple and transition oscillation in the platform interval, the inductance current trajectory is consistent with the theoretical derivation of the piecewise linear model. Figure 14 (b) shows that the series inductance current obtained by integrating the current slope presents an approximately broken line shape in one cycle, and the key inflection point position and current amplitude are mainly determined by the phase shift angle and modulation parameters, which verifies the modeling idea that the complete current trajectory can be described by only a few characteristic moments. On this basis, Figure 14 (c) further shows that the equivalent injected current formed by the polarity gating of the secondary side synchronous rectification presents positive and negative alternating distribution in the cycle, and its cycle average value can stably reflect the instantaneous energy transmission level, thereby providing quantifiable and calculable basis for power peak clipping control in the point arc stage and energy gain regulation in the stable arc starting stage.

[0105] After completing the energy exchange modeling of the primary side and the secondary side, the DC voltage provided by the bus needs to be transiently regulated in different working stages of the point arc stage and the stable arc cutting. Therefore, it is necessary to establish a real-time correlation between the bus voltage, series inductance current and modulation parameters, and to build a transient shaping control process that can take effect in a short time scale, and then form an orderly regulation of the bus voltage depression and lifting. However, the transient change of the bus voltage does not occur continuously, but is concentrated in the point arc starting time and the conversion time from the point arc completion to the stable DC voltage cutting. Therefore, it is necessary to define the trigger condition of the transient shaping control first, in order to distinguish the different running stages such as point arc, stable arc establishment and normal cutting, so as to avoid unnecessary modulation disturbance at non-critical moments. Figure 15 The method 600 for driving the primary side and the secondary side according to the reference trajectory and adjusting the equivalent voltage difference between the two to realize the bus depression compensation and lifting peak clipping is shown.

[0106] In step 601, a certain time length of extension time point and delay time point is set before and after the specific point arc trigger time, and then a time window is formed. The window can be symmetrical or asymmetrical, and the time length is determined by the device rating, load model or process parameters. The bus voltage target profile is given in the window, which is used to distinguish the real-time target values after transient voltage depression compensation and transient voltage lifting peak clipping. The target profile can adopt piecewise linear or smooth window function form, and the amplitude upper limit and minimum holding time are set to avoid excessive regulation.

[0107] In step 602, the required energy within the target profile estimation window and the power adjustment amount allocated to each switching cycle are calculated, and a small correction amount for the duty cycle is obtained by combining the sensitivity relationship between power and modulation. The correction amount can limit the maximum rate of change and the absolute amplitude to meet the constraints of voltage, device current and temperature rise. When duty cycle adjustment alone is insufficient, small phase shift or carrier frequency fine-tuning can be selected, with single-parameter priority and dual-parameter linkage as a supplement in principle.

[0108] In step 603, the aforementioned correction amount is injected into the modulation stage, synchronously updating the PWM-related parameters and aligning them with the point arc trigger signal, so that the secondary side output tracks the target contour; after the window ends, it smoothly exits according to a preset threshold or timing strategy, restoring to the steady-state formula. This step can be implemented in the controller, or integrated into the PWM control chip, gate drive module, pure analog small loop, CPLD or FPGA, PLC high-speed pulse module or PLC high-speed counting module, or a hybrid implementation of front-end analog window function and back-end digital coefficient update. The controller can be a general-purpose processor, programmable logic controller (PLC), digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware component or any suitable combination thereof for performing the functions of this disclosure. To adapt to different power levels and topologies, the coordinated adjustment is applicable to full-bridge, half-bridge, and interleaved bridges, and can also be deployed in single-stage or multi-stage isolated power channels; no specific device or chip model is limited.

[0109] Figure 16 A flowchart of a method 700 for setting a symmetrical or asymmetrical time window associated with a point arc trigger according to an embodiment of the present disclosure and providing a target profile of a bus voltage constrained by amplitude and duration is shown.

[0110] In step 701, the trigger signals of the high-frequency arc-starting unit, which provides the high-frequency AC power required for the arc-starting process in plasma cutting, and / or the control unit, which provides the low-voltage DC voltage required for the stable arc in plasma cutting after successful arc-starting, are monitored, and the trigger time is defined as... .

[0111] exist Set a symmetrical or asymmetrical window for the front and back: ;

[0112] in , The time constant is either preset or adaptively calculated by the load model. The duration of the window before the trigger time. The duration of the window after the trigger time can be set by adjusting the window duration. and Controlled within The busbar is pre-shaped within the time window, thus providing boundary conditions for transient busbar shaping during transient voltage dips or rises at the triggering moment; and controlling within... After peak reduction or compensation is performed on the transient shaping of the bus within the time window, the transient voltage of the bus quickly enters a stable change. and satisfy:

[0113] ; The total duration of the window for transient shaping control of the busbar. This is the maximum allowable duration of regulation.

[0114] In step 702, in the window Internally defined bus voltage reference trajectory:

[0115] To reduce the instantaneous energy input and downward spike caused by overvoltage at the moment of arc triggering, the target bus voltage needs to be actively reduced within the arc shaping window. This requires compensating the reference bus voltage under compensation constraints to obtain the compensated corrected bus voltage. :

[0116] ; For transient voltage sag compensation amplitude, =35V~45V; This is the transient voltage dip compensation window function. , , For the initial moment of depression compensation, Duration of the recess compensation window; The reference bus voltage is the voltage under normal operating conditions; the compensation conditions are: , For the maximum compensation amplitude, It is 60V; To compensate for the amplitude control coefficient, .

[0117] When the arc ignition is successful, and the high-frequency arc ignition voltage applied for arc ignition only provides the voltage required for stable arc cutting, in order to overcome the transient voltage rise that occurs at this time, it is necessary to clip the peak of the reference bus voltage under the peak clipping constraint, thereby obtaining the peak-clipping corrected bus voltage. :

[0118] ; To reduce the amplitude of transient voltage rise, This is the transient voltage rise reduction factor. , , This represents the initial moment of peak shaving. The peak-shaving window duration; the peak-shaving constraints are: , For the maximum peak reduction amplitude, 40V; To compensate for the amplitude control coefficient, .Right now and This provides a reference trajectory for the bus voltage under different requirements.

[0119] Once the transient shaping control conditions are triggered at the start of the arc or the transition from the start of the arc to the stable arc cutting point, the control objective is no longer to maintain the static stability of the bus voltage, but to allow it to deviate controllably within a limited amplitude and time. Therefore, it is necessary to determine the corresponding modulation direction and modulation intensity based on the current operating stage, so that the bus voltage evolves according to the expected dip or rise trajectory. Figure 17 A flowchart of a method 800 for calculating the required energy and periodic power adjustment amount according to an embodiment of the present disclosure and obtaining the duty cycle correction amount from the power and modulation relationship is shown.

[0120] In step 801, based on the DC capacitor at the DC output terminal of the bus... and bus voltage reference trajectory relative to reference bus voltage Given a specific target voltage offset, estimate the energy that needs to be released or absorbed within the arc window:

[0121] ;; To correct the bus voltage, the value is taken as... or ;

[0122] In step 802, in some embodiments, the instantaneous DC-side power calculated based on method 500 according to step 303 of method 300 is used. The power adjustment is evenly distributed across several switching cycles (a total of K switching cycles). The required power adjustment for the kth cycle is calculated as follows:

[0123] ; ;

[0124] In step 803, the power adjustment required for the k-th cycle is further linearized relative to the duty cycle d:

[0125] ;

[0126] The required duty cycle correction amount in the k-th switching cycle : ;

[0127] in This is the duty cycle baseline value before the triggering time under the desired steady-state control. , This is the amplitude coefficient of the duty cycle envelope.

[0128] After the modulation is applied to the power switching devices Q7, Q8, Q9, and Q10 in a full-bridge configuration on the secondary side, the change in modulation is not directly reflected in the bus voltage, but is first reflected through the series inductor. The current response transitions, which is received by the series inductor. Current at different times and the average current on the rectifier side The effect of this, in turn, leads to the capacitance on the secondary side. The amount of energy received or released varies, ultimately affecting the DC bus output voltage. In some embodiments, the method 900 of injecting a correction amount of the duty cycle and synchronously updating the PWM parameters and the trigger signal includes the following steps 901-903.

[0129] In step 901, in the controller, Superimposed on the original modulation signal to achieve... Online fixes:

[0130] ; ;

[0131] The corrected Fourier coefficients of the nth order rectangular pulse during the kth switching cycle; To adjust the duty cycle in the kth switching cycle The actual duty cycle is obtained by discretizing the values ​​and superimposing transient corrections. This refers to the sampling or update time of the k-th switching cycle. To update the reference value at the k-th switching cycle update time The sampled values ​​of the formed trajectory.

[0132] In step 902, the PWM spectrum coefficients defined in method 400 are automatically adjusted by updating the Fourier coefficients of the nth-order rectangular pulse during the kth switching cycle. This changes the secondary voltage. and primary side current This causes the bus output voltage to follow the path of... Trajectory changes.

[0133] In step 903, while the corresponding voltage control unit outputs the high-frequency AC voltage required for arc ignition or the DC voltage required for stable cutting, a trigger signal is sent to the bus micro-closed loop to perform the above-mentioned... The calculation process aligns the start time of compensation for transient voltage dips on the bus and / or the start time of peak clipping for transient voltage rises with the trigger time. Through the above updates and iterations, the bus output voltage is continuously adjusted, gradually returning to the desired operating range. To avoid the cumulative impact of transient modulation on subsequent arc cutting, convergence and exit control of the transient response process is required, so that the bus voltage smoothly transitions to steady-state control mode after completing the dip or rise.

[0134] In some embodiments, the duty cycle correction is limited within the allowable range of the peak bus voltage and the peak switching current in each arc cycle to avoid overvoltage spikes and device overstress. Specifically, this includes the following steps:

[0135] During each plasma cutting cycle, the controller opens the monitoring window during the arc ignition stage and the arc stabilization stage to sample and identify the transient dips and rises of the DC bus voltage. At the same time, it observes the current impact characteristics related to device stress as the basis for the status assessment of this cycle.

[0136] The controller compares the depressions and rises identified in the current cycle with the allowable ranges. If a depression is too deep or lasts too long, an undervoltage transient risk is identified during the arc-pointing phase; if a rise is too high or there is a significant overshoot peak, an overvoltage transient risk is identified during the arc-stabilizing transition phase. Adaptive correction is triggered immediately upon the occurrence of either risk.

[0137] After the correction is triggered, the controller adjusts the control actions corresponding to steps 1 to 3 according to the stage in which the anomaly occurred, so that the bus transient in subsequent cycles returns to the target range. The point arc stage focuses on suppressing the dip and making the energy exchange smoother; the arc stabilization switching stage focuses on suppressing the surge and limiting the instantaneous energy injection and reducing the spike.

[0138] The controller continuously monitors and corrects itself in subsequent cycles, and maintains the current control strategy after both the depression and rise have stabilized within the allowable range; when changes in operating conditions cause the transient to exceed the limit again, it automatically re-enters the correction process.

[0139] Therefore, by combining the AC input on the primary side with transient identification, judgment, and iterative update control on the secondary side, the DC output of the bus is transformed into a transient control process involving rectification and iterative update control through different switches in the control circuit. This allows the bus voltage to exhibit a dynamic response with limited amplitude and controllable duration within the critical windows of arcing and stabilization. This process does not rely on additional energy storage units but achieves orderly distribution of bus energy through short-term reconstruction of existing modulation parameters, thereby ensuring cutting stability while reducing the risk of voltage spikes and electromagnetic interference. Compared with traditional schemes that rely solely on RC absorption or hardware redundancy margins to suppress arcing spikes, this method synchronizes the transient dips or rises of the bus voltage with the arcing trigger signal, achieving software-adjustable suppression of dips or rises. This significantly reduces the overvoltage stress on the primary power conversion unit and the secondary synchronous rectification and modulation unit, while also reducing EMI.

[0140] From the appendix Figure 18 As shown, before the arc begins, a stable plasma arc column has not yet formed between the two blades of the cutting torch. The area between the two electrodes mainly exhibits a gas gap or a weak ionization state, with its equivalent characteristics approaching an open circuit or a high-impedance load. At the arc initiation moment of t=1.25s, the high-frequency arc triggers and successfully breaks down the gas gap. The local gas is rapidly ionized, and its equivalent resistance drops rapidly, forming a conductive plasma channel. Consequently, the DC equivalent load current demand will rise sharply in a short period of time. The energy of the DC power supply output by the bus for plasma cutting is mainly provided by the capacitor and the front-end power channel, leading to a surge in the bus capacitor. The DC bus voltage drops significantly due to rapid discharge within a short period. Figure 18 It can be seen that within the transient voltage dip adjustment window (the transient voltage dip control stage caused by the start of the arc), the duty cycle modulation amount is adjusted using methods 600, 700, 800, and 900. The negative offset control within each switching cycle makes the start time of this phase... The rapid decline was significantly suppressed. After regulation from 1.25s to 1.5s, the rise was gradually accelerated from 1.5s to 2.25s, with 2.25s marking the end of this regulation phase. From 2.25s to the start of the stable arc cutting phase (3.2s), The value shows a gradually decreasing rate of recovery.

[0141] At the initial moment of arc establishment (approximately t=3.2s), due to the transition of the arc channel from the initial breakdown state to a stable strong conduction state, coupled with the superposition of the cutting current ramp-up and the intervention of workpiece thermal load, the energy demand of the main DC power channel increases significantly in a short period of time, and the equivalent load power rises rapidly. Figure 18As can be seen, after processing by the method according to the embodiments of this disclosure, the transient voltage rise adjustment window (the transient voltage rise control stage caused by the moment when the point arc is completed and converted into a stable arc cutting) is adjusted accordingly. Applying a positive micro-bias allows for a short-term energy injection into the bus side via a series energy path without introducing an additional power supply path, thereby enabling... A controlled, small rise occurs. This rise has clear start and end boundaries, its peak amplitude is limited, and it naturally falls back to near the rated voltage after the control window ends. Further analysis of the modulation trajectory shown on the right axis reveals that, from a timing perspective, the bus voltage... The transient response varies with the modulation amount The bus voltage changes with the change, and the change in bus voltage is relative to the change in bus voltage. An observable dynamic delay exists, consistent with the response time of the series inductor, capacitor energy storage, and converter in a real power stage. These results demonstrate that the method according to embodiments of this disclosure achieves effective control of the bus DC output through minute adjustments to the modulation parameters, limiting both the voltage dip during the arcing phase and the voltage rise during the stabilization phase to a controllable range. Compared to traditional methods relying on large-capacity energy storage or passive absorption networks, the method according to embodiments of this disclosure does not require the introduction of an additional independent power branch; bus transient shaping can be achieved solely through existing isolated power channels and modulation strategies.

[0142] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Other embodiments may also be used. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for transient shaping and controlling of plasma cutting busbars, characterized in that, The method is used to perform transient dip compensation and transient rise peak clipping control on DC bus voltage during the arc-pointing and arc-stabilizing phases, so as to form a bus voltage change with limited amplitude and controllable duration. The method includes: Before the arc is triggered, the timing boundaries of the arc window and the stable arc window are established based on the sampling signals of the AC input terminal and the DC bus terminal, and the corresponding bus voltage reference state and control target type are determined. Within the arc window, a trough compensation reference trajectory is generated based on the transient trough characteristics of the bus voltage, and within the stable arc window, a rise peak reduction reference trajectory is generated based on the transient rise characteristics of the bus voltage, so that the amplitude and duration of the two types of reference trajectories meet the preset constraints. Based on the reference trajectory, the primary power conversion unit and the secondary synchronous rectification and modulation unit are coordinated and controlled to adjust the equivalent voltage difference between the primary differential excitation voltage and the secondary modulation voltage to change the trend of the series inductor current. In this way, the transient sag compensation or transient boosting peak reduction of the DC bus voltage is achieved through the difference between the rectified current and the load current.

2. The method according to claim 1, characterized in that, The steps for determining the timing boundaries of the arc-starting window and the arc-stabilizing window based on sampling at the AC and DC bus terminals before arc-starting, and simultaneously determining the bus voltage reference state and control target, include: A switching function with polarity varying over time is established for the switching devices of the primary side staggered bridge arm and characterized by a Fourier series containing only odd harmonics, in order to form an analytical relationship for the output of the primary side power supply switch. Based on the following relationship between the AC input voltage and the voltage across the clamping capacitor, the power frequency envelope of the clamping capacitor voltage as the absolute value of the supply voltage is determined, and its even-order harmonic expansion is obtained, which is used as the reference for the low-frequency modulation envelope; and The switching function is multiplied by the power frequency envelope to obtain the primary differential excitation voltage, and its spectrum is expanded to establish the spectrum structure composed of the power supply fundamental wave and its odd harmonics and the sidebands around the switching angular frequency. Based on this, the timing boundaries of the point arc window and the stable arc window, as well as the corresponding bus voltage reference state and control target type, are determined.

3. The method according to claim 1, characterized in that, The steps for forming a reference trajectory within the point arc window and the stable arc window include: The secondary-side differential switching function is constructed based on the gate signal of the secondary-side full-bridge diagonal switch, and the DC bus voltage is mapped to the secondary-side modulation voltage by combining sinusoidal PWM and the adjustable PWM spectrum coefficients are determined. A piecewise linear model of the slope of the series inductor current is established based on the difference between the primary differential excitation voltage and the secondary modulation voltage, and the current trajectory is determined at the critical boundary moments. The average current on the rectifier side and the instantaneous power on the DC side are calculated based on the current trajectory to quantify the injection or feedback of bus energy for sag compensation and peak lifting control.

4. The method according to claim 3, characterized in that, The steps of mapping the secondary-side differential switching function to sinusoidal PWM and parameterizing the spectrum further include: The gate signal of the diagonal switch of the full-bridge on the secondary side is abstracted into a differential switching function to uniformly represent the output polarity of the secondary side and provide input for modulation modeling; Sinusoidal PWM is used to map the DC bus voltage to the secondary side modulation voltage, which is used to obtain the tunable wave envelope related to the carrier frequency and sideband and to establish the correspondence between voltage and modulation amount. A parameterized description of the PWM spectrum coefficients is given, with frequency ratio, sampling phase, sampling sequence number and pulse width weight as adjustable parameters, thereby quantifying the influence of duty cycle on harmonic amplitude and phase and energy distribution.

5. The method according to claim 3, characterized in that, The steps for establishing a piecewise linear model of the slope of the series inductor current based on the difference between the primary differential excitation voltage and the secondary modulation voltage, and determining the current trajectory at critical boundary moments, include: Driven by the difference between the primary differential excitation voltage and the secondary modulation voltage, the equivalent voltage across the inductor is considered constant by dividing the sub-intervals according to the commutation boundary, so as to obtain a piecewise current model with a fixed slope to describe the slope transition caused by commutation. The inductor current at the critical moment in the first half of the cycle is selected as the inflection point, and the complete current trajectory is determined by combining the periodic symmetry. Then, the average rectified current and power are obtained analytically.

6. The method according to claim 1, characterized in that, The steps for coordinating the primary and secondary sides based on the reference trajectory and adjusting the equivalent voltage difference between them to achieve bus dip compensation and peak reduction include: Set a symmetrical or asymmetrical time window for the arc triggering association and give the target profile of the bus voltage constrained by amplitude and duration to distinguish between transient voltage trough and transient voltage rise stages; The required energy and periodic power adjustment are calculated based on the target profile, and the duty cycle correction is obtained from the power and modulation relationship, which is used to form an executable modulation plan. The duty cycle correction is injected and the PWM parameters and trigger signal are updated synchronously so that the secondary output tracks the target contour and smoothly exits to steady-state control at the end of the window.

7. The method according to claim 6, characterized in that, The steps of setting the symmetrical or asymmetrical time window associated with the arc trigger and providing the target profile of the bus voltage constrained by amplitude and duration include: Monitor the point arc trigger signal, determine the point arc moment, and set symmetrical or asymmetrical transient shaping windows before and after it. Give the total duration of the window and the duration constraints before and after it as the temporal boundary of the target set. Within the window, a bus voltage reference trajectory is generated, which includes two types of smooth window function trajectories: dip compensation and peak lifting. The amplitude and duration are limited, and the duty cycle is used to solve and distribute the adjustment target quantity.

8. The method according to claim 6, characterized in that, The steps for calculating the required energy and periodic power adjustment based on the target profile, and then obtaining the duty cycle correction from the power-modulation relationship, include: Estimate the bus energy that needs to be released or absorbed within the arc point or arc stabilization window based on the DC capacitor at the DC output terminal and the target voltage deviation. The energy is discretely distributed according to the switching cycle to obtain the power adjustment amount for each cycle; The duty cycle correction is determined based on the sensitivity relationship between power and modulation amount, and an executable modulation plan is formed.

9. The method according to claim 6, characterized in that, Injecting the duty cycle correction amount and synchronously updating the PWM parameters and trigger signal includes: The duty cycle correction is superimposed on the reference modulation to update the spectral coefficients online and generate an executable modulation sequence; Based on the updated modulation parameters, the secondary side output and primary side current response are made to track the reference trajectory to achieve the target bus change; Synchronize the modulation update with the point arc trigger signal and perform convergence and exit at the end of the window to smoothly recover to steady-state operation.

10. A transient shaping and control circuit for plasma-cut busbars, characterized in that, The circuit performs the method as described in any one of claims 1-9, the circuit comprising: The AC input terminal is used to connect to an AC power supply and obtain real-time AC voltage. Two input inductors, including a first input inductor and a second input inductor; the two input inductors are configured to shape the input current waveform, limit the rate of change of commutation current, provide natural commutation current paths for the corresponding bridge arms in the positive and negative half-cycles of the power grid, and improve soft switching conditions together with the clamping branch; A primary-side power conversion unit includes at least one set of interleaved power switching devices for synthesizing the voltage at the AC input terminal into a primary-side differential excitation voltage under the action of a control signal, and forming a pair of primary-side differential nodes at its output terminal. A clamping branch is connected in parallel between the primary side differential nodes. The clamping branch includes a clamping capacitor and a unidirectional conducting device, which are used to maintain the stability of the primary side midpoint potential and absorb the transient energy of the commutation during the switching commutation process. An isolated power channel includes a series inductor and an isolation transformer. One end of the series inductor is electrically connected to the primary differential node, and the other end is coupled to the secondary side via the isolation transformer. This channel is used to establish a controllable energy differential channel between the primary differential excitation voltage and the secondary modulation voltage. The secondary-side synchronous rectification and modulation unit includes a set of full-bridge configured power switching devices. Under pulse width modulation control, the power switching devices modulate the DC bus voltage into a secondary-side modulation voltage and selectively conduct according to their polarity to form a rectified current. A DC bus branch includes a DC capacitor at the DC output terminal of the bus, the DC capacitor being used to absorb the secondary side rectified current and form a DC bus voltage; The equivalent voltage difference between the primary differential excitation voltage and the secondary modulation voltage formed through the isolated power channel determines the current change trend in the series inductor. In turn, the difference between the rectified current and the load current is used to regulate the transient change process of the DC bus voltage.

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