Matrix assembly method and device for device simulation and electronic equipment

By combining adjacency coloring and preset mapping relationships, the problem of underutilization of computing resources in existing technologies is solved, achieving efficient matrix assembly for device simulation and improving the efficiency and accuracy of large-scale device simulation.

CN121835564APending Publication Date: 2026-04-10HARBIN INST OF TECH
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-31
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing matrix assembly methods rely on fixed computational logic, which leads to underutilization of computational resources, long processing times, and reduced efficiency.

Method used

By coloring based on adjacency relationships, the cells of the device model grid are divided into logical regions of the same color, and the feature quantity set is mapped based on a preset mapping relationship to achieve parallel computing, breaking the traditional serial limitation and making full use of multi-threaded computing power.

Benefits of technology

It improves matrix assembly efficiency, especially in large-scale device simulation, while ensuring parallel safety and data accuracy without affecting the reliability of simulation results.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121835564A_ABST
    Figure CN121835564A_ABST
Patent Text Reader

Abstract

The invention provides a matrix assembly method and device for device simulation and electronic equipment, and relates to the technical field of device simulation, and the matrix assembly method for device simulation comprises the steps: carrying out the coloring according to the adjacency relation of each cell in an obtained device model grid, and obtaining a colored cell; and based on a preset mapping relationship, mapping the characteristic quantity set of the device model grid to the to-be-assembled matrix according to the color number sequence of all the coloring cells. According to the invention, the matrix assembly efficiency in the device simulation process can be improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of device simulation technology, and more specifically, to a matrix assembly method, apparatus, and electronic device for device simulation. Background Technology

[0002] In the rapid development of the semiconductor industry, simulation software has become a key supporting tool for shortening device process design and R&D cycles and reducing production costs. It is widely used in the performance prediction and optimization of various semiconductor devices such as MOSFETs and VDMOS. The finite element method (FEM), as the mainstream core technology for solving semiconductor partial differential equations, occupies an important position in EDA tools. For example, the triangular cells commonly used in finite element methods, with their strong geometric adaptability and high discretization accuracy, are widely used to fit the complex three-dimensional structure of semiconductor devices. By dividing the entire device domain into a large number of triangular cells, continuous physical field problems can be transformed into discrete numerical calculation problems. Matrix assembly is a core step in this process. It requires calculating the local characteristic components for each triangular cell and mapping them in an orderly manner to the matrix to be assembled, completing the construction and filling of the matrix from local element information, providing a foundation for solving subsequent partial differential equations.

[0003] However, existing matrix assembly methods often rely on fixed computational logic for mapping operations, which results in underutilization of computational resources, long assembly times, and reduced efficiency. Summary of the Invention

[0004] The problem addressed by this invention is how to improve the matrix assembly efficiency of device simulation.

[0005] To address the above problems, this invention provides a matrix assembly method, apparatus, and electronic device for device simulation.

[0006] In a first aspect, the present invention provides a matrix assembly method for device simulation, comprising: Color the cells by applying the adjacency relationships of each cell in the obtained device model mesh; Based on a preset mapping relationship, the feature set of the device model mesh is mapped to the matrix to be assembled according to the color number order of all the colored cells.

[0007] Optionally, the step of coloring each cell in the obtained device model mesh according to its adjacency relationship to obtain the colored cell includes: Step 1: Based on a preset color code sequence, color the target cell according to a preset coloring rule to obtain the colored cell, wherein the target cell is any cell in the device model grid; Step 2: Update the saturation of the adjacent cells of the colored cell according to the adjacency relationship; Step 3: Traverse all uncolored cells, select the cell with the highest saturation, color it according to the preset coloring rules, and update the saturation of the corresponding adjacent cells; Step 4: Repeat step 3 until all cells are colored.

[0008] Optionally, the step of coloring the target cell according to a preset coloring rule to obtain the colored cell includes: Obtain the color code used by the adjacent cells of the target cell, wherein the adjacent cells are determined by the adjacency relationship; Based on the comparison results between the color number sequence and the used color number, determine the smallest unused color number; The target cell is colored with the color corresponding to the smallest color number to obtain the colored cell.

[0009] Optionally, updating the saturation of the adjacent cells of the colored cell according to the adjacency relationship includes: Get the current saturation of the adjacent cells, wherein the initial saturation of the cells is 0; The updated saturation is obtained by adding the current saturation to the preset update base.

[0010] Optionally, the feature set includes local feature components of each of the mesh cells; mapping the feature set of the device model mesh to the assembly matrix according to the color number order of all the colored cells includes: Generate a cell sequence by sorting all the colored cells according to their color numbers; The cell sequence is divided into segments according to a preset number to obtain cell segments; According to the preset mapping relationship, the local feature components corresponding to the cells in each cell segment are mapped to the degree of freedom index positions corresponding to the matrix to be assembled.

[0011] Optionally, mapping the local feature components corresponding to the cells in each cell segment to the degree-of-freedom index positions corresponding to the matrix to be assembled includes: The mapping operation is determined based on the color number in the cell segment and the number of cells according to a preset judgment rule; The mapping operation maps the local feature components corresponding to the cell to the degree-of-freedom index position corresponding to the matrix to be assembled.

[0012] Optionally, the mapping operation includes parallel mapping operations and serial mapping operations; the step of determining the mapping operation based on the color number in the cell segment and the number of cells according to a preset determination rule includes: When all the colored cells in the cell segment have the same color code, and the number of colored cells is the preset number, then the parallel mapping operation is selected. Otherwise, the serial mapping operation is selected.

[0013] Optionally, the method for constructing the preset mapping relationship includes: Obtain the index position of the degree of freedom of the matrix to be assembled; A preset mapping relationship is constructed based on all the degree-of-freedom index positions and all the local feature components corresponding to the cells. The mapping relationship includes a one-to-one correspondence between the degree-of-freedom index positions and the local feature components.

[0014] In a second aspect, the present invention provides a matrix assembly apparatus for device simulation, comprising: The coloring module colors each cell in the obtained device model mesh according to their adjacency relationship, thus obtaining the colored cells. The mapping module, based on a preset mapping relationship, maps the feature set of the device model mesh to the matrix to be assembled according to the color number order of all the colored cells.

[0015] Thirdly, the present invention provides an electronic device, including a memory and a processor; The memory is used to store computer programs; The processor is configured to implement the matrix assembly method for device simulation as described in the first aspect when executing the computer program.

[0016] Fourthly, the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the matrix assembly method for device simulation as described in the first aspect.

[0017] The beneficial effects of the matrix assembly method for device simulation of the present invention are as follows: By coloring according to adjacency relationships, cells without data dependencies can be divided into logical regions of the same color, which avoids data conflicts in parallel computing from the root and provides a basis for using regions of the same color as independent parallel computing units. This breaks the serial limitation of traditional fixed computing logic, fully mobilizes the computing power of multi-threaded computing, and makes efficient use of idle computing resources. The preset mapping relationship realizes the fast and accurate matching of feature quantities and matrix positions to be assembled. Combined with the parallel characteristics of regions of the same color, each thread can synchronously complete the filling of local matrix data in the corresponding region without waiting for the previous unit to finish executing. This greatly reduces the total time spent on data mapping, calculation and synchronization in single-step matrix assembly. Especially in large-scale device simulation with many grids and large matrix size, the efficiency improvement is more significant, effectively breaking through the performance bottleneck of traditional matrix assembly. At the same time, the coloring logic ensures parallel security and the mapping relationship ensures data accuracy, improving efficiency without affecting the reliability of simulation results. Attached Figure Description

[0018] Figure 1 This is a schematic flowchart of a matrix assembly method for device simulation according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a matrix assembly device for device simulation according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0019] To make the above-mentioned objects, features, and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Although some embodiments of the present invention are shown in the drawings, it should be understood that the present invention can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present invention. It should be understood that the accompanying drawings and embodiments of the present invention are for illustrative purposes only and are not intended to limit the scope of protection of the present invention.

[0020] It should be understood that the various steps described in the method embodiments of the present invention may be performed in different orders and / or in parallel. Furthermore, the method embodiments may include additional steps and / or omit the steps shown. The scope of the present invention is not limited in this respect.

[0021] The term "comprising" and its variations as used herein are open-ended, meaning "including but not limited to"; the term "based on" means "at least partially based on"; the term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments"; and the term "optionally" means "optional embodiments". Definitions of other terms will be given in the following description. It should be noted that the concepts of "first," "second," etc., mentioned in this invention are used only to distinguish different devices, modules, or units, and are not intended to limit the order of functions performed by these devices, modules, or units or their interdependencies.

[0022] It should be noted that the terms "a" and "a plurality of" used in this invention are illustrative rather than restrictive. Those skilled in the art should understand that, unless otherwise expressly indicated in the context, they should be understood as "one or more".

[0023] The names of the messages or information exchanged between the multiple devices in the embodiments of the present invention are for illustrative purposes only and are not intended to limit the scope of these messages or information.

[0024] In related technologies, existing solutions for matrix assembly in semiconductor and other device simulations often rely on fixed computational logic. This means that most solutions traverse each cell sequentially according to the coordinate order of the device model mesh, filling matrix elements one by one based on a single feature of the cell. This fixed serial traversal and single-element filling logic completely binds the computational execution path, making it impossible to adjust the execution order or the scope of batch processing based on the actual physical relationship between the current computing resources and the device model mesh. As a result, computing resources such as the multi-core computing units of the CPU and the parallel computing cores of the GPU can only be called at a fixed pace, leaving a large amount of computing resources idle. This significantly increases the overall time consumption of matrix assembly and seriously affects the efficiency of matrix assembly.

[0025] To address the problems existing in the aforementioned related technologies, embodiments of the present invention provide a matrix assembly method, apparatus, and electronic device for device simulation.

[0026] like Figure 1 As shown in the figure, an embodiment of the present invention provides a matrix assembly method for device simulation, comprising: S110, color each cell in the obtained device model grid according to its adjacency relationship to obtain the colored cell.

[0027] Specifically, the device model mesh is the carrier for discretizing the physical structure of a semiconductor device in simulation, used to transform complex three-dimensional device morphology into a set of cells suitable for numerical computation. Taking triangular cells as an example, their advantages of strong geometric adaptability and high discretization accuracy make them widely used for fitting irregular boundaries and internal structures of devices. By dividing the entire device domain into a large number of interconnected triangular cells using finite element method software, continuous physical field problems (such as electric and current fields) can be transformed into discrete numerical solution problems. Each triangular cell, as an independent computational unit, contains clearly defined geometric parameters and physical properties. The number and density of cells in the mesh are adjusted according to the device size and simulation accuracy requirements.

[0028] Furthermore, during the mesh coloring process, the current device model mesh data is first read, and an adjacency list is established for all adjacent cells in the mesh. This clarifies the adjacency relationships between cells and provides a basic basis for subsequent coloring logic. Then, all cells in the mesh are traversed, prioritizing the cell with the highest saturation as the current coloring object. Initially, the saturation of each cell is 0, so any cell can be arbitrarily selected as the target cell. Priority is given to selecting a cell from the grid with the most adjacent cells as the target cell. Once the target cell is selected, the current coloring logic is then applied... The process compares the color code of the adjacent cells to the target cell with a color code sequence to determine the color code to be used. This color code sequence is a pre-defined one-to-one correspondence between colors and color codes. For example, the color code for red is 1, the color code for yellow is 2, the color code for green is 3, the color code for blue is 4, and so on. Then, the smallest unused color code is selected from the remaining unused colors and assigned to the target cell for coloring. For example, if the adjacent cells use color codes 1 and 4, then the unused color codes are 2 and 3. Therefore, yellow, corresponding to color code 2, is selected to color the current target cell, resulting in a yellow cell. It should be noted that initially, all cells are colored, and their color code can be considered 0, i.e., colorless. Simultaneously, the saturation of other cells adjacent to the target cell is updated in a timely manner. This involves adding a preset update base to the original saturation. For example, if the initial saturation is 0, then 1 is added to it, resulting in an updated saturation of 1. This saturation update ensures that adjacent cells do not have color conflicts during subsequent coloring processes. Once all cells in the grid have been colored, all cells with color labels are the final colored cells. These colored cells will be divided into different logical regions according to their respective colors, laying the foundation for using regions of the same color as parallel computing units in the future.

[0029] S120, based on a preset mapping relationship, the feature set of the device model mesh is mapped to the matrix to be assembled according to the color number order of all the colored cells.

[0030] Specifically, when mapping the feature set to the matrix to be assembled based on the preset mapping relationship, the process first relies on the preset rule of the strongly correlated hash table mapping between the finite element and matrix position indexes constructed in the early stage. This mapping has completed the sequential interval processing in combination with the strong correlation of the matrix assembly sequence, providing a foundation for the accurate matching of feature quantities and matrix positions. Subsequently, for all the colored cells obtained by the coloring method, the feature sets of the device model mesh (including core information such as local stiffness matrix related parameters and physical property data of each cell) are sequentially associated with the feature quantities corresponding to different color number regions to the specified positions of the matrix to be assembled through the preset hash table mapping relationship. Among them, the feature quantities corresponding to the same color number cell have no data dependency in their logical regions, and the local matrix data can be filled synchronously during the mapping process, ensuring the efficiency and accuracy of the mapping of the feature set to the matrix to be assembled. At the same time, it meets the logical partitioning requirements of parallel calculation, laying the foundation for the rapid assembly of the global sparse matrix in the future.

[0031] In this embodiment, by coloring based on adjacency relationships, cells without data dependencies can be divided into logical regions of the same color, fundamentally avoiding data conflicts in parallel computing. This provides a foundation for using regions of the same color as independent parallel computing units, breaking the serial limitations of traditional fixed computing logic. It can fully mobilize the computing power of multiple threads and make efficient use of idle computing resources. The preset mapping relationship enables fast and accurate matching of feature quantities and matrix positions to be assembled. Combined with the parallel characteristics of regions of the same color, each thread can synchronously complete the filling of local matrix data in the corresponding region without waiting for the previous unit to finish executing. This significantly reduces the total time spent on data mapping, calculation, and synchronization in single-step matrix assembly. The efficiency improvement is even more significant in large-scale device simulation with many grids and large matrix sizes, effectively breaking through the performance bottleneck of traditional matrix assembly. At the same time, the coloring logic ensures parallel security, and the mapping relationship ensures data accuracy, improving efficiency without affecting the reliability of simulation results.

[0032] Optionally, the step of coloring each cell in the obtained device model mesh according to its adjacency relationship to obtain the colored cell includes: Step 1: Based on a preset color code sequence, color the target cell according to a preset coloring rule to obtain the colored cell, wherein the target cell is any cell in the device model grid; Step 2: Update the saturation of the adjacent cells of the colored cell according to the adjacency relationship; Step 3: Traverse all uncolored cells, select the cell with the highest saturation, color it according to the preset coloring rules, and update the saturation of the corresponding adjacent cells; Step 4: Repeat step 3 until all cells are colored.

[0033] In this optional embodiment, firstly, based on a pre-set color code sequence and preset coloring rules, any cell in the device model grid is selected as the target cell for coloring, resulting in the first colored cell. Next, based on the previously constructed adjacency relationships of the device model grid cells, the saturation of all adjacent cells of the colored cell is updated in a timely manner, providing a crucial reference for the selection of subsequent cells. Then, all uncolored cells in the device model grid are traversed, and the cell with the highest current saturation is selected. This cell is then colored using the same preset coloring rules, and the saturation of adjacent cells of the newly colored cell is updated synchronously. This process is repeated until all cells in the device model grid have been colored, ultimately resulting in all colored cells. The entire process, through ordered coloring logic and dynamic saturation updates, ensures that adjacent cells do not conflict in color, laying the foundation for subsequent multi-threaded mapping operations.

[0034] Optionally, the step of coloring the target cell according to a preset coloring rule to obtain the colored cell includes: Obtain the color code used by the adjacent cells of the target cell, wherein the adjacent cells are determined by the adjacency relationship; Based on the comparison results between the color number sequence and the used color number, determine the smallest unused color number; The target cell is colored with the color corresponding to the smallest color number to obtain the colored cell.

[0035] In this optional embodiment, when coloring the target cell, firstly, based on the previously constructed device model mesh adjacency relationship, all adjacent cells of the target cell are accurately located, and then the color codes used by these adjacent cells are obtained; then, the preset color code sequence is compared one by one with the obtained used color codes, and all color codes not used by adjacent cells are filtered out, and the color code with the smallest value is determined from these unused color codes; finally, the color corresponding to the smallest unused color code is assigned to the target cell, completing the coloring operation of the target cell, and finally obtaining a colored cell that meets the requirements. This process can ensure that the colors of the target cell and adjacent cells do not conflict, providing reliable support for subsequent mapping operations that do not depend on data.

[0036] Optionally, updating the saturation of the adjacent cells of the colored cell according to the adjacency relationship includes: Get the current saturation of the adjacent cells, wherein the initial saturation of the cells is 0; The updated saturation is obtained by adding the current saturation to the preset update base.

[0037] In this optional embodiment, during the coloring process of the device model mesh, the initial saturation of the cell is preset to 0. After the target cell is colored, all adjacent cells of the colored cell need to be accurately located based on the mesh adjacency relationship built in the early stage, and the current saturation value of these adjacent cells is obtained one by one (this value may be the initial value of 0, or it may be the value updated due to the coloring of other adjacent cells). Then, according to the preset fixed update base (such as 1), the current saturation of each adjacent cell is added to the base, and the result is the updated saturation of each adjacent cell. Through this dynamic update method, the number of adjacent colored units of the cell can be reflected in real time, providing an accurate basis for prioritizing the coloring of the cell with the highest saturation when traversing the mesh in the future, ensuring that the coloring process is orderly and that there is no color conflict between adjacent cells.

[0038] Optionally, the feature set includes local feature components of each of the mesh cells; mapping the feature set of the device model mesh to the assembly matrix according to the color number order of all the colored cells includes: Generate a cell sequence by sorting all the colored cells according to their color numbers; The cell sequence is divided into segments according to a preset number to obtain cell segments; According to the preset mapping relationship, the local feature components corresponding to the cells in each cell segment are mapped to the degree of freedom index positions corresponding to the matrix to be assembled.

[0039] In this optional embodiment, when mapping the feature set of the device model mesh to the matrix to be assembled, all the cells that have been colored are first arranged in order according to their color numbers to generate a regular cell sequence. This ensures that cells with the same color number are relatively concentrated in the sequence. Since cells with the same color number have no data dependency conflicts based on the adjacency relationship coloring rule, this sorting method lays the foundation for subsequent parallel processing. Then, according to a preset number of segments (set in combination with thread pool resources, matrix size, etc., such as dividing each 128 cells into a cell segment), the generated cell sequence is divided into multiple independent cell segments. Each segment contains an appropriate number of consecutive cells, ensuring that each segment can be allocated to different threads and... The data is processed in rows without data cross-interference. The number of cells in the last segment may be less than the preset number of segments. Finally, relying on the pre-constructed hash table mapping relationship that is strongly related to the finite element access order, the local feature components (such as local stiffness matrix parameters, basis function integration results, etc.) corresponding to each cell in each segment are accurately matched and mapped to the degree of freedom index position of the matrix to be assembled. This realizes the synchronous filling of local feature quantities of each segment to the global matrix, which not only ensures the accuracy and consistency of data mapping, but also makes full use of multi-threaded computing power through segmented parallel mode, greatly reducing the total time consumption of feature quantity mapping and matrix assembly, and effectively breaking through the efficiency bottleneck of traditional serial logic.

[0040] Optionally, mapping the local feature components corresponding to the cells in each cell segment to the degree-of-freedom index positions corresponding to the matrix to be assembled includes: The mapping operation is determined based on the color number in the cell segment and the number of cells according to a preset judgment rule; The mapping operation maps the local feature components corresponding to the cell to the degree-of-freedom index position corresponding to the matrix to be assembled.

[0041] Optionally, the mapping operation includes parallel mapping operations and serial mapping operations; the step of determining the mapping operation based on the color number in the cell segment and the number of cells according to a preset determination rule includes: When all the colored cells in the cell segment have the same color code, and the number of colored cells is the preset number, then the parallel mapping operation is selected. Otherwise, the serial mapping operation is selected.

[0042] In this optional embodiment, when mapping the local feature components corresponding to a cell to the matrix to be assembled, the colored cells within the cell segment are first checked under two conditions according to a preset judgment rule: whether the color codes of all colored cells in the segment are completely consistent, and whether the number of colored cells in the segment matches the preset number. If both conditions are met, the parallel mapping operation is selected; if either condition is not met, the serial mapping operation is selected. Then, according to the determined mapping operation, the local feature components (such as local stiffness matrix parameters, basis function integration results, etc.) corresponding to each cell in the segment are accurately matched to the degree of freedom index position corresponding to the matrix to be assembled, based on the preset mapping relationship of the hash table that is strongly related to the finite element access order. The parallel mapping operation can improve efficiency by using the characteristic that cells with the same color code have no data dependency and filling local matrix data synchronously through multiple threads. The serial mapping operation ensures the consistency of the data processing order to avoid conflicts. Finally, the matrix assembly efficiency is optimized while ensuring the accuracy of the mapping.

[0043] Optionally, the method for constructing the preset mapping relationship includes: Obtain the index position of the degree of freedom of the matrix to be assembled; A preset mapping relationship is constructed based on all the degree-of-freedom index positions and all the local feature components corresponding to the cells. The mapping relationship includes a one-to-one correspondence between the degree-of-freedom index positions and the local feature components.

[0044] In this optional embodiment, the index positions corresponding to each degree of freedom in the matrix to be assembled are first determined. These index positions are adapted to the strong correlation characteristics of the matrix assembly order in finite element simulation, providing a foundation for the accurate matching of feature quantities and matrix positions. Subsequently, all degree-of-freedom index positions are integrated with the local feature quantity components (such as local stiffness matrix parameters, basis function integration results, etc.) corresponding to each cell in the device model mesh to construct a preset mapping relationship. This mapping relationship establishes a one-to-one correspondence between degree-of-freedom index positions and local feature quantity components. Through sequential interval processing and hash table structure design, the uniqueness and accuracy of data mapping are ensured, and the needs for rapid retrieval of feature quantities in the same color cell area in subsequent parallel computing are adapted. This lays a solid foundation for the efficient mapping of local feature quantity components to the matrix to be assembled, while also meeting the strong correlation requirements of the matrix assembly order and avoiding data mapping conflicts.

[0045] like Figure 2 As shown, an embodiment of the present invention provides a matrix assembly device 200 for device simulation, comprising: The coloring module 210 colors each cell in the obtained device model grid according to their adjacency relationship, thus obtaining the colored cells; The mapping module 220 maps the feature set of the device model mesh to the assembly matrix according to the color number order of all the colored cells, based on a preset mapping relationship.

[0046] The matrix assembly apparatus for device simulation in this embodiment is used to implement the matrix assembly method for device simulation as described above. Its advantages over the prior art are the same as those of the matrix assembly method for device simulation compared to the prior art, and will not be repeated here.

[0047] like Figure 3 As shown, an electronic device 300 provided in this embodiment of the invention includes a memory 310 and a processor 320; the memory 310 is used to store a computer program; the processor 320 is used to implement the matrix assembly method for device simulation as described above when the computer program is executed.

[0048] Alternatively, an electronic device 300 includes a memory 310 and a processor 320 coupled to the memory 310; the memory 310 is configured to store a computer program; and the processor 320 is configured to perform the following operations when the computer program is executed: Color the cells by applying the adjacency relationships of each cell in the obtained device model mesh; Based on a preset mapping relationship, the feature set of the device model mesh is mapped to the matrix to be assembled according to the color number order of all the colored cells.

[0049] This invention provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the matrix assembly method for device simulation as described above.

[0050] Alternatively, a non-volatile computer-readable storage medium storing a computer program that, when executed by a processor, causes the processor to perform the following operations: Color the cells by applying the adjacency relationships of each cell in the obtained device model mesh; Based on a preset mapping relationship, the feature set of the device model mesh is mapped to the matrix to be assembled according to the color number order of all the colored cells.

[0051] The present invention will now be described an electronic device 300 that can serve as a server or client of the present invention, which is an example of a hardware device that can be applied to various aspects of the present invention. Electronic device 300 is intended to represent various forms of digital electronic computer devices, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. Electronic device 300 can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0052] Electronic device 300 includes a computing unit that can perform various appropriate actions and processes based on a computer program stored in read-only memory (ROM) or a computer program loaded from a storage unit into random access memory (RAM). The RAM may also store various programs and data required for device operation. The computing unit, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0053] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic disk, optical disk, read-only memory (ROM), or random access memory (RAM), etc. In this application, the units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of the embodiments of the present invention according to actual needs. Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated units can be implemented in hardware or as software functional units.

[0054] While the present invention has been disclosed above, its scope of protection is not limited thereto. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, and all such changes and modifications will fall within the scope of protection of the present invention.

Claims

1. A matrix assembly method for device simulation, characterized in that, include: Color the cells by applying the adjacency relationships of each cell in the obtained device model mesh; Based on a preset mapping relationship, the feature set of the device model mesh is mapped to the matrix to be assembled according to the color number order of all the colored cells.

2. The matrix assembly method for device simulation according to claim 1, characterized in that, The step of coloring each cell in the obtained device model mesh according to its adjacency relationship to obtain the colored cell includes: Based on a preset color code sequence, the target cell is colored according to a preset coloring rule to obtain the colored cell, wherein the target cell is any cell in the device model grid; Update the saturation of the adjacent cells of the colored cell according to the adjacency relationship; Iterate through all the uncolored cells, select the cell with the highest saturation, color it according to the preset coloring rules, and update the saturation of the corresponding adjacent cells until all cells are colored.

3. The matrix assembly method for device simulation according to claim 2, characterized in that, The step of coloring the target cell according to a preset coloring rule to obtain the colored cell includes: Obtain the color code used by the adjacent cells of the target cell, wherein the adjacent cells are determined by the adjacency relationship; Based on the comparison results between the color number sequence and the used color number, determine the smallest unused color number; The target cell is colored with the color corresponding to the smallest color number to obtain the colored cell.

4. The matrix assembly method for device simulation according to claim 2, characterized in that, Updating the saturation of adjacent cells of the colored cell based on the adjacency relationship includes: Get the current saturation of the adjacent cells, wherein the initial saturation of the cells is 0; The updated saturation is obtained by adding the current saturation to the preset update base.

5. The matrix assembly method for device simulation according to claim 1, characterized in that, The set of features includes local feature components for each of the grid cells; The step of mapping the feature set of the device model mesh to the assembly matrix according to the color number order of all the colored cells includes: Generate a cell sequence by sorting all the colored cells according to their color numbers; The cell sequence is divided into segments according to a preset number to obtain cell segments; According to the preset mapping relationship, the local feature components corresponding to the cells in each cell segment are mapped to the degree of freedom index positions corresponding to the matrix to be assembled.

6. The matrix assembly method for device simulation according to claim 5, characterized in that, The step of mapping the local feature components corresponding to the cells in each cell segment to the degree-of-freedom index positions corresponding to the matrix to be assembled includes: The mapping operation is determined based on the color number in the cell segment and the number of cells according to a preset judgment rule; The mapping operation maps the local feature components corresponding to the cell to the degree-of-freedom index position corresponding to the matrix to be assembled.

7. The matrix assembly method for device simulation according to claim 6, characterized in that, The mapping operation includes parallel mapping operations and serial mapping operations; the step of determining the mapping operation based on the color number in the cell segment and the number of cells according to a preset determination rule includes: When all the colored cells in the cell segment have the same color code, and the number of colored cells is the preset number, then the parallel mapping operation is selected. Otherwise, the serial mapping operation is selected.

8. The matrix assembly method for device simulation according to claim 7, characterized in that, The method for constructing the preset mapping relationship includes: Obtain the index position of the degree of freedom of the matrix to be assembled; A preset mapping relationship is constructed based on all the degree-of-freedom index positions and all the local feature components corresponding to the cells. The mapping relationship includes a one-to-one correspondence between the degree-of-freedom index positions and the local feature components.

9. A matrix assembly device for device simulation, characterized in that, include: The coloring module colors each cell in the obtained device model mesh according to their adjacency relationship, thus obtaining the colored cells. The mapping module, based on a preset mapping relationship, maps the feature set of the device model mesh to the matrix to be assembled according to the color number order of all the colored cells.

10. An electronic device, characterized in that, Including memory and processor; The memory is used to store computer programs; The processor is configured to implement, when executing the computer program, the matrix assembly method for device simulation as described in any one of claims 1 to 8.