Low-redundancy programmable optical delay line network architecture

By using a low-redundancy programmable optical delay line network architecture and dynamic optical delay line resource allocation and optical switch scheduling, the problems of high hardware redundancy and low resource utilization efficiency in the prior art are solved, achieving a wider range of delay control and higher channel multiplexing capability, thus meeting the high-performance requirements of multi-channel photonic systems.

CN121842548APending Publication Date: 2026-04-10SHANGHAI JIAOTONG UNIV
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Patent Information

Application Number
CN202511900457.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-16
Publication Date
2026-04-10

AI Technical Summary

Technical Problem

Existing programmable optical delay line network architectures suffer from high hardware redundancy, low resource utilization efficiency, and insufficient flexibility in delay configuration, making it difficult to meet the high-performance requirements of multi-channel photonic systems.

Method used

It adopts a low-redundancy programmable optical delay line network architecture, realizes cross-channel delay line multiplexing through dynamic optical delay line resource allocation and optical switch scheduling, dynamically configures optical delay lines to be flexibly called between different channels, and combines wavelength division multiplexing technology to reduce hardware overhead and improve delay configuration capabilities.

Benefits of technology

It significantly reduces delay line redundancy, improves resource utilization efficiency, enhances delay configuration flexibility and channel multiplexing capability, and significantly improves the maximum inter-channel delay difference, meeting the high-performance requirements of large-scale photonic systems.

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Abstract

The invention provides a low-redundancy programmable optical delay line network architecture, aiming at solving the problems that the existing programmable optical delay line network architecture is high in redundancy, low in resource utilization rate, insufficient in delay configuration flexibility and limited in maximum delay range. According to the architecture, through scheduling control of the optical switches, limited optical delay line resources are dynamically shared among multiple channels according to needs, the delay line redundancy is remarkably reduced, the resource utilization rate is improved, the delay configuration types are expanded, the maximum delay difference delta Dmax between the channels is improved to be more than two times that of a traditional architecture, and meanwhile the hardware cost is reduced. Besides, the architecture adopts a modular design, and can be expanded to a large-scale multi-channel network in combination with a cascade sharing delay module and a wavelength division multiplexing technology, and the consumption of hardware resources is further reduced. The multi-channel adjustable delay circuit is remarkable in technical effect and can be widely applied to the fields of optical beam forming, optical calculation, programmable microwave photon processors, optical quantum circuits and the like needing multi-channel adjustable delay.
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Description

Technical Field

[0001] This invention relates to the field of optical signal processing technology, specifically to a low-redundancy programmable optical delay line network architecture, which is particularly suitable for photonic systems requiring multi-channel, high-precision, and large dynamic range delay control. Background Technology

[0002] Programmable optical delay line networks are an important technology for achieving high-performance photonic signal processing, with significant applications in phased array radar, wireless communication, optical sensing, and quantum information processing. Currently, commonly used multi-channel optical delay line networks often employ a binary cascaded architecture. Examples include the silicon-based integrated microwave photonic beamformer reported by Zhu et al. in Optica in 2020, and the ultra-wideband, high-resolution silicon-based radio frequency photonic beamformer reported by Martinez-Carrasco et al. in Nature Communications in 2024. These schemes all use a binary cascaded optical delay line network architecture, where each channel is independently configured with a set of optical delay lines to generate the desired delay. Several fixed-length optical fiber or integrated waveguide delay lines are cascaded with binary increments, and optical switches control the optical path of each channel to sequentially pass through different combinations of delay lines, thereby introducing different time delays for each channel. For instance, in an N-channel true delay network, traditional schemes typically equip each channel with M-level delay units, with each level of delay increasing binaryly or linearly, ensuring that the maximum delay difference between channels covers the desired range.

[0003] However, the aforementioned traditional binary cascaded optical delay line network architecture suffers from significant technical bottlenecks and resource waste. First, the delay line resources of each channel cannot be flexibly allocated, leading to the need to repeatedly configure a large number of identical delay lines, resulting in high hardware redundancy. Second, due to the fixed architecture, the delay lines actually used by each channel are inactive most of the time, leaving many optical switch ports idle and resulting in low resource utilization efficiency. Third, limited by the cascaded topology, the flexibility of delay combinations is insufficient, the types of delay configurations that can be implemented are limited, and the maximum inter-channel delay difference (ΔDmax) is also constrained, failing to maximize the utilization of delay line resources. These factors severely restrict the application of multi-channel optical delay line networks in large-scale photonic systems, resulting in high hardware costs and difficulty in meeting the ever-increasing demands for high performance.

[0004] Therefore, existing programmable optical delay line networks have significant shortcomings in terms of resource utilization efficiency, delay configuration flexibility, and system scalability. There is an urgent need for a new network architecture that can reduce hardware redundancy while achieving a wider range of delay control and higher channel multiplexing capabilities. Summary of the Invention

[0005] To address the shortcomings of existing programmable optical delay line network architectures, such as high redundancy and low resource utilization efficiency, this invention provides a low-redundancy programmable optical delay line network architecture. This architecture achieves cross-channel delay line multiplexing through dynamic allocation of optical delay line resources, thereby significantly reducing delay line redundancy and increasing the range of delay combination configurations. By scheduling and controlling optical switches, this architecture flexibly calls upon a limited number of optical delay lines between different channels, dynamically allocating them to each signal channel as needed. With this dynamic multiplexing strategy for optical delay line resources, this invention significantly improves the maximum inter-channel delay difference ΔDmax while reducing hardware overhead, achieving a delay configuration capability far exceeding that of traditional binary concatenated architectures.

[0006] The low-redundancy programmable optical delay line network architecture of this invention includes multiple switchable optical switches and several optical delay lines with different delay values. By configuring different combinations of optical switches, the input signal passes through different delay line combinations in each channel, thereby obtaining the desired delay value. Multiple channels can alternately use the same delay line resource under different configurations, avoiding the repetitive design of configuring a complete set of delay lines for each channel. Furthermore, during large-scale expansion, combining common modules and wavelength division multiplexing (WDM) technology can significantly reduce the total delay line resources. Results show that compared to existing cascaded architectures, this invention demonstrates increasingly significant delay line resource savings as the number of channels increases, while achieving at least a 2x improvement in the maximum inter-channel delay difference (ΔDmax) with fewer delay lines. Therefore, this invention can provide a richer combination of programmable delays at a lower delay line cost, which is of great significance in fields requiring multi-channel tunable delays, such as optical beamforming, optical computing, programmable microwave photonic processors, and optical quantum circuits.

[0007] The technical solution of the present invention is as follows: A low-redundancy programmable optical delay line network architecture, characterized in that it includes: The input module is configured with N independent signal input ports for receiving N input optical signals, where N is an integer greater than 1; The output module is configured with N independent signal output ports for outputting N optical signals after delay processing. The scheduling module, connected between the input module and the output module, includes a shared delay resource pool and a programmable optical switch network; The shared delay resource pool consists of M optical delay lines providing different fixed delay amounts, where M is an integer less than N; the programmable optical switch network consists of multiple optical switch units that dynamically interconnect the optical paths of the N input optical signals with the optical delay lines in the shared delay resource pool. For any k-th optical signal, the programmable optical switch network can dynamically construct a dedicated optical path from the k-th input port to the k-th output port by configuring the state of its internal optical switch units. This dedicated optical path can selectively bypass the shared delay resource pool or selectively connect in series to one or more optical delay lines in the shared delay resource pool. Any optical delay line in the shared delay resource pool can be dynamically allocated by the programmable optical switch network and inserted into the dedicated optical paths of different numbered signal channels through time-division multiplexing and / or wavelength-division multiplexing. Through the dynamic configuration of the programmable optical switch network, the M optical delay lines can be shared and multiplexed among the N signal channels, thereby providing programmable delay combinations for the N channels with M resource configurations.

[0008] Furthermore, the smallest scheduling unit of the scheduling module is a two-channel dynamic sharing unit or a three-channel dynamic sharing unit. The two-channel dynamic sharing unit includes a first channel, a second channel, two optical delay lines, and four optical switches. Through the interconnection of the four optical switches, the first channel is configured as a zero-delay reference channel. The second channel, through the selection of the optical switches, can exclusively occupy or time-division multiplex the two optical delay lines with the first channel, thereby obtaining four delay configurations including 0, σ, 2σ, and 3σ, where σ is the basic delay amount. The three-channel dynamic sharing unit includes a first, second, and third channel, four optical delay lines, and multiple optical switches, realizing that: the first channel is a zero-delay reference channel, and the second and third channels can dynamically share and call the four optical delay lines through the optical switch network, so that the second channel can be configured with 0, σ, 2σ, and 3σ delays, and the third channel can be configured with 0, 2σ, 4σ, and 6σ delays.

[0009] Furthermore, this is achieved by cascading multiple minimum core scheduling units. In the cascaded structure, a common coarse-adjustment delay module is inserted between the front-end scheduling unit and the back-end scheduling unit. The common coarse-adjustment delay module includes a set of shared coarse-adjustment optical delay lines and corresponding intra-module optical switches. The set of shared coarse-adjustment optical delay lines is shared by all channels contained in the multiple back-end core scheduling units connected to it. The common coarse-adjustment delay module is used to provide selectable, large-amplitude base delays for the multiple back-end channels, and the back-end core scheduling units are used to provide fine-tuning of delays above the base delays.

[0010] Furthermore, the delay amount of a set of shared coarse-adjustment optical delay lines in the common coarse-adjustment delay module increases in a power of 2 or other proportional relationship.

[0011] Furthermore, the delay amount of the optical delay line has a preset increasing relationship, and multiple signal channels can alternately use the same optical delay line resource to avoid configuring a complete set of delay lines independently for each channel.

[0012] Furthermore, the architecture incorporates wavelength division multiplexing (WDM) technology, allowing signals of different wavelengths to share the same set of optical delay line resources, thereby further reducing the total number of delay lines and enabling arbitrary step delay configurations for larger-scale networks.

[0013] Compared with existing programmable optical delay line network architectures, the present invention has the following advantages: 1. Reduced delay line resource consumption and lower hardware costs: By dynamically reusing delay lines across different channels, this architecture significantly reduces the number and total length of required delay lines. To achieve the same delay range, the number of delay devices used is far lower than in traditional architectures, thereby reducing system complexity, power consumption, and cost.

[0014] 2. Flexible and diverse delay configurations with a wider delay range: This invention can generate more diverse delay combinations through optical switch scheduling. The delay configuration of each channel is no longer limited to fixed cascading and accumulation forms, and the maximum inter-channel delay difference ΔDmax is significantly improved (more than twice that of existing technologies). The network can provide a larger delay dynamic range to meet the higher demands for delay difference in broadband signal processing and large-scale antenna array beamforming.

[0015] 3. Strong channel multiplexing capability and high scalability: This architecture is highly modular, and the basic 2-channel or 3-channel unit can be expanded to more channels as needed. As the number of channels increases, the relative savings in delay lines further improve. In addition, by introducing cascaded shared delay modules and wavelength division multiplexing (WDM) technology, it can be flexibly expanded to networks with any number of channels and a larger delay range without multiplying hardware resources. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the two-channel architecture of the low-redundancy programmable optical delay line network of the present invention.

[0017] Figure 2 This is a schematic diagram of the three-channel architecture of the low-redundancy programmable optical delay line network of the present invention.

[0018] Figure 3 This is a schematic diagram of the nine-channel architecture of the extended programmable optical delay line network of the present invention.

[0019] In the picture: 100 - Input module: 101 - Signal input port.

[0020] 200-Scheduling module; 201-Optical switch; 202-Fiber optic connection cable; 203-Delay line.

[0021] 300 - Output Module: 301 - Signal Output Port. Detailed Implementation

[0022] The low-redundancy programmable optical delay line network architecture of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. However, it should be understood that these embodiments are only for illustrating the present invention and are not intended to limit the scope of the present invention.

[0023] The low-redundancy programmable optical delay line network architecture of this invention includes several signal channels, several optical delay lines, and several controllable optical switches. Each signal channel is optionally connected to multiple optical delay lines through optical switches, thereby dynamically acquiring the required optical delay according to a predetermined delay configuration strategy. Specifically, this low-redundancy programmable optical delay line network consists of an input module, a scheduling module composed of programmable optical switches and optical delay lines, and an output module: the input signal first enters the input module and is led to the front-stage selection optical switch of the scheduling module according to the channel, and selects "zero-delay bypass" or enters the delay path according to the control command; subsequently, the optical switch in the scheduling module is set according to the real-time delay requirement of the channel, determining whether and how to cross the delay line, and the delay line provides cascaded delay units; by selecting the corresponding path, single path selection, parallel superposition (equivalent delay synthesis), or cascade combination can be realized to accurately synthesize the target delay combination, and the intermediate selection optical switch is responsible for switching between candidate paths and avoiding interference and crossover between channels; after the delay is completed, the subsequent optical switch guides each channel to the corresponding output port and sends it to the output module.

[0024] Specifically, the two-channel system includes four optical switches and two optical delay lines (with delay values ​​of basic delay units σ and 2σ, respectively). The first channel is a zero-delay direct-through channel, while the second channel selectively accesses delay values ​​of 0, σ, 2σ, or 3σ by switching optical switches. The two-channel programmable optical delay system consists of an input module 100, a scheduling module 200, and an output module 300. After the two inputs In1 and In2 (101) enter the scheduling module, the front-stage reconfigurable optical switch 201 selects the path—either by bypassing directly to obtain zero delay, or by selecting the delay line unit 203 via the fiber optic connection line 202, and then combining them in series or parallel as needed to synthesize the target delay. After the settings are completed, each signal is then fed into the interconnection network by the back-stage switch 201 and routed to the corresponding output channel 301 (Out1, Out2). The system supports parallel and independent operation of Channel 1 and Channel 2, and control configurations can be issued simultaneously without blocking each other. Among them, "Connection Channel 202" is an abstraction of the connection network, which does not introduce resource contention. The control logic also ensures that the delay paths of different channels do not conflict with each other. Therefore, it can achieve synchronous transmission and stable output of two signals under any legal configuration, and supports cross-channel replacement and timing alignment when needed.

[0025] The three-channel system includes nine optical switches and four optical delay lines (with delay values ​​of σ, 2σ, 3σ, and 3σ, respectively). The first channel has zero delay, the second channel offers four delay configurations (0, σ, 2σ, and 3σ), and the third channel offers four delay configurations (0, 2σ, 4σ, and 6σ). Through this dynamic delay configuration strategy, the optical path delay combinations for each channel are more abundant, and the maximum inter-channel delay difference is significantly improved. The three-channel programmable optical delay system consists of an input module 100, a scheduling module 200, and an output module 300. The input module 100 provides three inputs 301 (In1, In2, In3). After each signal enters the scheduling module 200, the path is selected by the front-end reconfigurable optical switch 201—either by directly bypassing to obtain zero delay, or by selecting the delay line unit 203 via the fiber optic connection line 202, and then combined in series, parallel, or cascaded as needed to synthesize the target delay. After the setting is completed, the signal is then fed into the connection network via the rear-end switch 201 and routed to the corresponding output port 301 (Out1, Out2, Out3) in the output module 300. This architecture supports three channels to work independently at the same time, and the configuration can be issued in parallel. The scheduling module 200 itself does not introduce resource contention, and the control logic also ensures that the access of different channels to the delay unit does not conflict, thereby realizing fine-grained delay adjustment, cross-path substitution, and timing alignment of multiple signals under any legal configuration.

[0026] The two-channel and three-channel basic units proposed in this invention can be cascaded and serially expanded to any number of channels as needed. By adding a "common delay module" before some channels, shared coarse-grained delay is provided, significantly reducing the total demand for independent delay lines while expanding the configurable range. A nine-channel system is used as an example. Specifically, in the nine-channel system, the system is organized in a topology of "3 groups in parallel × 3 levels in series per group": each group contains three three-channel basic units connected in series. The internal path of each unit is a programmable path of "pre-stage optical switch → delay unit → post-stage optical switch," used for delay adjustment and bypass selection. The connection relationship is as follows: In1, In2, and In3 directly enter the first, second, and third level units of the first group, ultimately forming Out1, Out2, and Out3 respectively; In4, In5, and In6 pass through the common delay module placed at the group entrance and connected in series at the three common front-ends before entering the first level unit of the second group. The common delay module is located at the three common front-ends at the channel group entrance. From input to output along the signal direction, it consists of a WDM multiplexer, a first 2×2 reconfigurable optical switch, a shared physical delay line, a second 2×2 reconfigurable optical switch, and a WDM demultiplexer. The multiplexer first combines the three inputs of different wavelengths into a common waveguide. Then, the first 2×2 switch completes path selection under control commands: when bypass is selected, the signal passes directly along the main link to obtain zero delay; when strobe is selected, the signal is sent to the shared physical delay line to obtain a preset step delay. After leaving the delay line, the second 2×2 optical switch returns the delayed or bypassed signal to the main link and restores the port mapping. This process continues. The number of optical switches is determined by the delay lines required by the common module, and the number is one more than the number of delay lines. Finally, the demultiplexer splits the signal into three independent outputs according to wavelength, which are then processed by the subsequent three-channel basic units. Since the signals are orthogonal in the wavelength division domain and the access of the delay branches is independently controlled by two 2×2 switches, the module does not generate port contention under any legal configuration and can work in coordination with the subsequent delay stages. The common module of the second group provides a programmable delay set {3σ, 6σ, 12σ, 24σ, 48σ, 96σ} (σ is the basic delay step size, and the bypass is zero). After this delay, the three channels enter the first, second, and third level units of the second group respectively to complete the delay adjustment and output Out4, Out5, and Out6 at the end. In7, In8, and In9 follow the same path as above, but first pass through the common delay module (set {6σ, 12σ, 24σ, 48σ, 96σ, 192σ}) and then sequentially pass through the first, second, and third level units of the third group to output Out7, Out8, and Out9. This results in a hierarchical scheduling system where "common delay is at the group entry point, and subsequent delays within the group are at the end": the common module is responsible for providing large-step base delay, while the basic units within the group complete micro-stepping and alignment; the three sets of links are independent of each other, can be configured in parallel, and the control logic ensures that the paths do not conflict and the routing is non-blocking.Under the above parameters, the maximum inter-channel delay difference ΔDmax of the nine-channel system is about 63σ, which significantly improves performance. This connection pattern can also be replicated horizontally by the number of groups and expanded vertically by the number of levels. Furthermore, it can be combined with WDM to reuse the same set of physical delay resources in larger-scale networks, achieving arbitrary delay configuration while minimizing hardware resource consumption.

[0027] Two-channel architecture implementation example: Figure 1 As shown, the two-channel low-redundancy programmable optical delay line network architecture of the present invention includes an input module 100, a scheduling module 200 consisting of four optical switches and optical delay lines, and an output module 300. Assuming the basic delay unit is σ, the two delay lines provide delays of 1σ and 2σ, respectively. The input module 100 transmits data to the output module 300 through the scheduling module 200, which flexibly schedules the optical delay lines using optical switches. Channel 1 serves as the reference channel, employing a fixed, direct, zero-delay path; Channel 2 introduces delay lines on different paths through the configuration of optical switches, thereby achieving various delay combinations. Specifically, Channel 2 can choose to bypass all delay lines to obtain zero delay, or it can choose to obtain 1σ delay only through short delay lines, or 2σ delay only through long delay lines, or it can sequentially connect two delay lines to obtain a delay of 1σ + 2σ = 3σ. Through this dynamic selection, channel 2 can achieve four delay configurations {0, 1σ, 2σ, 3σ} using only two delay lines. Compared with the traditional cascading method, which requires an independent delay device for each delay configuration, this invention greatly reduces the redundant deployment of delay lines.

[0028] Three-channel architecture implementation example: Figure 2As shown, the three-channel architecture of this invention includes an input module 100, a scheduling module 200 consisting of nine optical switches and four optical delay lines, and an output module 300. The delay amounts provided by each delay line are 1σ, 2σ, 3σ, and 3σ, respectively. Channel 1 remains a fixed 0-delay direct path; the delay configuration of channel 2 is similar to the aforementioned two-channel architecture, allowing selection of four delays: {0, 1σ, 2σ, 3σ}. Channel 3, through the control of more optical switches, achieves a larger delay range, with a selectable delay set of {0, 2σ, 4σ, 6σ}. That is, the minimum non-zero delay of the third channel is 2σ, and the maximum delay can reach 6σ. For example, channel 3 can obtain a 2σ delay by providing a 2σ delay line; by selecting two 3σ delay lines in series via optical switches, channel 3 can obtain a delay of 3σ + 3σ = 6σ; if channel 3 selects a suitable combination of delay lines, an intermediate delay configuration of approximately 4σ can be achieved. By dynamically allocating delay resources, delay lines in the three-channel architecture are reused between channels: for example, a delay line providing 1σ and a delay line providing 2σ serve channel 2, and can also be switched to channel 3 as needed; similarly, two delay lines providing 3σ delay can be flexibly called by channel 3 according to different configurations, thus avoiding the need to equip each channel with a separate long delay line. Compared with traditional architectures that do not share resources, the three-channel architecture of this invention expands the range of delay differences between channels with only a few additional components, achieving ΔDmax = 3σ (referring to the maximum delay difference between channels), significantly improving the flexibility and magnitude of delay configuration.

[0029] Nine-channel extended architecture embodiment: The low-redundancy latency line network architecture of the present invention has good modular scalability, and can support more channels by cascading or serializing multiple basic units. For example... Figure 3As shown, the three-channel architecture units described above can be cascaded and connected in series to construct a nine-channel programmable optical delay line network. Each three-channel architecture is considered as a whole, namely module 500. Specifically, the nine-channel architecture can be regarded as being composed of three three-channel units connected in series: channels 1-3 form the first group, channels 4-6 form the second group, and channels 7-9 form the third group. A common delay module 400 is introduced before channels 4-9 to provide a larger delay base value, which, combined with the delay lines within each group, achieves a higher delay range. For example, for channels 4-6, a common delay unit group is added before they enter their respective three-channel sub-networks, providing six delay options: {3σ, 6σ, 12σ, 24σ, 48σ, 96σ}. The signals of channels 4-6 first obtain a basic delay through this common delay module, and then enter the three-channel architecture units to superimpose additional fine-tuning delays, achieving precise delay control. Similarly, for channels 7-9, another set of common delay modules 400 is set before entering their sub-networks, providing six larger delay options: {6σ, 12σ, 24σ, 48σ, 96σ, 192σ}. By introducing common delay resources at different levels and combining them with the cascading of basic three-channel units, the nine-channel architecture of this invention achieves hierarchical combination of delays: larger delays are provided by the preceding common modules, fine delay adjustments are provided by the delay lines within each subsequent channel, and the combination of each level can ultimately produce the required total delay. The maximum inter-channel delay difference ΔDmax of this nine-channel architecture can reach 63σ, far exceeding the traditional design that uses independent delay lines to accumulate channel by channel. While achieving such a large delay range, the required increase in the number of delay lines is very limited, demonstrating the resource efficiency of the architecture of this invention under large-scale channel expansion.

[0030] In the aforementioned multi-channel extended architecture, if multiple channel signals need to pass through the same physical delay line simultaneously, this invention can achieve parallel multiplexing through wavelength division multiplexing (WDM). For example, WDM technology allows optical signals from different channels to be transmitted at different wavelengths, thus allowing them to pass through the same delay fiber simultaneously without interfering with each other. This wavelength multiplexing-based strategy further reduces delay line resource consumption, enabling the architecture of this invention to be scaled to larger-scale programmable delay networks while maintaining low redundancy.

Claims

1. A low-redundancy programmable optical delay line network architecture, characterized in that, include: The input module is configured with N independent signal input ports for receiving N input optical signals, where N is an integer greater than 1; The output module is configured with N independent signal output ports for outputting N optical signals after delay processing. The scheduling module, connected between the input module and the output module, includes a shared delay resource pool and a programmable optical switch network; The shared delay resource pool consists of M optical delay lines providing different fixed delay amounts, where M is an integer less than N; the programmable optical switch network consists of multiple optical switch units that dynamically interconnect the optical paths of the N input optical signals with the optical delay lines in the shared delay resource pool. For any k-th optical signal, the programmable optical switch network can dynamically construct a dedicated optical path from the k-th input port to the k-th output port by configuring the state of its internal optical switch units. This dedicated optical path can selectively bypass the shared delay resource pool or selectively connect in series to one or more optical delay lines in the shared delay resource pool. Any optical delay line in the shared delay resource pool can be dynamically allocated by the programmable optical switch network and inserted into the dedicated optical paths of different numbered signal channels through time-division multiplexing and / or wavelength-division multiplexing. Through the dynamic configuration of the programmable optical switch network, the M optical delay lines can be shared and multiplexed among the N signal channels, thereby providing programmable delay combinations for the N channels with M resource configurations.

2. The low-redundancy programmable optical delay line network architecture according to claim 1, characterized in that, The smallest scheduling unit of the scheduling module is a two-channel dynamic sharing unit or a three-channel dynamic sharing unit. The two-channel dynamic sharing unit includes a first channel, a second channel, two optical delay lines, and four optical switches. Through the interconnection of the four optical switches, the first channel is configured as a zero-delay reference channel. The second channel, through the selection of the optical switches, can occupy the two optical delay lines independently or share the two optical delay lines with the first channel in a time-division multiplexing manner, thereby obtaining four delay configurations including 0, σ, 2σ, and 3σ, where σ is the basic delay amount. The three-channel dynamic sharing unit includes a first, second, and third channel, four optical delay lines, and multiple optical switches, realizing that: the first channel is a zero-delay reference channel, and the second and third channels can dynamically share and call the four optical delay lines through the optical switch network, so that the second channel can be configured with 0, σ, 2σ, and 3σ delays, and the third channel can be configured with 0, 2σ, 4σ, and 6σ delays.

3. The low-redundancy programmable optical delay line network architecture according to claim 2, characterized in that, This is achieved by cascading multiple minimum core scheduling units. In the cascaded structure, a common coarse-adjustment delay module is inserted between the front-end scheduling unit and the back-end scheduling unit. The common coarse-adjustment delay module includes a set of shared coarse-adjustment optical delay lines and corresponding in-module optical switches. The set of shared coarse-adjustment optical delay lines is shared by all channels contained in the multiple back-end core scheduling units connected to it. The common coarse-adjustment delay module is used to provide selectable, large-amplitude base delays for the multiple back-end channels, and the back-end core scheduling units are used to provide fine-tuning of delays above the base delays.

4. The low-redundancy programmable optical delay line network architecture according to claim 3, characterized in that, The delay amount of a set of shared coarse-adjustment optical delay lines in the common coarse-adjustment delay module increases in a power of 2 or other proportional relationship.

5. The low-redundancy programmable optical delay line network architecture according to claim 1, characterized in that, in, The delay of the optical delay line is in a preset increasing relationship, and multiple signal channels can use the same optical delay line resource alternately to avoid configuring a complete set of delay lines for each channel independently.

6. The low-redundancy programmable optical delay line network architecture according to any one of claims 1-5, characterized in that, The architecture incorporates wavelength division multiplexing (WDM) technology, allowing signals of different wavelengths to share the same set of optical delay line resources, thereby further reducing the total number of delay lines and enabling arbitrary step delay configurations for larger-scale networks.