Chip flip packaging structure with high heat dissipation efficiency

Abstract

The invention relates to the technical field of chip packaging, and discloses a flip chip packaging structure with high heat dissipation efficiency, which comprises a flip chip, a solder ball bump array, a substrate and an edge vacuum auxiliary filling system. The edge vacuum auxiliary filling system comprises an edge through hole array, a radial shallow groove horizontal flow channel and a detachable vacuum connector, the edge through hole array penetrates through the substrate and is located on the outer side of a chip projection area, and the radial shallow groove horizontal flow channel is formed in the top face of the substrate and extends from the edge through hole array to the center area of the bottom of the chip. And the detachable vacuum joint is connected to an opening of the edge through hole array on the bottom surface of the substrate through a quick-plug interface. According to the invention, the technical problem that an unfilled hole is formed in the center of the chip in flip packaging of the large-size chip is solved, and complete filling of the bottom filling material is realized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip packaging, more particularly, it relates to a chip flip-chip packaging structure with high heat dissipation efficiency. BACKGROUND

[0002] In the chip flip-chip packaging process, after the solder ball array completes the welding of the chip and the substrate, a bottom filling material needs to be injected into the gap between the bumps to buffer thermal stress. The bottom filling material is a low-viscosity liquid that flows into the narrow gap under the bump array from the edge of the chip through capillary action.

[0003] In the prior art, the bottom filling material relies on capillary action to flow from the edge of the chip to the central area. The capillary driving force is provided by the liquid surface tension at the edge, which remains constant during the flow process.

[0004] For a high-density bump array of a large-size chip with a solder ball pitch less than 150 microns, when the chip side length exceeds 15 mm, the distance of the bottom filling material flowing from the edge to the center can reach more than 7.5 mm. During the flow process, the flow resistance accumulates and increases due to the lengthening of the path, and the distance from the center of the chip to the edge is the farthest. When the bottom filling material reaches the center of the chip, the flow speed has decreased to near stagnation, while the edge area has been filled and begins to solidify due to the short flow distance. Finally, an unfilled cavity with a diameter of 2 to 5 mm is formed in the center of the chip, and the solder balls in the center of the chip lack stress buffering protection, which is prone to stress concentration and leads to solder joint failure during thermal cycling. The shortcomings of this prior art result in the technical problem of reduced reliability of large-size chip flip-chip packaging. SUMMARY

[0005] The present application provides a chip flip-chip packaging structure with high heat dissipation efficiency, which solves the technical problem of the formation of an unfilled cavity in the center of the chip by the bottom filling material in the flip-chip packaging of a large-size chip in the related art.

[0006] The present application discloses a chip flip-chip packaging structure with high heat dissipation efficiency, which comprises a flip-chip, a solder ball bump array, a substrate, and an edge vacuum-assisted filling system. The solder ball bump array is arranged on the bottom surface of the flip-chip, and the solder ball bump array connects the flip-chip and the substrate through welding. A narrow gap is formed between the solder ball bump array and the substrate. The edge vacuum-assisted filling system comprises an edge through-hole array, a radial shallow groove horizontal flow channel, and a detachable vacuum connector. The edge through-hole array penetrates the substrate, and the edge through-hole array is located outside the chip projection area of the flip-chip on the substrate. The radial shallow groove horizontal flow channel is opened on the top surface of the substrate, and extends from the edge through-hole array to the center area of the bottom of the flip-chip. The radial shallow groove horizontal flow channel is in communication with the edge through-hole array and the narrow gap. The detachable vacuum connector is connected to the opening of the edge through-hole array on the bottom surface of the substrate through a quick plug interface.

[0007] Further, the edge through-hole array includes 4 to 8 edge through-holes distributed along the flip-chip periphery, and the distance between the edge through-holes and the flip-chip edge is 2 to 4 mm.

[0008] Further, the edge through-hole has a diameter of 0.5 to 1 mm, penetrates the thickness direction of the substrate, and has a top surface opening communicating with the radial shallow groove horizontal flow channel and a bottom surface opening for connecting a detachable vacuum joint.

[0009] Further, the radial shallow groove horizontal flow channel is a shallow groove structure extending radially from the edge through-hole array to the flip-chip bottom center region, and the end of the radial shallow groove horizontal flow channel is located at a position 1 to 3 mm away from the flip-chip center.

[0010] Further, the shallow groove structure has a depth of 30 to 50 microns, a width of 200 to 400 microns, and a narrow gap height of 30 to 60 microns.

[0011] Further, the detachable vacuum joint communicates with a vacuum pump through a vacuum pipeline, and the vacuum pump is used to apply negative pressure to the flip-chip bottom space through the edge through-hole array and the radial shallow groove horizontal flow channel.

[0012] Further, the position of the edge through-hole avoids the electrical wiring in the substrate.

[0013] Further, the bottom surface opening of the edge through-hole array is plugged with a plugging material.

[0014] Further, the plugging material is a solidified glue or a metal plug.

[0015] Further, the narrow gap is filled with a bottom filling material, the bottom filling material flows into the narrow gap from the flip-chip edge through capillary action, and the radial shallow groove horizontal flow channel serves as a low-resistance passage to transmit negative pressure from the edge through-hole array to the flip-chip bottom center region.

[0016] The application sets an edge vacuum-assisted filling system on the substrate, applies negative pressure to the center area of the chip bottom, establishes an additional pressure gradient between the liquid front of the bottom filling material and the center area of the chip bottom, the pressure gradient is superimposed on the original capillary pressure, and the driving force from the edge to the center is enhanced, the technical problem of forming an unfilled cavity in the center of the chip in large-size chip flip-chip packaging is solved, and the technical effect that the bottom filling material can completely fill the chip bottom space is achieved. The radial shallow groove horizontal flow channel serves as a low-resistance channel, effectively transmits negative pressure from the edge through-hole array to the center area of the chip bottom, and ensures that the negative pressure can uniformly act on the entire chip bottom. The edge through-hole array is arranged outside the chip projection area, ensuring the integrity and electrical function of the tin ball bump array. The action direction of the negative pressure suction mode is downward pulling, which will not generate upward pushing force on the bonded tin ball, protecting the integrity of the soldered interface between the tin ball bump array and the substrate. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 is a schematic diagram of the high-heat-dissipation-efficiency chip flip-chip packaging structure of the application Figure 1 ; Figure 2 is a schematic diagram of the high-heat-dissipation-efficiency chip flip-chip packaging structure of the application Figure 2 ; Figure 3 is a schematic diagram of the high-heat-dissipation-efficiency chip flip-chip packaging structure of the application Figure 3 ; Figure 4 is the A-A sectional view of Figure 3 ; Figure 5 is the enlarged view of B of Figure 4 ; Figure 6 is the enlarged view of C of Figure 5 ; DETAILED DESCRIPTION

[0018] In the chip flip-chip packaging process, after the tin ball bump array completes the welding of the chip and the substrate, the bottom filling material needs to be injected into the gap between the bumps to buffer the thermal stress. The bottom filling material is a low-viscosity liquid, which flows into the narrow gap below the bump array from the edge of the chip through capillary action, the height of the narrow gap is 30-60μm, and the bottom filling material needs to fill the entire chip bottom space.

[0019] For high-density bump array with large size chip and pitch less than 150 μm, the flow distance of underfill material from edge to center can be more than 7.5 mm when the chip side length is more than 15 mm. During the flow process, the capillary driving force is provided by the liquid surface tension at the edge, the capillary driving force remains constant during the flow process, but the flow resistance accumulates and increases due to the path lengthening. The chip center is farthest from the four edges, and the flow speed of the underfill material to the chip center area has dropped to near stagnation, the flow speed is reduced to 10% to 20% of the edge, while the edge area is full and begins to solidify due to the short flow distance. Finally, an unfilled cavity with a diameter of 2-5 mm is formed at the center of the chip, and the solder balls in the center area of the chip lack stress buffer protection and are prone to stress concentration during thermal cycling, leading to solder joint failure.

[0020] The factors causing this technical problem are that the center area of the large size chip is too far from the edge flow starting point, the driving force generated by capillary action alone is gradually consumed by viscous resistance in long distance flow, and the driving force is insufficient to maintain effective flow speed in the center area of the chip, and there is no sufficient pressure gradient between the edge area and the center area to compensate for the decay of the driving force.

[0021] As shown in Figures 1-6 According to the embodiment of the present embodiment, a high heat dissipation efficiency chip flip chip packaging structure includes a flip chip, a solder ball bump array, a substrate 1, and an edge vacuum assisted filling system.

[0022] The solder ball bump array is arranged on the bottom surface of the flip chip, the solder ball bump array connects the flip chip and the substrate 1 through soldering, a narrow gap is formed between the solder ball bump array and the substrate 1, and the height of the narrow gap is 30-60 μm. The flip chip forms a chip projection area on the substrate 1, and the chip projection area is the vertical projection range of the flip chip on the surface of the substrate 1.

[0023] The edge vacuum assisted filling system includes an edge through hole array, a radial shallow groove horizontal flow channel 2, and a detachable vacuum connector 4. The edge through hole array is opened on the substrate 1, the edge through hole array is located outside the chip projection area, and the distance between the edge through hole array and the chip edge is 2-4 mm. The radial shallow groove horizontal flow channel 2 is opened on the top surface of the substrate 1, the radial shallow groove horizontal flow channel 2 extends from the edge through hole array to the center area of the chip bottom, the radial shallow groove horizontal flow channel 2 is in communication with the edge through hole array, and the radial shallow groove horizontal flow channel 2 is in communication with the narrow gap of the solder ball bump array. The detachable vacuum connector 4 is connected to the opening of the edge through hole array on the bottom surface of the substrate 1 through a quick plug interface, and the detachable vacuum connector 4 is in communication with a vacuum pump through a vacuum pipeline 5.

[0024] In some embodiments, the edge through-hole array includes 4 to 8 edge through-holes 3, which are distributed along the flip-chip periphery. The diameter of the edge through-hole 3 is 0.5-1mm, the edge through-hole 3 penetrates the thickness direction of the substrate 1, the top surface opening of the edge through-hole 3 is communicated with the radial shallow groove horizontal flow channel 2, and the bottom surface opening of the edge through-hole 3 is used to connect the detachable vacuum connector 4. The position of the edge through-hole 3 avoids the electrical wiring in the substrate 1, and avoids affecting the electrical function of the chip.

[0025] In some embodiments, the radial shallow groove horizontal flow channel 2 is a shallow groove structure, the depth of the shallow groove structure is 30-50μm, and the width of the shallow groove structure is 200-400μm. The radial shallow groove horizontal flow channel 2 extends radially from the edge through-hole array to the center area of the chip bottom, and the end of the radial shallow groove horizontal flow channel 2 is located at a position 1-3mm away from the center of the chip. The depth of the shallow groove structure matches the narrow gap height of the tin ball bump array, ensuring that the negative pressure can uniformly act on the entire chip bottom.

[0026] Further, in order to effectively transmit the negative pressure generated by the edge through-hole array to the center area of the chip bottom, the radial shallow groove horizontal flow channel 2 serves as a low-resistance channel, the depth of the radial shallow groove horizontal flow channel 2 is set to 30-50μm, which is close to the narrow gap height 30-60μm of the tin ball bump array, so that the negative pressure can be uniformly distributed to the center area of the chip bottom through the radial shallow groove horizontal flow channel 2, avoiding the generation of local excessive suction force.

[0027] According to the embodiment of the present embodiment, the filling method of the flip-chip packaging structure with high heat dissipation efficiency includes the following steps: Step 1: An edge through-hole array is formed on the substrate 1, the edge through-hole array is located outside the chip projection area, and the distance between the edge through-hole array and the chip edge is 2-4mm.

[0028] Step 2: A radial shallow groove horizontal flow channel 2 is processed on the top surface of the substrate 1, and the radial shallow groove horizontal flow channel 2 extends from the edge through-hole array to the center area of the chip bottom.

[0029] Step 3: After the flip-chip bonding is completed, a detachable vacuum connector 4 is connected to the edge through-hole array on the bottom surface of the substrate 1 through a quick plug interface, and the detachable vacuum connector 4 is communicated with a vacuum pump through a vacuum pipeline 5.

[0030] Step 4: A bottom filling material is coated from the chip edge, and the bottom filling material flows to the center of the chip bottom through capillary action.

[0031] Step 5: The vacuum pump is started, and negative pressure is applied to the radial shallow groove horizontal flow channel 2 and the space of the chip bottom through the edge through-hole array.

[0032] Step 6. Stop vacuuming when the underfill material completely fills the chip bottom and reaches the level of the radial shallow trench horizontal flow channel 2.

[0033] Step 7. Remove the detachable vacuum connector 4, and use a sealing material to fill and seal the bottom opening of the edge through hole 3.

[0034] Step 8. Heat and cure the underfill material.

[0035] In some embodiments, step 1 further comprises: the edge through hole array comprises 4 to 8 edge through holes 3, the diameter of the edge through hole 3 is 0.5-1mm, and the edge through hole 3 is positioned to avoid electrical traces in the substrate 1.

[0036] In some embodiments, step 2 further comprises: the depth of the radial shallow trench horizontal flow channel 2 is 30-50μm, the width of the radial shallow trench horizontal flow channel 2 is 200-400μm, and the end of the radial shallow trench horizontal flow channel 2 is located 1-3mm away from the center of the chip.

[0037] In some embodiments, step 4 further comprises: the underfill material is applied from the four edges of the chip at the same time, and the underfill material flows from the four edges to the center of the chip bottom by capillary action at the same time.

[0038] In some embodiments, step 5 further comprises: the negative pressure is controlled at -10 to -30kPa to avoid excessive negative pressure from sucking in air.

[0039] In some embodiments, step 6 further comprises: monitoring the filling progress through a transparent observation window, and stopping vacuuming when the observation shows that the underfill material reaches the radial shallow trench horizontal flow channel 2.

[0040] In some embodiments, step 6 further comprises: monitoring the filling progress through an impedance sensor, and stopping vacuuming when the impedance sensor detects that the underfill material reaches the radial shallow trench horizontal flow channel 2.

[0041] In some embodiments, step 7 further comprises: using a curing glue to seal the bottom opening of the edge through hole 3.

[0042] In some embodiments, step 7 further comprises: using a metal plug to seal the bottom opening of the edge through hole 3.

[0043] Technical effects of the present embodiment; The embodiment sets the edge vacuum-assisted filling system on the substrate 1, applies negative pressure to the center area of the chip bottom, and establishes an additional pressure gradient between the liquid front of the underfill material and the center area of the chip bottom. The pressure gradient is superimposed on the original capillary pressure, which enhances the driving force from the edge to the center, thereby overcoming the factors that the center area of the large-size chip is too far from the flow starting point of the edge and the driving force is gradually consumed by viscous resistance in long-distance flow, and solving the technical problem of forming an unfilled cavity in the center of the chip.

[0044] The traditional capillary filling only relies on the capillary pressure generated by the liquid surface tension, and the capillary pressure is usually 1-5 kPa. The capillary pressure is gradually consumed by viscous resistance in long-distance flow. The embodiment applies a negative pressure of -10 to -30 kPa to the center area of the chip bottom through the edge vacuum-assisted filling system. The negative pressure establishes an additional pressure gradient between the liquid front and the center area. The pressure gradient is superimposed on the original capillary pressure, which increases the total driving force, and the underfill material can reach the center area before the edge area solidifies and complete the filling.

[0045] The radial shallow groove horizontal flow channel 2 is used as a low-resistance channel to effectively transmit the negative pressure from the edge through-hole array to the center area of the chip bottom. The depth of the radial shallow groove horizontal flow channel 2 is 30-50 μm, which matches the narrow gap height of 30-60 μm of the tin ball bump array, ensuring that the negative pressure can uniformly act on the entire chip bottom, avoiding the generation of local excessive suction force causing the bonded tin ball to be subjected to uneven force.

[0046] The edge through-hole array is arranged outside the chip projection area, and the distance between the edge through-hole array and the chip edge is kept at 2-4 mm, avoiding opening holes in the high-density tin ball area, ensuring the integrity and electrical function of the tin ball bump array, and avoiding the manufacturing difficulty of processing through holes in the high-density tin ball area.

[0047] The advantage of negative pressure suction mode over positive pressure injection mode is that the negative pressure action direction is downward pulling, which does not produce upward thrust on the bonded tin ball, protecting the integrity of the solder interface between the tin ball bump array and the substrate 1. The negative pressure action is more gentle and easy to control. After stopping vacuum suction, the space at the bottom of the chip naturally restores to normal pressure, and there is no residual stress on the solder interface.

Claims

1. A flip-chip package structure with high heat dissipation efficiency, characterized in that, The application relates to a flip chip, a tin ball bump array, a substrate and an edge vacuum-assisted filling system. The tin ball bump array is arranged on the bottom surface of the flip chip, the tin ball bump array is connected with the substrate through welding, and a narrow gap is formed between the tin ball bump array and the substrate. The edge through-hole array penetrates the substrate, and the edge through-hole array is located outside the chip projection area of the flip chip on the substrate. The radial shallow groove horizontal flow channel is arranged on the top surface of the substrate, extends from the edge through-hole array to the center area of the bottom of the flip chip, is communicated with the edge through-hole array, and is communicated with the narrow gap. The detachable vacuum connector is connected with the opening of the edge through-hole array on the bottom surface of the substrate through a quick plug interface. The edge through-hole array comprises 4-8 edge through-holes which are distributed along the periphery of the flip chip, and the distance between the edge through-holes and the edge of the flip chip is 2-4 mm. The diameter of the edge through-hole is 0.5-1 mm, the edge through-hole penetrates the thickness direction of the substrate, the top surface opening of the edge through-hole is communicated with the radial shallow groove horizontal flow channel, and the bottom surface opening of the edge through-hole is used for connecting the detachable vacuum connector.

2. The flip-chip package structure with high heat dissipation efficiency according to claim 1, wherein, The radial shallow groove horizontal flow channel is a shallow groove structure which extends radially from the edge through-hole array to the center area of the bottom of the flip chip, and the end of the radial shallow groove horizontal flow channel is located at a position 1-3 mm away from the center of the flip chip.

3. The flip-chip package structure with high heat dissipation efficiency according to claim 2, wherein, The depth of the shallow groove structure is 30-50 microns, the width of the shallow groove structure is 200-400 microns, and the height of the narrow gap is 30-60 microns.

4. The flip-chip package structure with high heat dissipation efficiency according to claim 1, wherein, The detachable vacuum connector is communicated with a vacuum pump through a vacuum pipeline, and the vacuum pump is used for applying negative pressure to the space at the bottom of the flip chip through the edge through-hole array and the radial shallow groove horizontal flow channel.

5. The flip-chip package structure with high heat dissipation efficiency according to claim 4, wherein, The position of the edge through-hole avoids the electrical wiring in the substrate.

6. The flip-chip package structure with high heat dissipation efficiency according to claim 1, wherein, The bottom surface opening of the edge through-hole array is plugged with a plugging material.

7. The flip-chip package structure with high heat dissipation efficiency according to claim 1, wherein, The plugging material is a solidified glue or a metal plug.

8. The flip-chip package structure with high heat dissipation efficiency according to claim 1, wherein, The narrow gap is filled with a bottom filling material, the bottom filling material flows into the narrow gap through capillary action from the edge of the flip chip, and the radial shallow groove horizontal flow channel serves as a low-resistance channel to transmit negative pressure from the edge through-hole array to the center area of the bottom of the flip chip.

9. The flip chip package structure with high heat dissipation efficiency according to claim 8, wherein, ​ 10. The flip-chip package structure with high heat dissipation efficiency according to claim 1, wherein, ​

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