Peak spectrum measurement reliability research method based on device forward thermoelectric model

Abstract

The invention discloses a peak spectrum measurement reliability research method based on a device forward thermoelectric model. The method comprises the following steps: constructing an initial thermoelectric coupling model; peak spectrum measurement and analysis conditions are set, different position defect characteristics obtained under the measurement and analysis conditions are added to the initial thermoelectric coupling model, and when the model electrical characteristics and the measurement electrical characteristics are fitted to be consistent, a thermoelectric coupling model before the reliability stress is applied is obtained; for the semiconductor device after the application of the reliability stress, under the same peak spectrum measurement analysis condition as before the application of the reliability stress, acquiring defect characteristics at different positions, adding the defect characteristics to the thermoelectric coupling model before the application of the reliability stress, and when the electrical characteristics of the model are consistent with the measured electrical characteristics in a fitting manner, obtaining a thermoelectric coupling model after the application of the reliability stress; simulation under measurement and analysis conditions before and after reliability stress application is carried out based on a thermoelectric coupling model, so that the multi-physical-field process of semiconductor device degradation induced by reliability stress-caused defects can be precisely restored, and the degradation mechanism of the semiconductor device under the reliability stress is clarified.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor power device technology, specifically relating to a method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of the device. Background Technology

[0002] With the increasing maturity and widespread adoption of the (ultra)wide bandgap semiconductor power device industry, device-level thermoelectric synergistic optimization design based on the thermoelectric coupling model of semiconductor devices can proactively leverage their thermoelectric performance advantages and create many new application scenarios that silicon-based devices cannot achieve. This has become an inevitable trend in the development of the (ultra)wide bandgap semiconductor power device industry.

[0003] In existing technologies, ultra-wide bandgap semiconductor power devices suffer from significant reliability issues due to multiple factors, including the quality of existing materials, manufacturing processes, and operating stress, severely hindering their commercialization. The analysis of their reliability mechanisms is limited by the accuracy of existing semiconductor power device models and characterization methods. This makes it impossible to accurately quantify the impact of defects in the decoupled components of the semiconductor device on its reliability under test stress. Consequently, the thermoelectric optimization and reliability design of semiconductor devices lacks specific scenario-based targeting, and the marginal effects of specific optimization design schemes are not significant.

[0004] Therefore, there is an urgent need to propose a peak spectrum measurement reliability research method based on the forward thermoelectric model of the device, so that the thermoelectric optimization design and reliability design of semiconductor devices can be carried out in specific scenarios, thereby making the optimization design scheme of semiconductor devices more targeted and effective, and improving the shortcomings of the existing technologies. Summary of the Invention

[0005] To address the aforementioned problems in the existing technology, this invention provides a method for studying the reliability of peak spectrum measurement based on a device forward thermoelectric model. The technical problem to be solved by this invention is achieved through the following technical solution: This invention provides a method for studying the reliability of peak spectrum measurement based on a device forward thermoelectric model, comprising: Using computer-aided design of semiconductor processes and devices, combined with semiconductor device material defect parameters obtained by electrical characteristic testing and material characterization analysis techniques and semiconductor device thermal property parameters obtained by time-domain thermal reflection techniques, an initial thermoelectric coupling model is constructed in a forward manner based on these parameters. Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics before reliability stress is applied, the filling conditions and measurement conditions for peak spectrum measurement are set, including gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under different peak spectrum measurement filling and measurement conditions before reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level. The defect characteristics corresponding to different defect locations are added to the initial thermoelectric coupling model. When the simulated electrical characteristics of the semiconductor device output by the initial thermoelectric coupling model with added defect characteristics are consistent with the measurement results of the basic electrical characteristics of the semiconductor device, the accurate thermoelectric coupling model of the semiconductor device before reliability stress is obtained. The basic electrical characteristics of the semiconductor device include output characteristics, transfer characteristics, gate-source leakage current, and drain-source leakage current. After applying reliability stress to a semiconductor device, based on the measurement results of the basic electrical characteristics and TLM current characteristics of the semiconductor device after the reliability stress is applied, the same filling and measurement conditions as those before the peak spectrum measurement are set. "Same" means that the electric field of the semiconductor device is the same under the same filling and measurement conditions for the same peak spectrum measurement, including gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions. The electrical characteristics, time constant spectrum, defect location, and corresponding defect characteristics of the semiconductor device under different peak spectrum measurement conditions after the reliability stress are obtained. The defect characteristics corresponding to different defect locations are added to the thermoelectric coupling model accurately fitted to the semiconductor device before the reliability stress is applied. When the simulated electrical characteristics of the semiconductor device output by the thermoelectric coupling model accurately fitted to the semiconductor device before the reliability stress is applied, based on the added defect characteristics, are consistent with the measurement results of the basic electrical characteristics of the semiconductor device after the reliability stress is applied, the thermoelectric coupling model accurately fitted to the semiconductor device after the reliability stress is obtained. Simultaneously, multiphysics simulations were conducted on the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device before reliability stress was applied, and on the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device after reliability stress was applied. This was to accurately reproduce the multiphysics process of semiconductor device degradation induced by reliability stress-induced defects and to elucidate the degradation mechanism of semiconductor devices under reliability stress. The electrical characteristics of the thermoelectric coupling model included output characteristics, transfer characteristics, gate-source leakage current, drain-source leakage current, and electrical characteristics under different peak spectrum measurement conditions and filling conditions.

[0006] The beneficial effects of this invention are: This invention provides a peak spectrum measurement reliability research method based on the forward thermoelectric model of a device. Combining peak spectrum measurement and the forward thermoelectric model of a semiconductor device, and continuously fitting through electrical testing and forward modeling, it not only breaks through the dual limitations of existing semiconductor device model accuracy and characterization methods, but also accurately quantifies the impact of defects in each decoupled part of the device on device reliability under test field stress. This allows for specific analysis of device thermoelectric optimization design and reliability design in specific scenarios, making device optimization design schemes more targeted and effective. At the same time, it ensures the same level of accuracy as microscopic characterization methods and avoids the extensive reliance on defect analysis equipment and the fabrication of test units to meet its analysis requirements, greatly saving time and cost for semiconductor device reliability analysis and optimization design.

[0007] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description

[0008] Figure 1 This is a schematic diagram of a gallium oxide single-layer gate dielectric MOSFET provided by existing technology; Figure 2 This is a flowchart of a method for studying the reliability of peak spectrum measurement based on a device forward thermoelectric model, provided in an embodiment of the present invention. Figure 3a This is a schematic diagram of the output characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention; Figure 3b This is a schematic diagram of the transfer characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention; Figure 3c This is a schematic diagram of the gate leakage current characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention; Figure 3d This is a schematic diagram of the drain leakage current characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention; Figure 4a This is a schematic diagram of the time constant spectrum of a MOSFET device under gate-source leakage current conditions before reliability stress is applied, as provided in an embodiment of the present invention. Figure 4b This is a schematic diagram of the time constant spectrum of a MOSFET device under drain-source leakage current conditions before reliability stress is applied, provided in an embodiment of the present invention. Figure 4c This is a schematic diagram of the time constant spectrum of a MOSFET device under conduction conditions before reliability stress is applied, provided by an embodiment of the present invention. Figure 5aThis is a schematic diagram of the time constant spectrum of a MOSFET device under gate-source leakage current conditions after reliability stress is applied, as provided in an embodiment of the present invention. Figure 5b This is a schematic diagram of the time constant spectrum of a MOSFET device under drain-source leakage current conditions after reliability stress is applied, as provided in an embodiment of the present invention. Figure 5c This is a schematic diagram of the time constant spectrum of a MOSFET device under conduction conditions after reliability stress is applied, as provided in an embodiment of the present invention. Figure 6 This is a schematic diagram illustrating the specific values ​​of the time constant and peak area of ​​each defect peak in the time constant spectrum of the semiconductor device before and after reliability stress application, provided in an embodiment of the present invention. Figure 7 This is a schematic diagram of the simulated current or electric field distribution of the MOSFET before and after stress application under gate-source leakage current conditions, provided by an embodiment of the present invention. Figure 8 This is a schematic diagram of the simulated electric field distribution under MOSFET measurement conditions before and after reliability stress application, provided in an embodiment of the present invention. Figure 9 This is a schematic diagram of the simulated current or electric field distribution before and after stress application for MOSFET reliability under drain-source leakage current conditions, provided in an embodiment of the present invention. Detailed Implementation

[0009] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0010] The following research schemes exist in the prior art, specifically: 1. Defect Characterization and Reliability Analysis Techniques Based on Static IV Testing. This technique involves applying a slowly varying DC voltage or current between two or more terminals of a semiconductor device and simultaneously measuring its response current or voltage to obtain the DC electrical characteristics of the device. Simultaneously, the IV curves of normal and failed semiconductor devices are compared, and simulation results of the semiconductor device model under the same measurement conditions and stress are obtained using Technology Computer Aided Design (TCAD) simulation software to analyze and characterize defects at curve anomalies. However, this technique involves numerous possible combinations of defect locations and characteristics. The semiconductor device model used is not constructed based on the material properties (including material defect characteristic parameters and thermophysical parameters) at different locations within the semiconductor device. Furthermore, it does not fit a thermoelectric coupling model of the semiconductor device under peak spectrum measurement and analysis conditions and constraints on the device's electrical characteristics. Essentially, it cannot accurately reveal the defect location information, defect characteristics, and reliability physical mechanisms in stress-induced semiconductor devices among the many possible combinations of defect locations and characteristics.

[0011] 2. Defect Characterization and Device Model Reliability Analysis Techniques Based on Deep-Level Transient Spectra. A reverse bias voltage is applied to the semiconductor device under test, and periodic pulse voltages are superimposed, causing electrons to undergo a filling and releasing process in the deep energy levels, thus forming a capacitance transient. Continuous pulse signals are applied to the semiconductor device to acquire the transient capacitance change waveform. Based on the transient capacitance change waveform, multiple exponential fittings are performed to determine the exponential deep-level transient spectrum of the semiconductor device, obtaining characteristics such as defect type, energy level, and concentration. Simultaneously, the acquired defect information is added to the ideal semiconductor device model in TCAD simulation software. Combined with the simulation results of the semiconductor device model under the same measurement conditions and stress, and compared with the actual electrical characteristic test results, the defect location information and defect characteristics in the semiconductor device are analyzed, achieving defect characterization of the semiconductor device. However, on the one hand, the defect characterization of deep-level transient spectra is difficult to obtain the interface defect characteristics at the interface between the gate dielectric layer and the channel layer that affect the electrical properties of semiconductor devices, and it cannot accurately identify defect information close to the energy level; on the other hand, the semiconductor device model it combines is not based on the material properties (including material defect characteristic parameters and thermophysical parameters) at different locations of the semiconductor device, and it does not fit the thermoelectric coupling model of the semiconductor device under the conditions of peak spectrum measurement and analysis and the constraints of the electrical properties of the semiconductor device. In essence, it cannot reveal the defect location information, defect characteristics and reliability physical mechanism in stress-induced semiconductor devices.

[0012] 3. Defect Characterization and Reliability Analysis Techniques Based on Transient Current. This method applies filling stress to a semiconductor device, causing internal defects to trap charge carriers. Subsequently, test stress is applied to obtain the target transient current, which is then fitted and processed to obtain the spatial location, time constant, and concentration of the defects. This defect information is added to the ideal semiconductor device model in TCAD simulation software. Under the same peak spectrum measurement and analysis conditions and semiconductor device electrical characteristic constraints, a thermoelectric coupling model simulation of the semiconductor device is performed to analyze the defect location and characteristics, thus achieving defect characterization. However, while transient current testing can provide possible combinations of defect location information and defect characteristic parameters, the semiconductor device model it combines is not constructed based on a forward fit of material properties (including material defect characteristic parameters and thermophysical parameters) at different locations within the semiconductor device. Furthermore, it does not further fit the semiconductor device model after reliability stress application based on actual defect characteristics. Essentially, it cannot accurately reveal the stress-induced defect location information, defect characteristics, and reliability physical mechanisms within the aforementioned numerous possible combinations of defect locations and characteristics.

[0013] In view of this, the present invention provides a peak spectrum measurement reliability research method based on the forward thermoelectric model of the device, which breaks through the dual limitations of the accuracy and characterization means of existing semiconductor device models. It truly presents the accurate quantification of the impact of defects in each decoupled part of the semiconductor device on the reliability of the semiconductor device under test field stress, so that the thermoelectric optimization design and reliability design of semiconductor devices can be specifically analyzed in specific scenarios, thereby making the semiconductor device optimization design scheme more targeted and effective.

[0014] In this invention, please refer to Figure 1 , Figure 1 This is a schematic diagram of a gallium oxide single-layer gate dielectric MOSFET provided by existing technology. Taking the existing single-layer oxide dielectric gallium oxide MOSFET as an example, the MOSFET includes a substrate, a buffer layer, a channel layer, a dielectric layer, a source, a drain, and a gate. The materials of the substrate, buffer layer, and channel layer are gallium oxide materials. This invention analyzes (ultra)wide bandgap semiconductor power devices under proton radiation scenarios to realize a method for studying the reliability of peak spectrum measurement of forward thermoelectric models of semiconductor devices.

[0015] It should be noted that the influence of multi-physics coupling stress under other reliability stresses (such as high temperature, total dose radiation, repetitive gate bias stress, etc.) is also applicable to the peak spectrum measurement reliability research method based on the device forward thermoelectric model provided in this embodiment; in addition, it is also applicable to Schottky barrier diodes, bipolar transistors, etc.; of course, it is also applicable to other (ultra)wide bandgap semiconductor materials such as SiC, GaN, etc.

[0016] Please see Figure 2 , Figure 2 This is a flowchart of a peak spectrum measurement reliability study method based on a device forward thermoelectric model provided by an embodiment of the present invention. The method includes: S101. Using computer-aided design of semiconductor processes and devices, and combining the semiconductor device material defect parameters obtained by electrical characteristic testing and material characterization analysis techniques with the semiconductor device thermal property parameters obtained by time-domain thermal reflection techniques, an initial thermoelectric coupling model is constructed in a forward manner based on these parameters.

[0017] Specifically, in this embodiment, it is necessary to obtain the electrical characteristics of the semiconductor device and, based on semiconductor device electrical characteristic testing and material characterization analysis techniques, obtain the semiconductor device material defect parameters, such as... Figures 3a-3d As shown, Figure 3a This is a schematic diagram of the output characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention. Figure 3b This is a schematic diagram of the transfer characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention. Figure 3c This is a schematic diagram of the gate leakage current characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention. Figure 3d This is a schematic diagram of the drain leakage current characteristics in the measured and simulated electrical characteristics provided in the embodiments of the present invention; wherein, the basic electrical characteristics of the semiconductor device include output characteristics, transfer characteristics, gate-source leakage current and drain-source leakage current; First, a MOSCAP sample with material parameters identical to the target MOSFET is prepared (ensuring matching substrate doping, dielectric layer type, and thickness). The conductance-voltage characteristics of the MOSCAP sample are then tested using the conductivity method to separate the conductance component contributed by interface states and calculate the interface state defect energy levels. Simultaneously, using the subthreshold slope method, the interface state defect density is derived by measuring the transfer curve of the MOSFET. .

[0018] Secondly, for the MOSCAP sample, the capacitor-voltage (CV) hysteresis characteristic curve was tested, and the change in flat-band voltage was extracted. Combined with gate area To further obtain the defect density of the dielectric layer Furthermore, X-ray photoelectron spectroscopy (XPS) can be used to analyze the chemical state information of elements in the dielectric layer, analyze defect types, and obtain some defect energy levels using photoluminescence (PL) spectroscopy. Simultaneously, the relative content of defects was analyzed in a semi-quantitative manner.

[0019] Finally, XPS can be used to analyze the chemical state information of elements in semiconductor materials in depth. It can not only analyze defect types, such as oxygen vacancies, but also quantitatively assess the content of defects such as oxygen vacancies, thereby obtaining the defect molar concentration and thus determining the defect concentration. Semi-quantitative analysis; combined with PL spectroscopy to obtain defect energy levels. And its defect type, Type.

[0020] Thus, based on the electrical characteristics and material analysis of semiconductor devices, material defect parameters at different locations of the semiconductor device before reliability stress is applied are obtained; specifically, the interface state defect energy levels between the gate dielectric layer and the semiconductor. and the corresponding defect density Defect type and defect energy level inside the gate dielectric layer and defect density Type and energy level of defects present in the semiconductor material and defect concentration Using computer-aided design of semiconductor processes and devices, an ideal simulation model is constructed, and the material defect parameters at different locations of the semiconductor device are added to the ideal simulation model to build a semiconductor device model containing defect information.

[0021] The thermal resistance of the dielectric layer, the interfacial thermal resistance between the dielectric layer and the channel layer, and the interfacial thermal resistance between the dielectric layer and the metal of the MOSFET structural unit of the semiconductor device are indirectly obtained by TDTR technology. Combined with the known thermal properties of the semiconductor device materials, these are added to the semiconductor device model containing defect information to achieve the forward construction of the initial thermoelectric coupling model.

[0022] It should be noted that other simulation software such as Silvaco and COMSOL can also be used for semiconductor device modeling.

[0023] S102. Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics before the application of reliability stress, set the filling conditions and measurement conditions for peak spectrum measurement, including gate-source leakage current conditions, drain-source leakage current conditions and conduction conditions. Obtain the electrical characteristics, time constant spectrum, defect location and corresponding defect characteristics of the semiconductor device under different peak spectrum measurement filling conditions and measurement conditions before the application of reliability stress. The defect characteristics include: defect type, defect concentration and defect energy level. Add the defect characteristics corresponding to different defect locations to the initial thermoelectric coupling model. When the simulated electrical characteristics of the semiconductor device output by the initial thermoelectric coupling model with added defect characteristics are consistent with the measurement results of the basic electrical characteristics of the semiconductor device, the accurately fitted thermoelectric coupling model of the semiconductor device before the application of reliability stress is obtained. The basic electrical characteristics of the semiconductor device include output characteristics, transfer characteristics, gate-source leakage current and drain-source leakage current.

[0024] Specifically, the core principle of reliability stress-induced defect analysis technology based on peak spectrum method is that, due to the trapped charge at defects in the channel layer, interface, and dielectric layer, the gate-source leakage current of MOSFET devices ( I gss Drain-source leakage current (I dss ), conduction current ( I ds The measured current will decrease, while the current will increase when the charge is released. By studying the peak value changes of the defect peak spectrum before and after defect filling under different test field stresses, the defect location, defect time constant, and defect state density of the trapped charge can be analyzed.

[0025] In this embodiment, based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics before the application of reliability stress, the filling conditions and measurement conditions for peak spectrum measurement are set, including different peak spectrum defect characterization groups under gate-source leakage current conditions, drain-source leakage current conditions and conduction conditions, so as to achieve different emphasis characterization of dielectric layer defects, interface state defects; channel layer defects, buffer layer defects; interface defects, dielectric layer defects.

[0026] Based on the electrical characteristic test results of actual semiconductor devices, determine the filling conditions and measurement conditions for peak spectrum measurement. When using peak spectrum measurement technology to conduct reliability analysis before applying reliability stress, it is necessary to fill and measure defects from three dimensions: gate-source leakage current state, drain-source leakage current state, and conduction state.

[0027] First, such as Figure 4a As shown, Figure 4a This is a schematic diagram of the time constant spectrum of a MOSFET device under gate-source leakage current conditions before reliability stress is applied, provided by an embodiment of the present invention. Under gate-source leakage current conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device before the application of reliability stress, the gate-source leakage current of the semiconductor device is selected ( V GS = V TH +10V, V DS =0V) corresponds to the filling condition of the peak spectrum measurement. Optionally, a 50s defect filling time can be set, and the semiconductor device can be selected when it is linearly conducting. V GS =1V, V DS=10V) is the stress condition corresponding to the peak spectrum measurement condition. The electrical characteristics, time constant spectrum, defect location and defect characteristics corresponding to different defect locations of the semiconductor device under gate-source leakage current conditions before the reliability stress is applied are obtained. The defect characteristics include: defect type, defect concentration and defect energy level.

[0028] Since the source and drain are in the off state, the charge carriers are mainly captured by the defects below the gate. It can be determined that there are two types of defects with different time constants below the gate, namely Tp1 and Tp2. Based on the time constants of the defects and the magnitudes of the interface state defect density and dielectric layer defect density obtained by electrical characteristic testing and material characterization techniques in S101, it can be preliminarily considered that Tp1 is an interface state defect and Tp2 is a dielectric layer defect.

[0029] Secondly, such as Figure 4b As shown, Figure 4b This is a schematic diagram of the time constant spectrum of a MOSFET device under drain-source leakage current conditions before reliability stress is applied, provided by an embodiment of the present invention. Under drain-source leakage current conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device before the application of reliability stress, the selection of the drain-source leakage current of the semiconductor device is as follows: V GS = V TH -10V, V DS =30V) corresponds to the filling condition for peak spectrum measurement, selected when the semiconductor device is linearly turned on ( V GS =1V, V DS =10V) is the stress condition corresponding to the peak spectrum measurement condition. The electrical characteristics, time constant spectrum, defect location and defect characteristics corresponding to different defect locations of the semiconductor device under drain-source leakage current conditions before the reliability stress is applied are obtained. The defect characteristics include: defect type, defect concentration and defect energy level.

[0030] Since the semiconductor device operates in the cutoff region and the inversion layer of the channel has not been formed, the charge carriers are mainly captured by typical defects in the semiconductor material. It can be preliminarily concluded that there are two defects with different time constants in the semiconductor material, namely Tp3 and Tp4.

[0031] Finally, as Figure 4c As shown, Figure 4c This is a schematic diagram of the time constant spectrum of a MOSFET device under conduction conditions before reliability stress is applied, provided by an embodiment of the present invention. Under conduction conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device before the application of reliability stress, the saturation conduction time of the semiconductor device is selected. V GS = V TH +10V, V DS =40V) corresponds to the filling condition for peak spectrum measurement, selected when the semiconductor device is linearly turned on ( V GS =1V, V DS =10V) is the stress condition corresponding to the peak spectrum measurement condition. The electrical characteristics, time constant spectrum, defect location and defect characteristics corresponding to different defect locations of the semiconductor device under the conduction condition before the reliability stress is applied are obtained. The defect characteristics include: defect type, defect concentration and defect energy level.

[0032] Since the inversion layer of the channel has been formed and is operating in the saturation region, the charge carriers are mainly captured by defects at the interface between the semiconductor material and the dielectric layer and defects in the dielectric layer. Based on the time constant of the defects and the magnitude of the interface state defect density and dielectric layer defect density obtained by electrical characteristic testing and material characterization techniques in S101, it can be preliminarily considered that Tp5 is an interface state defect and Tp6 is a dielectric layer defect.

[0033] Thus, based on the above three dimensions of measurement, the fitting and calibration of defects at different locations in semiconductor devices were achieved using peak spectrum measurement technology, obtaining the defect location before reliability stress was applied, the defect characteristics corresponding to different defect locations, and the time constant.

[0034] Next, the defect locations and corresponding defect characteristics obtained from the peak spectrum measurement of gate-source leakage current under pre-reliability stress conditions, drain-source leakage current conditions, and conduction conditions are added to the initial thermoelectric coupling model. Based on this, further defect-related physical models are added, such as generating composite models, to obtain a corrected and supplemented forward thermoelectric coupling model of the semiconductor device that can simulate the impact of defects on semiconductor device characteristics. When the simulated electrical characteristics of the semiconductor device output by the thermoelectric coupling model accurately fitted before reliability stress application based on added characteristic defects match the measurement results of the basic electrical characteristics of the semiconductor device after reliability stress application, the accurately fitted thermoelectric coupling model of the semiconductor device after reliability stress application is obtained.

[0035] It should be noted that the peak spectrum measurement reliability study method based on the device forward thermoelectric model provided in this embodiment is also applicable to the gate-source voltage and gate-drain voltage under other peak spectrum measurement and analysis conditions.

[0036] S103. After applying reliability stress to the semiconductor device, based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after applying reliability stress, set the same filling conditions and measurement conditions as before applying reliability stress for the peak spectrum measurement. "Same" means that the electric field of the semiconductor device is the same under the same filling conditions and measurement conditions for the same peak spectrum measurement, including gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions. Obtain the electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under different peak spectrum measurement filling conditions and measurement conditions after applying reliability stress. Add the defect characteristics corresponding to different defect locations to the thermoelectric coupling model that accurately fits the semiconductor device before applying reliability stress. When the simulated electrical characteristics of the semiconductor device output by the thermoelectric coupling model that accurately fits the semiconductor device before applying reliability stress based on the added defect characteristics are consistent with the measurement results of the basic electrical characteristics of the semiconductor device after applying reliability stress, the thermoelectric coupling model that accurately fits the semiconductor device after applying reliability stress is obtained. The measurement results of the basic electrical characteristics of the semiconductor device after applying reliability stress are shown in Figure 3.

[0037] Specifically, in this embodiment, after applying reliability stress to the semiconductor device, in order to accurately capture the evolution of internal defects under stress, it is necessary to strictly follow the peak spectrum measurement scheme established before applying reliability stress; that is, the peak spectrum measurement scheme is completely consistent before and after applying reliability stress. First, the basic electrical characteristics of the semiconductor device after applying reliability stress are obtained, including output characteristics, transfer characteristics, gate-source leakage current, and drain-source leakage current, such as... Figures 3a-3d As shown; to maintain reliability, peak spectrum measurements were performed under the same scenario and electric field stress before and after stress application, refer to S102 for details.

[0038] After reliability stress is applied, defect filling and transient current acquisition are performed for the same gate-source leakage current state, drain-source leakage current state and conduction state. The time constant spectrum is obtained after processing by peak spectrum technology.

[0039] First, such as Figure 5a As shown, Figure 5a This is a schematic diagram of the time constant spectrum of a MOSFET device under gate-source leakage current conditions after reliability stress is applied, according to an embodiment of the present invention. In this embodiment, the TLM current characteristics of the semiconductor device do not change significantly after reliability stress is applied. Under gate-source leakage current conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the application of reliability stress, if the TLM current characteristics do not change before and after the application of reliability stress, then the gate-source leakage current of the semiconductor device is selected ( V GS = VTH +10V, V DS =0V) corresponds to the filling condition for peak spectrum measurement, selected when the semiconductor device is linearly on ( V GS =1V, V DS =10V) The stress condition corresponding to the peak spectrum measurement is the measurement condition; if the TLM current characteristic decreases before and after the reliability stress is applied, the stress condition corresponding to the increase of the gate-source leakage current of the semiconductor device is the measurement condition for the peak spectrum measurement, and the stress condition corresponding to the increase of the linear conduction of the semiconductor device is the measurement condition for the peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location and defect characteristics corresponding to different defect locations of the semiconductor device under the gate-source leakage current condition after the reliability stress is applied are obtained. The defect characteristics include: defect type, defect concentration and defect energy level.

[0040] Secondly, such as Figure 5b As shown, Figure 5b This is a schematic diagram of the time constant spectrum of a MOSFET device under drain-source leakage current conditions after reliability stress is applied, according to an embodiment of the present invention. In this embodiment, the TLM current characteristics of the semiconductor device do not change significantly after reliability stress is applied. Under drain-source leakage current conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the application of reliability stress, if the TLM current characteristics do not change before and after the application of reliability stress, then when selecting the drain-source leakage current of the semiconductor device ( V GS = V TH -10V, V DS =30V) corresponds to the filling condition for peak spectrum measurement, selected when the semiconductor device is linearly turned on ( V GS =1V, V DS =10V) The stress condition corresponding to the peak spectrum measurement is the measurement condition; if the TLM current characteristic decreases before and after the reliability stress is applied, the stress condition corresponding to increasing the drain-source leakage current of the semiconductor device is the measurement condition for peak spectrum measurement, and the stress condition corresponding to increasing the linear conduction of the semiconductor device is the measurement condition for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under the drain-source leakage current condition after the reliability stress is applied are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

[0041] Finally, as Figure 5c As shown, Figure 5cThis is a schematic diagram of the time constant spectrum of a MOSFET device under conduction conditions after reliability stress is applied, according to an embodiment of the present invention. In this embodiment, the TLM current characteristics of the semiconductor device do not change significantly after reliability stress is applied. Under conduction conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the application of reliability stress, if the TLM current characteristics do not change before and after the application of reliability stress, the semiconductor device is selected when it is saturated and conducting. V GS = V TH +10V, V DS =40V) corresponds to the filling condition for peak spectrum measurement, selected when the semiconductor device is linearly turned on ( V GS =1V, V DS =10V) The stress condition corresponding to the peak spectrum measurement is the measurement condition; if the TLM current characteristic decreases before and after the reliability stress is applied, then the stress condition corresponding to the saturation conduction of the semiconductor device is increased, and the stress condition corresponding to the linear conduction of the semiconductor device is increased, which is the measurement condition for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under conduction conditions after the reliability stress is applied are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

[0042] Furthermore, in this embodiment, the defect locations and corresponding defect characteristics obtained by peak spectrum measurement under gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions after reliability stress are applied are added to the thermoelectric coupling model of the semiconductor device that is accurately fitted before reliability stress is applied.

[0043] Based on the above reliability stress, the following independent cases of peak spectrum measurement are discussed.

[0044] When reliability stress is applied, if the area of ​​the characteristic peak increases in the time constant spectrum obtained under the same test conditions as before the reliability stress is applied, that is, the absolute value of the peak integral (with the ordinate 0 as the baseline) is greater than the measurement result before the reliability stress is applied, it indicates that the concentration of the defect type corresponding to the characteristic peak has increased, and the defect concentration parameter of the corresponding model should be increased and adjusted.

[0045] When reliability stress is applied, if the area of ​​the characteristic peak decreases in the time constant spectrum obtained under the same test conditions as before the reliability stress is applied, that is, the absolute value of the peak integral is less than the measurement result before the reliability stress is applied, it indicates that the concentration of the defect type corresponding to the characteristic peak has decreased, and the defect concentration parameter of the corresponding model should be adjusted to be reduced.

[0046] When reliability stress is applied, if the position of the characteristic peak shifts to the left in the time constant spectrum obtained under the same test conditions as before the reliability stress is applied, it indicates that the energy level position of the defect type corresponding to the characteristic peak has changed, and there is a tendency to transform into a defect of a nearby energy level. The corresponding defect energy level parameter should be adjusted to a shallower energy level.

[0047] When reliability stress is applied, if the position of the characteristic peak shifts to the right in the time constant spectrum obtained under the same test conditions as before the reliability stress is applied, it indicates that the energy level position of the defect type corresponding to the characteristic peak has changed, and there is a tendency to transform into a defect of a nearby energy level. The corresponding defect energy level parameter should be adjusted to a deeper energy level.

[0048] In this embodiment, under the gate-source leakage current state, based on the time constant spectrum analysis after applying reliability stress: the area of ​​the characteristic peak corresponding to Tp1 increases after the reliability stress is applied and the position of the peak remains basically unchanged. Therefore, in the semiconductor device model, only the corresponding defect concentration needs to be increased; the area of ​​the characteristic peak corresponding to Tp2 increases after the reliability stress is applied and the position of the peak shifts to the right. Therefore, in the semiconductor device model, the corresponding defect concentration needs to be increased and the energy level depth needs to be increased.

[0049] Furthermore, in this embodiment, the defect concentration parameter is adjusted with reference to the change in the corresponding characteristic peak area before and after the reliability stress is applied. For example, if the characteristic peak area increases by 5%, the corresponding defect concentration in the semiconductor device model after the reliability stress is applied increases by 5% relative to before the reliability stress is applied, and this concentration parameter is used as a benchmark for fitting; the defect energy level parameter is adjusted with reference to the calculation result of equation (3), and this is used as a benchmark for fitting; specifically: (1); (2); (3); Equation (3) is derived from equations (1) and (2). In equation (1), The defect time constant, For electron emissivity, For defect capture section, The average thermal velocity of charge carriers. For the effective density of states in the conduction band, For defect activation energy, The active region temperature of a semiconductor device. Let be the Boltzmann constant; in equation (2), For conduction band energy levels, For the defect energy level; in equation (3), , These are the activation energies before and after applying reliability stress to the defect. , These are the time constants before and after the application of reliability stress for the defect.

[0050] Please see Figure 6 , Figure 6 This is a schematic diagram illustrating the specific values ​​of the time constant and peak area of ​​each defect peak in the time constant spectrum of the semiconductor device before and after reliability stress application, as provided in an embodiment of the present invention.

[0051] Furthermore, by applying reliability stress and using peak spectrum measurement, the defect characteristics of the decoupled components of the semiconductor device were once again fitted and calibrated. Based on the defect analysis of the decoupled components of the semiconductor device using the peak spectrum measurement, referring to S102, the defect location information (such as dielectric / epitaxy layer interface, dielectric layer, epitaxial layer, buffer layer) and defect characteristic parameters (such as concentration, time constant) of the decoupled components of the semiconductor device obtained based on the peak spectrum measurement were added to the thermoelectric coupling model of the semiconductor device accurately fitted before the application of reliability stress in S102. The defect-related physical model was further added to further correct and supplement the model, so as to obtain a thermoelectric coupling model of the semiconductor device accurately fitted after the application of reliability stress that can simulate the influence of defects on the characteristics of the semiconductor device.

[0052] S104. Simultaneously conduct multiphysics simulations of the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device before reliability stress is applied, and multiphysics simulations of the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device after reliability stress is applied, so as to accurately reproduce the multiphysics process of semiconductor device degradation induced by reliability stress and clarify the degradation mechanism of semiconductor device under reliability stress. The electrical characteristics of the thermoelectric coupling model include output characteristics, transfer characteristics, gate-source leakage current, drain-source leakage current and electrical characteristics under different peak spectrum measurement conditions and measurement conditions.

[0053] Specifically, in this embodiment, based on the above S101~S103, the calibration of the defect location, concentration, energy level and other characteristics of the decoupled components of the semiconductor device before and after the application of reliability stress under DC test field stress and the physical accuracy of the multiphysics process are ensured. A forward thermoelectric coupling model that can accurately reflect the actual characteristics of the semiconductor device is obtained. Thermoelectric coupling simulation can be performed under different ambient temperatures (in this embodiment, the simulation is performed under room temperature conditions) to clarify the influence mechanism of semiconductor device defects induced by reliability stress.

[0054] In this embodiment, multiphysics simulations are simultaneously performed based on the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device before reliability stress is applied, and multiphysics simulations are performed based on the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device after reliability stress is applied. This presents the multiphysics process of semiconductor device degradation induced by defects that is difficult to observe experimentally before and after reliability stress is applied, and under test field stress, and clarifies the degradation mechanism of semiconductor devices under reliability stress. The multiphysics includes electric field distribution, current distribution, tunneling current, defect trapped carriers, etc. under different peak spectrum measurement filling conditions and measurement conditions.

[0055] Under gate-source leakage current conditions, based on peak spectrum measurements before reliability stress application, it was preliminarily inferred that Tp1 is an interface state defect located in the under-gate region, and Tp2 is a dielectric layer defect located in the under-gate region. Fill-the-box thermoelectric coupling simulations were performed on the semiconductor device models established before and after reliability stress application, respectively. This included multiphysics simulations of the electrical characteristics of the precisely fitted thermoelectric coupling model of the semiconductor device before reliability stress application and multiphysics simulations of the electrical characteristics of the precisely fitted thermoelectric coupling model of the semiconductor device after reliability stress application. Figure 7 As shown in a~7d, Figure 7 In Figure 'a', it is a schematic diagram of the simulated current distribution under the gate-source leakage current state of the MOSFET before the application of fill conditions for reliability stress, provided in an embodiment of the present invention. Figure 7 In Figure b, there is a schematic diagram of the simulated current distribution under the gate-source leakage current state of the MOSFET after applying the reliability stress and filling condition according to an embodiment of the present invention. Figure 7 In the diagram, c is a schematic representation of the electric field distribution in the simulation of the fill condition before applying stress to ensure MOSFET reliability under gate-source leakage current conditions, provided in an embodiment of the present invention. Figure 7 Figure d is a schematic diagram of the simulated electric field distribution under filling conditions after applying reliability stress to a MOSFET under gate-source leakage current conditions, provided in an embodiment of the present invention. Under gate-source leakage current conditions, the peak electric field sensitive region is located at the under-gate dielectric layer. Under filling conditions, the current flow path before and after applying reliability stress is mainly distributed near the interface between the gallium oxide channel layer and the dielectric layer, flowing through the peak electric field sensitive region. Figure 8 As shown in a and b of 8, Figure 8 In Figure 'a', a schematic diagram is provided in an embodiment of the present invention to illustrate the simulated electric field distribution under MOSFET measurement conditions before reliability stress application. Figure 8 Figure b is a schematic diagram of the simulated electric field distribution of the MOSFET under the measurement condition after the reliability stress is applied, provided by an embodiment of the present invention. Under the measurement condition, the current flows through the electric field peak sensitive region before and after the reliability stress is applied. This illustrates that Tp1 is the interface state defect at the interface between the channel layer and the dielectric layer under the gate, and Tp2 is the dielectric layer defect in the dielectric layer under the gate.

[0056] Similarly, under both the drain-source leakage current state and the conduction state, based on the peak spectrum measurement before the application of reliability stress, it has been preliminarily inferred that Tp3 and Tp4 are intrinsic defects of the material, and Tp5 and Tp6 are defects at the interface and in the dielectric layer. For example... Figure 9 As shown in the diagrams a~h, Figure 9 In Figure 'a', it is a schematic diagram of the simulated current distribution of the MOSFET before stress application under drain-source leakage current conditions, provided in an embodiment of the present invention. Figure 9 In Figure b, there is a schematic diagram of the simulated current distribution after applying reliability stress to the MOSFET under drain-source leakage current conditions, provided in an embodiment of the present invention. Figure 9 In the diagram below, c is a schematic representation of the simulated current distribution before stress is applied to ensure MOSFET reliability in the on-state, according to an embodiment of the present invention. Figure 9 In the diagram below, d is a schematic representation of the simulated current distribution after stress is applied to the MOSFET in the on-state, according to an embodiment of the present invention. Figure 9 In the embodiment of the present invention, 'e' is a schematic diagram of the simulated electric field distribution before stress application for MOSFET reliability under drain-source leakage current conditions. Figure 9 f is a schematic diagram of the simulated electric field distribution after applying stress to ensure MOSFET reliability under drain-source leakage current conditions, provided in an embodiment of the present invention. Figure 9 In the figure, g is a schematic diagram of the simulated electric field distribution before stress is applied to ensure MOSFET reliability in the on-state, provided by an embodiment of the present invention. Figure 9 Figure h is a schematic diagram of the simulated electric field distribution after applying reliability stress to a MOSFET in the on-state, according to an embodiment of the present invention. Under drain-source leakage current conditions, the peak electric field sensitive region is located near the gate corner of the gate-biased drain in the gallium oxide non-gate lower channel layer, buffer layer, and dielectric layer. Under fill conditions, the current flow path before and after applying reliability stress is distributed in the gallium oxide channel layer and buffer layer, flowing through the peak electric field sensitive region. In the on-state, the peak electric field sensitive region is located near the gate-biased drain in the gallium oxide non-gate lower channel layer and dielectric layer. Under fill conditions, the current flow path before and after applying reliability stress is mainly distributed in the gallium oxide channel layer and near the interface, flowing through the peak electric field sensitive region. Figure 8 As shown in Figures a and b, under the measurement conditions, the current flows through the electric field peak sensitive region before and after the reliability stress of the drain-source leakage current state and the conduction state. Considering the influence of electric field strength on the time constant of internal defects in semiconductor devices, it can be concluded that Tp3 is located in the gallium oxide channel layer on the gate-biased drain side, Tp4 is located in the gallium oxide buffer layer, and Tp5 is located at the interface defect in the gallium oxide channel on the gate-biased drain side. For defect type Tp6, based on the current flow path and the defect time constant, Tp6 can be determined to be a dielectric layer defect. Based on typical defects in gallium oxide materials, Tp3 and Tp4 can be determined to be oxygen vacancies with different spatial distributions.

[0057] In summary, the peak spectrum measurement reliability study method based on the forward thermoelectric model of the device provided by this invention has the following beneficial effects: First, this invention breaks through the multiphysics modeling technology of thermoelectric coupling of semiconductor power devices with semiconductor materials and semiconductor devices, and constructs a thermoelectric coupling model of semiconductor devices in the forward direction. It presents the multiphysics process of semiconductor device degradation induced by defects before and after reliability stress and under test field stress, which is difficult to observe experimentally, and clarifies the degradation mechanism of semiconductor devices under reliability stress.

[0058] Secondly, this invention is constantly in the process of fitting through electrical testing and forward modeling, ensuring the same level of accuracy as microscopic characterization methods.

[0059] Third, this invention does not rely on a large number of defect analysis equipment and the fabrication of test units that meet the requirements of such analysis, which greatly saves time and cost for semiconductor device reliability analysis and optimization design.

[0060] Fourth, the thermoelectric optimization design and reliability design of semiconductor devices proposed in this invention are specifically analyzed in specific scenarios, making the optimization design scheme of semiconductor devices more targeted and effective.

[0061] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations are intended to cover non-exclusive inclusion, such that an article or device comprising a list of elements includes not only those elements but also other elements not expressly listed. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or device comprising said element. Terms such as "connected" or "linked" are not limited to physical or mechanical connections but can include electrical connections, whether direct or indirect. The orientations or positional relationships indicated by terms such as "upper," "lower," "left," and "right" are based on the orientations or positional relationships shown in the accompanying drawings and are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0062] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification.

[0063] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. A method for studying the reliability of peak spectrum measurement based on a device's forward thermoelectric model, characterized in that, include: Using computer-aided design of semiconductor processes and devices, combined with semiconductor device material defect parameters obtained by electrical characteristic testing and material characterization analysis techniques and semiconductor device thermal property parameters obtained by time-domain thermal reflection techniques, an initial thermoelectric coupling model is constructed in a forward manner based on these parameters. Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics before the application of reliability stress, the filling conditions and measurement conditions for peak spectrum measurement are set, including gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device before the application of reliability stress under different peak spectrum measurement filling conditions and measurement conditions are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level. The defect characteristics corresponding to different defect locations are added to the initial thermoelectric coupling model. When the simulated electrical characteristics of the semiconductor device output by the initial thermoelectric coupling model with added defect characteristics are consistent with the measurement results of the basic electrical characteristics of the semiconductor device, a thermoelectric coupling model that is accurately fitted to the semiconductor device before the application of reliability stress is obtained. The basic electrical characteristics of the semiconductor device include output characteristics, transfer characteristics, gate-source leakage current, and drain-source leakage current. After the semiconductor device reliability stress is applied, based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the reliability stress is applied, the same filling conditions and measurement conditions as those before the peak spectrum measurement are set. "Same" means that the electric field of the semiconductor device is the same under the same filling conditions and measurement conditions for the same peak spectrum measurement, including gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device after the reliability stress are applied under different filling conditions and measurement conditions are obtained. The defect characteristics corresponding to different defect locations are added to the thermoelectric coupling model that accurately fits the semiconductor device before the reliability stress is applied. When the simulated electrical characteristics of the semiconductor device output by the thermoelectric coupling model that accurately fits the semiconductor device before the reliability stress is applied based on the added defect characteristics are consistent with the measurement results of the basic electrical characteristics of the semiconductor device after the reliability stress is applied, the thermoelectric coupling model that accurately fits the semiconductor device after the reliability stress is applied is obtained. Simultaneously, multiphysics simulations are conducted based on the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device before the reliability stress is applied, and multiphysics simulations are conducted based on the electrical characteristics of the thermoelectric coupling model accurately fitted to the semiconductor device after the reliability stress is applied. This is to accurately reproduce the multiphysics process of semiconductor device degradation induced by reliability stress-induced defects, and to clarify the degradation mechanism of semiconductor devices under reliability stress. The electrical characteristics of the thermoelectric coupling model include output characteristics, transfer characteristics, gate-source leakage current, drain-source leakage current, and electrical characteristics under different peak spectrum measurement conditions and filling conditions.

2. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, Under gate-source leakage current conditions, set the filling and measurement conditions for peak spectrum measurement, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device before the application of reliability stress, the stress condition corresponding to the gate-source leakage current of the semiconductor device is selected as the filling condition for peak spectrum measurement, and the stress condition corresponding to the linear conduction of the semiconductor device is selected as the measurement condition for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under the gate-source leakage current condition before the application of reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

3. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, Under the condition of leakage source leakage current, set the filling conditions and measurement conditions for peak spectrum measurement, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device before reliability stress is applied, the stress condition corresponding to the drain-source leakage current of the semiconductor device is selected as the filling condition for peak spectrum measurement, and the stress condition corresponding to the linear conduction of the semiconductor device is selected as the measurement condition for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under drain-source leakage current conditions before reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

4. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, Under conduction conditions, set the filling conditions and measurement conditions for peak spectrum measurement, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device before the application of reliability stress, the stress condition corresponding to the saturation conduction of the semiconductor device is selected as the filling condition for the peak spectrum measurement, and the stress condition corresponding to the linear conduction of the semiconductor device is selected as the measurement condition for the peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under the conduction condition before the application of reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

5. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, Adding the defect characteristics corresponding to different defect locations to the initial thermoelectric coupling model includes: The defect locations and corresponding defect characteristics obtained under the peak spectrum measurement conditions of gate-source leakage current, leakage-source leakage current, and conduction conditions before the reliability stress are applied are added to the initial thermoelectric coupling model. When the simulated electrical characteristics of the semiconductor device output by the initial thermoelectric coupling model based on the added defect characteristics are consistent with the measurement results of the basic electrical characteristics of the semiconductor device before the reliability stress is applied, a thermoelectric coupling model that is accurately fitted to the semiconductor device before the reliability stress is applied is obtained.

6. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, After the semiconductor device reliability stress is applied, under gate-source leakage current conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the application of reliability stress, if the TLM current characteristics do not change before and after the application of reliability stress, the same filling conditions and measurement conditions as before the application of reliability stress are used for peak spectrum measurement; if the TLM current characteristics decrease before and after the application of reliability stress, the stress conditions corresponding to increasing the gate-source leakage current of the semiconductor device are used as the measurement conditions for peak spectrum measurement, and the stress conditions corresponding to increasing the linear conduction of the semiconductor device are used as the measurement conditions for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under the gate-source leakage current conditions after the application of reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

7. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, After the semiconductor device reliability stress is applied, under drain-source leakage current conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the application of reliability stress, if the TLM current characteristics do not change before and after the application of reliability stress, the same filling conditions and measurement conditions as before the application of reliability stress are used for peak spectrum measurement; if the TLM current characteristics decrease before and after the application of reliability stress, the stress conditions corresponding to increasing the drain-source leakage current of the semiconductor device are used as the measurement conditions for peak spectrum measurement, and the stress conditions corresponding to increasing the linear conduction of the semiconductor device are used as the measurement conditions for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under the drain-source leakage current conditions after the application of reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

8. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, After the semiconductor device reliability stress is applied, under conduction conditions, the filling conditions and measurement conditions for peak spectrum measurement are set, including: Based on the measurement results of the basic electrical characteristics of the semiconductor device and the TLM current characteristics after the application of reliability stress, if the TLM current characteristics do not change before and after the application of reliability stress, the same filling conditions and measurement conditions as before the application of reliability stress are used for peak spectrum measurement; if the TLM current characteristics decrease before and after the application of reliability stress, the stress conditions corresponding to the saturation conduction of the semiconductor device are increased as the measurement conditions for peak spectrum measurement, and the stress conditions corresponding to the linear conduction of the semiconductor device are increased as the measurement conditions for peak spectrum measurement. The electrical characteristics, time constant spectrum, defect location, and defect characteristics corresponding to different defect locations of the semiconductor device under conduction conditions after the application of reliability stress are obtained. The defect characteristics include: defect type, defect concentration, and defect energy level.

9. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, Adding the defect characteristics corresponding to different defect locations to the thermoelectric coupling model of the semiconductor device accurately fitted before the application of reliability stress includes: The defect locations and corresponding defect characteristics obtained under the peak spectrum measurement of gate-source leakage current conditions, drain-source leakage current conditions, and conduction conditions after reliability stress are applied are added to the thermoelectric coupling model of the semiconductor device accurately fitted before reliability stress is applied. When the simulated electrical characteristics of the semiconductor device output by the thermoelectric coupling model of the semiconductor device accurately fitted before reliability stress is based on the added characteristic defects and are consistent with the measurement results of the basic electrical characteristics of the semiconductor device after reliability stress is applied, the thermoelectric coupling model of the semiconductor device accurately fitted after reliability stress is obtained.

10. The method for studying the reliability of peak spectrum measurement based on the forward thermoelectric model of a device according to claim 1, characterized in that, Simultaneously, multiphysics simulations were conducted on the electrical characteristics of the semiconductor device under the thermoelectric coupling model accurately fitted before reliability stress was applied, and on the electrical characteristics of the semiconductor device under the thermoelectric coupling model accurately fitted after reliability stress was applied. These simulations presented the multiphysics process of semiconductor device degradation induced by defects that is difficult to observe experimentally before and after reliability stress was applied, and under test field stress, and elucidated the degradation mechanism of semiconductor devices under reliability stress. The multiphysics included electric field distribution, current distribution, tunneling current, and defect trapped carriers under different peak spectrum measurement filling conditions and measurement conditions.

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