Adjustable threshold inverter circuit with adaptive substrate bias
By using an adjustable threshold inverter circuit with adaptive substrate bias and closed-loop negative feedback to adjust the substrate voltage, the problem of transistor threshold voltage drift is solved, and the circuit achieves stability and low power consumption under process and temperature variations.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI JIAOTONG UNIV
- Filing Date
- 2025-12-31
- Publication Date
- 2026-04-14
AI Technical Summary
In deep submicron processes, transistor threshold voltage is susceptible to process deviations and temperature drift, leading to circuit performance degradation. Traditional fixed bias voltages cannot adapt to environmental changes and suffer from high drive capability requirements, high power consumption, and threshold voltage drift issues.
An adjustable threshold inverter circuit with adaptive substrate bias is adopted. By replicating the inverter and forming a closed-loop negative feedback with the operational amplifier, the threshold voltage can be tracked and calibrated in real time. The threshold voltage of the inverter is actively controlled by adjusting the substrate voltage to adapt to changes in process, voltage and temperature.
Maintaining threshold stability under variations in process technology, voltage, and temperature enhances circuit robustness, reduces power consumption, and improves system stability.
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Figure CN121864085A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a technology in the field of amplifiers, specifically an adjustable threshold inverter circuit with adaptive substrate bias. Background Technology
[0002] In deep submicron processes, transistor threshold voltage is susceptible to process variations and temperature drift, leading to circuit performance degradation. Traditional methods, such as body bias adjustment, often use a fixed bias voltage, which cannot adapt to environmental changes. While there are solutions that compensate by adjusting the power supply voltage or using external bias circuits, these suffer from high drive capability requirements, high power consumption, and threshold voltage drift issues when the PVT changes. Summary of the Invention
[0003] This invention addresses the shortcomings of existing substrate biasing methods, which are mostly used for static compensation or local adjustment and lack global adaptive capability. It proposes an adjustable threshold inverter circuit with adaptive substrate bias. By replicating the inverter and operational amplifier to form a closed-loop negative feedback, real-time tracking and calibration of the threshold voltage are achieved. By adjusting the substrate voltage, precise control of the inverter threshold voltage is actively realized, maintaining threshold stability under variations in process technology, voltage, and temperature. This circuit is suitable for low-power, high-stability digital circuits and analog mixed-signal systems, and can replace traditional fixed threshold designs, improving system robustness.
[0004] This invention is achieved through the following technical solution:
[0005] This invention relates to an adjustable threshold inverter circuit with adaptive substrate bias, comprising: an operational amplifier and a main inverter, a replica inverter, and a substrate bias generation circuit connected thereto, wherein: the positive input terminal of the operational amplifier is connected to the replica inverter with its input and output shorted; the output terminal of the operational amplifier is connected to the substrate bias generation circuit through a bias resistor and further connected to the substrate bias voltage terminals of the main inverter and the replica inverter; the input and output terminals of the main inverter serve as the input and output terminals of the adjustable threshold inverter circuit; the operational amplifier compares the threshold voltage V output by the replica inverter. th, inv With external set voltage V set It also outputs a control signal to the substrate bias generation circuit to generate the substrate bias voltage V for the main inverter and the replica inverter. subn With V subp And through a negative feedback mechanism, the threshold of the replica inverter is locked to an externally set voltage V. set The bias voltage is applied to the main inverter to achieve adaptive threshold adjustment.
[0006] The replica inverter has the same structure as the main inverter, both including: a PMOS transistor and an NMOS transistor, wherein: the drain of the PMOS transistor is connected to the drain of the NMOS transistor, the gate of the PMOS transistor is connected to the gate of the NMOS transistor, the source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is grounded, and the substrate bias terminals of the PMOS transistor and the NMOS transistor are respectively connected to the substrate bias generation circuit.
[0007] In the replica inverter, the gates of both the PMOS and NMOS transistors are connected to their drains, i.e., the input and output are shorted to form a self-biased structure; in the master inverter, the gates of the PMOS and NMOS transistors are connected as the input terminal, and the drains of the PMOS and NMOS transistors are connected as the output terminal.
[0008] The substrate bias generation circuit includes: an NMOS current mirror circuit and a PMOS current mirror circuit connected thereto, and first and second bias resistors, wherein: the NMOS current mirror circuit and the PMOS current mirror circuit are each connected to the output terminal of the operational amplifier through the first and second bias resistors, and the output terminals of the NMOS current mirror circuit and the PMOS current mirror circuit are respectively connected to the substrate bias voltage terminals of the main inverter and the replica inverter.
[0009] The operational amplifier described herein employs, but is not limited to, a common-source stage or a common-source cascode stage circuit.
[0010] The bias resistor may be, but is not limited to, a variable resistor or a transistor equivalent resistor.
[0011] The aforementioned replica inverter is preferably a multi-replica parallel structure to improve matching accuracy.
[0012] Technical effect
[0013] This invention, based on a bias circuit, utilizes the negative feedback effect of an operational amplifier to adaptively adjust the substrate bias potential of the inverter in real time when the PVT changes. Compared with existing technologies, this invention can actively and adaptively adjust the inverter's switching threshold voltage when PVT conditions change, stabilizing it near a preset voltage and improving robustness. Attached Figure Description
[0014] Figure 1 This is a schematic diagram of the structure of the present invention;
[0015] In the diagram: S is the source, D is the drain, G is the gate, and B is the substrate;
[0016] Figure 2 This is a schematic diagram illustrating the effect of a preset voltage on the inverter's flip-flop threshold voltage.
[0017] Figure 3A schematic diagram showing the variation of the inverter's flip-off threshold voltage with temperature and process angle for adaptive substrate bias adjustment.
[0018] Figure 4 This is a schematic diagram showing the variation of the flip-off threshold voltage of an inverter without substrate bias adjustment as a function of temperature and process angle. Detailed Implementation
[0019] like Figure 1 As shown, this embodiment relates to an adjustable threshold inverter circuit with adaptive substrate bias, including: an operational amplifier and a main inverter, a replica inverter, and a substrate bias generation circuit connected thereto.
[0020] The main inverter includes: a first transistor M1 and a second transistor M2 connected in series, wherein the gates of the first and second transistors M1 and M2 are connected together and connected to the input terminal V. in The drain is connected to the output terminal V. out Afterwards, an external circuit is connected, the source is connected to ground potential and power supply potential respectively, and the substrate is connected to potential V. subn V subp .
[0021] The replica inverter includes a third transistor M3 and a fourth transistor M4 connected in series, wherein the gates and drains of the third and fourth transistors M3 and M4 are shorted and connected, that is, the input and output terminals of the replica inverter are shorted and connected to the positive input terminal of the operational amplifier, so that the voltage at the positive input terminal of the operational amplifier is the threshold voltage V of the replica inverter. th, inv The sources of the third and fourth transistors M3 and M4 are connected to ground potential and power supply potential, respectively, and the substrates are connected to potential V. subn V subp .
[0022] The first and third transistors M1 and M3 are NMOS; the second and fourth transistors M2 and M4 are PMOS.
[0023] The negative input terminal of the operational amplifier is connected to a preset potential V. set The output is a potential V. x .
[0024] The substrate bias generation circuit includes: fifth to ninth transistors and a pair of bias resistors, wherein: fifth, sixth, and ninth transistors M5, M6, and M9 constitute an NMOS current mirror, seventh and eighth transistors M7 and M8 constitute a PMOS current mirror, and the first bias resistor R1 is connected to the output potential V of the operational amplifier. x and NMOS substrate bias voltage V subn Between these points, the second bias resistor R2 is connected to the output potential V of the operational amplifier. xand PMOS substrate bias voltage V subp between.
[0025] According to current source I ref Finally, a replicating current I is generated in the series path of the sixth transistor M6, the first and second bias resistors R1 and R2, and the eighth transistor M8. b In this embodiment, R1 = R2 = R, then V subn The bias is V subn = V x - I b ·R,V subp The bias is V subp = V x - I b ·R, and the two are respectively fed back as the substrate bias voltages of the third and fourth transistors M3 and M4, and are connected to the substrate terminals of the first and second transistors M1 and M2 of the main inverter for biasing, so as to realize the replication inverter's threshold voltage V th, inv Copy to the master inverter.
[0026] By modifying the current I b The size of V can be adjusted. subp and V subn The difference. By designing a reasonable I b And R, can avoid potential breakdown voltage problems and PN junction conduction problems caused by substrate bias. Using the designed substrate bias generation circuit, a voltage from the amplifier output can be used to generate the V required for the inverter. subp and V subn .
[0027] When the inverter threshold voltage V is replicated th, inv ≠ V set At that time, with V th, inv > V set For example, the operational amplifier will affect V x The node charges, causing V to... subn V subp The increase leads to an increase in the threshold voltage V of M3. th,n The threshold voltage of M4 decreases, while the absolute value of |V| decreases. th,p | rises, thus causing V th,inv The voltage drops, eventually stabilizing the threshold voltage of the replica inverter at V. th,inv = V set V th, inv < V set The situation is similar. When a certain range of PVT changes leads to V... th, inv During drift, the operational amplifier feedback loop will dynamically adjust V according to the above process. subn V subpThis stabilizes the threshold voltage of the replica inverter at a preset voltage, i.e., V. th, inv = V set The substrate bias in the master inverter is the same as that in the replica inverter. In this analysis, both are the same size. In applications connected to external circuitry, the threshold voltage of the master inverter will be locked at V. th, inv = V set .
[0028] Through specific experiments, the above-mentioned adjustable threshold inverter circuit with adaptive substrate bias was simulated on the Cadence platform: using a simple five-transistor differential input single-ended output operational amplifier, I ref Using an ideal current source, the bias current after mirroring is I. b = 20uA, the first and second bias resistors are set to R1 = R2 = 5kΩ, and the test is performed when V set The threshold voltage V, characterized by the source / gate potential of the inverter, is replicated during the change. th,inv With V set The changes, based on simulation results, such as Figure 2 As shown, when V set When the voltage oscillates within a 200 mV range near the original threshold voltage of the inverter, V can be observed. th,inv Able to follow V well set Adjustments will be made.
[0029] In the PVT simulation of the test circuit, the preset voltage is set to a fixed potential V. set =510mV, such as Figure 3 As shown, the threshold voltage deviation of the inverter with adaptive substrate bias adjustment of the present invention is measured to be no more than 5mV at different process angles, and the threshold voltage drift is no more than 2mV under an environment with a temperature variation from -40℃ to 100℃; while the simulation results of the inverter without substrate bias adjustment in the traditional structure are as follows: Figure 4 As shown, the deviation of different process angles is about 10mV, and the threshold voltage drift is about 10mV in an environment where the temperature changes from -40℃ to 100℃.
[0030] Based on simulation results, within a certain range, the threshold voltage V of the inverter in this invention... th,inv It can adaptively adjust to the preset voltage V set Therefore, when the inverter threshold voltage drifts due to device process parameter mismatch or operating temperature changes in actual circuits, this transpose can compensate for the inverter threshold voltage drift by adjusting the substrate voltage in real time, thus achieving good PVT robustness. Furthermore, simulation results also demonstrate that adjusting V... set It can actively adjust the threshold voltage of the inverter within a certain range.
[0031] The above-described specific implementations can be partially adjusted by those skilled in the art in different ways without departing from the principles and purpose of the present invention. The scope of protection of the present invention is defined by the claims and is not limited to the above-described specific implementations. All implementation schemes within the scope of the claims are bound by the present invention.
Claims
1. An adjustable threshold inverter circuit with adaptive substrate bias, characterized in that, include: An operational amplifier and its connected main inverter, replica inverter, and substrate bias generation circuit are configured such that: the non-inverting input of the operational amplifier is connected to the replica inverter (with its input and output shorted); the output of the operational amplifier is connected to the substrate bias generation circuit via a bias resistor and further connected to the bias voltage terminals of the main inverter and the replica inverter; the input and output terminals of the main inverter serve as the input and output terminals of an adjustable threshold inverter circuit; and the operational amplifier compares the threshold voltage V output by the replica inverter. th, inv With external set voltage V set It also outputs a control signal to the substrate bias generation circuit to generate the substrate bias voltage V for the main inverter and the replica inverter. subn With V subp And through a negative feedback mechanism, the threshold of the replica inverter is locked to an externally set voltage V. set The bias voltage is applied to the main inverter to achieve adaptive threshold adjustment.
2. The adjustable threshold inverter circuit with adaptive substrate bias according to claim 1, characterized in that, The replica inverter has the same structure as the main inverter, both including: a PMOS transistor and an NMOS transistor, wherein: the drain of the PMOS transistor is connected to the drain of the NMOS transistor, the gate of the PMOS transistor is connected to the gate of the NMOS transistor, the source of the PMOS transistor is connected to the power supply, the source of the NMOS transistor is grounded, and the substrate bias terminals of the PMOS transistor and the NMOS transistor are respectively connected to the substrate bias generation circuit.
3. The adjustable threshold inverter circuit with adaptive substrate bias according to claim 2, characterized in that, In the replica inverter, the gates of both the PMOS and NMOS transistors are connected to their drains, i.e., the input and output are shorted to form a self-biased structure; in the master inverter, the gates of the PMOS and NMOS transistors are connected as the input terminal, and the drains of the PMOS and NMOS transistors are connected as the output terminal.
4. The adjustable threshold inverter circuit with adaptive substrate bias according to claim 1, characterized in that, The substrate bias generation circuit includes: an NMOS current mirror circuit and a PMOS current mirror circuit connected thereto, and first and second bias resistors, wherein: the NMOS current mirror circuit and the PMOS current mirror circuit are each connected to the output terminal of the operational amplifier through the first and second bias resistors, and the output terminals of the NMOS current mirror circuit and the PMOS current mirror circuit are respectively connected to the substrate bias voltage terminals of the main inverter and the replica inverter.
5. The adjustable threshold inverter circuit with adaptive substrate bias according to claim 1 or 4, characterized in that, The operational amplifier described herein employs a common-source stage or a common-source cascode stage circuit.
6. The adjustable threshold inverter circuit with adaptive substrate bias according to claim 1 or 4, characterized in that, The bias resistor is a variable resistor or a transistor equivalent resistor.
7. The adjustable threshold inverter circuit with adaptive substrate bias according to any one of claims 1-4, characterized in that, The aforementioned replica inverter is a multi-replica parallel structure to improve matching accuracy.
Citation Information
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