Staggered wiring structure of multi-layer interconnected flexible circuit board and forming method

Abstract

The invention discloses a staggered wiring structure of a multilayer interconnection flexible circuit board and a forming method, the staggered wiring structure comprises at least three layers of flexible substrates which are stacked in sequence, a bonding layer is arranged between two adjacent layers of flexible substrates, and the staggered wiring structure further comprises an interconnection assembly penetrating through all the flexible substrates and the bonding layer. At least one surface of each layer of flexible substrate is provided with a wiring layer, any two adjacent layers of wiring layers are arranged in a staggered manner along the length direction of the flexible substrate, each wiring layer comprises a plurality of signal circuits and a grounding circuit, and the signal circuits in the two adjacent layers of wiring layers have no projection overlapping area in the direction perpendicular to the surface of the flexible substrate. The staggered wiring design greatly improves the circuit density in unit area while avoiding interference, and the design of the ultrathin substrate, the wiring layer and the bonding layer is matched, so that the circuit board is integrally miniaturized and ultrathin, and the circuit board is adaptive to various light and thin application scenes. The heat dissipation performance is enhanced by adding heat conduction particles to the bonding layer, and the heat dissipation trouble of high-density wiring is solved.

Description

Technical Field

[0001] This invention relates to the field of flexible circuit board technology, specifically to a staggered wiring structure and forming method for a multilayer interconnected flexible circuit board. Background Technology

[0002] With the rapid development of consumer electronics, wearable devices, and foldable terminals, the market has placed higher demands on the multilayering, high density, and anti-interference performance of flexible circuit boards. Existing multilayer flexible circuit boards mostly employ aligned wiring designs, resulting in overlapping vertical projections of signal lines on adjacent layers. This leads to a significant increase in distributed capacitance and mutual inductance, highlighting interlayer crosstalk problems. Crosstalk intensity is difficult to control effectively, severely impacting the stability of high-frequency signal transmission. Simultaneously, traditional interconnect vias are often vertically aligned, easily causing interlayer stress concentration. Under bending conditions, interconnect components are prone to breakage, and bending fatigue life is generally only 30,000-50,000 cycles, failing to meet the requirements of flexible applications. Summary of the Invention

[0003] To overcome the shortcomings of existing technical solutions, this invention provides a staggered wiring structure and forming method for a multilayer interconnected flexible circuit board, which can effectively solve the problems raised in the background art.

[0004] The technical solution adopted by this invention to solve its technical problem is: A staggered wiring structure for a multilayer interconnect flexible circuit board includes at least three layers of flexible substrates stacked sequentially, an adhesive layer between two adjacent flexible substrates, and interconnect components penetrating all flexible substrates and the adhesive layer. At least one surface of each flexible substrate is provided with a wiring layer, and any two adjacent wiring layers are staggered along the length of the flexible substrate, with a stagger distance of 0.1mm-5mm. The wiring layer includes several signal lines and ground lines, and the signal lines in two adjacent wiring layers have no projected overlap in the direction perpendicular to the surface of the flexible substrate. The interconnect component includes at least two metallized interconnect holes, which are electrically connected to two adjacent wiring layers respectively, and the two metallized interconnect holes are staggered along the width direction of the flexible substrate with a staggered spacing of 0.05mm-2mm.

[0005] As a further description of the above technical solution, in the wiring layer, signal lines and ground lines are arranged alternately, and the spacing between adjacent signal lines in the same wiring layer is 0.03mm-0.2mm; In two adjacent wiring layers, the projection of the ground line of the upper wiring layer onto the surface of the flexible substrate completely overlaps with the gap area between two adjacent signal lines in the lower wiring layer.

[0006] As a further description of the above technical solution, the interconnect component also includes a flexible conductive connector, the two ends of which are electrically connected to the ends of the two metallized interconnect holes away from the wiring layer, respectively. The flexible conductive connector has an arc-shaped structure, with its bending direction facing the edge of the flexible substrate, and the arc radius is 0.2mm-1mm.

[0007] As a further description of the above technical solution, the thickness of the flexible substrate is 0.02mm-0.1mm, the thickness of the wiring layer is 0.01mm-0.05mm, and the thickness of the adhesive layer is 0.005mm-0.03mm. The outer surfaces of the two outermost flexible substrates are also provided with a cover layer, and the cover layer has a window structure corresponding to the wiring layer. The distance between the edge of the window structure and the edge of the wiring layer is 0.05mm-0.15mm.

[0008] As a further description of the above technical solution, a shielding layer is provided on the side of the wiring layer away from the flexible substrate. The shielding layer adopts a mesh copper foil structure, and the aperture of the mesh copper foil is 0.05mm-0.2mm. An insulating isolation pillar is provided between the shielding layers corresponding to two adjacent wiring layers. The insulating isolation pillar extends along the thickness direction of the flexible substrate and does not contact the metallized interconnect holes.

[0009] A method for forming a multilayer interconnected flexible circuit board includes the following steps: Step S1: Substrate pretreatment. Select at least three flexible substrates and perform plasma cleaning on the surface of each flexible substrate. The cleaning power is 100W-300W and the cleaning time is 30s-120s. Step S2: Wiring layer fabrication. A wiring layer is fabricated on the surface of the flexible substrate using direct laser imaging technology. When fabricating two adjacent wiring layers, the misalignment distance of the flexible substrate along the length direction is controlled by a positioning fixture, with a positioning accuracy of ±0.01mm. Step S3: Interconnect hole processing. Laser drilling technology is used to process through holes that penetrate all flexible substrates at preset positions. The drilling diameter is 0.05mm-0.3mm. The misalignment distance between two adjacent through holes along the width direction is precisely controlled by a CNC platform. Step S4: Metallization treatment, copper plating and electroplating are performed on the inner wall of the through hole to form a metallized interconnect hole with an electroplating thickness of 0.01mm-0.03mm; Step S5: Lamination molding. The flexible substrate with wiring layer and interconnection hole is stacked in sequence through adhesive layer and placed in laminator for hot pressing molding. The hot pressing temperature is 120℃-180℃, the pressure is 0.5MPa-2MPa, and the holding time is 30min-90min. Step S6: Post-processing, trimming the edges of the laminated circuit board, surface treatment, and bonding of the cover layer to complete the molding.

[0010] As a further description of the above technical solution, in step S2, the laser wavelength for direct laser imaging is 355nm-405nm, and the linewidth control accuracy is ±0.005mm; after the wiring layer is prepared, an etching process is performed, using copper chloride solution as the etching solution, with an etching temperature of 40℃-60℃ and an etching time of 1min-5min.

[0011] As a further description of the above technical solution, in step S4, the copper plating treatment adopts a chemical copper plating process, the copper plating temperature is 30℃-50℃, and the copper plating time is 10min-30min; the electroplating treatment adopts an acidic copper plating process, and the current density is 1A / dm²-3A / dm².

[0012] As a further description of the above technical solution, in step S5, before lamination, thermally conductive particles are added to the adhesive layer between two adjacent flexible substrates. The thermally conductive particles are alumina or boron nitride particles with a particle diameter of 0.001mm-0.01mm and an addition amount of 5%-15% of the adhesive layer mass.

[0013] As a further description of the above technical solution, in step S6, the surface treatment adopts a chemical nickel-gold plating process, with a nickel layer thickness of 0.005mm-0.01mm and a gold layer thickness of 0.001mm-0.003mm; the cover layer is bonded by hot pressing, with a bonding temperature of 80℃-120℃, a pressure of 0.2MPa-0.8MPa, and a bonding time of 10min-30min.

[0014] As a further description of the above technical solution, Compared with the prior art, the beneficial effects of the present invention are: The staggered wiring structure and forming method of the multilayer interconnected flexible circuit board of the present invention have at least one of the following beneficial effects during use: In terms of anti-interference, adjacent layer wiring is staggered along its length, and signal lines have no vertical projection overlap. Signal and ground lines are arranged alternately, with upper-layer ground lines precisely covering lower-layer signal gaps. Combined with a mesh copper foil shielding layer, this effectively reduces interlayer crosstalk and external electromagnetic interference, ensuring stable signal transmission. Regarding flexibility and reliability, interconnect vias are staggered along their width, paired with curved flexible conductive connectors to adapt to bending deformation, preventing interconnect breakage and improving reliability during bending. Interconnect vias undergo copper plating and electroplating to ensure stable interlayer conductivity, while lamination strengthens the tightness of interlayer bonding. In terms of high density and adaptability, the staggered wiring design significantly increases the line density per unit area while avoiding interference. Combined with an ultra-thin substrate, wiring layers, and adhesive layer design, this achieves overall miniaturization and ultra-thinness of the circuit board, adapting to various lightweight applications. Heat dissipation performance is enhanced by adding thermally conductive particles to the adhesive layer, solving the heat dissipation problem of high-density wiring. In terms of manufacturing processes, laser imaging and positioning fixtures ensure processing accuracy and improve yield. Post-processing processes such as electroless nickel-gold plating enhance surface performance, comprehensively improving product competitiveness. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the overall structure of the staggered wiring structure of a multilayer interconnected flexible circuit board according to the present invention. Figure 2 This is a schematic diagram of the first part of the staggered wiring structure of a multilayer interconnected flexible circuit board according to the present invention. Figure 3 This is a schematic diagram of the second part of the staggered wiring structure of a multilayer interconnected flexible circuit board according to the present invention. Figure 4 This is a schematic flowchart of a method for forming a multilayer interconnected flexible circuit board according to the present invention.

[0016] Numbering on the map: 1. Flexible substrate; 2. Adhesive layer; 3. Wiring layer; 4. Metallized interconnects; 5. Flexible conductive connector; 6. Window structure; 7. Cover layer; 8. Shielding layer; 9. Insulating isolation pillar. Detailed Implementation

[0017] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] like Figure 1-4As shown, the present invention provides a staggered wiring structure for a multilayer interconnected flexible circuit board, including at least three layers of flexible substrates stacked sequentially, an adhesive layer between two adjacent flexible substrates, and interconnection components penetrating all flexible substrates and adhesive layers. The addition of thermally conductive particles (5%-15%) to the adhesive layer increases the thermal conductivity of the circuit board to 0.8-1.2 W / (m·K), solving the heat dissipation problem caused by high-density wiring; the chemical nickel-gold plating post-treatment improves the surface oxidation resistance.

[0019] This embodiment employs at least three flexible substrates stacked sequentially, with adjacent substrates tightly bonded together via an adhesive layer to form a stable multilayer substrate. The flexible substrates provide a load-bearing foundation for the wiring layers, while the adhesive layer ensures interlayer bonding strength and maintains the overall structural flexibility, meeting the requirements for circuit board bending. Interconnect components running through all substrates and adhesive layers act as "bridges" for interlayer signal transmission, enabling electrical connectivity between different wiring layers.

[0020] At least one surface of each flexible substrate is provided with a wiring layer, and any two adjacent wiring layers are staggered along the length of the flexible substrate, with a stagger distance of 0.1mm-5mm. The wiring layer includes several signal lines and ground lines, and the signal lines in two adjacent wiring layers have no projected overlap in the direction perpendicular to the surface of the flexible substrate. The wiring layers (including signal lines and ground lines) on the surface of each flexible substrate are staggered by 0.1mm-5mm along the length of the substrate, and the signal lines of adjacent layers do not overlap in projection in the direction perpendicular to the substrate surface. This design avoids direct alignment of signal lines between adjacent layers in terms of spatial dimension, reduces distributed capacitance and mutual inductance between parallel conductors, and suppresses crosstalk interference at the source. At the same time, in some schemes, signal lines and ground lines are arranged alternately, and the projection of the upper ground line completely coincides with the gap between the lower adjacent signal line, forming a "top and bottom shielding" structure. The shielding effect of the ground lines further blocks signal leakage and external interference.

[0021] The interconnect component includes at least two metallized interconnect holes, which are electrically connected to two adjacent wiring layers respectively, and the two metallized interconnect holes are staggered along the width direction of the flexible substrate with a staggered spacing of 0.05mm-2mm.

[0022] At least two metallized interconnect vias in the interconnect assembly are electrically connected to adjacent wiring layers and are staggered by 0.05mm-2mm along the width of the substrate. This staggered design in the width direction avoids structural stress concentration caused by the vertical overlap of interconnect vias and achieves stable signal transmission between layers through the conductivity of the metallized vias. For solutions containing flexible conductive connectors, the arc-shaped connectors (radius 0.2mm-1mm) can adapt to the deformation during the bending process of the circuit board, preventing the interconnect from breaking due to bending, while ensuring conductive continuity.

[0023] The outermost flexible substrate's outer surface cover layer exposes the critical areas of the wiring layer through a window structure. The 0.05mm-0.15mm gap between the window edge and the wiring layer edge ensures the connectivity of the wiring layer while avoiding oxidation or short circuits caused by exposed edges. The mesh copper foil shielding layer (0.05mm-0.2mm aperture) on the outside of the wiring layer can block external electromagnetic interference, while the insulating isolation pillars between adjacent shielding layers prevent short circuits between shielding layers and maintain interlayer insulation performance.

[0024] Furthermore, in the wiring layer, signal lines and ground lines are arranged alternately, and the spacing between adjacent signal lines in the same wiring layer is 0.03mm-0.2mm; In two adjacent wiring layers, the projection of the ground line of the upper wiring layer onto the surface of the flexible substrate completely overlaps with the gap area between two adjacent signal lines in the lower wiring layer.

[0025] The staggered arrangement of wiring layers along the length (0.1mm-5mm) and the design of no vertical projection overlap of signal lines in adjacent layers minimize inter-layer signal crosstalk in terms of spatial layout. Compared with the traditional aligned wiring structure, the crosstalk intensity can be reduced by 30%-50%. The alternating arrangement of signal and ground lines (spacing 0.03mm-0.2mm) and the precise projection coverage of the upper-layer ground line on the lower-layer signal gap form a dual anti-interference system of "lateral isolation + vertical shielding", which further improves the stability of signal transmission.

[0026] Furthermore, the interconnect component also includes a flexible conductive connector, the two ends of which are electrically connected to the ends of the two metallized interconnect holes that are away from the wiring layer. The flexible conductive connector has an arc-shaped structure, with its bending direction facing the edge of the flexible substrate, and the arc radius is 0.2mm-1mm.

[0027] The staggered distribution of metallized interconnect holes along the width direction (0.05mm-2mm) in the interconnect components avoids the interlayer stress concentration problem caused by traditional aligned interconnect holes. Combined with arc-shaped flexible conductive connectors (radius 0.2mm-1mm), the bending fatigue life of the circuit board is increased to more than 100,000 cycles (when the bending radius is 1mm), which is far higher than the 30,000-50,000 cycles of the traditional structure.

[0028] Furthermore, the thickness of the flexible substrate is 0.02mm-0.1mm, the thickness of the wiring layer is 0.01mm-0.05mm, and the thickness of the adhesive layer is 0.005mm-0.03mm; The outer surfaces of the two outermost flexible substrates are also provided with a cover layer, and the cover layer has a window structure corresponding to the wiring layer. The distance between the edge of the window structure and the edge of the wiring layer is 0.05mm-0.15mm.

[0029] Offset wiring design can reduce the spacing between adjacent signal lines to 0.03mm while avoiding interference. Compared with traditional aligned wiring, the line density per unit area is increased by 50%-80%, meeting the design requirements of miniaturization and high density of electronic products.

[0030] Furthermore, a shielding layer is provided on the side of the wiring layer away from the flexible substrate. The shielding layer adopts a mesh copper foil structure with a mesh copper foil aperture of 0.05mm-0.2mm. An insulating isolation pillar is provided between the shielding layers corresponding to two adjacent wiring layers. The insulating isolation pillar extends along the thickness direction of the flexible substrate and does not contact the metallized interconnect holes.

[0031] The mesh copper foil shielding layer (0.05mm-0.2mm aperture) can effectively block external electromagnetic radiation interference, and the setting of insulating isolation pillars avoids the risk of short circuit between shielding layers, reducing the signal error rate of the circuit board by more than 20% in complex electromagnetic environments.

[0032] The ultra-thin design of the flexible substrate (thickness 0.02mm-0.1mm), wiring layer (0.01mm-0.05mm) and adhesive layer (0.005mm-0.03mm), combined with the multi-layer stacked structure, allows the overall thickness of the circuit board to be controlled at 0.1mm-0.5mm, making it suitable for ultra-thin applications such as wearable devices and foldable screen phones.

[0033] A method for forming a multilayer interconnected flexible circuit board includes the following steps: Step S1: Substrate pretreatment: Select at least three flexible substrates and perform plasma cleaning on the surface of each flexible substrate. The cleaning power is 100W-300W and the cleaning time is 30s-120s. Step S2: Wiring layer fabrication: A wiring layer is fabricated on the surface of the flexible substrate using direct laser imaging technology. When fabricating two adjacent wiring layers, the misalignment distance of the flexible substrate along the length direction is controlled by a positioning fixture, with a positioning accuracy of ±0.01mm. Step S3: Interconnection hole processing: Through holes penetrating all flexible substrates are processed at preset positions using laser drilling technology. The drilling diameter is 0.05mm-0.3mm. The misalignment distance between two adjacent through holes along the width direction is precisely controlled by a CNC platform. Step S4: Metallization treatment: The inner wall of the through hole is subjected to copper plating and electroplating treatment to form metallized interconnect holes. The electroplating thickness is 0.01mm-0.03mm. Step S5: Lamination: The flexible substrate with wiring layer and interconnection hole is stacked in sequence through adhesive layer and placed in laminator for hot pressing. The hot pressing temperature is 120℃-180℃, the pressure is 0.5MPa-2MPa, and the holding time is 30min-90min. Step S6: Post-processing: Trim the edges of the laminated circuit board, perform surface treatment and cover layer bonding to complete the molding.

[0034] Plasma cleaning (100W-300W, 30s-120s) removes oil and oxide layers from the flexible substrate surface, improving the adhesion between the wiring layer and the substrate; laser direct imaging technology (wavelength 355nm-405nm, linewidth accuracy ±0.005mm) accurately draws the wiring pattern, and with the help of positioning fixtures (accuracy ±0.01mm), the misalignment distance of adjacent layers along the length direction is controlled to ensure that the misalignment accuracy of the wiring layer meets the design requirements; etching treatment (copper chloride solution, 40℃-60℃, 1min-5min) further refines the line contour and ensures the line accuracy.

[0035] To further explain, in step S2, the laser wavelength for direct laser imaging is 355nm-405nm, and the linewidth control accuracy is ±0.005mm; after the wiring layer is prepared, an etching process is performed, using copper chloride solution as the etching solution, with an etching temperature of 40℃-60℃ and an etching time of 1min-5min.

[0036] Laser drilling technology processes through-holes (0.05mm-0.3mm in diameter) through the substrate at preset positions. The CNC platform precisely controls the misalignment of adjacent through-holes along the width direction. Chemical copper plating (30℃-50℃, 10min-30min) forms a uniform copper layer on the inner wall of the through-hole. Acid copper plating (current density 1A / dm²-3A / dm², thickness 0.01mm-0.03mm) enhances conductivity and forms metallized interconnect holes, providing conductive channels for interlayer interconnection.

[0037] The application of laser direct imaging technology (linewidth accuracy ±0.005mm) and positioning fixtures (misalignment accuracy ±0.01mm) effectively controls the processing accuracy of wiring layers and interconnect holes, increasing the product qualification rate to over 95%, which is 15%-20% higher than traditional photolithography processes.

[0038] To further clarify, in step S4, the copper plating process adopts a chemical copper plating process, with a copper plating temperature of 30℃-50℃ and a copper plating time of 10min-30min; the electroplating process adopts an acidic copper plating process, with a current density of 1A / dm²-3A / dm².

[0039] To further explain, in step S5, before lamination, thermally conductive particles are added to the adhesive layer between two adjacent flexible substrates. The thermally conductive particles are alumina or boron nitride particles with a particle diameter of 0.001mm-0.01mm, and the amount added is 5%-15% of the mass of the adhesive layer.

[0040] Plasma cleaning pretreatment improves the adhesion between the wiring layer and the substrate. Precise parameter control of the lamination process (temperature, pressure, time) ensures the stability of the interlayer bonding. The double treatment of copper plating and electroplating of metallized interconnect holes controls the contact resistance of the interconnect parts to below 5mΩ, improving interconnect reliability by 40%.

[0041] To further explain, in step S6, the surface treatment adopts a chemical nickel-gold plating process, with a nickel layer thickness of 0.005mm-0.01mm and a gold layer thickness of 0.001mm-0.003mm; the cover layer is bonded by hot pressing, with a bonding temperature of 80℃-120℃, a pressure of 0.2MPa-0.8MPa, and a bonding time of 10min-30min.

[0042] During the lamination process (120℃-180℃, 0.5MPa-2MPa, 30min-90min), the adhesive layer is heated and cured to achieve a tight bond between the substrate layers. The added alumina or boron nitride thermally conductive particles (0.001mm-0.01mm in diameter, 5%-15% addition) can improve the overall thermal conductivity. In the post-processing, the edges are trimmed to correct the shape, and electroless nickel-gold plating (0.005mm-0.01mm nickel layer, 0.001mm-0.003mm gold layer) improves the surface conductivity and wear resistance. The cover layer is hot-pressed (80℃-120℃, 0.2MPa-0.8MPa, 10min-30min) to achieve surface protection.

[0043] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A staggered wiring structure for a multilayer interconnected flexible circuit board, characterized in that: It includes at least three layers of flexible substrates stacked sequentially, with an adhesive layer between two adjacent flexible substrate layers, and also includes interconnecting components that penetrate all flexible substrates and the adhesive layer; At least one surface of each flexible substrate is provided with a wiring layer, and any two adjacent wiring layers are staggered along the length of the flexible substrate, with a stagger distance of 0.1mm-5mm. The wiring layer includes several signal lines and ground lines, and the signal lines in two adjacent wiring layers have no projected overlap in the direction perpendicular to the surface of the flexible substrate. The interconnect component includes at least two metallized interconnect holes, which are electrically connected to two adjacent wiring layers respectively, and the two metallized interconnect holes are staggered along the width direction of the flexible substrate with a staggered spacing of 0.05mm-2mm.

2. The staggered wiring structure of a multilayer interconnected flexible circuit board according to claim 1, characterized in that: In the wiring layer, signal lines and ground lines are arranged alternately, and the spacing between adjacent signal lines in the same wiring layer is 0.03mm-0.2mm; In two adjacent wiring layers, the projection of the ground line of the upper wiring layer onto the surface of the flexible substrate completely overlaps with the gap area between two adjacent signal lines in the lower wiring layer.

3. The staggered wiring structure and forming method of a multilayer interconnected flexible circuit board according to claim 1, characterized in that: The interconnect component further includes a flexible conductive connector, the two ends of which are electrically connected to the ends of the two metallized interconnect holes away from the wiring layer, respectively. The flexible conductive connector has an arc-shaped structure, with its bending direction facing the edge of the flexible substrate, and the arc radius is 0.2mm-1mm.

4. The staggered wiring structure and forming method of a multilayer interconnected flexible circuit board according to claim 1, characterized in that: The flexible substrate has a thickness of 0.02mm-0.1mm, the wiring layer has a thickness of 0.01mm-0.05mm, and the adhesive layer has a thickness of 0.005mm-0.03mm. The outer surfaces of the two outermost flexible substrates are also provided with a cover layer, and the cover layer has a window structure corresponding to the wiring layer. The distance between the edge of the window structure and the edge of the wiring layer is 0.05mm-0.15mm.

5. The staggered wiring structure and forming method of a multilayer interconnected flexible circuit board according to claim 1, characterized in that: A shielding layer is provided on the side of the wiring layer away from the flexible substrate. The shielding layer adopts a mesh copper foil structure with a mesh copper foil aperture of 0.05mm-0.2mm. An insulating isolation pillar is provided between the shielding layers corresponding to two adjacent wiring layers. The insulating isolation pillar extends along the thickness direction of the flexible substrate and does not contact the metallized interconnect holes.

6. A method for forming a multilayer interconnected flexible circuit board, used to prepare the staggered wiring structure according to any one of claims 1-5, characterized in that, Includes the following steps: Step S1: Substrate pretreatment. Select at least three flexible substrates and perform plasma cleaning on the surface of each flexible substrate. The cleaning power is 100W-300W and the cleaning time is 30s-120s. Step S2: Wiring layer fabrication. A wiring layer is fabricated on the surface of the flexible substrate using direct laser imaging technology. When fabricating two adjacent wiring layers, the misalignment distance of the flexible substrate along the length direction is controlled by a positioning fixture, with a positioning accuracy of ±0.01mm. Step S3: Interconnect hole processing. Laser drilling technology is used to process through holes that penetrate all flexible substrates at preset positions. The drilling diameter is 0.05mm-0.3mm. The misalignment distance between two adjacent through holes along the width direction is precisely controlled by a CNC platform. Step S4: Metallization treatment, copper plating and electroplating are performed on the inner wall of the through hole to form a metallized interconnect hole with an electroplating thickness of 0.01mm-0.03mm; Step S5: Lamination molding. The flexible substrate with wiring layer and interconnection hole is stacked in sequence through adhesive layer and placed in laminator for hot pressing molding. The hot pressing temperature is 120℃-180℃, the pressure is 0.5MPa-2MPa, and the holding time is 30min-90min. Step S6: Post-processing, trimming the edges of the laminated circuit board, surface treatment, and bonding of the cover layer to complete the molding.

7. The method for forming a multilayer interconnected flexible circuit board according to claim 6, characterized in that: In step S2, the laser wavelength for direct laser imaging is 355nm-405nm, and the linewidth control accuracy is ±0.005mm. After the wiring layer is prepared, an etching process is performed. The etching solution is copper chloride solution, the etching temperature is 40℃-60℃, and the etching time is 1min-5min.

8. The method for forming a multilayer interconnected flexible circuit board according to claim 6, characterized in that: In step S4, the copper plating process adopts a chemical copper plating process, with a copper plating temperature of 30℃-50℃ and a copper plating time of 10min-30min; the electroplating process adopts an acidic copper plating process, with a current density of 1A / dm²-3A / dm².

9. The method for forming a multilayer interconnected flexible circuit board according to claim 6, characterized in that: In step S5, before lamination, thermally conductive particles are added to the adhesive layer between two adjacent flexible substrates. The thermally conductive particles are alumina or boron nitride particles with a diameter of 0.001 mm to 0.01 mm, and the amount added is 5% to 15% of the mass of the adhesive layer.

10. The method for forming a multilayer interconnected flexible circuit board according to claim 6, characterized in that: In step S6, the surface treatment adopts a chemical nickel-gold plating process, with a nickel layer thickness of 0.005mm-0.01mm and a gold layer thickness of 0.001mm-0.003mm; the cover layer is bonded by hot pressing, with a bonding temperature of 80℃-120℃, a pressure of 0.2MPa-0.8MPa, and a bonding time of 10min-30min.

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