Wafer detection and identification device and method and medium
By integrating attribute detection and identification units into wafer inspection equipment and linking control units to achieve real-time anomaly locking, the low production efficiency and material mixing risks caused by independent equipment are solved, achieving efficient quality control and space saving.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAN ESWIN MATERIAL TECHNOLOGY CO LTD
- Filing Date
- 2025-11-28
- Publication Date
- 2026-04-14
AI Technical Summary
In existing technologies, wafer inspection equipment is set up independently, resulting in low production efficiency, large space occupation, and inability to prevent the risk of material mixing in real time.
The attribute detection unit and the identification unit are integrated into the same workstation. The wafer is identified and its attributes are detected through the linkage of the control unit. When the measured attributes are inconsistent with the preset attributes, the device status is switched to an abnormal lock state to prevent the carrier from flowing out.
This achieved zero-mixing quality control, reduced cleanroom space occupancy and OHT handling frequency, and improved testing efficiency.
Smart Images
Figure CN121865898A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to an apparatus, method and medium for wafer inspection and marking. Background Technology
[0002] Based on the different doping media, wafers are mainly divided into P-type and N-type. Because the two types are extremely similar in appearance, if they are mixed by human intervention during the manufacturing process, it will lead to serious cross-contamination, causing wafer scrap and prolonged equipment downtime.
[0003] The relevant solutions typically involve setting up independent physical inspection equipment to distinguish between P-type and N-type wafers. This approach firstly requires additional loading ports and loading / unloading devices, increasing the space occupied in the cleanroom; secondly, it increases the transport load of the automated material handling (OHT) system and the number of wafer transfers, reducing production efficiency; and finally, the independent inspection equipment leads to poor information flow, making it difficult to provide timely feedback on inspection results to prevent the transfer of abnormal batches.
[0004] Therefore, there is an urgent need for an integrated and efficient solution. Summary of the Invention
[0005] This disclosure provides an apparatus, method, and medium for wafer inspection and marking to solve the problems of low production efficiency, large space occupation, and inability to prevent material mixing risks in real time caused by the independent setting of inspection equipment in the prior art.
[0006] The technical solution disclosed herein is implemented as follows: In a first aspect, this disclosure provides a wafer inspection and marking apparatus, comprising: Loading port, configured to receive carriers loaded with batches of wafers; The marking unit is configured to perform marking operations on the wafers in the carrier according to the received work instructions; The attribute detection unit, integrated with the identification unit, is configured to detect the conductivity type attribute of the wafer; The control unit, which is communicatively connected to the loading port, the identification unit, and the attribute detection unit respectively, is configured as follows: Obtain the preset properties of the wafer; The control and identification unit initiates the identification operation and triggers the attribute detection unit to perform the detection operation on the wafer. Obtain the measured attributes returned by the attribute detection unit; and When the measured attributes are inconsistent with the preset attributes, the device's operating status is switched to an abnormal lock state to prevent the vehicle from flowing out of the loading port.
[0007] Secondly, this disclosure provides a method for wafer inspection and marking, including: When the carrier loaded with a batch of wafers arrives, the control and identification unit initiates the identification operation on the wafers in the carrier, and triggers the attribute detection unit to perform the detection operation on the wafers to obtain the measured attributes of the wafers. When the measured attributes are inconsistent with the preset attributes of the wafer, the operating status of the wafer detection and identification equipment is switched to an abnormal lock state to prevent the carrier from flowing out of the loading port.
[0008] Thirdly, this disclosure provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the wafer inspection and identification method as described in the second aspect.
[0009] This disclosure provides an apparatus, method, and medium for wafer inspection and labeling. It integrates an attribute detection unit and a labeling unit into the same workstation and locks the attribute detection results with the operating status of the equipment, preventing abnormal wafers from leaving the wafer inspection and labeling equipment and achieving the quality control goal of zero mixing. Furthermore, the attribute detection unit and labeling unit share a loading port, reducing the space occupied in the cleanroom, decreasing the number of OHT (Out-of-Temperature) handling operations, and improving inspection efficiency. Attached Figure Description
[0010] Figure 1 This is a schematic diagram of an application environment architecture provided in this disclosure.
[0011] Figure 2 This is a schematic diagram of the hardware structure of a wafer inspection and marking device provided in this disclosure.
[0012] Figure 3 This is a schematic diagram of the composition of a laser marking component provided in this disclosure.
[0013] Figure 4 This is a schematic diagram of the composition of a detection probe mechanism provided in this disclosure.
[0014] Figure 5 This is a schematic flowchart of a wafer inspection and marking method provided in this disclosure.
[0015] Figure 6 This is a schematic diagram of another wafer inspection and marking method provided in this disclosure.
[0016] Figure 7 This is a schematic diagram of the structure of a computing device provided in this disclosure. Detailed Implementation
[0017] The technical solutions in this disclosure will now be clearly and completely described with reference to the accompanying drawings.
[0018] Figure 1This is an application environment architecture diagram for the wafer inspection and marking equipment provided in this disclosure. In a highly automated semiconductor wafer manufacturing plant, production activities are collaboratively controlled by multi-level computer systems.
[0019] like Figure 1 As shown, the application environment architecture includes a Manufacturing Execution System (MES) 200, an Equipment Automation Program (EAP) 300, an Automated Material Handling System (AMHS) 400, and a wafer inspection and marking device 100 provided in this disclosure, hereinafter referred to as device 100.
[0020] As the brain of the factory, MES 200 stores detailed information about all wafers in production, including the wafer lot ID, the current process step, and the preset physical properties of the wafers in that batch, such as wafer size, thickness, conductivity type (P / N), and doping concentration.
[0021] AMHS 400 is responsible for automating the transport of carriers such as FOUPs within the factory. When MES 200 dispatches a batch of wafers to equipment 100 for marking, AMHS 400 controls the OHT trolley to transport carrier 410 to the loading port of equipment 100.
[0022] EAP 300 is middleware connecting MES 200 and equipment 100. It communicates bidirectionally with equipment 100 via the SECS / GEM (SEMI Equipment Communications Standard / Generic Equipment Model) protocol. In this disclosure, the control unit 140 of equipment 100 may be partially or entirely integrated into EAP 300, or it may exist as a standalone controller local to equipment 100 and interact with EAP 300. The functions of EAP 300 include: downloading recipes from MES, monitoring equipment status, collecting process data, and executing the mixing control logic of this disclosure.
[0023] Figure 2 This is a schematic diagram of the hardware structure of the wafer inspection and marking equipment 100 provided in this disclosure. The equipment 100 is designed as an integrated workstation, aiming to minimize its footprint and improve process efficiency. Figure 2 As shown, the device 100 includes: a load port 110, an identification unit 120, an attribute detection unit 130, and a control unit 140.
[0024] exist Figure 2 In this configuration, loading port 110 is configured to receive carriers loaded with batches of wafers 10. Specifically, port 110 conforms to the SEMI E15.1 standard and features automatic cover opening, carrier ID identification via RFID or barcode reading, and carrier presence detection. In some examples, loading port 110 also integrates an E84 optical communication module for handshaking interaction with AMHS 400.
[0025] exist Figure 2 In this process, the identification unit 120 is used to perform laser marking on the wafer, assigning each wafer a unique ID, such as an OCR character or a T7 Data Matrix QR code. For example... Figure 2 As shown, the identification unit 120 includes: The carrier platform (Aligner / Chuck) 121 is used to support the wafer 10. Specifically, the platform 121 has a vacuum adsorption function and can rotate with high precision around the Z-axis. Before marking, the wafer is rotated and the notch or flat edge of the wafer is found in conjunction with an edge sensor (not shown in the figure) to determine the crystal orientation coordinate system of the wafer, thereby completing the position calibration.
[0026] The laser engraving assembly 122 is positioned above the support platform 121. For example... Figure 3 As shown, the laser etching assembly 122 includes a laser source 1221, such as an Nd:YAG laser, a scanning galvanometer scanner 1222, and a lens 1223 (F-Theta Lens). Specifically, the laser source emits a high-energy pulsed laser, which is rapidly deflected by the scanning galvanometer and focused by the lens onto a specific area on the wafer surface, such as an edge, thereby etching marks of controllable depth.
[0027] exist Figure 2 In this configuration, the attribute detection unit 130 and the identification unit 120 are integrated and housed in the same workstation, physically sharing the carrier platform 121, thus eliminating the need for additional wafer transfer steps. The attribute detection unit 130 is configured to detect the conductivity type attribute of the wafer. For example... Figure 2 As shown, the attribute detection unit 130 may include: Position sensor 131, in this disclosure, can be a fiber optic position sensor. The probe of sensor 131 is mounted above the support platform 121, facing the wafer edge region. Its function is to monitor in real time whether the wafer has rotated / moved to a predetermined working position (i.e., a position accessible to the detection probe). Fiber optic sensors are characterized by fast response speed and strong resistance to electromagnetic interference, and can accurately capture minute changes at the wafer edge.
[0028] The detection probe mechanism 132 is configured to contact the wafer surface to sense electrical properties. The mechanism 132 is mounted on a retractable robotic arm or cylinder-driven shaft (not shown) and retracts to avoid the laser beam path when detection is not required.
[0029] exist Figure 2 In this embodiment, the control unit 140 can be implemented using an industrial control computer (IPC). Specifically, the control unit 140 is connected to the loading port 110, the identification unit 120, and the attribute detection unit 130 via an industrial bus (such as EtherCAT or RS232). Furthermore, the control unit is configured to run real-time control logic, process the aforementioned sensor signals, and communicate with the upper-level EAP 300 via the HSMS protocol. In this disclosure, the control unit is configured as follows: Retrieve the preset properties of wafer 10 from MES 200; The control marking unit 120 starts the marking operation to perform laser marking on the wafer 10. In addition, it also triggers the attribute detection unit 130 to perform the detection operation on the wafer 10 so that the attribute detection unit 130 can detect the conductivity type attribute of the wafer 10. The measured properties of wafer 10 are obtained from the property detection unit 130; and When the measured attributes are inconsistent with the preset attributes, the operating state of device 10 is switched to abnormal lock state to prevent the vehicle from flowing out of loading port 110.
[0030] In this disclosure, the control unit 140 is connected to the detection probe mechanism 132 and the position sensor 131, and is configured to control the detection probe mechanism 132 to sense the electrical characteristics of the wafer in response to a trigger signal from the position sensor 131. Specifically, the control unit is configured to drive the detection probe mechanism 132 to move to a predetermined working position to sense the electrical characteristics of the wafer when it receives a wafer positioning signal from the fiber optic position sensor 131 and the duration of the wafer positioning signal exceeds a preset threshold, such as 500 ms.
[0031] Through the above Figure 2The wafer inspection and labeling equipment shown integrates the attribute detection unit and the labeling unit into the same workstation, and links the attribute detection results with the equipment's operating status, preventing abnormal wafers from leaving the equipment and achieving the quality control goal of zero mixing. Furthermore, the attribute detection unit and the labeling unit share a loading port, reducing the space occupied in the cleanroom, decreasing the number of OHT (Out-of-Temperature) handling operations, and improving inspection efficiency.
[0032] Figure 4 This is a schematic diagram illustrating the composition of a detection probe mechanism 132 provided in this disclosure. Figure 4 As shown, the detection probe mechanism 132 includes a probe assembly 1321, which comprises two probes: a first probe P1 and a second probe P2. Specifically, the first probe P1 integrates a micro heater and is configured to heat to a preset temperature, for example, a temperature 20°C-60°C above ambient temperature. The second probe P2 is maintained at ambient temperature or is connected to a heat sink to maintain a temperature below the preset temperature reached by the first probe.
[0033] In addition, the detection probe mechanism 132 also includes a differential voltage measurement circuit 1322, which is configured to measure the thermoelectric potential difference generated when the first probe and the second probe are in contact with the wafer surface, and determine the actual conductivity type of the wafer based on the polarity of the thermoelectric potential difference.
[0034] In this disclosure, the probe assembly 1321 employs a configuration of both cold and hot probes, which allows for the differentiation of semiconductor types based on the Seebeck effect. Specifically, When the temperature is The first probe P1 and the temperature are When the second probe P2 simultaneously contacts the surface of wafer 10, a temperature gradient will be generated inside wafer 10. .
[0035] For N-type semiconductors, the majority carriers are negatively charged electrons. Under thermal excitation, electrons diffuse from the high-temperature region (P1) to the low-temperature region (P2), resulting in an excess of electrons accumulating at P2 and making it negatively charged, while P1 becomes relatively positively charged. Therefore, the thermoelectric potential difference generated when the first and second probes come into contact with the wafer surface is measured. It is a positive value.
[0036] For P-type semiconductors, the majority carriers are positively charged holes. Under thermal excitation, holes diffuse from the high-temperature region to the low-temperature region, resulting in a positive charge accumulation at P2 and a relatively negative charge at P1. Therefore, the thermoelectric potential difference generated when the first and second probes contact the wafer surface is measured. It is a negative value.
[0037] exist Figure 4 In the middle, the differential voltage measurement circuit 1322 is integrated at the rear end of the probe assembly 1321. The differential voltage measurement circuit 1322 includes an amplifier, a filter and an analog-to-digital converter (ADC) in sequence.
[0038] Specifically, the signals from the first probe P1 and the second probe P2 are respectively connected to the non-inverting input (+IN) and the inverting input (-IN) of an instrumentation amplifier (such as AD620 or INA118), thereby obtaining the thermoelectric potential difference signal and amplifying it. Understandably, this instrumentation amplifier has extremely high input impedance (…). (Level) to ensure that no current is drawn from a weak thermoelectric potential source, thus guaranteeing measurement accuracy.
[0039] The amplified analog voltage signal is filtered by a low-pass filter (LPF) to remove high-frequency noise, including electromagnetic interference generated when the laser marking component 122 is in operation.
[0040] The signal processed by the low-pass filter enters the analog-to-digital converter (ADC), is converted into a digital signal, and is transmitted to the control unit 140.
[0041] Control unit 140 presets a positive threshold and negative threshold After the control unit 140 receives the digital signal of the thermoelectric potential difference transmitted by the differential voltage measurement circuit 1322, it calculates the thermoelectric potential difference... With positive threshold and negative threshold Comparison: if > If so, the actual conductivity type of the wafer is determined to be N-type.
[0042] if < If so, the actual conductivity type of the wafer is determined to be P-type.
[0043] In this disclosure, if If the signal falls between two thresholds, it is determined to be a poor contact or an intrinsic semiconductor, triggering a retest or alarm.
[0044] Figure 5 This is a schematic flowchart of a wafer inspection and marking method provided in this disclosure. The method can be executed by a control unit 140. The specific steps of the method include: Step S501: Vehicle arrival response and communication status verification.
[0045] In this disclosure, when a carrier or FOUP carrying a batch of wafers is placed at loading port 110 by an automated handling system (OHT) or manually, sensors at the bottom of device 100, such as RFID readers or photoelectric sensors, trigger a carrier arrival event. Upon capturing this signal, control unit 140 immediately initiates a check of the online communication status of identification unit 120 and attribute detection unit 130 within device 100.
[0046] Specifically, the control unit 140 reads the communication state between the current identification unit 120 and the attribute detection unit 130. When the control unit 140 detects that the communication state of either the identification unit 120 or the attribute detection unit 130 is not "Online" (i.e., it is in an Offline, Disconnected, or CommunicationError state), the control unit 140 determines that the current environment does not meet operational safety requirements. At this time, the control unit 140 switches the operating state of the device 100 to an abnormal lockout state and sends a status update message to the upstream MES system, triggering the MES to not only logically stop dispatching new work orders to the device 100 (Stop Dispatching) but also mark the device 100 as unavailable. The control unit 140 also sends an exit command (Unclamp / Unload) to the identification unit 120 to remove the vehicle that has arrived at the loading port 110, preventing high-risk operations.
[0047] If, in step S501, the control unit 140 confirms that the communication status of both the identification unit 120 and the attribute detection unit 130 is online, the control unit 140 will allow the identification unit 120 to start the operation and proceed to step S502.
[0048] Step S502: Information acquisition while online.
[0049] Specifically, control unit 140 initiates a Lot InfoRequest to the upstream MES system via the EAP system. The MES system responds to this request by issuing detailed processing information (Lot Context) corresponding to the current Carrier. This information includes, but is not limited to: The site information (Step ID) is used to confirm whether the current process is a marking process.
[0050] The part number (Product ID) is used to identify the product model.
[0051] The recipe ID is used to specify the laser parameters required for marking and the judgment threshold required for detection.
[0052] Wafer information (Wafer Map) includes the slot position of each wafer in the carrier, wafer ID, and preset attribute information, such as the semiconductor type (P / N type) recorded by MES.
[0053] Step S503: Consistency verification of device information.
[0054] Specifically, before officially issuing the work instruction, the control unit 140 needs to perform a two-way information handshake and verification to prevent the MES instruction from conflicting with the current state of the device 100.
[0055] In detail, the control unit 140 reads the wafer information and recipe number (i.e., device-side Local Data) currently loaded or preset by the identification unit 120. The control unit 140 compares the information reported by the device side with the setting information obtained from the MES in step S502 item by item (cross-check).
[0056] If the comparison results show a mismatch, for example, the MES requires the use of Recipe_A, while device 100 is currently locked to Recipe_B; or the number of wafers identified by the device does not match the MES record, the control unit 140 determines that there is a process risk. At this time, the control unit 140 immediately sends an instruction to the identification unit 120 to exit the current carrier, reports a verification failure alarm to the MES, terminates the current process, and waits for manual confirmation.
[0057] Step S504: Job signal (JOB) conversion and distribution Specifically, when step S503 passes verification, meaning the information reported by the identification unit 120 is completely consistent with the MES setting information, the control unit 140 enters the instruction conversion stage. Specifically, the control unit 140 parses the standardized Lot information from the MES, typically in XML or JSON format, and converts it into a JOB signal (job instruction package) recognizable by the device 100. This JOB signal contains specific job parameters, a target Slot list, and the associated Process Job ID. The control unit 140 simultaneously sends this JOB signal to both the identification unit 120 and the attribute detection unit 130 via parallel communication threads.
[0058] For example, control unit 140 sends the JOB signal to identification unit 120 to control identification unit 120 to start identification work. Control unit 140 sends the JOB signal to attribute detection unit 130, causing attribute detection unit 130 to wait to be triggered to perform detection work on the wafer.
[0059] Step S505: Start and monitor the job Specifically, after the JOB signal is issued, the control unit 140 enters the real-time event listening mode to monitor the job start event of the identification unit 120.
[0060] When the identification unit 120 reports a Job Started event and it is captured by the control unit 140, the control unit 140 sends a Start Detection Command to the attribute detection unit 130. This ensures that the timing of the detection and identification operations is synchronized, preventing the detection probe from malfunctioning when the wafer is not in place or not aligned.
[0061] When the identification unit 120 reports a Job Start Failed event, such as card failure, vacuum adsorption failure, or laser engraving component not being ready, the control unit 140 sends a command to the attribute detection unit 130 to clear the received JOB information, preventing the attribute detection unit 130 from running idle or generating invalid data in a wafer-free state. Furthermore, the control unit 140 sends a command to the MES via EAP to perform a hold operation on the current LOT, preventing this abnormal batch from flowing to the next site. In addition, equipment engineers can manually troubleshoot hardware faults in the identification unit 120, and after the fault is completely resolved, the engineer performs a release operation on the held LOT via the MES. The released LOT is then pushed back to the loading port 110 and the detection process restarts from step S501.
[0062] Step S506: Operation Completion Monitoring and Fault Trigger Mechanism In this disclosure, during the operation, the control unit 140 continuously monitors the operating status of the identification unit 120 until it receives a job end event.
[0063] Specifically, when the identification unit 120 reports a Job Completed event, it indicates that the wafer etching is complete. The control unit 140 then sends an End Detection Command to the attribute detection unit 130, notifying the attribute detection unit 130 to stop the probe operation and prepare to upload the actual conductivity type of the wafer.
[0064] In this disclosure, the cycle of the marking unit 120 performing the marking operation and the cycle of the attribute detection unit 130 performing the detection operation overlap at least partially in time. It can be understood that the marking and detection operations are performed at least partially synchronously in time, saving production time and improving production efficiency.
[0065] When the identification unit 120 reports a Job End Failed event, such as laser engraving interruption or wafer unloading failure, the control unit 140 sends a command to the attribute detection unit 130 to clear its current JOB information and temporary cached data, as the detection data at this time may be unreliable due to process interruption. In addition, the control unit 140 simultaneously sends a command to the MES to freeze the current LOT. After waiting for the equipment engineer to troubleshoot the fault, a RELEASE operation is performed on the LOT marked with HOLD, and a decision is made on whether to re-test based on the actual situation.
[0066] Step S507: Verification of test results and handling of mixed lot In this disclosure, after receiving the End Detection Command, the attribute detection unit 130 reports the actual conductivity type of the wafer to the control unit 140.
[0067] Specifically, the attribute detection unit 130 sends the actual conductivity type of all wafers in the LOT to the control unit 140. The control unit 140 compares the actual conductivity type with the preset attribute information obtained from the MES in step S502, wafer by wafer.
[0068] When a mismatch is found in the type information of any wafer, for example, the MES is set to P-type but the actual conductivity type is N-type, the control unit 140 switches the operating state of the device 100 to an abnormal lockout state to prevent the carrier from flowing out of the loading port 110. In addition, the following operations will also be performed: The control unit 140 records in detail in the log which specific Slot ID or which wafers experienced type mismatch; The control unit 140 sends a HOLD LOT command to the MES and notes the conductivity type mismatch in the Hold Reason; Based on the EAP records, the equipment engineer identified and physically separated the wafers with abnormal types from the physical lot in a cleanroom environment. Equipment engineers manually operate the MES system to extract the information of abnormal Wafers from the original LOT and generate a new sub-Lot.
[0069] Step S508: Normal Posting and Data Archiving In this disclosure, if the comparison result in step S507 shows that the conductivity type of all wafers is exactly the same as the preset attribute of MES, the control unit 140 determines that the batch process is normal.
[0070] In this scenario, the control unit 140 performs a data packaging operation, summarizing the detection results with the processing information from the identification unit 120, such as engraving time and laser power records. The control unit 140 then sends the summarized data packet (DataCollection) to the upstream MES system for storage and traceability. Furthermore, the control unit 140 sends a remove command to the MES system, automatically posting the current LOT to the next step in the production process, and the Carrier automatically flows out.
[0071] Based on the same inventive concept as the aforementioned technical solution, see [link to inventive concept]. Figure 6 This disclosure illustrates another method flow for wafer inspection and marking, applied to the aforementioned wafer inspection and marking apparatus 100, the method comprising: S601: When a carrier loaded with a batch of wafers arrives, the control marking unit starts marking the wafers in the carrier and triggers the attribute detection unit to perform detection on the wafers to obtain the measured attributes of the wafers.
[0072] S602: When the measured attributes are inconsistent with the preset attributes of the wafer, the operating status of the wafer detection and identification equipment is switched to an abnormal lock state to prevent the carrier from flowing out of the loading port.
[0073] In some examples, the trigger attribute detection unit performs a detection job on the wafer to obtain the measured attributes of the wafer, including: When the wafer reaches the predetermined working position, the electrical characteristics of the wafer are sensed by contacting or approaching the wafer surface.
[0074] In some examples, sensing the electrical properties of the wafer by contacting or approaching the wafer surface includes: When a wafer positioning signal is received from the fiber optic position sensor and the duration of the wafer positioning signal exceeds a preset threshold, the detection probe mechanism is driven to move to the predetermined working position. The first probe and the second probe in the probe assembly of the detection probe mechanism are respectively contacted with the surface of the wafer to detect the potential of the first probe and the second probe respectively; wherein, the first probe is heated to a preset temperature and the second probe is kept at the ambient temperature; The differential voltage measurement circuit of the detection probe mechanism is used to measure the thermoelectric potential difference generated when the first and second probes come into contact with the wafer surface, and the actual conductivity type of the wafer is determined based on the polarity of the thermoelectric potential difference.
[0075] In some examples, when a carrier loaded with a batch of wafers arrives, the control identification unit initiates an identification operation on the wafers in the carrier, including: When the wafer is placed on the carrier platform, the wafer is rotated for position calibration; Once the wafer position is calibrated, a laser marking component is used to laser mark the wafer on the carrier platform.
[0076] In some examples, the use of laser marking components for laser marking of wafers on a carrier platform includes: A laser beam is emitted from a laser source; The movement path of the laser beam is controlled by a scanning galvanometer; By using a lens to focus the laser beam onto the wafer surface during its movement, markings are etched onto the wafer surface.
[0077] Please refer to Figure 7 The diagram illustrates a structural block diagram of a computing device provided in an exemplary embodiment of the present disclosure. This computing device can implement the functions of the control unit 140 in the wafer inspection and identification device 100.
[0078] In some examples, computing device 70 can be at least one of devices such as a smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. Computing device 70 has communication capabilities and can access wired or wireless networks. Computing device 70 can refer to one of multiple terminals; those skilled in the art will understand that the number of such terminals can be more or less. In some examples, computing device 70 can receive data based on the accessed wired or wireless network. It is understood that computing device 70 undertakes the computation and processing work of the technical solution of this disclosure, and this disclosure does not limit it in this regard.
[0079] like Figure 7 As shown, the computing device in this disclosure may include one or more of the following components: processor 710 and memory 720.
[0080] Optionally, the processor 710 connects various parts within the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 720, and by calling data stored in the memory 720. Optionally, the processor 710 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 710 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Specifically, the CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required for display on the touch screen; the NPU is used to implement Artificial Intelligence (AI) functions; and the baseband chip is used for wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 710, but may be implemented using a separate chip.
[0081] The memory 720 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 720 may include a non-transitory computer-readable storage medium. The memory 720 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 720 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.
[0082] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, WiFi module, power supply, Bluetooth module, etc., which will not be described in detail here.
[0083] This disclosure also provides a computer-readable storage medium storing at least one instruction that is executed by a processor to implement the wafer inspection and identification method as described in the above embodiments.
[0084] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the wafer inspection and marking methods described in the above embodiments.
[0085] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.
[0086] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.
[0087] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.
Claims
1. A wafer inspection and marking device, characterized in that, The device includes: Loading port, configured to receive carriers loaded with batches of wafers; The identification unit is configured to perform an identification operation on the wafers in the carrier according to the received work instructions; An attribute detection unit, integrated with the identification unit, is configured to detect the conductivity type attribute of the wafer; The control unit, which is communicatively connected to the loading port, the identification unit, and the attribute detection unit respectively, is configured as follows: Obtain the preset properties of the wafer; The identification unit is controlled to start the identification operation, and the attribute detection unit is triggered to perform the detection operation on the wafer. Obtain the measured attributes fed back by the attribute detection unit; and When the measured attribute is inconsistent with the preset attribute, the operating state of the device is switched to an abnormal lock state to prevent the vehicle from flowing out of the loading port.
2. The device according to claim 1, characterized in that, The attribute detection unit includes: A detection probe mechanism is configured to contact or approach the surface of the wafer to sense the electrical properties of the wafer; A position sensor is configured to monitor whether the wafer has reached a predetermined working position; The control unit is connected to the detection probe mechanism and the position sensor, and is configured to control the detection probe mechanism to sense the electrical characteristics of the wafer in response to a trigger signal from the position sensor.
3. The device according to claim 2, characterized in that, The detection probe mechanism includes: a probe assembly comprising a first probe configured to be heated to a preset temperature and a second probe configured to be maintained at an ambient temperature; and... A differential voltage measurement circuit is configured to measure the thermoelectric potential difference generated when the first probe and the second probe are in contact with the surface of the wafer, and to transmit the thermoelectric potential difference to a control unit to determine the actual conductivity type of the wafer.
4. The device according to claim 2, characterized in that, The position sensor is a fiber optic position sensor and is positioned above the wafer; The control unit is configured to drive the detection probe mechanism to move to the predetermined working position when it receives a wafer positioning signal from the fiber optic position sensor and the duration of the wafer positioning signal exceeds a preset threshold.
5. The device according to claim 1, characterized in that, The marking unit includes a support platform and a laser engraving assembly, wherein... The support platform is used to support and rotate the wafer for position calibration; The laser marking component is used to laser mark the wafer on the carrier platform.
6. The device according to claim 5, characterized in that, The laser etching assembly includes: a laser source, a scanning galvanometer, and a lens, wherein... The laser source is used to emit a laser beam; The scanning galvanometer is used to control the movement path of the laser beam; The lens is used to focus the laser beam onto the surface of the wafer during the movement of the laser beam to etch markings on the surface of the wafer.
7. The device according to claim 1, characterized in that, The control unit is configured to: Receive the identification operation start signal sent by the identification unit, and send a detection start command to the attribute detection unit; The system receives a job completion signal from the identification unit and sends a job completion command to the attribute detection unit; wherein the identification job cycle of the identification unit and the detection job cycle of the attribute detection unit overlap at least partially in time.
8. The device according to claim 1, characterized in that, The control unit further includes a communication status monitoring module, configured to: detect the online communication status of the identification unit and the attribute detection unit before the identification unit performs the identification operation; When both the identification unit and the attribute detection unit are in an online confirmed state, the identification unit is allowed to start the operation; When the online communication status of either the identification unit or the attribute detection unit is abnormal, the abnormal locking state is triggered and the vehicle is controlled to exit the loading port.
9. A method for wafer inspection and marking, characterized in that, The method is applied to equipment for wafer inspection and marking, and the method includes: When a carrier loaded with a batch of wafers arrives, the control identification unit initiates an identification operation on the wafers in the carrier, and triggers the attribute detection unit to perform an detection operation on the wafers to obtain the measured attributes of the wafers. When the measured attributes are inconsistent with the preset attributes of the wafer, the operating state of the wafer detection and identification device is switched to an abnormal lock state to prevent the carrier from flowing out of the loading port.
10. The method according to claim 9, characterized in that, The trigger attribute detection unit performs a detection operation on the wafer to obtain the measured attributes of the wafer, including: When the wafer reaches the predetermined working position, the electrical characteristics of the wafer are sensed by contacting or approaching the surface of the wafer.
11. The method according to claim 10, characterized in that, The method of sensing the electrical properties of the wafer by contacting or approaching the wafer surface includes: When a wafer positioning signal is received from a fiber optic position sensor and the duration of the wafer positioning signal exceeds a preset threshold, the detection probe mechanism is driven to move to the predetermined working position. The first probe and the second probe in the probe assembly of the detection probe mechanism are respectively contacted with the surface of the wafer to detect the potential of the first probe and the second probe respectively; wherein, the first probe is heated to a preset temperature and the second probe is maintained at the ambient temperature; The differential voltage measurement circuit of the detection probe mechanism is used to measure the thermoelectric potential difference generated when the first probe and the second probe are in contact with the wafer surface, and the actual conductivity type of the wafer is determined according to the polarity of the thermoelectric potential difference.
12. The method according to claim 9, characterized in that, When the carrier loaded with a batch of wafers arrives, the control identification unit initiates an identification operation on the wafers in the carrier, including: When the wafer is placed on the carrier platform, the wafer is rotated to perform position calibration; After the wafer position is calibrated, the wafer on the carrier platform is laser-marked using a laser marking component.
13. The method according to claim 12, characterized in that, The step of using a laser marking assembly to laser mark the wafer on the carrier platform includes: A laser beam is emitted from a laser source; The movement path of the laser beam is controlled by a scanning galvanometer; During the movement of the laser beam, a lens focuses the laser beam onto the wafer surface to etch markings onto the wafer surface.
14. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the wafer inspection and identification method as described in any one of claims 9 to 13.