Substrate, half bridge, full bridge, commutation unit, assembly and multi-component structure

Abstract

A planar substrate is provided having an electrically insulating ceramic material having a thermal conductivity of more than 100 W / m * K at a temperature of 25 DEG C.

Description

Technical Field

[0001] The present invention relates to a planar substrate, a half-bridge having the substrate, a full-bridge having the substrate, a commutation unit having the substrate, an assembly having the substrate, and a multi-component structure having the substrate. Background Technology

[0002] Improved substrates are needed for various electronic applications. In particular, improved substrates are required for power electronic devices. Improvements may involve, for example, efficiency, power density, reliability, size, or the material costs required for manufacturing.

[0003] In the prior art, substrates are described, for example, in US 2010 / 026098 A1, US 8683682 B2, WO 2019 / 149778 A1, WO 2021 / 047815 A1, WO 2020 / 12028 A1, or EP 3605604 A1. US 2015 / 0257273A1 describes a multilayer circuit board having a resin-based substrate. DE 4138214 A1 describes a method for external metallization. DE 102021129411 A1 describes an apparatus with a substrate. DE 102020203918 A1 illustrates a power module.

[0004] The substrate according to the existing technology does not meet the required or desired requirements. Summary of the Invention

[0005] Some of the problems described above can be at least partially improved by the substrate according to claim 1. Preferred embodiments of the invention are described in the dependent claims.

[0006] According to a first embodiment, a planar substrate is provided having an electrically insulating ceramic material. The electrically insulating ceramic material has a thermal conductivity exceeding 100 W / m·K at a temperature of 25°C.

[0007] Planar substrates, in particular, are substrates formed flat according to general technical understanding. Therefore, they can, for example, have a lateral extension that is much greater than their extension along the thickness direction. For example, this lateral extension can be at least 10 times the thickness.

[0008] Heat dissipation from components on or within a substrate is essential. This is particularly important in high-power-density applications, such as so-called sub-packages in LED, laser diode, or optical technologies. Higher power densities require greater dissipation of heat losses. The high thermal conductivity of the substrate according to the invention allows for more efficient dissipation of heat losses compared to substrates with lower thermal conductivity. This enables tighter packaging or denser arrangement of electrical and electronic components within and on the substrate. Consequently, smaller layouts are possible. Furthermore, better heat dissipation results in lower temperatures during operation, which in particular extends the lifespan of these components. Additionally, the smaller structure allows for reduced material costs.

[0009] Secondary effects can also be utilized during substrate shrinkage. Therefore, substrate shrinkage achievable through high thermal conductivity can have the following effects: it can shorten wire paths. This, in turn, reduces overall waste heat because, assuming the resistivity of the wire materials remains the same, the total resistance can be reduced, and thus the overall heat generated can be reduced. This also applies accordingly to capacitors and inductors. This enhances the shrinkage effect achievable through high thermal conductivity.

[0010] According to the present invention, in principle, any electrically insulating ceramic material that meets the above-mentioned thermal conductivity requirements is suitable. However, as long as electrical insulation is ensured, the highest possible thermal conductivity is preferred. Higher thermal conductivity also allows for better heat dissipation.

[0011] Particularly preferred is the use of a ceramic material with a thermal conductivity of at least 150 W / m·K at 25°C. This allows for even better heat dissipation.

[0012] Aluminum nitride is a particularly preferred material for ceramic materials. Therefore, aluminum nitride-based ceramic materials are preferred. The substrate can be referred to as an aluminum nitride-based substrate. At 25°C, aluminum nitride-based ceramic materials can have a thermal conductivity exceeding 170 W / m·K.

[0013] Aluminum nitride-based ceramic materials particularly refer to ceramic materials having aluminum nitride (AlN) as a major component. For example, an aluminum nitride-based ceramic material may consist of at least 90% aluminum nitride. Preferably, the aluminum nitride-based ceramic material consists of at least 95% aluminum nitride. More preferably, the aluminum nitride-based ceramic material consists of at least 98% aluminum nitride. The aluminum nitride-based ceramic material may be composed entirely of aluminum nitride.

[0014] This aluminum nitride-based ceramic material can, for example, have a thermal conductivity as high as 180 W / m·K. It can also have a tensile strength of at least 350 MPa, such as 450 to 500 MPa. Furthermore, it can possess an elastic modulus of at least 300 GPa, such as between 300 and 350 GPa. It can also have a coefficient of thermal expansion of 4 to 6 ppm / K, such as 4.5 to 5.5 ppm / K. Finally, it can have a dielectric constant of 7 to 10, such as 8.5 to 8.9. 11 and 10 15 The resistivity is measured in Ωcm. This aluminum nitride-based ceramic material can exhibit a breakdown strength exceeding 30 kV / mm. The loss factor (tan δ) can be less than 2.2 × 10⁻⁶. -4 Moreover, it is preferred to be less than 2.0 × 10 -4 The breakdown strength can be, for example, 1.8 × 10⁻⁶. -4 Or even higher.

[0015] The substrate mentioned here can be, for example, a multilayer substrate. This is particularly applicable to aluminum nitride-based substrates.

[0016] The correspondingly designed aluminum nitride substrate can be provided as HTCC (high temperature cofired ceramics).

[0017] According to another embodiment, connection points for electrical or electronic components can be provided on the top of the substrate. These electrical or electronic components can be active or passive. In particular, the substrate can be suitable as a carrier for capacitors, silicon carbide semiconductors, NTC temperature sensors, Hall current sensors, or other electronic components.

[0018] According to another embodiment, the substrate may have a metallization layer on top. In particular, the metallization layer may be a structured metal layer on top of the substrate. For example, the metallization layer may be implemented as a structured copper-containing layer. The metallization layer may be equipped with a surface coating comprising nickel, palladium, and / or gold. This structuring can be used, for example, to electrically connect top components via the aforementioned connection points.

[0019] According to another embodiment, alternatively or additionally, through-holes can be arranged in the substrate, these through-holes guiding through the substrate in the thickness direction. Connection points can also be connected to these through-hole contacts. By using through-holes, conductivity can be achieved using the thickness direction of the substrate. This allows for a reduction in size compared to purely surface-based component electrical connections because third-dimensional conductivity is enabled. This can help shorten wire paths, which can provide the aforementioned advantages. The through-holes can have a diameter of 50 to 200 μm.

[0020] These vias can be implemented as power vias. For example, these vias can be implemented as hollow cylinders with a conductive material coated on their inner surface. In particular, it can be a metallization layer with a copper layer. Additionally, the metallization layer can have a surface coating containing nickel, palladium, and / or gold. Alternatively or additionally, the vias or power vias can be implemented as vias completely filled with a filler material. The filler material can in particular be a conductive material. The same applies to the cases mentioned below for internal electrodes and / or other metal structures in the substrate. Such vias completely filled with conductive material can in particular be arranged in an array or formed in an array. Such arrays of vias can offer the advantage of better area utilization.

[0021] According to another embodiment, at least one internal electrode can be formed in the substrate. The internal electrode and the external metallization layer can be designed such that they extend parallel to each other. Direct currents in opposite directions can be guided in these two conductors (here, the internal electrode and the external metallization layer). This parallel guidance can reduce electromagnetic induction associated with the wires. In particular, assuming that the internal electrodes have the same cross-sectional geometry, a smaller inductance can be achieved compared to guiding these internal electrodes side by side. Alternatively, one of these internal electrodes can also be guided on the outer surface of the substrate, either as a conductor or as a metallization layer.

[0022] Alternatively or additionally, two internal electrodes, namely a first internal electrode and a second internal electrode, can be formed in the substrate. Accordingly, these two internal electrodes can also be guided in parallel, and they can also be designed such that a reverse direct current is applied to them, which brings the same advantages as described above. Furthermore, the cases of two internal electrodes or one internal electrode and one external metallization layer can be interchanged accordingly. In summary, two conductors are formed opposite to each other in the substrate in a corresponding manner.

[0023] Preferably, the two conductors are designed to be flat and with their surfaces facing each other. This flat design is particularly suitable for a flat design parallel to the entire substrate. In particular, the internal electrodes can be designed as layers in a multilayer structure. It is also preferred that the two conductors are guided with the smallest possible distance between them. Here, the distance between the conductors can be particularly less than 150 μm, and preferably less than 100 μm. This is especially suitable for the two internal electrodes. Preferably, the distance is at least 20 μm. The thickness of the internal electrodes can be between 5 and 20 μm.

[0024] By using the above measures, better decoupling and faster switching can be achieved.

[0025] According to another embodiment, the first and second internal electrodes can be surrounded by a common shielding cage. This shielding cage can also be called a Faraday cage. The correspondingly implemented signal line shielding can reduce the coupling input of radiated EMI (electromagnetic interference) from other components. This, in particular, enables faster switching. Furthermore, this additionally avoids complex other filtering measures. As mentioned above, through thermal characteristics, denser packaging or closer arrangement of electronic components can be achieved. Together with the parallel guidance of the internal electrodes, the shielding cage can be used to reduce electromagnetic interactions between components that would otherwise increase due to denser arrangement.

[0026] According to another embodiment, the internal electrodes guided within the substrate can also be equipped with shielding cages. In principle, this would offer some advantages, but to a lesser extent, due to the lack of parallel guidance.

[0027] The shielding cage may have a top and a bottom, which are designed as planar metal structures. These planar metal structures may be oriented parallel to the surface of the substrate. The sides of the shielding cage may be formed by so-called shielding cage plated through-holes. These shielding cage plated through-holes can be constructed in a structure similar to through-holes. They may, for example, form side pillars or side columns of the shielding cage.

[0028] This structure enables efficient shielding and faster switching speeds.

[0029] According to another embodiment, the internal electrode is formed of a conductive material that can withstand the sintering temperature during the co-firing of the raw materials of the electrode and the ceramic material. In other words, the material of the internal electrode can be selected such that it can withstand the sintering steps in the substrate manufacturing process.

[0030] Similarly, all metal structures embedded in a substrate can meet this requirement.

[0031] In particular, all other metallic structures in the internal electrodes and / or substrate can be made of tungsten, molybdenum, tantalum, or niobium. Alternatively, they can be made of alloys with or composed of these materials, provided that the alloys can withstand the sintering conditions during manufacturing. These materials are preferred, especially for aluminum nitride-based HTCC ceramics, because they can withstand the HTCC sintering conditions.

[0032] The proportion of the metal structure in the substrate can be less than 25 vol%, preferably 10 vol% or less, or even 5 vol% or less. When the proportion of the metal structure is 10 vol% or less, only minor stress will be generated in the substrate.

[0033] According to another embodiment, a heat sink can be disposed on the bottom of the substrate. The heat sink can be a metal structure or a ceramic structure. The heat sink can have a shape that increases the surface area, such as ribs or fins. The heat sink can increase the effective surface area of ​​the substrate.

[0034] The advantages of this type of heat sink lie in the fact that heat distributed through the excellent thermal conductivity of the substrate can be efficiently released to the environment. This creates a synergistic effect with the substrate. Due to the substrate's thermal conductivity, the generated heat is rapidly and widely distributed throughout the substrate. Thus, the large surface area of ​​the heat sink can absorb heat. Therefore, the need for the heat sink itself to distribute heat from the substrate to its surface can be reduced.

[0035] According to another embodiment, the substrate has an EMI shield. This embodiment is particularly preferred in combination with an embodiment in which the substrate has a heat sink at the bottom. In this case, it is preferable that the EMI shield is embedded between the heat sink and the internal electrodes.

[0036] EMI shielding can facilitate electromagnetic decoupling, especially between internal electrodes and heat sinks. This can improve switching speed. In particular, combining parallel-guided internal electrodes with a shielding cage can achieve switching speeds exceeding 30 V / ns.

[0037] According to another embodiment, the substrate has a thickness of at least 100 mm. 2 The area and thickness are less than 3 mm. For example, the substrate can have a thickness of at least 150 mm. 2 The area. For example, the substrate can have at least 500 mm². 2 The area. For example, the substrate can have at least 1500 mm². 2 The area. This area could be, for example, 1900 mm. 2 Or larger. The area can also be relatively small. A small substrate can be, for example, 500 mm. 2 Or smaller, such as 250 mm2 Or smaller, such as 200 mm 2 The thickness can be 3.0 mm or less, or 1.5 mm or less, or 1.2 mm or less. For example, the thickness can be 0.25 mm or more, and particularly preferably 0.3 mm or more. Therefore, the thickness can be, for example, between 0.3 mm and 1.0 mm. Here, if the substrate is a multilayer substrate, it can be formed of a ceramic layer with a thickness of 30 μm to 150 μm.

[0038] According to another preferred embodiment, cavities can be formed on the top of the substrate. These cavities are designed to accommodate one or more electrical or electronic components. These cavities preferably include connection points for the electrical or electronic components. The depth of these cavities, or particularly these cavities, can be designed such that the surface of the component is flush with the surface of the substrate in which these cavities are formed. This facilitates the connection of a capacitor circuit board or a second substrate to the substrate surface. These cavities can, for example, have a depth of 30 μm to 500 μm.

[0039] In these cavities, the thickness of the substrate is reduced. This allows for electrical connections, for example, vias with shorter wiring paths. This provides the aforementioned advantage of shorter wiring paths. Furthermore, when a heat sink is placed at the bottom, these cavities also allow for an additional reduction in the length of the heat column relative to the heat sink.

[0040] Furthermore, by using cavities, electrical or electronic components can be arranged using a three-dimensional structure, enabling a denser spatial arrangement of these components.

[0041] According to another embodiment, the embedded temperature measurement unit is embedded in the substrate below the connection point. For example, the embedded temperature measurement unit may be a metal bend structure.

[0042] The embedded temperature measurement unit enables the detection of temperature near the connection point or near the mounted component.

[0043] The metal tortuous structure is preferably made of tungsten. A particular advantage of the metal tortuous structure is its extremely short response time to temperature changes. This allows for rapid emergency shutdown of individual components, thereby extending the lifespan of the entire substrate or the assembly incorporating it, as other components are less likely to be damaged simultaneously.

[0044] These metal convoluted structures can be integrated into the layered structure of multilayer substrates in a manner similar to the internal structures of other metals.

[0045] Because a thermally conductive substrate allows for a more compact encapsulation of components, it frees up space within the substrate's volume or on its surface, enabling the mounting of other components, such as embedded temperature measurement units. Thus, embedded temperature measurement units can be more easily implemented using the substrate according to the invention.

[0046] According to another embodiment, cooling lines can be embedded in the substrate. Multiple cooling lines can also be embedded in the substrate. The cooling lines can operate with a coolant. The coolant may include, for example, ethylene glycol and / or water. The cooling lines can be embedded in the substrate as tubular lines. In principle, the cooling lines can have any suitable orientation within the substrate. The orientation within the substrate can be, for example, W-shaped, U-shaped, or meandering. The cross-section of the lines can be of any shape, especially circular, elliptical, or even rectangular or triangular. Any circular cross-sectional shape has the advantage of allowing the coolant to flow with less resistance.

[0047] By combining the substrate with good thermal conductivity, advantages similar to those mentioned for heat sinks are achieved. Because the substrate itself can efficiently distribute heat across a flat surface, the cooling system does not require a large area to achieve similar or satisfactory cooling results as is possible with substrates of poor thermal conductivity. This makes it easier to construct substrates with cooling pipes.

[0048] According to another embodiment, substrate 19 has buses for DC+ and DC-. These buses can be integrated into the substrate. By means of the buses, the volume of the substrate can be used for signal or power transmission. Due to the miniaturization achievable with the substrate according to the invention, signal or power transmission via buses is suitable because it eliminates the need for separate wiring. Otherwise, this would occupy additional volume. Furthermore, the substrate surface densely packaged using the substrate according to the invention requires fewer individual contact points to be connected.

[0049] The substrate according to the invention is particularly suitable for constructing half-bridges or full-bridges. The substrate can also be used to construct commutation units. Therefore, based on or using this substrate, a commutation unit, a half-bridge, or a full-bridge is provided.

[0050] According to another embodiment, a component is provided. The component includes a substrate configured as described above. Furthermore, electrical and / or electronic components are arranged on the substrate. These electrical and / or electronic components can be active or passive components. In particular, these components can be arranged within a cavity simply by being placed in the substrate. Preferably, the temperature measuring unit is arranged adjacent to the other components. In particular, in the case of a cavity, this external temperature measuring unit can be arranged together with the other components within the cavity. The corresponding arrangement of the temperature measuring unit enables personalized temperature measurements.

[0051] These temperature measurement units are preferably used in conjunction with the embedded temperature measurement units shown above. Especially when the embedded temperature measurement units have a metal beveled structure, these embedded temperature measurement units have short response times, but their absolute measurement accuracy is not very accurate. This can be compensated for by using external temperature measurement units with higher measurement accuracy. Particularly preferred for accurate temperature measurement is an NTC temperature sensor as an external temperature detector.

[0052] According to another embodiment, a multi-component structure is provided. This multi-component structure preferably includes two substrates. The first substrate may have all the characteristics described above. The first substrate is particularly suitable for assemblies consisting of substrates and other components, as shown in the figure. In this case, the first substrate serves as the lower substrate. A second substrate according to the invention is disposed on or above the first substrate and maintains thermally conductive contact with the first substrate.

[0053] Especially when a heat sink is arranged on the lower substrate, waterfall-style or multi-flow heat conduction from the first substrate can be achieved. Then, heat can be dissipated through the heat sink.

[0054] Similar good heat distribution could previously only be achieved by placing a metal distribution layer made of thermally conductive metal on the surface of a substrate.

[0055] According to one embodiment, the substrate may have one or more auxiliary vias; however, especially for multi-component structures, this embodiment is preferably not limited to this. The auxiliary vias may, for example, be designed as cylindrical openings in the substrate. For example, after the substrate is arranged above an electronic component, these auxiliary vias may be used, or designed and provided, to allow potting material to be introduced onto or around the electronic component. This potting material may be used for electrical insulation, mechanical stability, contact protection, dustproof sealing, and / or moistureproof sealing of electronic components and / or contacts located below the substrate having these auxiliary vias. For example, such components may be arranged on a first substrate in a multi-component structure. Then, a second substrate arranged above it may have auxiliary vias. Attached Figure Description

[0056] In the following description, embodiments of the invention or related measurements or simulations are illustrated with reference to the accompanying drawings. All graphical representations herein are purely schematic, and absolute dimensions or scales cannot be derived from these representations. The invention is not limited to the illustrated embodiments.

[0057] Figure 1 A cross-section of a first embodiment of the substrate is shown.

[0058] Figure 2A cross-section of a second embodiment of the substrate is shown.

[0059] Figure 3 A perspective plan view of a second embodiment of the substrate is shown.

[0060] Figure 4 A third embodiment of the substrate is shown.

[0061] Figure 5 A fourth embodiment of the substrate is shown.

[0062] Figure 6 A first embodiment of the component is shown.

[0063] Figure 7 A second embodiment of the component is shown.

[0064] Figure 8 A fifth embodiment of the substrate is shown.

[0065] Figure 9 A schematic diagram of the integrated busbar is shown.

[0066] Figure 10 It shows Figure 9 The layered structure of the busbars in the system.

[0067] Figure 11 A three-phase commutator unit is shown.

[0068] Figure 12 A fourth embodiment of the component is shown.

[0069] Figure 13 A fifth embodiment of the component is shown.

[0070] Figure 14 A sixth embodiment of the assembly with a control board is shown.

[0071] Figure 15 An embodiment of a multi-component structure is shown.

[0072] Figure 16 The entire bridge is shown.

[0073] Figure 17 The thermal distribution in the AlN substrate is shown.

[0074] Figure 18 The thermal distribution in the glass-ceramic contrast substrate is shown.

[0075] Figure 19 The current distribution in the inner layer is shown.

[0076] Figure 20 The voltage distribution in the inner layer is shown.

[0077] Figure 21 The temperature distribution in the substrate is shown.

[0078] Figure 22 The statistical warpage response of an aluminum nitride-based multilayer substrate is shown.

[0079] Figure 23 A microscopic image of the first cross-section of the substrate is shown.

[0080] Figure 24 A microscopic image of the second cross-section of the substrate is shown.

[0081] Figure 25 A comparative measurement of the current-voltage response of a metal-oxide-semiconductor field-effect transistor is shown.

[0082] Figure 26 A comparative measurement of the temperature-power response of a metal-oxide-semiconductor field-effect transistor is shown.

[0083] Figure 27 A fragment of an embodiment of the substrate is shown.

[0084] Figure 28 A fragment of an embodiment of the commutation unit is shown.

[0085] Figure 29 An embodiment of the power via is shown in schematic cross-section.

[0086] Figure 30 An example of a circuit board is shown.

[0087] Figure 31 An embodiment of the through-hole array is shown in a schematic cross-section.

[0088] Figure 32 An embodiment of the via array and power via is shown in schematic cross-section.

[0089] Figure 1 An aluminum nitride-based substrate 1 is shown. The aluminum nitride-based substrate includes a substrate body 2, which has a top 21 and a bottom 22. Detailed Implementation

[0090] The substrate 1 has a thickness of 0.3 to 3.0 mm, such as 0.3 to 1.0 mm. The thickness can be, for example, 300 μm, 850 μm, or 1000 μm. The planar dimensions can be 4 inches or 8 inches. These planar dimensions can be, for example, 54 mm × 41 mm. Alternatively, the area can be 56 mm × 42 mm. Alternatively, the area can be 40 mm × 26.5 mm. Alternatively, the area can be 85 mm × 85 mm. Alternatively, a small substrate can also have a thickness of, for example, 150 mm. 2Up to 200 mm 2 The area.

[0091] The ceramic material of the aluminum nitride-based substrate 1 is aluminum nitride. The substrate 1 is formed as a multilayer substrate during HTCC sintering. In addition to green thin-film based manufacturing processes, 3D printing technology can also be used to manufacture the substrate. With the help of 3D printing technology, ceramic structures and any metal structures can be realized in the substrate.

[0092] At 25°C, the substrate 1 according to this embodiment has a thermal conductivity between 170 and 180 W / m·K. Its flexural strength is 450 to 500 MPa. Its elastic modulus is 320 GPa. Its coefficient of thermal expansion is 4.7 ppm / K. Its dielectric constant is approximately 8.7. Its resistivity at 280°C is 10 Ω·cm. 13 Ωcm. Breakdown strength exceeds 30 kV / mm. Loss factor tan δ is 2.0 × 10⁻⁶. -4 .

[0093] In particular, aluminum nitride has a coefficient of thermal expansion that is close to that of silicon carbide, gallium nitride, or silicon. This reduces the thermomechanical forces between the substrate and the components disposed on the substrate.

[0094] Alternatively, a substrate with a thermal conductivity exceeding 100 W / m·K, such as 100 to 180 W / m·K, can be used as an alternative substrate.

[0095] The substrate according to the invention can be used in various power electronic device applications, such as in LED / laser diode technology and in sub-packages of optical devices, and can dissipate the generated heat loss. Thus, hundreds of amperes / mm² can be generated. 2 The current density can reach up to 400 Watt / cm². 2 The heat flux density. High current densities, such as up to 1000 A / mm², can be achieved using the substrate according to the invention. 2 Or even higher current densities, without causing thermal damage to the substrate or components therein or on it. In particular, at such current densities, the substrate according to the invention can, in certain circumstances, be maintained at an operating temperature below 200°C in conjunction with other measures.

[0096] Figure 2 and Figure 3 Substrate 1 is shown, which may have according to Figure 1 All characteristics of the substrate (first embodiment). Figure 2 It is a cross-sectional view. Figure 3 The substrate 1 is shown in perspective.

[0097] Figure 2 and Figure 3The substrate 1 has a metallization layer 3 on the substrate body 2. The metallization layer 3 is a copper layer, and optionally, the copper layer has a nickel-palladium-gold coating on its surface. Alternatively, a nickel-gold coating can be used. The total thickness of the coating is 100 μm.

[0098] like Figure 3 As can be seen, the metallization layer 3 can be structured and designed as surface traces, which are suitable for connection to these electrical or electronic components.

[0099] exist Figure 4 Another embodiment of substrate 1 is shown. This substrate may also have the characteristics of the substrate previously shown. This substrate particularly has a substrate body 2. High-side switches and low-side switches, as well as connection terminals, are implemented on or within this substrate body. AC phase-changing voltage is tapped at the switched node.

[0100] Using the solution shown, a smaller substrate can be achieved compared to previously known techniques that use substrates with poor conductivity. This allows for new degrees of freedom in geometric design to achieve high power density and extend the temperature range up to 200°C. As explained in more detail below, conductive layers can be implemented in the illustrated substrate using a multilayer structure. Therefore, the loop inductance of the resulting commutation loops or control lines can be significantly reduced, not only in wire paths but also in signal paths. Additionally, area can be saved by guiding wires within the ceramic substrate.

[0101] Figure 5 Another embodiment of substrate 1 is shown. Substrate 1 essentially has the following characteristics: Figure 2 or Figure 3 The structure shown. In Figure 5 The diagram shows a cross-sectional view of substrate 1, in which the internal components of the substrate are shown in an exposed manner. The exposed portion is only used to improve the visibility of the components embedded in the substrate. Compared to the exposed portion, the portions of these components extending into the solid portion of the substrate body 2 are shown in gray.

[0102] A metallization layer 3 is formed on the surface of substrate 1. A first internal electrode 4 and a second internal electrode 5 extend in the substrate. Both are embedded in the substrate as metal layers. The first internal electrode 4 can be a base contact. The internal electrode 5 can be a signal line, such as a Kelvin source contact. Internal electrodes 4 and 5 can each have a width from 0.05 mm to 50 mm. The two internal electrodes are guided in parallel. Furthermore, the two internal electrodes are constructed in a flat manner. The distance between the two electrodes is, for example, 90 μm. A common shielding cage 6 is formed around these two conductors. The shielding cage consists of a cage top 61, a cage bottom 62, and shielding cage plated through-holes 63. The cage top 61 and cage bottom 62 are formed in a flat manner. The shielding cage plated through-holes are formed perpendicular to the surface direction along the sides of the cage top 61 and cage bottom 62. In this way, the sides of the shielding cage are formed.

[0103] In addition, substrate 1 includes EMI shielding 7, which is embedded in substrate body 2.

[0104] All structures embedded here in the substrate body 2 are made of tungsten, molybdenum, niobium or tantalum.

[0105] The chosen structure reduces electromagnetic interactions and thus improves switching speed. In particular, the electromagnetic footprint of parallel-guided wires, especially when current is directed in opposite directions through these wires, can be reduced. This electromagnetic footprint is further reduced by the shielding cage 6. EMI shielding of the larger metal structure (such as a heat sink) on the bottom can be achieved by the EMI shielding 7.

[0106] The structure shown here can achieve rapid switching speeds of up to or even exceeding 30 Volt / ns. Furthermore, no additional electrical, electronic, or structural filtering measures are required. In comparison, previously known designs could only achieve switching speeds of 5 Volt / ns.

[0107] exist Figure 6An embodiment of component 100 is shown. Component 100 has a substrate 1, which may have the aforementioned characteristics. A component 10 is electrically connected by means of a metallization layer 3; this component can be an electrical or electronic component. Specifically, component 10 can be directly connected to a portion of the metallization layer 3 via its bottom. Component 10 is connected to a portion of the metallization layer 3 that is electrically isolated from the component via bonding wires 14b. It is also shown that the component generates a certain amount of heat power during operation. This heat power can be dissipated laterally and towards the bottom via the substrate 1 according to the invention. Here, a bottom metallization layer 3' is arranged on the bottom. This bottom metallization layer can be implemented arbitrarily. As long as the bottom metallization layer does not have an electrical function, it can be designed as a planar metallization layer. A heat sink 8 is arranged on the bottom of the substrate 1. This heat sink has a surface-enlarged structure, such as fins or ribs. These surface-enlarged structures are used for heat radiation. Due to the high thermal conductivity of the aluminum nitride substrate 1, the heat generated on the electronic component 10 can be efficiently distributed and guided to the heat sink.

[0108] exist Figure 7 Another embodiment of component 100 is shown in the figure. This component 100 particularly has an aluminum nitride-based ceramic substrate 1, which can possess the aforementioned characteristics. Power electrodes 12 are arranged in the substrate body 2. These power electrodes are capable of guiding high current power through their parallel connection. Furthermore, through-holes 13 are arranged in the substrate. Additionally, in the current embodiment, cavities 9 are formed in the substrate. Connection locations for electronic components 10 and for capacitors 11 are formed in the cavities 9. These cavities shorten the wire paths along the thickness direction. These cavities also shorten the heat pillars toward the bottom of the substrate on which heat sinks can be arranged.

[0109] Component 10 can be directly connected to the surface metallization layer 3 formed in these cavities. Other parts can be connected to other parts of the metallization layer via wiring 14a. The wiring 14a shown here has the advantage of higher current carrying capacity and a flatter geometric profile compared to ordinary bonding wires. This can be achieved through flat, thick wire bonding.

[0110] A capacitor 11 is arranged within the cavity 9. This capacitor is connected via exposed internal electrode structures 12i using solder. The capacitor is partially connected to the surface metallization layer 3 through corresponding through-holes 13'. For this configuration, it is particularly preferred that the capacitor 11 be capable of carrying a sustained high ripple voltage at high currents up to 10 amps / µF. In particular, capacitors from the CeraLink brand manufactured by TDK Electronics AG can be used.

[0111] The intermediate electronic component 10 shown is connected to another smaller electronic component 10, which is arranged in a cavity that is not too deep.

[0112] The cavity can be designed in terms of its depth such that the top of the electronic component 10 is flush with the surface of the substrate.

[0113] All the conductive structures shown here, implemented in the substrate body 2, can be formed of tungsten. All the metallization layers 3 on the surface can be formed as described above.

[0114] Figure 8 Another embodiment of substrate 1 is shown. This substrate has a shape consistent with that of substrate 1. Figure 1 The substrate has the same characteristics. Furthermore, a metal zigzag structure 15 is integrated into this substrate. Here, for ease of observation, the metal zigzag structure is shown exposed. However, the metal zigzag structure is actually embedded in the substrate and covered by a ceramic material. Preferably, the metal zigzag structure is arranged below the connection point of the electronic component, and therefore, especially preferably, below the cavity. The metal zigzag structure has a rapid response time to temperature changes.

[0115] exist Figure 9 and Figure 10 The diagram illustrates the busbar. For example, especially... Figure 10 As can be seen in the unfolded diagram, vias 13a (guiding positive voltage) and 13b (guiding negative voltage) extend through the substrate 1 along the thickness direction. The corresponding vias 13a and 13b are alternately electrically connected to metal layers in the alternating layers. Specifically, the via 13a (guiding positive voltage) is electrically connected to the bus layer 12a (guiding positive voltage). Correspondingly, the via 13b (guiding negative voltage) is electrically connected to the bus layer 12b (guiding negative voltage). These layers respectively include ceramic layers and metallization layers. Layers 12a and 12b are stacked alternately. Figure 7 The power electrode shown, such a bus or such bus electrode can be integrated into the substrate in a similar manner.

[0116] Figure 11A three-phase commutation unit is shown as an example of a component 100 or multi-component structure. For ease of understanding, some components are omitted to clearly illustrate the structure. Thus, each part (left, middle, and right) of the commutation unit has the following components. Multiple electronic components, described in more detail below, are arranged on a common substrate 1, which is an aluminum nitride-based substrate with a substrate body 2. Additionally, circuit boards 1' are arranged above the substrate 1, or at a higher position on the substrate and above the partially embedded components. These circuit boards 1' are also aluminum nitride-based substrates according to the invention and have the corresponding basic characteristics. In the left-hand portion of the three-phase commutation unit, the circuit boards and the capacitor 11 located on the circuit boards are missing. In the middle portion, only the capacitor 11 is not shown. The right-hand portion shows all components in full. For the complete structure, the missing parts must be imagined.

[0117] Each part of the three-phase commutator has an external connection terminal 17. Each corresponding part of the three-phase commutator has a Hall current sensor 10b.

[0118] Circuit board 1' has vias 13a for conducting negative voltage and vias 13b for conducting positive voltage. These vias for conducting negative voltage and these vias for conducting positive voltage can be implemented as so-called power vias. They are used to conduct electricity perpendicular to the thickness direction of circuit board 1', thereby allowing short wire paths. The following section applies to power vias. Figure 28 and Figure 29 The content described herein. Alternatively, it may also apply to the following text concerning... Figures 30 to 32 The situation described.

[0119] In addition, circuit board 1' may have one or more auxiliary through holes 13''. For example... Figure 11 As can be seen, two such auxiliary vias 13'' are formed in the circuit board 1'. The auxiliary vias 13'' do not conduct voltage. The auxiliary vias 13'' are designed and provided for introducing potting material through these auxiliary vias 13'' after the circuit board 1 is assembled above the substrate 1 and the electronic components located on the substrate 1. This potting material can be used for electrical insulation, mechanical stability, contact protection, dustproof sealing, and / or moistureproof sealing of the electronic components and / or contacts located between the substrate 1 and the circuit board 1'.

[0120] Capacitor 11 is arranged on the corresponding negative lead 17a or positive lead 17b. In this case, capacitor 11 is implemented as a capacitor composed of separable capacitor substructures. In this way, the capacitor can be customized in terms of its capacitance according to the corresponding application.

[0121] Cavities 9 are formed in the substrate. Furthermore, silicon carbide semiconductors 10a are embedded in these cavities as electronic components. An NTC temperature sensor 16 is arranged next to one of these silicon carbide semiconductors 10a. By arranging the temperature sensor 16 close to the silicon carbide semiconductor 10a, accurate temperature measurement can be achieved. By implementing multiple such temperature sensors at different locations on the substrate, especially near the electronic components, spatially resolved accurate temperature measurement can be achieved. This is thanks to the current substrate design, which is particularly space-saving. Thus, temperature sensors can be implemented next to these components without unnecessarily increasing the substrate size.

[0122] Particularly preferably, in complement to the NTC temperature sensor, the aforementioned metal zigzag structure is also used for temperature measurement.

[0123] The commutation unit according to the invention shown has advantages over previously known structures. Thus, due to structural and regulatory constraints on the semiconductor (module) and capacitors, such as the difficulty in miniaturizing previously used commutation circuits, unfavorable overvoltages (up to 25% UDC) increasingly occur at higher switching frequencies, which then must be compensated for using additional filtering work. At the same switching speed, the overvoltage is proportional to the commutation inductance. Modules known to date have a commutation inductance of 5 nH to 30 nH per transistor branch. The commutation unit according to the invention shown can have a commutation inductance of less than 5 nH per transistor branch. For the entire module with parallel transistor branches, this equates to a value of less than 1 nH.

[0124] exist Figure 12 Another embodiment of the busbar is shown in the diagram. Busbar electrodes 12 are arranged in the substrate body 2. Furthermore, electrical contacts are made through through-holes 13. Capacitors 11, corresponding to the aforementioned capacitors, are arranged above.

[0125] exist Figure 13 It shows Figure 12 The structure shown is a modified version. Here, additional capacitors 11' are arranged between the conductors to compensate for the interphase lateral current.

[0126] exist Figure 14 The diagram illustrates a multi-component structure. The structure of component 100 corresponds to the structure regarding... Figure 7 The structure described herein. A controller board 18 is arranged above component 100. A smaller distance between the controller board 18 and the substrate 1 can be achieved by means of a cavity that matches the height of the component.

[0127] exist Figure 15Another multi-component structure is shown. This other multi-component structure includes a component 100, which consists of a lower substrate 1 in the illustrated substrate and a component 10 disposed in a cavity of the substrate 1. The depth of the cavity is selected such that the surfaces of the component 10 and the lower substrate are flush with each other. Another substrate 1 is disposed on top of the lower substrate 1. The two substrates are thermally coupled. Since both substrates are aluminum nitride-based and have high thermal conductivity, heat can be distributed not only in the lower substrate of the two substrates 1, but the upper substrate can also contribute to the surface distribution of heat, thereby forming a waterfall-like heat distribution structure. The planar arrangement of the component and substrate surfaces facilitates heat dissipation. Therefore, the second substrate according to the invention can replace the metal heat distribution layer.

[0128] Furthermore, the electrical connection of component 10 can be achieved through the upper substrate of these two substrates without the need for additional wiring.

[0129] exist Figure 16 The full bridge is shown in the image. This full bridge is based on... Figure 11 The components may vary slightly. In this case, the substrate 1 has embedded cooling lines 19. Specifically, the cooling line inlet 19a and cooling line outlet 19b are visible. This allows the substrate to be cooled using a coolant composed of a mixture of ethylene glycol and water. The internal orientation of the cooling lines can be arbitrary. In particular, the internal orientation can extend in a W-shape within the substrate. The good thermal conductivity of the substrate facilitates the use of simple shapes for the cooling lines.

[0130] exist Figure 17 The temperature distribution within the aluminum nitride substrate is shown in the figure.

[0131] exist Figure 18 The simulated temperature distribution in a glass-ceramic comparison substrate under the same initial conditions is shown in the figure.

[0132] When comparing these temperature distributions, it is clear that using an aluminum nitride substrate allows for significantly more efficient dissipation of heat input from the component.

[0133] exist Figure 19 , Figure 20 and Figure 21 The diagram illustrates the current or voltage distribution and the resulting temperature distribution on an aluminum nitride substrate according to the present invention. A high current density is simulated within a small cross-sectional area of ​​the substrate. In this case, a total power of 240 W is simulated using a current of 500 A. The resistance is 0.5 Ω. Even at the point of highest current density, only a temperature rise of 7 K is observed.

[0134] Figure 22A statistical evaluation of the warpage of aluminum nitride-based substrates according to the present invention is shown. These substrates have a length of 55.88 ± 0.09 mm and a width of 42.13 ± 0.06 mm. The substrates placed here are... Figure 3 The metallization layer 3 shown has a thickness of 0.11 ± 0.06 mm. As can be seen from the figure, the average warpage is only 125 μm. This can be achieved through pressurized re-sintering or flat sintering.

[0135] Figure 23 and Figure 24 A cross-sectional view of the substrate according to the present invention is shown using microscopic images. The ceramic aluminum nitride substrate, having a thickness of 900 μm, can be seen and is surrounded by copper (Cu) terminals at the top and bottom. The upper copper (Cu) terminals can correspond to those according to… Figure 2 and Figure 3 Metallization layer 3. Inside the ceramic, through-holes / through-hole towers made of tungsten and inner or internal electrodes can be seen. The through-holes and internal electrodes can correspond to the structure described above.

[0136] Figure 25 and Figure 26 Comparative measurements of a commercial transistor (Infineon CoolMOS P7) are shown. The current-voltage response was compared at a gate voltage of 6V. Figure 25 ) and temperature-power response ( Figure 26 ).

[0137] exist Figure 25 In the diagram, the line labeled 'Mosfet' (solid line; square data points) shows the response of a transistor without any substrate. The 'Mosfet@AlN' curve (dashed line; diamond data points) shows the current-voltage response of a transistor on a substrate according to the invention without a connected heat storage body. The curve labeled 'Mosfet@Alu' (single dashed line; circular data points) shows the current-voltage response of the corresponding transistor directly disposed on an aluminum heat storage body. The line labeled 'Mosfet@AlN@Alu' (dotted line; triangular data points) shows the corresponding transistor disposed on a substrate according to the invention, which itself is disposed on an aluminum heat storage body.

[0138] For the same test structure, Figure 26 The figure shows the temperature response as a function of the applied power, where the symbols are... Figure 25 The corresponding mark in the text.

[0139] like Figure 25 and Figure 26It is evident that this substrate alone can cause a significant power increase. Due to the excellent thermal connection with the AlN substrate, the power transfer capability of the MOSFET@AlN configuration is twice that of the bare die. A comparison of the MOSFET@AlN@Alu curves and the MOSFET@Alu heatsink curves shows that the total thermal resistance is almost unaffected by the aluminum nitride substrate. Based on the difference between the MOSFET@AlN@Alu curves and the MOSFET@Alu heatsink curves, the thermal resistance of the aluminum nitride substrate can be determined. The thermal resistance between the AlN substrate and the heat storage medium is 1.1 ± 0.5 K / W.

[0140] exist Figure 27 A segment of substrate 1 with internal electrodes 4 and 5 is shown to further illustrate the concept of an anti-parallel circuit for minimizing power inductance. In this case, internal electrodes 4 and 5 are designed as conductors embedded in substrate 1. These conductors connect the two external connection terminals 17 to each other. Thus, the blue-marked conductors or blue-marked internal electrodes 4 diagonally connect the two blue-marked external connection terminals 17, and correspondingly, the red-marked conductors or red-marked internal electrodes 5 connect the two diagonally opposite red external connection terminals 17.

[0141] As shown in the figure, these two conductors can be embedded in the substrate. Alternatively, and not shown, one of these conductors can be guided on the outer surface, particularly a certain surface, and only the other conductor can be embedded. In both cases, this arrangement has the advantage of achieving a smaller inductance compared to the case where these conductors are guided side by side on the same plane, assuming the cross-sectional geometry is the same.

[0142] exist Figure 28 The image shows a segment of the commutation unit, similar to... Figure 11 The commutation unit shown is illustrated. In particular, the circuit board 1' on substrate 1 is shown in detail. Regarding... Figure 11 The same applies here. Unlike... Figure 11 External connection terminals are not implemented, or at least not shown. The number of through holes also differs. Figure 11 The arrangement of circuit board 1' in the circuit. Similar to the above, in this case, the via 13a leading to negative voltage and the via 13b leading to positive voltage are implemented as power supply vias. As... Figure 29As illustrated in the example, power vias are created through a series of metallization layers, connecting the top and bottom conductor structures of circuit board 1'. The surface of the hollow cylinder formed by the via channels can be covered, for example, with copper as a metallization layer. The cross-sectional area of ​​the conductors can be determined by the number and diameter of the vias and the thickness of the metallization layer. In particular, by utilizing the number of vias shown, high power can be transferred from one side of the circuit board to the other, which is one embodiment of the substrate. Copper vias can be easily introduced into cylindrical openings existing in the substrate material through copper electroplating deposition. Furthermore, copper has excellent conductivity. A surface coating composed of nickel, palladium, and / or gold can also be additionally present on the copper layer.

[0143] exist Figure 30 The diagram shows circuit board 1', which can replace... Figure 11 and Figure 28 The circuit board 1' shown in the diagram is used. Unless otherwise stated herein, the application of bonding is applicable to the circuit board 1' shown herein. Figure 11 and Figure 28 The content explained. Figure 30 Circuit board 1' in the diagram largely corresponds to, for example, Figure 28 The structure shown is used instead of the one described above. Figure 28 The via 13b that guides positive voltage is formed here as a tungsten via 13w. Instead of the via 13b that guides positive voltage, or in addition to the via that guides positive voltage, the via 13a that guides negative voltage may also be replaced by a tungsten via 13w (not shown).

[0144] The tungsten through-hole 13W is implemented here as an array. This array is particularly... Figure 31 and Figure 32 This can be seen in detail in the cross-section. Figure 31 In this configuration, the tungsten through-holes are presented independently of the other through-holes. Figure 32 In the middle, through Figure 30 The illustration shows a simplified cross-section. (As shown) Figure 31 and Figure 32 As can be seen, the array of tungsten vias 13w connects to the metallization layer 3. These metallization layers 3 can be applied to the above-mentioned... Figure 2 and Figure 3 The content described.

[0145] The inventors have discovered that, in certain designs, it is advantageous to use tungsten (W) via arrays instead of copper (Cu) vias to implement plated vias through circuit board 1'. These arrays can also be considered as power vias and can replace the aforementioned power vias. These arrays can essentially have the same function as the previously described power vias or copper vias and are used for equivalent purposes.

[0146] Tungsten vias (13W) offer the advantage of better area utilization. Due to thermomechanical and process characteristics, it is advantageous to set the distance between adjacent copper (Cu) vias to 1.5 to 2 times the via diameter. This can be related, for example, to the different coefficients of thermal expansion of the substrate material and copper. Thus, for copper vias, a relative area utilization of approximately 1% to 2% of the circuit board can be achieved.

[0147] For arrays with tungsten vias 13w, thermomechanical constraints are fewer or even nonexistent because tungsten and AlN have favorable coefficients of thermal expansion relative to each other. Additionally, with tungsten vias 13w, the vias can be completely filled and are not designed as cylindrical hollow vias. Like other tungsten elements, tungsten vias 13w can be directly constructed, debonded, and sintered with the AlN material of the substrate in a common process. In this case, an area utilization rate of 9% to 20% can be achieved. Therefore, compared to copper vias, an area utilization rate approximately one order of magnitude higher, or approximately 10 times higher, can be achieved. This significant improvement may even overcompensate for the excellent conductivity of copper. Thus, copper's conductivity is approximately three times that of tungsten.

[0148] Especially when more than one or a few through holes are needed, such as fewer than 5 or fewer than 3 through holes, it is more advantageous to use W tungsten through holes 13w.

[0149] In principle, arrays of 13W tungsten vias can also be used together with copper vias. Depending on the application's space constraints and performance requirements, this can facilitate an optimized combination of them in manufacturing (cost, workload, etc.).

[0150] List of reference numerals 1 substrate 1' Circuit Board 2 Main body of the substrate 3 Metallization layer 4 First internal electrode 5 Second internal electrode 6. Shielding cage 7 EMI shielding components 8 Heat sink 9 cavities 10 Electronic components 10a Silicon Carbide Semiconductor 10b Hall current sensor 11 Capacitors 11' capacitor 12 Power Electrodes 12' Busbar Internal Electrode 12a Busbar layer that guides positive voltage 12b Busbar layer that guides negative voltage 12i Exposed internal electrode structure 13 Through holes 13' Through Hole 13'' Auxiliary through hole 13a Through-hole for guiding positive voltage 13b Through-hole for guiding negative voltage 13W tungsten through-hole 14a Electrical connection 14b bond wire 15. Metallic tortuous structure 16 NTC Temperature Sensor 17 External connection terminal 17a Negative external connection terminal 17b Positive external connection terminal 18 Control Panel 19 Cooling Pipelines 19a Entrance 19b Export 21 Top 22 Bottom 61 Cage top 62 cage bottom 63. Shielding cage with plated through holes 100 components.

Claims

1. A planar substrate having an electrically insulating ceramic material having a thermal conductivity of more than 100 W / m·K at a temperature of 25°C.

2. The substrate according to claim 1, wherein, At 25°C, the thermal conductivity of the substrate is at least 150 W / m·K.

3. The substrate according to claim 1 or 2, wherein, The ceramic material is an aluminum nitride-based ceramic material.

4. The substrate according to any one of claims 1 to 3, wherein, Connection points for electrical or electronic components are provided on the top of the substrate.

5. The substrate according to any one of claims 1 to 4, wherein, The substrate has a metallization layer on top of the substrate and / or through-holes that extend through the substrate in the thickness direction.

6. The substrate according to claim 5, wherein, The through hole is implemented as a hollow cylindrical copper through hole.

7. The substrate according to claim 5, wherein, The vias are designed as filled tungsten vias, and the vias are arranged in an array.

8. The substrate according to any one of claims 1 to 7, wherein, The substrate is a multilayer substrate.

9. The substrate according to any one of claims 1 to 8, wherein the substrate has a first internal electrode and a second internal electrode, the first internal electrode and the second internal electrode extending parallel to each other in the substrate, wherein, These internal electrodes are designed to guide direct currents in opposite directions.

10. The substrate according to claim 9, wherein, The first internal electrode and the second internal electrode are surrounded by a common shielding cage.

11. The substrate according to any one of claims 9 or 10, wherein, The top and bottom of the shielding cage are formed by a metal planar structure oriented parallel to the surface direction, and the sides of the shielding cage are formed by through holes plated in the shielding cage.

12. The substrate according to any one of claims 9 to 11, wherein, These internal electrodes are made of a conductive material that can withstand the sintering temperature of the raw materials of these electrodes and the raw materials of the ceramic material during co-firing.

13. The substrate according to claim 12, wherein, These internal electrodes are made of materials selected from tungsten, molybdenum, tantalum, or niobium, or alloys thereof, or alloys thereof.

14. The substrate according to any one of claims 1 to 13, wherein the substrate has a heat sink at the bottom.

15. The substrate according to claim 14 and having the features of any one of claims 9 to 13, wherein, The EMI shielding is embedded in the substrate between the heat sink and these internal electrodes.

16. The substrate according to any one of claims 1 to 15, wherein, The substrate has an area of ​​at least 500 mm². 2 And its thickness is less than 3 mm.

17. The substrate according to claim 4, wherein, At least a portion of the connection point is designed as a cavity in the top of the substrate, and the cavity is designed to accommodate one or more electrical or electronic components.

18. The substrate according to claim 4 or 17, wherein, The embedded temperature measurement unit is embedded in the substrate below the connection point.

19. The substrate according to claim 18, wherein, The embedded temperature measurement unit has a metal bend structure.

20. The substrate according to any one of claims 1 to 19, wherein, Cooling lines are embedded in the substrate.

21. The substrate according to any one of claims 1 to 20, wherein, The buses for DC+ and DC- are integrated into the substrate.

22. The substrate according to any one of claims 1 to 21, wherein the substrate has a first internal electrode and the first internal electrode is surrounded by a shielding cage.

23. The substrate according to any one of claims 1 to 22, wherein, The substrate has an EMI shielding component.

24. The substrate according to any one of claims 1 to 23, wherein the substrate has a first internal electrode and a second conductor, wherein, The second conductor is designed as a second internal electrode or an outer metallization layer, and the first internal electrode and the second conductor are guided parallel to each other to reduce the power inductance when a direct current is applied.

25. An aluminum nitride-based multilayer substrate, wherein the aluminum nitride-based multilayer substrate has a thermal conductivity exceeding 150 W / m·K at 25°C, wherein A cavity is formed in the top of the substrate, and each cavity is designed to accommodate one or more electrical or electronic components. Connection points for electrical or electronic components are formed at the bottom of the cavity. At least some of the connection points are connected via through-holes that are guided through the substrate along its thickness direction. The first internal electrode and the second internal electrode extend parallel to each other and are embedded in the substrate, wherein... These internal electrodes are designed to guide direct currents in opposite directions, and the first and second internal electrodes are surrounded by a common shielding cage. These internal electrodes are composed of conductive material that can withstand the sintering temperature during the co-firing of the raw materials of these electrodes and the raw materials of the ceramic material. A heat sink is disposed at the bottom of the substrate, and an EMI shield is embedded in the substrate between the heat sink and the internal electrodes. The buses for DC+ and DC- are integrated into the substrate.

26. The substrate according to any one of claims 1 to 25, wherein, The proportion of metal structures in the substrate is less than 25 vol%, or preferably 10 vol% or less.

27. The substrate according to any one of claims 1 to 26, wherein, One or more auxiliary vias are formed in the substrate, the one or more auxiliary vias being designed such that potting material is applied to electronic components and / or contacts located beneath the substrate by means of the one or more auxiliary vias.

28. A half-bridge or full-bridge bridge having a substrate according to any one of claims 1 to 27.

29. A commutation unit having a substrate according to any one of claims 1 to 27.

30. A component having a substrate according to any one of claims 1 to 27 and active or passive electrical and / or electronic components, wherein, The external temperature measurement unit is arranged close to the electrical or electronic components.

31. The component of claim 30, wherein, The external temperature detector is an NTC temperature sensor.

32. A multi-component structure comprising a first substrate according to any one of claims 1 to 27 or a component according to claim 30 or 31 and a second substrate according to any one of claims 1 to 27, wherein, The second substrate is disposed above the first substrate or component.

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