Display panel and electronic device including the same

Abstract

A display panel and an electronic device including the same are provided. The display panel includes pixel circuits including a first color pixel circuit, a second color pixel circuit, and a third color pixel circuit; and a data line set disposed on one side of the pixel circuit, the data line set including a first color data line, a second color data line, and a third color data line each extending in a first direction, among the first color light emitted by the first color pixel circuit, the second color light emitted by the second color pixel circuit, and the third color light emitted by the third color pixel circuit, the second color light has the highest proportion in the white light. And one of the first color data line and the third color data line in the data line set is disposed at a center of the data line set.

Description

[0001] This application claims priority and benefit to Korean Patent Application No. 10-2024-0142300, filed on October 17, 2024, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0002] One or more embodiments relate to a display panel and an electronic device including the display panel, and more specifically, to a display panel and electronic device capable of displaying high-quality images. Background Technology

[0003] Generally, a display device includes thin-film transistors, connecting electrodes, and wiring in each pixel (or each sub-pixel) to control the brightness of each pixel (or each sub-pixel), etc. Thin-film transistors, connecting electrodes, and wiring form a multi-layer structure. Summary of the Invention

[0004] The brightness of some pixels in a display device based on related technologies may be unintentionally altered.

[0005] One or more embodiments include a display panel capable of displaying high-quality images and an electronic device including the display panel. However, aspects of the embodiments are not limited thereto, and the foregoing features do not limit the scope of the embodiments according to this disclosure.

[0006] Other aspects will be set forth in part in the description which follows and will be apparent in part from the description, or may be learned by practice of the embodiments of this disclosure presented.

[0007] According to one or more embodiments, a display panel includes: a pixel circuit including a first color pixel circuit, a second color pixel circuit, and a third color pixel circuit; and a data line set disposed on one side of the pixel circuit, and including a first color data line, a second color data line, and a third color data line extending in a first direction, wherein, among the first color light emitted by the first color pixel circuit, the second color light emitted by the second color pixel circuit, and the third color light emitted by the third color pixel circuit, the second color light has the highest proportion in white light, and one of the first color data line and the third color data line in the data line set is disposed at the center of the data line set.

[0008] Among the first color data line, the second color data line, and the third color data line, the second color data line can be positioned closest to the pixel circuit.

[0009] The second color data line may include multiple protrusions in the portion corresponding to the pixel circuit, protruding in a direction intersecting the first direction.

[0010] The third color light can have the lowest proportion in white light, one of the multiple protrusions can be set to overlap with the second color pixel circuit, and another of the multiple protrusions can be set to overlap with the third color pixel circuit.

[0011] The second color data line may include two protrusions in the portion corresponding to the pixel circuit, protruding in a direction intersecting the first direction.

[0012] The third color light can have the lowest proportion in white light, one of the two protrusions of the second color data line can be set to overlap with the second color pixel circuit, and the other of the two protrusions of the second color data line can be set to overlap with the third color pixel circuit.

[0013] The first color pixel circuit may include a first color data connection line electrically connecting the thin-film transistor of the first color pixel circuit to the first color data line; the second color pixel circuit may include a second color data connection line electrically connecting the thin-film transistor of the second color pixel circuit to the second color data line; and the third color pixel circuit may include a third color data connection line electrically connecting the thin-film transistor of the third color pixel circuit to the third color data line.

[0014] The third color light may have the lowest proportion in white light. The first color pixel circuit may include a first color data connection line that electrically connects the thin film transistor of the first color pixel circuit to the first color data line. The second color pixel circuit may include a second color data connection line that electrically connects the thin film transistor of the second color pixel circuit to the second color data line. The third color pixel circuit may include a third color data connection line that electrically connects the thin film transistor of the third color pixel circuit to the second color data line.

[0015] The display panel may further include: a dummy electrode, on a layer on which the third color data connection line is disposed, having an isolated shape in a plan view, and electrically connected to the third color data line.

[0016] The display panel may further include: a first color pixel electrode electrically connected to a first color pixel circuit; a second color pixel electrode electrically connected to a second color pixel circuit; and an additional connection electrode electrically connected to a third color pixel circuit and the second color pixel electrode.

[0017] The display panel may further include: a third color pixel electrode, on a layer on which the additional connection electrode is disposed, spaced apart from the additional connection electrode, and having an isolated shape in a plan view.

[0018] In a planar image, the second color pixel electrode can be closer to the third color pixel electrode than the first color pixel electrode.

[0019] An additional connection electrode can be disposed between the second color pixel electrode and the third color pixel electrode.

[0020] Among the first color data line, the second color data line, and the third color data line, the second color data line can be set furthest from the pixel circuit.

[0021] The first color pixel circuit may include a first color data connection line electrically connecting the thin-film transistor of the first color pixel circuit to the first color data line; the second color pixel circuit may include a second color data connection line electrically connecting the thin-film transistor of the second color pixel circuit to the second color data line; and the third color pixel circuit may include a third color data connection line electrically connecting the thin-film transistor of the third color pixel circuit to the third color data line and a dummy connection line electrically connected to the thin-film transistor of the third color pixel circuit and extending above the second color data line.

[0022] The third color light may have the lowest proportion in white light. The first color pixel circuit may include a first color data connection line that electrically connects the thin film transistor of the first color pixel circuit to the first color data line. The second color pixel circuit may include a second color data connection line that electrically connects the thin film transistor of the second color pixel circuit to the second color data line. The third color pixel circuit may include a dummy connection line that electrically connects the thin film transistor of the third color pixel circuit to the second color data line.

[0023] The display panel may further include: a third color data connection line, which is on a layer on which the dummy connection line is disposed, has an isolated shape in the plan view, and is electrically connected to the third color data line.

[0024] The display panel may further include: a first color pixel electrode electrically connected to a first color pixel circuit; a second color pixel electrode electrically connected to a second color pixel circuit; and an additional connection electrode electrically connected to a third color pixel circuit and the second color pixel electrode.

[0025] The display panel may further include: a third color pixel electrode, on a layer on which the additional connection electrode is disposed, spaced apart from the additional connection electrode, and having an isolated shape in a plan view.

[0026] In a planar view, the second color pixel electrode can be positioned closer to the third color pixel electrode than the first color pixel electrode.

[0027] An additional connection electrode can be disposed between the second color pixel electrode and the third color pixel electrode.

[0028] The first color of light may include red light, the second color of light may include green light, and the third color of light may include blue light.

[0029] According to one or more embodiments, an electronic device may include: a display panel including: a pixel circuit including a first color pixel circuit, a second color pixel circuit, and a third color pixel circuit; and a data line set disposed on one side of the pixel circuit, and including a first color data line, a second color data line, and a third color data line extending in a first direction, wherein, among the first color light emitted by the first color pixel circuit, the second color light emitted by the second color pixel circuit, and the third color light emitted by the third color pixel circuit, the second color light has the highest proportion in white light, and one of the first color data line and the third color data line in the data line set is disposed at the center of the data line set, and a lower cover forming the appearance of the electronic device and having an opening that exposes a portion of the display panel.

[0030] Other aspects, features, and advantages, in addition to those foregoing, will become apparent from the following detailed description, claims, and drawings. Attached Figure Description

[0031] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0032] Figure 1 This is a schematic plan view illustrating a portion of a display panel according to an embodiment;

[0033] Figure 2 It is a diagram. Figure 1 A schematic concept diagram of a portion of the display panel;

[0034] Figure 3 yes Figure 1 A schematic diagram of the equivalent circuit of the display elements of the display panel and the pixel circuits electrically connected to the display elements;

[0035] Figure 4 It is a diagram. Figure 1 A schematic layout diagram showing the positions of thin-film transistors and storage capacitors, etc., in a pixel of a display panel;

[0036] Figures 5 to 8 It is a layer-by-layer diagram Figure 4 A schematic layout diagram of components such as thin-film transistors and storage capacitors in a display panel;

[0037] Figure 9 It is along Figure 4 A schematic cross-sectional view of the display panel taken by line A-A';

[0038] Figure 10 and Figure 11This is a schematic layout diagram of some layers of components such as thin-film transistors and storage capacitors in a display panel according to an embodiment;

[0039] Figure 12 and Figure 13 This is a schematic layout diagram of some layers of components such as thin-film transistors and storage capacitors in a display panel according to an embodiment;

[0040] Figure 14 This is a schematic layout diagram of some layers of components such as thin-film transistors and storage capacitors in a display panel according to an embodiment;

[0041] Figure 15 It is a schematic concept diagram illustrating the images that the display panel can display;

[0042] Figure 16 The image is applied to the display panel to display. Figure 15 A schematic diagram of the data signal of the image;

[0043] Figure 17 The illustration is a schematic conceptual diagram of an electronic device according to an embodiment; and

[0044] Figure 18 It is a diagram. Figure 17 A schematic block diagram of an electronic device. Detailed Implementation

[0045] In the following description, numerous specific details are set forth for purposes of explanation in order to provide a thorough understanding of various embodiments or implementations of this disclosure. As used herein, “embodiment” and “implementation” are interchangeable terms for non-limiting examples of the apparatus or methods disclosed herein. However, it will be apparent that various embodiments may be practiced without these specific details or with one or more equivalent configurations. These various embodiments are not necessarily exclusive nor do they limit the scope of this disclosure. For example, a particular shape, configuration, and characteristic of one embodiment may be used or implemented in another embodiment.

[0046] Unless otherwise specified, the illustrated embodiments are to be understood as providing features of this disclosure. Therefore, unless otherwise specified, features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter collectively referred to as “elements”) of various embodiments may be combined, separated, interchanged and / or rearranged in other ways without departing from the scope of this disclosure.

[0047] The use of crosshairs and / or shading in the accompanying drawings is generally provided to clearly define the boundaries between adjacent elements. Therefore, unless otherwise specified, the presence or absence of crosshairs or shading does not convey or indicate any preference or requirement for a particular material, material properties, size, scale, commonalities between elements, and / or any other characteristics, properties, or characteristics of the elements. Furthermore, in the accompanying drawings, the size and relative size of elements may be exaggerated for clarity and / or descriptive purposes. When embodiments can be implemented in different ways, the specific sequence of processes may be performed differently than the order described. For example, two consecutively described processes may be performed substantially simultaneously or in the reverse order of their description. Moreover, the same reference numerals and / or reference symbols refer to the same elements.

[0048] When an element or layer is referred to as being "on" another element or layer, "connected to," or "coupled to" another element or layer, the element or layer may be directly on, directly connected to, or coupled to the other element or layer, or an intermediary element or layer may be present. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to," or "directly coupled to" another element or layer, an intermediary element or layer is not present. Therefore, the term "connection" can refer to a physical connection, electrical connection, and / or fluid connection with or without an intermediary element. Furthermore, the axes of the first direction DR1, the second direction DR2, and the third direction DR3 are not limited to the three axes of a Cartesian coordinate system (such as the X, Y, and Z axes) and can be interpreted in a broader sense. For example, the axes of the first direction DR1, the second direction DR2, and the third direction DR3 can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. For the purposes of this disclosure, "at least one of A and B" can be interpreted as only A, only B, or any combination of A and B. Furthermore, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0049] Although the terms “first,” “second,” etc., may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Therefore, the first element discussed below may be referred to as the second element without departing from the teachings of this disclosure.

[0050] For descriptive purposes, spatial relative terms such as “below,” “under,” “below,” “down,” “above,” “above,” “above,” “above,” and “side” (e.g., as in “sidewall”) may be used herein to describe the relationship between one element and another(s) as shown in the figures. In addition to the orientations depicted in the figures, the spatial relative terms are intended to cover different orientations of the device in use, operation, and / or manufacture. For example, if the device in the figure is flipped, an element described as “below” or “under” other elements or features would then be oriented “above” other elements or features. Thus, the term “below” can cover both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or oriented in other orientations), and therefore, the spatial relative descriptive terms used herein should be interpreted accordingly.

[0051] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a” and “the (described)” as used herein are intended to include the plural forms as well. Furthermore, when used herein, the terms “comprising” and / or “including” indicate the presence of the stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. It will also be noted that, as used herein, the terms “generally,” “about,” and other similar terms are used as terms of approximation rather than terms of degree, and are therefore used to include inherent deviations in measured, calculated, and / or provided values ​​that are recognized by one of ordinary skill in the art. For example, “about” may mean within one or more standard deviations, or within ±20%, ±10%, or ±5% of the stated value.

[0052] This document describes various embodiments with reference to cross-sectional and / or exploded views, which are schematic diagrams of embodiments and / or intermediate structures. Therefore, variations in the shapes shown in the drawings will be expected due to, for example, manufacturing techniques and / or tolerances. Consequently, the embodiments disclosed herein should not necessarily be construed as limited to the specific shapes of the areas shown, but rather include shape deviations caused, for example, by manufacturing processes. In this way, the areas shown in the drawings may be schematic in nature, and the shapes of these areas may not reflect the actual shapes of the areas of the device, and are therefore not necessarily intended to be limiting.

[0053] As is customary in the art, embodiments are described and illustrated in the accompanying drawings from the perspective of functional blocks, units, and / or modules. Those skilled in the art will understand that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits (e.g., logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, and wiring connections, etc.) formed using semiconductor-based or other manufacturing techniques. Where blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and may optionally be driven by firmware and / or software. It should also be contemplated that each block, unit, and / or module may be implemented by dedicated hardware, or be implemented as a combination of dedicated hardware and processors (e.g., one or more programmed microprocessors and associated circuitry) to perform certain functions to perform others. Furthermore, in some embodiments, each block, unit, and / or module may be physically divided into two or more interactive and discrete blocks, units, and / or modules without departing from the scope of this disclosure. Furthermore, some embodiments of blocks, units, and / or modules may be physically merged into more complex blocks, units, and / or modules without departing from the scope of this disclosure.

[0054] Figure 1 This is a schematic plan view illustrating a portion of the display panel 10 according to an embodiment, and Figure 2 It is a diagram. Figure 1 A schematic concept diagram of a portion of the display panel 10.

[0055] like Figure 1 As shown, the display panel 10 may include a display area DA in which a plurality of pixels P are arranged, and a peripheral area PA located outside the display area DA. The peripheral area PA may surround (or completely surround) the display area DA.

[0056] The display area DA can have, for example, Figure 1 The quadrilateral polygon shape is shown in the figure. For example, the display area DA can have a rectangular shape with a horizontal length greater than its vertical length, a rectangular shape with a horizontal length less than its vertical length, or a square shape. In another embodiment, the display area DA can have various shapes such as ellipse, circle, or polygonal shapes other than quadrilaterals.

[0057] like Figure 2 As shown, the display panel 10 may include a light-emitting panel 10a and a filter panel 10b stacked on top of each other. The light-emitting panel 10a may include a plurality of display elements DPE, wherein each of the display elements DPE is electrically connected to its corresponding circuit PC (hereinafter referred to as pixel circuit PC). The display elements DPE and pixel circuit PC may be arranged in a display area DA.

[0058] The display area DA can provide a predetermined image using light emitted by the display element DPE. For example, blue light L emitted by the display element DPE. B It can be converted into red light L while passing through the filter panel 10b. R and Green Light L G Alternatively, the light can pass through the filter panel 10b without being converted. For this purpose, the filter panel 10b may include a filter for blue light L incident on the quantum dot layer. B Converted to red light L R The quantum dot layer, and the blue light incident on the quantum dot layer B Converted to green light L G The quantum dot layer or the blue light incident on the light-transmitting layer B The light passes through the light-transmitting layer. The display panel 10 can use light that has been converted by the filter panel 10b or light that has passed through the filter panel 10b without conversion (e.g., red light L). R Green light L G and Blu-ray B ), to provide pre-reserved images.

[0059] However, the embodiments are not limited to this. For example, the display panel 10 may use light solely from the light-emitting panel 10a to provide a predetermined image. For example, the light-emitting panel 10a may emit red light L. R Green light L G and Blu-ray B .

[0060] The peripheral area PA is a non-display area that does not provide an image and may completely or partially surround the display area DA. Drivers or main power lines for supplying electrical signals or power to the pixel circuitry PC may be arranged in the peripheral area PA. The peripheral area PA may include pads to which electronic devices or printed circuit boards (PCBs) can be electrically connected.

[0061] Figure 3 yes Figure 1 A schematic diagram of the equivalent circuit of the display element DPE of the display panel 10 and the pixel circuit PC electrically connected to the display element DPE. Figure 3 In this circuit, the organic light-emitting diode (OLED) of the display element (DPE) is electrically connected to the pixel circuit (PC). The pixel electrode of the OLED can be electrically connected to the pixel circuit (PC), and the counter electrode of the OLED can be electrically connected to the common voltage line (CVL) that provides the common power supply voltage (ELVSS). The OLED can emit light with a brightness corresponding to the amount of current supplied by the pixel circuit (PC).

[0062] The pixel circuit PC may include a first transistor T1, a second transistor T2, a third transistor T3, and a storage capacitor Cst. Each of the first transistor T1, the second transistor T2, and the third transistor T3 may be an oxide semiconductor thin-film transistor comprising a semiconductor layer formed of oxide semiconductor, or a silicon semiconductor thin-film transistor comprising a semiconductor layer formed of polycrystalline silicon. In this document, thin-film transistors and transistors are used interchangeably.

[0063] The first transistor T1 can be a driving transistor. One end of the first transistor T1 can be electrically connected to the pixel electrode of the organic light-emitting diode (OLED), and the other end of the first transistor T1 can be electrically connected to the power line PL that supplies the driving power supply voltage ELVDD. The driving gate electrode of the first transistor T1 can be electrically connected to the first node N1. The first transistor T1 can control the amount of current flowing from the power line PL to the OLED according to the voltage of the first node N1.

[0064] The second transistor T2 can be a switching transistor. One end of the second transistor T2 can be electrically connected to the data line DL, and the other end of the second transistor T2 can be electrically connected to the first node N1. The switching gate electrode of the second transistor T2 can be electrically connected to the scan line SL. The second transistor T2 can be turned on when the scan signal SS is supplied to the scan line SL, and can electrically connect the data line DL to the first node N1 to transmit the data signal DATA from the data line DL to the first node N1.

[0065] The third transistor T3 can be an initialization sensing transistor. One end of the third transistor T3 can be electrically connected to the initialization sensing line ISL, and the other end of the third transistor T3 can be electrically connected to the second node N2. The initialization gate electrode of the third transistor T3 can be electrically connected to the control line CL.

[0066] The third transistor T3 can be turned on when the control signal CS is supplied to the control line CL, and the initialization sensing line ISL can be electrically connected to the second node N2 to transmit the initialization sensing signal ISS from the initialization sensing line ISL to the second node N2. For example, when the third transistor T3 is turned on, it can initialize the potential of the pixel electrode of the organic light-emitting diode (OLED) by using the initialization sensing signal ISS from the initialization sensing line ISL as an initialization voltage. In another embodiment, when the third transistor T3 is turned on, it can sense characteristic information of the OLED. For example, the third transistor T3 can include both the function of an initialization transistor as described above and the function of a sensing transistor as described above, or it can include one of these two functions. When the third transistor T3 functions as an initialization transistor, the initialization sensing line ISL can be considered as an initialization voltage line, and when the third transistor T3 functions as a sensing transistor, the initialization sensing line ISL can be considered as a sensing line. The initialization operation and sensing operation of the third transistor T3 can be performed separately or simultaneously. For example, the third transistor T3 can be an initialization transistor and / or a sensing transistor. For ease of description, the third transistor T3 will be described in detail as having both the function of an initialization transistor and the function of a sensing transistor.

[0067] The storage capacitor Cst can be connected between the first node N1 and the second node N2. For example, one capacitor electrode of the storage capacitor Cst can be electrically connected to the driving gate electrode of the first transistor T1, and the other capacitor electrode of the storage capacitor Cst can be electrically connected to the pixel electrode of the organic light-emitting diode OLED.

[0068] Figure 3 The illustration shows a pixel circuit PC comprising three transistors T1 to T3 and a storage capacitor Cst; however, the embodiment is not limited to this. For example, the number of transistors or storage capacitors included in the pixel circuit PC can vary.

[0069] Figure 3 The illustration shows a display element DPE that is an organic light-emitting diode (OLED) comprising organic materials; however, embodiments are not limited thereto. For example, the display element DPE can be an inorganic light-emitting diode comprising inorganic materials. An inorganic light-emitting diode can include a PN junction diode comprising materials based on inorganic semiconductors. When a voltage is applied forward to the PN junction diode, holes and electrons are injected, and the energy generated by the recombination of holes and electrons is converted into light energy, thereby emitting light of a predetermined color. Such an inorganic light-emitting diode can have a width ranging from a few micrometers to several hundred micrometers. An inorganic light-emitting diode can be referred to as a miniature LED.

[0070] Figure 4 It is a diagram. Figure 1 A schematic layout diagram showing the positions of transistors and storage capacitors Cst, etc., in one pixel of the display panel 10. Figures 5 to 8 It is a layer-by-layer diagram Figure 4 A schematic layout diagram of components such as transistors and storage capacitors Cst in the display panel 10, and Figure 9 It is along Figure 4 A schematic cross-sectional view of the display panel 10 taken by line A-A'. For reference, a pixel may include multiple sub-pixels (e.g., three sub-pixels), and accordingly, Figure 3 The above equivalent circuit diagram is the equivalent circuit diagram of a sub-pixel. Figure 4 The schematic diagram illustrates the location of the transistor and storage capacitor Cst in a pixel comprising three sub-pixels.

[0071] like Figures 4 to 8 As shown, a pixel can include three sub-pixels. Figure 4 This illustrates a scenario where one pixel comprises a red subpixel, a green subpixel, and a blue subpixel. The red subpixel may include a first capacitor electrode Cst1r (see...). Figure 5 The green subpixel may include a storage capacitor Cst and three transistors T1r, T2r, and T3r, and may include a first capacitor electrode Cst1g (see [link to storage capacitor Cst1g]). Figure 5 The blue sub-pixel may include a storage capacitor Cst and three transistors T1g, T2g, and T3g, and may include a first capacitor electrode Cst1b (see [link to documentation]). Figure 5 The device consists of a storage capacitor Cst and three transistors T1b, T2b, and T3b. The components of the green and blue subpixels are the same as and / or similar to those of the red subpixel. Accordingly, for ease of description, the components of the red subpixel will now be described in detail. This description also applies to the components of the green and blue subpixels.

[0072] The red subpixel may include a red pixel circuit and a red pixel electrode PEr electrically connected to the red pixel circuit (see [link]). Figure 8 The red pixel circuitry may include a storage capacitor Cst and three transistors T1r, T2r, and T3r, wherein the storage capacitor Cst includes a first capacitor electrode Cst1r disposed in the red sub-pixel. Similarly, the green sub-pixel may include a green pixel circuitry and a green pixel electrode PEg electrically connected to the green pixel circuitry (see [link to green pixel circuitry]). Figure 8The green pixel circuitry may include a storage capacitor Cst and three transistors T1g, T2g, and T3g, wherein the storage capacitor Cst includes a first capacitor electrode Cst1g disposed in the green sub-pixel. In the case of the blue sub-pixel, it may also include a blue pixel circuitry and a blue pixel electrode PEb electrically connected to the blue pixel circuitry (see...). Figure 8 The blue pixel circuit may include a storage capacitor Cst and three transistors T1b, T2b and T3b, wherein the storage capacitor Cst includes a first capacitor electrode Cst1b disposed in the blue sub-pixel. Figures 4 to 8 The portion indicated by the dotted line in the diagram represents a pixel, and the collection of red pixel circuits, green pixel circuits, and blue pixel circuits included in this pixel can be called a pixel circuit.

[0073] The display panel 10 may include a substrate 100 (see...) Figure 9 Various components, such as transistors T1r, T2r, and T3r, and storage capacitor Cst, can be mounted on substrate 100. Substrate 100 may comprise glass, metal, or polymer resin. When substrate 100 is flexible or bendable, it may comprise polymer resins such as polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. Substrate 100 may have a multilayer structure comprising two layers, each comprising a polymer resin, and a barrier layer comprising an inorganic material (silicon oxide, silicon nitride, or silicon oxynitride, etc.) located between these two layers. Various modifications may be made, for example.

[0074] The first buffer layer 101 includes an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide (see...). Figure 9 The first buffer layer 101 can be located on the substrate 100. It can prevent metal atoms or impurities from the substrate 100 from diffusing to the active layer ACT disposed above it (see [link to relevant documentation]). Figure 6 )middle.

[0075] like Figure 5The bottom metal layer (BML) shown can be disposed on the first buffer layer 101. The bottom metal layer (BML) can include various signal lines and can be used to protect the active layer ACT by overlapping at least a portion thereon. In the case where the active layer ACT comprises polysilicon, the bottom metal layer (BML) can control the heating rate during the crystallization process used to form the active layer ACT, so that the active layer ACT can be crystallized uniformly. For example, the bottom metal layer (BML) can include metals, alloys, conductive metal oxides, or transparent conductive materials. For example, the bottom metal layer (BML) can include silver (Ag), silver-containing alloys, molybdenum (Mo), molybdenum-containing alloys, aluminum (Al), aluminum-containing alloys, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), or indium zinc oxide (IZO). The bottom metal layer (BML) can have a multilayer structure. For example, the bottom metal layer BML can have a Mo / Al or Ti / Al bilayer structure or a Ti / Al / Ti trilayer structure.

[0076] like Figure 5 As shown, the bottom metal layer BML may include a vertical common voltage line CVLv, an initialization sensing line ISL, a vertical power line PLv, a blue data line DLb, a green data line DLg, a red data line DLr, first capacitor electrodes Cst1r, Cst1g, and Cst1b, and drive gate electrode shields GSR, GSg, and GSb. Each of the vertical common voltage line CVLv, initialization sensing line ISL, vertical power line PLv, blue data line DLb, green data line DLg, and red data line DLr may extend in a first direction (or the y-axis direction). The vertical common voltage line CVLv, initialization sensing line ISL, vertical power line PLv, blue data line DLb, green data line DLg, and red data line DLr may be arranged sequentially in a second direction (or the x-axis direction) intersecting the first direction (or the y-axis direction).

[0077] As described above, the vertical common voltage line CVLv can extend in a first direction (or the y-axis direction). The vertical common voltage line CVLv can be electrically connected to the horizontal common voltage line CVLh extending in a second direction (or the x-axis direction), which will be described later (see reference). Figure 7Accordingly, the common voltage line CVL, comprising the vertical common voltage line CVLv and the horizontal common voltage line CVLh electrically connected to each other, can have a basic lattice shape in the display area DA, and therefore can have a basically uniform potential in the display area DA corresponding to the common power supply voltage ELVSS. The common voltage line CVL can be electrically connected to the common electrode CE, which is the counter electrode of the organic light-emitting diode OLED (see...). Figure 9 This ensures that the common electrode CE has a uniform potential in the display area DA.

[0078] The initialization sensing line ISL can extend in a first direction (or the y-axis direction). The initialization sensing line ISL can be electrically connected to the first portion of each of the third transistors T3r, T3g, and T3b, which are initialization sensing transistors, such that when the third transistors T3r, T3g, and T3b are turned on, the initialization sensing signal ISS from the initialization sensing line ISL can be transmitted to the red pixel electrode PER, the green pixel electrode PEg, and the blue pixel electrode PEb.

[0079] As described above, the vertical power line PLv can extend in a first direction (or the y-axis direction). The vertical power line PLv can be electrically connected to the horizontal power line PLh extending in a second direction (or the x-axis direction), which will be described later (see below). Figure 7 Accordingly, the power line PL, comprising the vertical power line PLv and the horizontal power line PLh electrically connected to each other, can have a basic grid shape in the display area DA, and thus can have a substantially uniform potential of the drive power supply voltage ELVDD in the display area DA. The power line PL can be electrically connected to each of the first transistors T1r, T1g, and T1b, which are driving transistors, and can be used to apply the drive power supply voltage ELVDD to the first transistors T1r, T1g, and T1b.

[0080] As described above, each of the green data line DLg, blue data line DLb, and red data line DLr can extend in a first direction (or the y-axis direction). The green data line DLg can be electrically connected to a first portion of the second transistor T2g of the green sub-pixel, the blue data line DLb can be electrically connected to a first portion of the second transistor T2b of the blue sub-pixel, and the red data line DLr can be electrically connected to a first portion of the second transistor T2r of the red sub-pixel. The second transistor T2r of the red sub-pixel, the second transistor T2g of the green sub-pixel, and the second transistor T2b of the blue sub-pixel are connected via a scan line SL (see...). Figure 7When the scan signal SS of the red sub-pixel is turned on, the second transistor T2r of the red sub-pixel, the second transistor T2g of the green sub-pixel, and the second transistor T2b of the blue sub-pixel can transmit the data signal DATA from the red data line DLr, the green data line DLg, and the blue data line DLb to the driving gate electrode of the first transistor T1r of the red sub-pixel, the driving gate electrode of the first transistor T1g of the green sub-pixel, and the driving gate electrode of the first transistor T1b of the blue sub-pixel, respectively.

[0081] As mentioned above, Figures 4 to 8 The portion indicated by the dotted line represents a pixel, and the set of red, green, and blue pixel circuits included in this pixel can be called a pixel circuit. The set of green data lines DLg, blue data lines DLb, and red data lines DLr can be called a data line set, and the data line set can be located on one side of the pixel circuit. Figures 4 to 8 The diagram shows the data line set located on one side of the pixel circuitry electrically connected to the data line set in the +x direction. One of the red data line DLr and the blue data line DLb in the data line set can be located at the center of the data line set. Figure 4 and Figure 5 The diagram shows the blue data line DLb located in the center of the data line set. For example, the blue data line DLb could be located between the green data line DLg and the red data line DLr. Correspondingly, the green data line DLg could not be located between the red data line DLr and the blue data line DLb.

[0082] When a white image is displayed on the display panel 10 and the electronic device including the display panel 10, the proportion of blue light in the white light may be approximately 10%, the proportion of red light in the white light may be approximately 20%, and the proportion of green light in the white light may be approximately 70%. Therefore, the viewer (or user) may be sensitive to variations in the amount of green light. If the green data line DLg is located between the red data line DLr and the blue data line DLb, the green data line DLg may be affected by the red data line DLr and / or the blue data line DLb due to electrical coupling, etc., and as a result, the display panel 10 and the electronic device including the display panel 10 may not be able to display a high-quality image.

[0083] However, in the case of the display panel 10 and the electronic device including the display panel 10 according to the embodiment, one of the red data line DLr and the blue data line DLb in the data line set is located in the center of the data line set, and therefore the green data line DLg may not be located between the red data line DLr and the blue data line DLb. Accordingly, a display panel 10 for displaying high-quality images and an electronic device including the display panel 10 can be realized. This will be described in more detail later.

[0084] The first capacitor electrodes Cst1r, Cst1g, and Cst1b, and the drive gate electrode shields GSR, GSg, and GSb, can be located between the set of vertical common voltage line CVLv, initialization sensing line ISL, and vertical power line PLv, and the set of blue data line DLb, green data line DLg, and red data line DLr. In a plan view, each of the first capacitor electrodes Cst1r, Cst1g, and Cst1b, and each of the drive gate electrode shields GSR, GSg, and GSb, can have an isolated shape.

[0085] Each of the first capacitor electrodes Cst1r, Cst1g, and Cst1b can be a capacitor electrode of the storage capacitor Cst. Each of the drive gate electrode shields GSR, GSg, and GSb can be connected to a transistor connection line TCL (see [link to transistor connection]) that can be considered as a drive gate electrode. Figure 7 At least a portion of the corresponding transistor connection lines TCL overlap, and thus the active layer ACT disposed above the drive gate electrode shields GSR, GSg and GSb can be protected.

[0086] Second buffer layer 102 (see) Figure 9 A second buffer layer 102 may be disposed on the first buffer layer 101 to cover the bottom metal layer BML. The second buffer layer 102 may include an insulating material. For example, the second buffer layer 102 may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide.

[0087] Figure 6 The active layer ACT shown may be disposed above the second buffer layer 102. The active layer ACT may include polysilicon or may include an oxide semiconductor. The oxide semiconductor may include Zn oxide, In-Zn oxide, or Ga-In-Zn oxide as a Zn oxide-based material. In another embodiment, the oxide semiconductor may include In-Ga-Zn-O (IGZO), In-Sn-Zn-O (ITZO), or In-Ga-Sn-Zn-O (IGTZO) in which metals such as In, Ga, and Sn are contained in ZnO. For convenience, the case in which the active layer ACT includes an oxide semiconductor will now be described.

[0088] The active layer ACT can include a first active layer ACT1 and a second active layer ACT2. The first active layer ACT1 of the red sub-pixel, the first active layer ACT1 of the green sub-pixel, and the first active layer ACT1 of the blue sub-pixel can be spaced apart from each other, while the second active layer ACT2 of the red sub-pixel, the second active layer ACT2 of the green sub-pixel, and the second active layer ACT2 of the blue sub-pixel can be electrically connected to each other and integrally formed into a single unit.

[0089] Each of the first active layers ACT1 may have a shape extending in a second direction (or the x-axis direction) to intersect a portion of the scan line SL. For example, the first active layer ACT1 may be a component of the second transistors T2r, T2g, and T2b, which are switching transistors. A first portion of each of the first active layers ACT1, disposed in the direction toward the data lines DLr, DLg, and DLb, may be electrically connected to the corresponding data line among the data lines DLr, DLg, and DLb.

[0090] A portion of the second active layer ACT2 may be a component of the first transistors T1r, T1g, and T1b for driving transistors, a component of the third transistors T3r, T3g, and T3b for initializing sensing transistors, and may also serve as a second capacitor electrode corresponding to (or overlapping with) the first capacitor electrodes Cst1r, Cst1g, and Cst1b of the storage capacitor Cst. This will be described later.

[0091] Gate insulating layer 104 may be disposed on second buffer layer 102 to cover active layer ACT. Gate insulating layer 104 may include insulating material. For example, gate insulating layer 104 may include inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, or aluminum oxide.

[0092] Figure 7 The gate layer GTL shown can be disposed on the gate insulating layer 104. For reference, and for ease of illustration, in Figure 7 The diagram above illustrates the gate layer GTL and the active layer ACT.

[0093] A gate layer (GTL) may include: a horizontal common voltage line CVLh, a scan line SL, a control line CL, and a horizontal power line PLh, each extending substantially in a second direction (or the x-axis direction); a first common voltage connection line CVCL1 and an initialization sensing connection line ISCL, each extending substantially in a first direction (or the y-axis direction); and a data connection line DCL, a transistor connection line TCL, a power connection line PLCL, and a shielding connection line SCL, each having an isolated shape. Each of the red, green, and blue sub-pixels may have a data connection line DCL, a transistor connection line TCL, a power connection line PLCL, and a shielding connection line SCL. Figure 7 As shown, the data connection line DCL may include a red data connection line DCLr located in the red sub-pixel, a green data connection line DCLg located in the green sub-pixel, and a blue data connection line DCLb located in the blue sub-pixel. The construction in the red sub-pixel will now be described as a representative example.

[0094] Gate layer GTLs can include metals, alloys, conductive metal oxides, or transparent conductive materials. For example, gate layer GTLs can include silver (Ag), silver-containing alloys, molybdenum (Mo), molybdenum-containing alloys, aluminum (Al), aluminum-containing alloys, aluminum nitride (AlN), tungsten (W), tungsten nitride (WN), copper (Cu), nickel (Ni), chromium (Cr), chromium nitride (CrN), titanium (Ti), tantalum (Ta), platinum (Pt), scandium (Sc), indium tin oxide (ITO), or indium zinc oxide (IZO). Gate layer GTLs can have multilayer structures. For example, gate layer GTLs can have a Mo / Al or Ti / Al bilayer structure or a Ti / Al / Ti trilayer structure.

[0095] As mentioned above, for convenience, Figure 7 The gate layer (GTL) and active layer (ACT) are shown together. Impurities can be added to the portion of the active layer ACT that does not overlap with the gate layer (GTL). For example, the portion of the active layer ACT that does not overlap with the gate layer (GTL) can be a doped portion. Accordingly, the electrical characteristics of the portion of the active layer ACT that does not overlap with the gate layer (GTL) can differ from the electrical characteristics of the portion of the active layer ACT that overlaps with the gate layer (GTL). For example, the resistance of the portion of the active layer ACT that does not overlap with the gate layer (GTL) can be lower than the resistance of the portion of the active layer ACT that overlaps with the gate layer (GTL) in the absence of a channel formed in the overlapping portion. Therefore, for example, in the red sub-pixel, the portion of the second active layer ACT2 that overlaps with the first capacitor electrode Cst1r can act as a conductor and can be the second capacitor electrode. The portion of the active layer ACT that does not overlap with the gate layer (GTL) can be a source region or a drain region, and can also act as wiring.

[0096] The scan line SL may extend substantially in a second direction (or the x-axis direction) and may have a protrusion protruding in a first direction (or the y-axis direction) that intersects the second direction. As described above, the first active layer ACT1 may have a shape that extends in the second direction (or the x-axis direction) to intersect a portion of the scan line SL, and specifically, may have a shape that extends in the second direction (or the x-axis direction) to intersect the protrusion of the scan line SL.

[0097] The red data connection line DCLr can be electrically connected to the first portion of the first active layer ACT1 located below the red data connection line DCLr through the first contact hole CT1 in the red pixel circuit, and can also be electrically connected to the red data line DLr located below the red data connection line DCLr through the second contact hole CT2r in the red pixel circuit. Therefore, as... Figure 5As shown, the red data line DLr may include a protrusion projecting in a second direction (or x-axis direction) to correspond to (or overlap with) the second contact hole CT2r. This is to ensure that the red data connection line DCLr and the red data line DLr are electrically connected to each other. The red data line DLr may be located on one side of the protrusion of the scan line SL. The red data line DLr may be positioned in the +x direction relative to the protrusion of the scan line SL. The first portion of the first active layer ACT1 of the red pixel circuit is the portion of the first active layer ACT1 positioned relative to the protrusion of the scan line SL in the direction toward the red data line DLr. For example, the red data connection line DCLr may be electrically connected to the second transistor T2r, which is a thin-film transistor in the red pixel circuit, via the red data line DLr.

[0098] The green data connection line DCLg can be electrically connected to the first portion of the first active layer ACT1 located below the green data connection line DCLg through the first contact hole CT1 in the green pixel circuit, and can also be electrically connected to the green data line DLg located below the green data connection line DCLg through the second contact hole CT2g in the green pixel circuit. Therefore, as... Figure 5 As shown, the green data line DLg may include a first protrusion P1 projecting in a second direction (or x-axis direction) to correspond to (or overlap with) the second contact hole CT2g. This is to ensure that the green data connection line DCLg and the green data line DLg are electrically connected to each other. Therefore, the first protrusion P1 can be configured to correspond to (or overlap with) the green pixel circuit. The green data line DLg may be located on one side of the protrusion of the scan line SL. The green data line DLg may be positioned in the +x direction relative to the protrusion of the scan line SL. The first portion of the first active layer ACT1 of the green pixel circuit is the portion of the first active layer ACT1 positioned relative to the protrusion of the scan line SL in the direction toward the green data line DLg. For example, the green data connection line DCLg may be electrically connected to the green data line DLg via a second transistor T2g, which is a thin-film transistor in the green pixel circuit.

[0099] like Figure 5 As shown, in addition to the first protrusion P1, the green data line DLg may also have a second protrusion P2 protruding in a second direction (or x-axis direction) at the portion corresponding to the pixel circuit. The second protrusion P2 will be described in more detail later.

[0100] The blue data connection line DCLb can be electrically connected to the first portion of the first active layer ACT1 located below the blue data connection line DCLb through the first contact hole CT1 in the blue pixel circuit, and can be electrically connected to the blue data line DLb located below the blue data connection line DCLb through the second contact hole CT2b in the blue pixel circuit. Therefore, as... Figure 5 As shown, the blue data line DLb may include a protrusion projecting in a second direction (or x-axis direction) to correspond to (or overlap with) the second contact hole CT2b. This is to ensure that the blue data connection line DCLb and the blue data line DLb are electrically connected to each other. The blue data line DLb may be located on one side of the protrusion of the scan line SL. The blue data line DLb may be positioned in the +x direction relative to the protrusion of the scan line SL. The first portion of the first active layer ACT1 of the blue pixel circuit is the portion of the first active layer ACT1 positioned relative to the protrusion of the scan line SL in the direction toward the blue data line DLb. For example, the blue data connection line DCLb may be electrically connected to the second transistor T2b, which is a thin-film transistor in the blue pixel circuit, via the blue data line DLb.

[0101] The transistor connection line TCL can be electrically connected to the second portion of the first active layer ACT1 via the third contact hole CT3, and can be electrically connected to the first capacitor electrode Cst1r of the bottom metal layer BML via the fourth contact hole CT4. The second portion of the first active layer ACT1 can be the portion of the first active layer ACT1 that is positioned away from the red data line DLr, relative to the scan line SL. The portion of the transistor connection line TCL that overlaps with the second active layer ACT2 can be the driving gate electrode of the first transistor T1r, which drives the transistor.

[0102] As described above, the portion of the second active layer ACT2 that overlaps with the transistor connection line TCL in the direction towards the red data line DLr can act as a second capacitor electrode. The power connection line PLCL can be electrically connected via the fifth contact hole CT5 to the portion of the second active layer ACT2 that overlaps with the transistor connection line TCL in the direction away from the red data line DLr. The power connection line PLCL can be electrically connected via the sixth contact hole CT6 to the vertical power line PLv located below the power connection line PLCL. For reference, the horizontal power line PLh can be electrically connected via the seventh contact hole CT7 to the vertical power line PLv located below the horizontal power line PLh.

[0103] The control line CL may extend substantially in the second direction (or the x-axis direction) and may have a protrusion protruding in the first direction (or the y-axis direction). The protrusion of the control line CL may serve as the initial sensing gate electrode for each of the third transistors T3r, T3g, and T3b that initialize the sensing transistor.

[0104] The initialization sensing connection line ISCL can be electrically connected to the second active layer ACT2 located below the initialization sensing connection line ISCL via the eighth contact hole CT8, and can be electrically connected to the initialization sensing line ISL located below the initialization sensing connection line ISCL via the ninth contact hole CT9. The portion of the second active layer ACT2 electrically connected to the initialization sensing connection line ISCL can be the portion of the protrusion of the second active layer ACT2 relative to the control line CL in the direction toward the initialization sensing connection line ISCL.

[0105] The shielding connection line SCL can be electrically connected to the second active layer ACT2 through the tenth contact hole CT10, and can be electrically connected to the drive gate electrode shield GSR through the eleventh contact hole CT11.

[0106] The first common voltage connection line CVCL1 can be electrically connected to the vertical common voltage line CVLv located below the first common voltage connection line CVCL1 through the twelfth contact hole CT12. The horizontal common voltage line CVLh can be electrically connected to the vertical common voltage line CVLv located below the horizontal common voltage line CVLh through the thirteenth contact hole CT13.

[0107] Planarization layer 106 may cover the gate layer GTL and may be disposed above the gate layer GTL. Planarization layer 106 may include organic insulating materials. For example, planarization layer 106 may include photoresist, benzocyclobutene (BCB), hexamethyldisiloxane (HMDSO), polystyrene, polymer derivatives having phenolic groups, acrylic polymers such as polymethyl methacrylate (PMMA), imide polymers such as polyimide, acryloyl ether polymers, amide polymers, fluorinated polymers, p-xylene polymers, vinyl alcohol polymers, or mixtures thereof.

[0108] like Figure 8The pixel electrode layer (PEL) shown can be disposed on the planarization layer 106. The pixel electrode layer (PEL) may include a red pixel electrode (PEr), a green pixel electrode (PEg), a blue pixel electrode (PEb), and a second common voltage connection line (CVCL2). The pixel electrode layer (PEL) can be a (semi-)transparent electrode layer or a reflective electrode layer. For example, the pixel electrode layer (PEL) may include a reflective layer comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or compounds thereof, and a transparent or semi-transparent electrode layer disposed above the reflective layer. The transparent or semi-transparent electrode layer may include at least one selected from the group consisting of indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). For example, the pixel electrode layer (PEL) may have a three-layer structure of ITO / Ag / ITO.

[0109] The red pixel electrode PEr can be electrically connected to the second active layer ACT2 of the red pixel circuit through the contact hole CTr defined in the planarization layer 106, etc.; the green pixel electrode PEg can be electrically connected to the second active layer ACT2 of the green pixel circuit through the contact hole CTg defined in the planarization layer 106, etc.; and the blue pixel electrode PEb can be electrically connected to the second active layer ACT2 of the blue pixel circuit through the contact hole CTb defined in the planarization layer 106, etc. Similarly, the second common voltage connection line CVCL2 can be electrically connected to the first common voltage connection line CVCL1 disposed below the second common voltage connection line CVCL2 through the contact hole CTCE defined in the planarization layer 106, etc.

[0110] A pixel defining layer 107 may be disposed above a planarization layer 106. The pixel defining layer 107 may have openings for exposing the respective central portions of the red pixel electrode PER, green pixel electrode PEg, and blue pixel electrode PEb, and may cover the respective edges of the red pixel electrode PER, green pixel electrode PEg, and blue pixel electrode PEb. Accordingly, the pixel defining layer 107 may prevent arcing or the like from occurring at the respective edges of the red pixel electrode PER, green pixel electrode PEg, and blue pixel electrode PEb by increasing the distance between the edge of each of the red pixel electrode PER, green pixel electrode PEg, and blue pixel electrode PEb and the common electrode CE located above the red pixel electrode PER, green pixel electrode PEg, and blue pixel electrode PEb. The pixel defining layer 107 may expose at least a portion of the second common voltage connection line CVCL2, such that the common electrode CE contacts the second common voltage connection line CVCL2 to be electrically connected to a common voltage line CVL, including a vertical common voltage line CVLv and a horizontal common voltage line CVLh, via the first common voltage connection line CVCL1 and the second common voltage connection line CVCL2. By using methods such as spin coating, the pixel defining layer 107 can be formed from at least one organic insulating material selected from polyimide, polyamide, acrylic resin, benzocyclobutene, and phenolic resin.

[0111] The common electrode CE can be a transparent electrode or a reflective electrode. For example, the common electrode CE can be a transparent or semi-transparent electrode, and can include a thin metal film with a low work function comprising Li, Ca, LiF, Al, Ag, Mg, or combinations thereof. The common electrode CE can further include a transparent conductive oxide (TCO) layer, such as ITO, IZO, ZnO, or In2O3, disposed above the metal film. The common electrode CE can be integrally formed as a single unit across the entire surface of the display area DA, and can be disposed across multiple pixel electrodes.

[0112] An intermediate layer may be disposed between the pixel electrode and the common electrode CE, and at least a portion of the intermediate layer may be located within an opening defined by the pixel defining layer 107. The emitting region of the organic light-emitting diode (OLED) may be defined by this opening. The intermediate layer may include an emitting layer. The emitting layer may include an organic material comprising a fluorescent or phosphorescent material emitting red, green, blue, or white light. The emitting layer may include a low-molecular-weight organic material or a high-molecular-weight organic material, and one or more functional layers such as a hole transport layer (HTL), a hole injection layer (HIL), an electron transport layer (ETL), and an electron injection layer (EIL) may be further arranged below and above the emitting layer.

[0113] The emission layer can have a shape corresponding to the patterning of each pixel electrode. Various modifications can be made to the intermediate layers other than the emission layer. For example, the layers other than the emission layer included in the intermediate layers can be integrally formed as a single unit across multiple pixel electrodes. If the display panel 10 includes the filter panel 10b as described above, the emission layer can also be formed as a single unit across multiple pixel electrodes.

[0114] Although not shown, an encapsulation layer for protecting the organic light-emitting diode (OLED) can be disposed above the common electrode (CE), and if necessary, a touchscreen layer, etc., can be disposed above the encapsulation layer. The encapsulation layer may include a stacked structure of a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. For convenience, detailed descriptions of the encapsulation layer will be omitted.

[0115] Figures 4 to 8 The portion indicated by the dotted line can repeat along the second direction (or the x-axis direction) within the display area DA of the display panel 10. Similarly, Figures 4 to 8 The portion indicated by the dashed line can repeatedly appear within the display area DA of the display panel 10 along a first direction (or the y-axis direction). In another embodiment, along the first direction (or the y-axis direction), for example, Figures 4 to 8 The portion indicated by the dotted line can appear in odd-numbered rows, and Figures 4 to 8 The portion of the data indicated by the dashed lines, excluding the horizontal common voltage line CVLh and the horizontal power line PLh, can appear in even-numbered rows, and vice versa. When n is an integer greater than or equal to 0, in the first direction (or the y-axis direction), the 2n+1th pixel and the 2n+2nd pixel can share a horizontal common voltage line CVLh, and the 2n+2nd pixel and the 2n+3rd pixel can share a horizontal power line PLh.

[0116] Figure 10 and Figure 11 This is a schematic layout diagram of some layers of components such as thin-film transistors and storage capacitors in a display panel 10 according to an embodiment. Figure 10 and Figure 11 These are schematic layout diagrams of the gate layer GTL and pixel electrode layer PEL of the display panel 10. For the layers of the display panel 10 other than the gate layer GTL and pixel electrode layer PEL, reference can be applied. Figures 4 to 9 The previous description.

[0117] According to this embodiment, the display panel 10 and the electronic device including the display panel 10 are in a situation where defects in the pixel circuit of the green sub-pixel are discovered during the manufacturing process and the defects are repaired during the manufacturing process in order to minimize the degradation of the quality of the displayed image.

[0118] As described above, when the display panel 10 and the electronic device including the display panel 10 display a white image, the proportion of blue light in the white light can be approximately 10%, the proportion of red light in the white light can be approximately 20%, and the proportion of green light in the white light can be approximately 70%. Therefore, if a defect occurs in the pixel circuit of the green sub-pixel and thus the green sub-pixel does not emit green light, the user can easily identify the defect. Therefore, if a defect in the pixel circuit of the green sub-pixel is discovered during the manufacturing process, it is desirable to repair the defect during the manufacturing process.

[0119] Therefore, the pixel circuit of the blue sub-pixel can be used instead of the pixel circuit of the green sub-pixel, causing the green sub-pixel to emit green light. For example, blue light may not be emitted from the blue sub-pixel. As mentioned above, since the proportion of blue light in white light is approximately 10%, the user may not be aware that blue light is not emitted from the blue sub-pixel. In the display panel 10 and the electronic device including the display panel 10, only pixels that have defects can have the structure described below, and pixels without defects can have the structure referenced above. Figures 4 to 9 The structure described.

[0120] Reference Figure 10 Describe the data connection lines (DCL) in the repaired pixels.

[0121] The red data connection line DCLr can be electrically connected to a first portion of the first active layer ACT1 located below the red data connection line DCLr via the first contact hole CT1 in the red pixel circuit, and can be electrically connected to the red data line DLr located below the red data connection line DCLr via the second contact hole CT2r in the red pixel circuit. The red data line DLr can be located on one side of the protrusion of the scan line SL. The red data line DLr can be positioned in the +x direction relative to the protrusion of the scan line SL. The first portion of the first active layer ACT1 of the red pixel circuit can be the portion of the first active layer ACT1 positioned in the direction toward the red data line DLr relative to the protrusion of the scan line SL. For example, the red data connection line DCLr can be electrically connected to the red data line DLr via the second transistor T2r, which is a thin-film transistor in the red pixel circuit.

[0122] The green data connection line DCLg can be electrically connected to a first portion of the first active layer ACT1 located below the green data connection line DCLg via the first contact hole CT1 in the green pixel circuit, and can be electrically connected to the green data line DLg located below the green data connection line DCLg via the second contact hole CT2g in the green pixel circuit. The green data line DLg can be located on one side of the protrusion of the scan line SL. The green data line DLg can be positioned in the +x direction relative to the protrusion of the scan line SL. The first portion of the first active layer ACT1 of the green pixel circuit is the portion of the first active layer ACT1 positioned in the direction toward the green data line DLg relative to the protrusion of the scan line SL. For example, the green data connection line DCLg can be electrically connected to the green data line DLg via a second transistor T2g, which is a thin-film transistor in the green pixel circuit. However, as described above, the green pixel circuit of the green sub-pixel may malfunction due to defects.

[0123] The blue data connection line DCLb can be electrically connected to a first portion of the first active layer ACT1 located below the blue data connection line DCLb via the first contact hole CT1 in the blue pixel circuit. However, the blue data connection line DCLb is not electrically connected to the blue data line DLb, but is instead electrically connected to the green data line DLg located below the blue data connection line DCLb via an additional contact hole CT2g'. The first portion of the first active layer ACT1 of the blue pixel circuit is the portion of the first active layer ACT1 with its protrusion relative to the scan line SL positioned in the direction toward the blue data line DLb. For example, the blue data connection line DCLb can be electrically connected to the green data line DLg via a second transistor T2b, which is a thin-film transistor included in the blue pixel circuit, instead of being electrically connected to the blue data line DLg. Accordingly, the blue pixel circuit can receive electrical signals from the green data line DLg.

[0124] As referenced above Figure 5 Specifically, at the portion corresponding to the pixel circuit, the green data line DLg may have a first protrusion P1 protruding in a second direction (or x-axis direction) to correspond to (or overlap with) the second contact hole CT2g, and may also have a second protrusion P2 protruding in the second direction (or x-axis direction). The blue data connection line DCLb may not be electrically connected to the blue data line DLg, but can be electrically connected to the green data line DLg located below the blue data connection line DCLb through an additional contact hole CT2g', and the second protrusion P2 of the green data line DLg may correspond to (or overlap with) the additional contact hole CT2g'. This is to ensure that the blue data connection line DCLb and the green data line DLg are electrically connected to each other. For this purpose, the second protrusion P2 can be configured to correspond to (or overlap with) the blue pixel circuit.

[0125] For example, the green data line DLg may have multiple protrusions at the portion corresponding to the pixel circuit, protruding in a direction intersecting the first direction (or the y-axis direction), and one of the multiple protrusions may be configured to correspond to (or overlap with) the green pixel circuit, and another of the multiple protrusions may be configured to correspond to (or overlap with) the blue pixel circuit.

[0126] like Figure 10 As shown, the dummy electrode DE can exist in the repaired pixel. The dummy electrode DE can be in the blue pixel circuit. The dummy electrode DE can be disposed on the gate insulating layer 104 as a blue data connection line DCLb, having an isolated shape in the plan view, and can be electrically connected to the blue data line DLb disposed below the dummy electrode DE through the second contact hole CT2b. The dummy electrode DE can be located above the blue data line DLb so as to overlap with the blue data line DLb in the plan view.

[0127] like Figure 11 As shown, the red pixel electrode PEr can be electrically connected to the second active layer ACT2 of the red pixel circuit through a contact hole CTR defined in the planarization layer 106, and the green pixel electrode PEg can be electrically connected to the second active layer ACT2 of the green pixel circuit through a contact hole CTg defined in the planarization layer 106, etc. Conversely, the blue pixel electrode PEb can have an isolated shape in the planar view and can not be electrically connected to the blue pixel circuit. Instead, the green pixel electrode PEg can be electrically connected to the blue pixel circuit through an additional connection electrode ACE. The additional connection electrode ACE can be disposed on the planarization layer 106 as the blue pixel electrode PEb. The additional connection electrode ACE can be electrically connected to the second active layer ACT2 of the blue pixel circuit through a contact hole CTb defined in the planarization layer 106, etc. By electrically connecting the additional connection electrode ACE to the green pixel electrode PEg, the green pixel electrode PEg can be electrically connected to the green data line DLg through the blue pixel circuit.

[0128] In the repaired pixel, the green pixel electrode PEg can be electrically connected to both the green pixel circuit and the blue pixel circuit, and both the green pixel circuit and the blue pixel circuit can be electrically connected to the green data line DLg. Accordingly, even if a defect occurs in the green pixel circuit and the green pixel circuit cannot transmit the signal corresponding to the electrical signal from the green data line DLg to the green pixel electrode PEg, the green sub-pixel can still normally emit green light through the blue pixel circuit. With this configuration, the possibility that a viewer might detect the defect when using the display panel 10 and the electronic device including the display panel 10 can be prevented or minimized.

[0129] If necessary, in the green sub-pixel, the portion of the green data connection line DCLg located between the portion of the green data connection line DCLg corresponding to the first contact hole CT1 and the portion of the green data connection line DCLg corresponding to the second contact hole CT2g can be cut so that the green pixel electrode PEg can be electrically connected only to the blue pixel circuit.

[0130] Description for situations where defects occur in the green pixel circuitry during the manufacturing process, such as Figure 10 and Figure 11 The repair process for the green pixel circuit is shown in the diagram.

[0131] First, manufacture with the above reference Figures 4 to 9 Display panel 10 with the same structure as described. For example... Figure 8 As shown, after the pixel electrode layer PEL is formed and before the pixel defining layer 107 is formed, an optical inspection can be performed to check for defects in the pixel circuitry. If a defect in the green pixel circuitry of a green subpixel is identified during such an inspection process, a repair procedure for that subpixel can be initiated.

[0132] To fix the issue, the blue pixel circuit is electrically connected to the green data line DLg, and the blue pixel circuit is electrically isolated from the blue data line DLb.

[0133] To electrically connect the blue pixel circuitry to the green data line DLg, a laser beam can be irradiated onto it. Figure 7 On the gate layer GTL shown, a laser beam can be directed onto a portion of the blue data connection line DCLb. This portion is located above the green data line DLg. Through this process, an additional contact hole CT2g' is defined (or formed) in an insulating layer such as the second buffer layer 102 and the gate insulating layer 104 located between the blue data connection line DCLb and the green data line DLg, such that the portion of the blue data connection line DCLb above the green data line DLg can be electrically connected to the green data line DLg. During this process, the portion of the blue data connection line DCLb above the green data line DLg can be briefly melted and then solidified.

[0134] To electrically insulate the blue pixel circuit from the blue data line DLb, a laser beam can be directed onto a portion of the blue data connection line DCLb. This portion of the blue data connection line DCLb can be positioned between the portion of the blue data connection line DCLb corresponding to the additional contact hole CT2g' and the portion of the blue data connection line DCLb corresponding to the second contact hole CT2b, thus dividing the blue data connection line DCLb into two parts. Accordingly, as... Figure 10As shown, the blue data connection line DCLb can be electrically connected to the green data line DLg through the additional contact hole CT2g', and the dummy electrode DE, which has an isolated shape and is spaced apart from the blue data connection line DCLb, can be electrically connected to the blue data line DLb through the second contact hole CT2b.

[0135] For convenience, the order of laser beam illumination can be changed. For example, the laser beam can be irradiated onto the portion of the blue data connection line DCLb that is positioned above the green data line DLg and the portion of the blue data connection line DCLb that corresponds to the second contact hole CT2b, to divide the blue data connection line DCLb into two parts. Then, the laser beam can be irradiated onto the portion of the blue data connection line DCLb that is above the green data line DLg to electrically connect the blue data connection line DCLb to the green data line DLg.

[0136] For reference, when a laser beam is irradiated onto the portion of the blue data connection line DCLb located above the green data line DLg and the portion of the blue data connection line DCLb corresponding to the second contact hole CT2b, thus dividing the blue data connection line DCLb into two parts, the conductive layer located above and below the laser-irradiated portion of the blue data connection line DCLb may not be required. Accordingly, the portion of the blue data connection line DCLb above the green data line DLg and the portion of the blue data connection line DCLb corresponding to the second contact hole CT2b can be effectively electrically insulated from each other.

[0137] If necessary, in the green sub-pixel, a laser beam can be directed onto the portion of the green data connection line DCLg located between the portion of the green data connection line DCLg corresponding to the first contact hole CT1 and the portion of the green data connection line DCLg corresponding to the second contact hole CT2g, thereby dividing the green data connection line DCLg into two parts. This electrically isolates the pixel circuitry of the green sub-pixel from the green data line DLg. This can be applied to the embodiments and variations described below.

[0138] By irradiating the laser beam Figure 8The blue pixel electrode PEb shown can be divided into two parts. This is achieved by irradiating the portion of the blue pixel electrode PEb between the portion corresponding to the contact hole CTb defined in the planarization layer 106 and the portion of the blue pixel electrode PEb to be exposed by the opening of the pixel defining layer 107. Because the planarization layer 106 beneath the blue pixel electrode PEb is thicker than other insulating layers beneath it, the portion of the blue pixel electrode PEb irradiated by the laser beam is prevented from being electrically connected to the second active layer ACT2 beneath the blue pixel electrode PEb during this process.

[0139] Subsequently, by electrically connecting the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 to the green pixel electrode PEg, the green pixel electrode PEg can be electrically connected to the blue pixel circuit through the contact hole CTb, as shown below. Figure 11 As shown in the diagram, electrically connecting the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 to the green pixel electrode PEg can be performed, for example, by dotting conductive ink using an inkjet printing method. The conductive ink may include conductive materials such as copper nanoparticles, silver nanoparticles, or graphene particles.

[0140] Accordingly, the blue pixel electrode PEb can have an isolated shape in the planar diagram and can be unconnected to the blue pixel circuit. Conversely, the green pixel electrode PEg can be electrically connected to the blue pixel circuit via an additional connection electrode ACE, which is formed using conductive ink through inkjet printing or the like.

[0141] This order can be changed. For example, by using an inkjet printing method to dot conductive ink to form an additional connection electrode ACE, the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 can be electrically connected to the green pixel electrode PEg. Then, by irradiating a laser beam onto the portion of the blue pixel electrode PEb disposed between the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 and the portion of the blue pixel electrode PEb exposed by the opening of the pixel defining layer 107, the blue pixel electrode PEb can be divided into two parts.

[0142] To facilitate electrical connection between the green pixel electrode PEg and the blue pixel circuitry using methods such as inkjet printing, the green pixel electrode PEg can be positioned adjacent to the blue pixel electrode PEb within the pixel. For example... Figure 8 , Figure 11As shown in the diagram, in a planar view, the green pixel electrode PEg can be positioned relatively closer to the blue pixel electrode PEb than the red pixel electrode Per. For example, in a planar view, the center of the green pixel electrode PEg can be positioned between the center of the red pixel electrode Per and the center of the blue pixel electrode PEb. In the pixel repaired in the manner described above, the additional connection electrode ACE can be positioned between the green pixel electrode PEg and the blue pixel electrode PEb.

[0143] For reference, in such Figure 10 After the blue data connection line DCLb is electrically connected to the green data line DLg as shown in the diagram, the blue pixel electrode PEb can be... Figure 11 As shown, it is divided into two parts. In another embodiment, as... Figure 11 After dividing the blue pixel electrode PEb into two parts as shown in the diagram, the blue data connection line DCLb can be... Figure 10 The electrical connection shown is to the green data line DLg. In other embodiments, various modifications may be possible. For example, in... Figure 11 After dividing the blue pixel electrode PEb into two parts as shown in the diagram, the blue data connection line DCLb can be... Figure 10 The diagram shows a division into two parts, forming a dummy electrode DE, and the blue data connection line DCLb as shown. Figure 10 The electrical connection shown is to the green data cable DLg, and then inkjet printing methods, etc., can be used. Figure 11 The diagram shows the formation of an additional connection electrode ACE.

[0144] After performing the repair in this manner, a pixel-defining layer 107 can be formed to expose the central portion of each of the red pixel electrode PEr, the green pixel electrode PEg, and the blue pixel electrode PEb, and to cover the edges of each of the red pixel electrode PEr, the green pixel electrode PEg, and the blue pixel electrode PEb. Then, an intermediate layer including an emission layer can be formed, and a common electrode CE can be formed, thereby manufacturing the display panel 10.

[0145] To electrically connect the blue pixel circuitry to the green data line DLg during the repair process, a laser beam can be directed at the portion of the blue data connection line DCLb above the green data line DLg, as described above. For this purpose, as follows... Figure 4 and Figure 5 As shown, the green data line DLg can be positioned closest to the pixel circuit among the red data line DLr, green data line DLg, and blue data line DLb. For example, the blue data connection line DCLb of the blue pixel circuit has a shape that extends above the green data line DLg.

[0146] However, the embodiments are not limited thereto. For example, the following is a schematic layout diagram of some layers of components such as thin-film transistors and storage capacitors in the display panel 10 according to an embodiment. Figure 12 and Figure 13 As shown, among the red data line DLr, green data line DLg, and blue data line DLb, the green data line DLg is the furthest from the pixel circuit electrically connected to the red data line DLr, green data line DLg, and blue data line DLb. This also ensures that the green data line DLg is not between the red data line DLr and the blue data line DLb. Therefore, a display panel 10 displaying high-quality images and an electronic device including the display panel 10 can be realized.

[0147] The red pixel circuit may include a red data connection line DCLr as described above. The green pixel circuit may include a green data connection line DCLg as described above.

[0148] The blue pixel circuit may include a blue data connection line DCLb as described above, and may further include a dummy connection line DCLg'. Similar to the blue data connection line DCLb, the dummy connection line DCLg' may be electrically connected via the first contact hole CT1 of the blue pixel circuit to a first portion of the first active layer ACT1 disposed below the dummy connection line DCLg'. For example, the dummy connection line DCLg' and the blue data connection line DCLb may be formed simultaneously in the same layer from the same material, and furthermore, the dummy connection line DCLg' and the blue data connection line DCLb may be integrally formed as a single unit. For example, the dummy connection line DCLg' electrically connected to the thin-film transistor of the blue pixel circuit may extend above the green data line DLg.

[0149] Figure 14 This is a schematic layout diagram of some layers of components such as thin-film transistors and storage capacitors in a display panel 10 according to an embodiment. Figure 14 This is a schematic layout diagram of the grid layer GTL included in the display panel 10. (See above reference) Figure 11 The description can be applied to the pixel electrode layer (PEL) of the display panel 10, and the above reference... Figures 4 to 9 The description can be applied to all layers of the display panel 10 except for the gate layer GTL and the pixel electrode layer PEL.

[0150] According to this embodiment, the display panel 10 and the electronic device including the display panel 10 are in a situation where defects in the pixel circuit of the green sub-pixel are discovered during the manufacturing process and the defects are repaired during the manufacturing process in order to minimize the degradation of the quality of the displayed image.

[0151] As described above, when the display panel 10 and the electronic device including the display panel 10 display a white image, the proportion of blue light in the white light can be approximately 10%, the proportion of red light in the white light can be approximately 20%, and the proportion of green light in the white light can be approximately 70%. Therefore, if a defect occurs in the pixel circuit of the green sub-pixel and thus the green sub-pixel does not emit green light, the user can easily identify the defect. Therefore, if a defect in the pixel circuit of the green sub-pixel is discovered during the manufacturing process, it is desirable to repair the defect during the manufacturing process.

[0152] Therefore, the pixel circuit of the blue sub-pixel can be used instead of the pixel circuit of the green sub-pixel, so that green light is emitted from the green sub-pixel. For example, blue light is not emitted from the blue sub-pixel. As mentioned above, since the proportion of blue light in white light is approximately 10%, the user may not be aware that blue light is not emitted from the blue sub-pixel. In the display panel 10 and the electronic device including the display panel 10, only pixels that have defects can have the structure described below, and pixels that have no defects can have the structure described above. Figures 4 to 9 The structure described.

[0153] Reference Figure 14 Describe the data connection lines (DCL) in the repaired pixels.

[0154] As described above, the red data connection line DCLr can electrically connect the second transistor T2r of the thin-film transistor in the red pixel circuit to the red data line DLr. Similarly, as described above, the green data connection line DCLg can electrically connect the second transistor T2g of the thin-film transistor in the green pixel circuit to the green data line DLg. However, as described above, the green pixel circuit of the green sub-pixel may malfunction due to defects.

[0155] The blue data connection cable DCLb can be electrically isolated from the blue pixel circuitry. For example... Figure 14 As shown, the blue data connection line DCLb can be electrically connected to the blue data line DLb through the second contact hole CT2b. However, the blue data connection line DCLb can have an isolated shape in the plan view, so that the blue data connection line DCLb can be electrically insulated from the blue pixel circuit.

[0156] The dummy connection line DCLg' can be electrically connected to the first portion of the first active layer ACT1 located below the dummy connection line DCLg' through the first contact hole CT1 of the blue pixel circuit. The dummy connection line DCLg' may not be electrically connected to the blue data line DLb, but can be electrically connected to the green data line DLg below the dummy connection line DCLg' through the additional contact hole CT2g'. The first portion of the first active layer ACT1 of the blue pixel circuit is the portion of the first active layer ACT1 with its protrusion relative to the scan line SL positioned in the direction toward the blue data line DLb. For example, the dummy connection line DCLg' can be electrically connected to the green data line DLg via the second transistor T2b, which is a thin-film transistor of the blue pixel circuit, instead of being electrically connected to the blue data line DLg. Accordingly, the blue pixel circuit can receive electrical signals from the green data line DLg.

[0157] The display panel 10 and the electronic device including the display panel 10 according to this embodiment may include, for example: Figure 11 The pixel electrode layer (PEL) is shown in the diagram. Figure 11 As shown, the red pixel electrode PEr can be electrically connected to the second active layer ACT2 of the red pixel circuit through a contact hole CTR defined in the planarization layer 106, and the green pixel electrode PEg can be electrically connected to the second active layer ACT2 of the green pixel circuit through a contact hole CTg defined in the planarization layer 106, etc. Conversely, the blue pixel electrode PEb can have an isolated shape in the planar view and can not be electrically connected to the blue pixel circuit. Instead, the green pixel electrode PEg can be electrically connected to the blue pixel circuit through an additional connection electrode ACE. The additional connection electrode ACE can be located on the planarization layer 106 as the blue pixel electrode PEb. The additional connection electrode ACE can be electrically connected to the second active layer ACT2 of the blue pixel circuit through a contact hole CTb defined in the planarization layer 106, etc. By electrically connecting the additional connection electrode ACE to the green pixel electrode PEg, the green pixel electrode PEg can be electrically connected to the green data line DLg through the blue pixel circuit.

[0158] In the repaired pixel, the green pixel electrode PEg can be electrically connected to both the green pixel circuit and the blue pixel circuit, and both the green pixel circuit and the blue pixel circuit can be electrically connected to the green data line DLg. Accordingly, even if a defect occurs in the green pixel circuit and the green pixel circuit cannot transmit the signal corresponding to the electrical signal from the green data line DLg to the green pixel electrode PEg, the green sub-pixel can still normally emit green light through the blue pixel circuit. With this configuration, the possibility that a viewer might detect the defect when using the display panel 10 and the electronic device including the display panel 10 can be prevented or minimized.

[0159] Description for situations where defects occur in the green pixel circuitry during the manufacturing process, such as Figure 14 and Figure 11 The repair process for the green pixel circuit is shown in the diagram.

[0160] First, manufacture with the above reference Figure 13 The display panel 10 has the same structure as the described structure. In forming as... Figure 13 Following the gate layer GTL shown in the figure, as Figure 8 The pixel electrode layer (PEL) shown is also formed above the gate layer (GTL). After the pixel electrode layer (PEL) is formed and before the pixel defining layer 107 is formed, an optical inspection can be performed to check for defects in the pixel circuitry. If a defect in the green pixel circuitry of the green sub-pixel is identified during such an inspection process, a sub-pixel repair procedure can be initiated.

[0161] To fix the issue, the blue pixel circuit is electrically connected to the green data line DLg, and the blue pixel circuit is electrically isolated from the blue data line DLb.

[0162] To electrically connect the blue pixel circuitry to the green data line DLg, a laser beam can be irradiated onto it. Figure 13 On the gate layer GTL shown, a laser beam can be directed onto a portion of the dummy connection line DCLg'. This portion is located above the green data line DLg. Consequently, an additional contact hole CT2g' can be defined (or formed) in an insulating layer such as the second buffer layer 102 and the gate insulating layer 104 located between the dummy connection line DCLg' and the green data line DLg, allowing the portion of the dummy connection line DCLg' above the green data line DLg to be electrically connected to the green data line DLg. During this process, the portion of the dummy connection line DCLg' above the green data line DLg can be briefly melted and then solidified.

[0163] To electrically insulate the blue pixel circuit from the blue data line DLb, a laser beam can be directed onto a portion of the blue data connection line DCLb. This portion of the blue data connection line DCLb can be positioned between the portion of the blue data connection line DCLb corresponding to the first contact hole CT1 and the portion of the blue data connection line DCLb corresponding to the second contact hole CT2b, thus dividing the blue data connection line DCLb into two parts. As described above, since the dummy connection line DCLg' and the blue data connection line DCLb are initially integrally formed as a single unit, the portion of the blue data connection line DCLb corresponding to the first contact hole CT1 can be considered as part of the dummy connection line DCLg'. Accordingly, as... Figure 14As shown, the dummy connection line DCLg' can be electrically connected to the green data line DLg through the additional contact hole CT2g'. The blue data connection line DCLb can be electrically connected to the blue data line DLb through the second contact hole CT2b, but it can have an isolated shape in the plan view. As mentioned above, because the dummy connection line DCLg' and the blue data connection line DCLb were initially formed as a single unit, after repair, the dummy connection line DCLg' and the blue data connection line DCLb can be on the same layer.

[0164] For convenience, the order of laser beam illumination can be changed. For example, the laser beam can be irradiated on the portion of the blue data connection line DCLb that corresponds to the first contact hole CT1 and the portion of the blue data connection line DCLb that corresponds to the second contact hole CT2b, to divide the blue data connection line DCLb into two parts. Then, the laser beam can be irradiated on the portion of the dummy connection line DCLg' above the green data line DLg, to electrically connect the dummy connection line DCLg' to the green data line DLg.

[0165] For reference, when a laser beam is irradiated onto the portion of the blue data connection line DCLb that corresponds to the first contact hole CT1 and the portion of the blue data connection line DCLb that corresponds to the second contact hole CT2b, thus dividing the blue data connection line DCLb into two parts, a conductive layer may not be present above or below the portion of the blue data connection line DCLb irradiated by the laser beam. Accordingly, the portion of the blue data connection line DCLb corresponding to the first contact hole CT1 and the portion of the blue data connection line DCLb corresponding to the second contact hole CT2b can be effectively electrically insulated from each other.

[0166] As described above, by irradiating the laser beam onto such Figure 8 On the blue pixel electrode PEb shown, it can be as follows Figure 11 The diagram shows the blue pixel electrode PEb divided into two parts. Then, by electrically connecting the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 to the green pixel electrode PEg, the green pixel electrode PEg can be electrically connected to the blue pixel circuitry through the contact hole CTb, as shown. Figure 11 As shown in the diagram, electrically connecting the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106, etc., to the green pixel electrode PEg can be achieved, for example, by dotting conductive ink using an inkjet printing method. The conductive ink may include conductive materials such as copper nanoparticles, silver nanoparticles, or graphene particles.

[0167] Accordingly, the blue pixel electrode PEb can have an isolated shape in the planar diagram and is not electrically connected to the blue pixel circuit. Conversely, the green pixel electrode PEg can be electrically connected to the blue pixel circuit via an additional connection electrode ACE, which is formed using conductive ink through inkjet printing or the like.

[0168] In another embodiment, this order can be changed. For example, by dotting conductive ink using an inkjet printing method to form an additional connection electrode ACE, the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 can be electrically connected to the green pixel electrode PEg. Then, by irradiating a laser beam onto the portion of the blue pixel electrode PEb disposed between the portion of the blue pixel electrode PEb corresponding to the contact hole CTb defined in the planarization layer 106 and the portion of the blue pixel electrode PEb exposed by the opening of the pixel defining layer 107, the blue pixel electrode PEb can be divided into two parts.

[0169] To facilitate electrical connection between the green pixel electrode PEg and the blue pixel circuitry using methods such as inkjet printing, the green pixel electrode PEg and the blue pixel electrode PEb can be arranged adjacent to each other within a pixel. For example... Figure 8 , Figure 11 As shown in the diagram, in a planar view, the green pixel electrode PEg can be relatively closer to the blue pixel electrode PEb than the red pixel electrode Per. For example, in a planar view, the center of the green pixel electrode PEg can be located between the center of the red pixel electrode Per and the center of the blue pixel electrode PEb. In the pixel repaired in the manner described above, an additional connecting electrode ACE can be disposed between the green pixel electrode PEg and the blue pixel electrode PEb.

[0170] For reference, assuming the dummy connection line DCLg' is electrically connected to the green data line DLg and the blue data connection line DCLb is as follows: Figure 14 After being divided into two parts as shown, the blue pixel electrode PEb can be as follows: Figure 11 The image shown is divided into two parts. In another embodiment, the blue pixel electrode PEb is as follows... Figure 11 As shown, after being divided into two parts, the dummy connection line DCLg' can be electrically connected to the green data line DLg, and the blue data connection line DCLb can be divided into two parts, as follows: Figure 14 As shown in the figure. However, the embodiments are not limited to this, and various modifications are possible. For example, the blue pixel electrode PEb can be as shown in the figure. Figure 11 As shown, it is divided into two parts. The dummy connection line DCLg' can be electrically connected to the green data line DLg, and the blue data connection line DCLb can be divided into two parts, as follows: Figure 14As shown, additional connection electrodes ACE can then be formed using inkjet printing methods, etc. Figure 11 As shown in the image.

[0171] Figure 15 This is a schematic concept diagram illustrating an image that can be displayed on the display panel 10. As described above, each pixel may include a red subpixel (R), a green subpixel (G), and a blue subpixel (B). Figure 15 This is a concept diagram, and the positions of subpixels within each pixel are not limited to... Figure 15 The positions shown in the figure can be modified in various ways.

[0172] exist Figure 15 In this diagram, luminous subpixels are shown in shaded areas, while non-luminous subpixels are not. For example, in the case of red subpixels belonging to the first column, red subpixels emitting red light and non-luminous red subpixels can be alternated along a first direction (or the y-axis direction). And for red subpixels belonging to the first row, red subpixels emitting red light and non-luminous red subpixels can be alternated along a second direction (or the x-axis direction). This also applies to green and blue subpixels. However, each pixel to which a green subpixel emitting green light belongs includes red subpixels that do not emit red light and blue subpixels that do not emit blue light.

[0173] Figure 15 The image displayed by the display panel 10 and the electronic device including the display panel 10 at a specific moment is shown, and the state of each sub-pixel can alternate between a light-emitting state and a non-light-emitting state over time.

[0174] Figure 16 The image is applied to the display panel 10 to display. Figure 15 A schematic diagram of the data signal of the image. Figure 16 This is a schematic diagram illustrating the data signal Rdata applied to the red sub-pixel, the data signal Gdata applied to the green sub-pixel, and the data signal Bdata applied to the blue sub-pixel of the pixel included in the display panel 10 as time T passes.

[0175] like Figure 16 As shown, the red and blue subpixels included in a pixel can emit light simultaneously, or they can both remain non-emitting light. When the red and blue subpixels included in the pixel emit light, the green subpixels included in the pixel do not emit green light, and when the red and blue subpixels included in the pixel do not emit light, the green subpixels included in the pixel emit green light. Accordingly, as... Figure 16As shown, the phase of the data signal Gdata applied to the green sub-pixel included in a pixel is opposite to the phase of the data signal Rdata applied to the red sub-pixel included in the pixel and the phase of the data signal Bdata applied to the blue sub-pixel included in the pixel. For example, if the green data line DLg is located between the red data line DLr and the blue data line DLb in a set of data lines including a red data line DLr, a green data line DLg, and a blue data line DLb electrically connected to a pixel, the green data line DLg may be affected by the red data line DLr and the blue data line DLb due to coupling, etc. As a result, the user may perceive the image displayed by the display panel 10 and the electronic device including the display panel 10 as an image with a mottled pattern extending in a first direction (or the y-axis direction) along with the green data line DLg, rather than a white image. This is because, as described above, the proportion of blue light in white light is approximately 10%, the proportion of red light in white light is approximately 20%, and the proportion of green light in white light is approximately 70%.

[0176] However, as described above, in the case of the display panel 10 and the electronic device including the display panel 10 according to this embodiment, one of the red data line DLr and the blue data line DLb in the data line set can be located in the center of the data line set. Accordingly, in the display as... Figure 15 In the case of the extreme image shown, a display panel 10 capable of displaying high-quality images and an electronic device including the display panel 10 can be realized.

[0177] The description focuses on display panel 10; however, the embodiments are not limited thereto. For example, a schematic concept diagram illustrating an electronic device 1 according to one or more embodiments is shown. Figure 17 As shown, the electronic device 1 may include any of the above-described display panels 10.

[0178] Electronic device 1 according to one or more embodiments may be a device for displaying moving or still images. The device may be a portable electronic device such as a mobile phone, smartphone, tablet PC, mobile communication terminal, e-notebook, e-book reader, portable multimedia player (PMP), navigator, or ultra-mobile personal computer (UMPC), or various products such as a television, laptop computer, monitor, billboard, or Internet of Things (IoT) linked device. In another embodiment, electronic device 1 according to the embodiment may also be a wearable device such as a smartwatch, watch phone, glasses display, or head-mounted display (HMD). In another embodiment, electronic device 1 according to the embodiment may also be a vehicle's instrument panel, vehicle's central dashboard, or a central information display (CID) mounted on the dashboard, an interior mirror display replacing the vehicle's side mirrors, or a display mounted behind the front seats as an entertainment device for rear-seat passengers.

[0179] Electronic device 1 may include a cover window 70, a lower cover 90, and a display panel 10 (such as the aforementioned display panel 10) located between the cover window 70 and the lower cover 90. If desired, electronic device 1 may further include additional components such as a display circuit board, components, a main circuit board, and / or a battery. These components may include proximity sensors, light sensors, iris sensors, facial recognition sensors, and / or cameras (or image sensors). Most of these additional components may be accommodated in the space between the cover window 70 and the lower cover 90.

[0180] A cover window 70 may be disposed above the display panel 10 to cover the upper surface of the display panel 10. The cover window 70 protects the upper surface of the display panel 10. The cover window 70 may include a transparent cover unit corresponding to (or overlapping) the display panel 10 and a light-shielding cover unit surrounding the transparent cover unit. The light-shielding cover unit may include an opaque material (e.g., a colored opaque material) that blocks light. The light-shielding cover unit may include a pattern visible to the user when no image is displayed.

[0181] The lower cover 90 can be shaped to resemble the external form of the electronic device 1 and can have an opening that exposes a portion of the display panel 10. The lower cover 90 can be assembled with the display panel 10 such that the display area DA of the display panel 10 is exposed through the opening in the lower cover 90. The lower cover 90 can be positioned such that the display panel 10 is located between the lower cover 90 and the cover window 70. The lower cover 90 can be made of plastic, metal, or both plastic and metal.

[0182] Figure 18 It is a diagram. Figure 17 A schematic block diagram of electronic device 1. (See attached diagram.) Figure 18As shown, the electronic device 1 may include a main processor 510, a wireless communication unit 520, an input unit 530, a sensor unit 540, an output unit 550, an interface unit 560, a memory 570, and / or a power supply unit 580.

[0183] The main processor 510 can control all functions of the electronic device 1. For example, the main processor 510 can output digital video data to a data driver via a display circuit board, thereby displaying an image on the display panel 10. The main processor 510 can receive input sensing data from a touch sensor driver unit. The main processor 510 can determine whether a user touch has been received based on the sensing data and perform an operation corresponding to a direct touch or proximity touch by the user. The main processor 510 can be an application processor, a central processing unit, or a system-on-a-chip (SoC) that includes an IC.

[0184] The wireless communication unit 520 may include at least one of the following: a broadcast receiving module 521, a mobile communication module 522, a wireless internet module 523, a short-range communication module 524, and a location information module 525.

[0185] The broadcast receiving module 521 can receive broadcast signals and / or broadcast-related information from an external broadcast management server via a broadcast channel. The broadcast channel may include satellite channels and terrestrial channels.

[0186] Mobile communication module 522 can transmit and receive radio signals from at least one of external terminals, servers, and base stations through a mobile communication network established according to technical standards or communication methods used for mobile communication (e.g., Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), Code Division Multiple Access 2000 (CDMA2000), Enhanced Voice Data Optimized or Enhanced Voice Data Only (EV-DO), Wideband CDMA (WCDMA), High-Speed ​​Downlink Packet Access (HSDPA), High-Speed ​​Uplink Packet Access (HSUPA), Long Term Evolution (LTE), and LTE-A Advanced). The radio signals may include voice call signals, video call signals, or various forms of data transmitted and received according to text / multimedia messages.

[0187] Wireless Internet Module 523 is a module for wireless Internet connectivity. Wireless Internet Module 523 can transmit and receive wireless signals in a communication network according to wireless Internet technologies. Wireless Internet technologies may include, for example, Wireless LAN (WLAN), Wi-Fi, Wi-Fi Direct, and Digital Living Network Alliance (DLNA).

[0188] The short-range communication module 524, which ensures short-range communication, can support short-range communication by using at least one of the following technologies: Bluetooth, Radio Frequency Identification (RFID), Infrared Data Association (IrDA), Ultra Wideband (UWB), ZigBee, Near Field Communication (NFC), Wi-Fi, Wi-Fi Direct, and Wireless Universal Serial Bus (USB). The short-range communication module 524 can support wireless communication between electronic device 1 and a wireless communication system, between electronic device 1 and another electronic device, or between electronic device 1 and the network where another electronic device (or an external server) resides, via a wireless local area network (WLAN). The WLAN can be a wireless personal area network (WPAN). The other electronic device can be a wearable device capable of exchanging data with (or linking to) electronic device 1.

[0189] The location information module 525, which is a module used to obtain the location (or current location) of the electronic device 1, may include a Global Positioning System (GPS) module or a Wi-Fi module.

[0190] The input unit 530 may include an image input unit such as a camera device 531 for inputting image signals, an audio input unit such as a microphone 532 for inputting audio signals, and an input device 533 for receiving information (or input) from a user. The camera device 531 can process image frames, such as still images or moving images, acquired by an image sensor in video call mode or shooting mode. The processed image frames can be displayed on the display panel 10 or stored in the memory 570. The microphone 532 can process external audio signals into electroacoustic data. The processed audio data can be used differently depending on the function performed in the electronic device 1 (or the application running in the electronic device 1).

[0191] The main processor 510 can control the operation of the electronic device 1 to correspond to (or overlap with) information received via the input device 533. The input device 533 may include mechanical input devices or touch input devices such as buttons, dome switches, knobs, or rotary switches located on the rear or side surface of the electronic device 1. The touch input device may include the touch screen layer of the display panel 10.

[0192] Sensor unit 540 may include one or more sensors that sense at least one of information within electronic device 1, information about the surrounding environment of electronic device 1, and user information, and generate a corresponding sensing signal. Based on the sensing signal, main processor 510 may control the driving or operation of electronic device 1, or perform data processing, functions, or operations associated with applications installed in electronic device 1. Sensor unit 540 may be a proximity sensor, illuminance sensor, or facial recognition sensor. Sensor unit 540 may include an accelerometer, magnetic sensor, gravity sensor, gyroscope sensor, motion sensor, RGB sensor, infrared (IR) sensor, finger scanning sensor, ultrasonic sensor, optical sensor, and / or battery level sensor. Sensor unit 540 may include environmental sensors or chemical sensors. Environmental sensors may include, for example, barometers, hygrometers, thermometers, radiation detection sensors, thermal detection sensors, and / or gas detection sensors. Chemical sensors may include, for example, electronic noses, health sensors, and / or biometric sensors.

[0193] The output unit 550 can generate outputs associated with vision, hearing and touch, and may include at least one of the display panel 10, audio output unit 551, haptic module 552 and optical output unit 553.

[0194] Display panel 10 can display (or output) information processed in electronic device 1. For example, display panel 10 can display execution screen information of an application driven in electronic device 1, or can display user interface (UI) or graphical user interface (GUI) information based on the execution screen information. Display panel 10 may include a display layer for displaying images and a touch screen layer for detecting user touch input. Therefore, display panel 10 can act as one of the input devices 533 that provide an input interface between electronic device 1 and the user, and at the same time, it can act as an output unit 550 that provides an output interface between electronic device 1 and the user.

[0195] The audio output unit 551 can output audio data received from the wireless communication unit 520 or stored in the memory 570 in various modes, such as call signal receiving mode, call mode, recording mode, voice recognition mode, or broadcast receiving mode. The audio output unit 551 can output audio signals associated with functions performed in the electronic device 1 (such as call signal receiving sound or message receiving sound). The audio output unit 551 may include a receiver or a speaker. At least one of the receiver and speaker may be a sound generating device attached below the display panel 10 and causing the display panel 10 to vibrate to output sound. The sound generating device may be a piezoelectric element or piezoelectric actuator that contracts and expands in response to an electrical signal, or it may be an exciter that generates magnetic force by using a voice coil to vibrate the display panel 10.

[0196] The haptic module 552 can produce various tactile effects that can be felt by a user. The haptic module 552 can provide vibrations as a tactile effect to the user. The haptic module 552 can not only transmit tactile effects through direct contact, but can also be implemented so that the user can feel the tactile effects through the muscles in their fingers or arms.

[0197] The optical output unit 553 can output a signal to notify the user of an event by using light from a light source. Examples of events occurring in the electronic device 1 may include receiving a message, receiving a call signal, receiving a missed call, an alarm, a schedule alarm, a schedule reminder, receiving an email, and receiving information through an application. The signal output from the optical output unit 553 can be achieved by the electronic device 1 emitting monochromatic or multicolor light from its front or rear. The signal output can be terminated when the electronic device 1 detects the user's confirmation of the event.

[0198] Interface unit 560 serves as a channel for electrically connecting to various types of external devices of electronic device 1. Interface unit 560 may include at least one of the following: a wired / wireless headphone port, an external charger port, a wired / wireless data port, a memory card port, a port for connecting devices equipped with an identification module, an audio input / output (I / O) port, a video I / O port, and an earphone port. When electronic device 1 is electrically connected to an external device via interface unit 560, electronic device 1 can perform appropriate controls associated with the connected external device.

[0199] Memory 570 can store data supporting various functions of electronic device 1. Memory 570 can store multiple applications running on electronic device 1, data for the operation of electronic device 1, and instructions. At least some of the multiple applications can be downloaded from an external server via wireless communication. Memory 570 can store applications for the operation of main processor 510, or can temporarily store input / output data (e.g., data such as phone books, messages, still images, and moving images). Memory 570 can store tactile data regarding vibrations of various modes provided to tactile module 552, and audio data associated with various sounds provided to audio output unit 551.

[0200] The memory 570 may include at least one type of storage medium selected from flash memory, hard disk, solid-state drive (SSD), silicon disk drive (SDD), multimedia card micro, card memory (e.g., secure digital (SD) or extreme digital (XD) memory), random access memory (RAM), static RAM (SRAM), read-only memory (ROM), electrically erasable programmable ROM (EEPROM), programmable ROM (PROM), magnetic storage, magnetic disk, and optical disk.

[0201] Under the control of the main processor 510, the power supply unit 580 can receive external power and / or internal power and supply power to each of the components included in the electronic device 1. The power supply unit 580 may include a battery. The power supply unit 580 may have a connection port, and the connection port may be configured to electrically connect to an interface unit 560 that supplies power for charging the battery, for example. In another embodiment, the power supply unit 580 can wirelessly charge the battery.

[0202] The display panel according to one or more of the above embodiments includes a pixel circuit comprising a red pixel circuit, a green pixel circuit, and a blue pixel circuit, and a data line set comprising red data lines, green data lines, and blue data lines, and emits red light through the red pixel circuit, green light through the green pixel circuit, and blue light through the blue pixel circuit. However, the embodiments are not limited thereto.

[0203] For example, a display panel according to one or more embodiments may include a pixel circuit comprising a cyan pixel circuit, a yellow pixel circuit, and a magenta pixel circuit, as well as a data line set comprising cyan data lines, yellow data lines, and magenta data lines, and may emit cyan light through the cyan pixel circuit, emit yellow light through the yellow pixel circuit, and emit magenta light through the magenta pixel circuit.

[0204] When a display panel 10 displays an image by emitting cyan, yellow, and / or magenta light from pixels, and an electronic device including the display panel 10 displays a white image, the proportion of yellow light in the white light is the largest, and the proportion of magenta light in the white light is the smallest. Accordingly, the aforementioned description of green pixel circuits and green data lines, etc., can be replaced with a description of yellow pixel circuits and yellow data lines, etc.; the aforementioned description of blue pixel circuits and blue data lines, etc., can be replaced with a description of magenta pixel circuits and magenta data lines, etc.; and the aforementioned description of red pixel circuits and red data lines, etc., can be replaced with a description of cyan pixel circuits and cyan data lines, etc.

[0205] In another embodiment, the aforementioned red pixel circuit can be referred to as a first color pixel circuit, the aforementioned green pixel circuit can be referred to as a second color pixel circuit, the aforementioned blue pixel circuit can be referred to as a third color pixel circuit, the aforementioned red data line can be referred to as a first color data line, the aforementioned green data line can be referred to as a second color data line, the aforementioned blue data line can be referred to as a third color data line, the aforementioned red light can be referred to as a first color light, the aforementioned green light can be referred to as a second color light, the aforementioned blue light can be referred to as a third color light, the aforementioned red data connection line can be referred to as a first color data connection line, the aforementioned green data connection line can be referred to as a second color data connection line, the aforementioned blue data connection line can be referred to as a third color data connection line, the aforementioned red pixel electrode can be referred to as a first color pixel electrode, the aforementioned green pixel electrode can be referred to as a second color pixel electrode, and the aforementioned blue pixel electrode can be referred to as a third color pixel electrode.

[0206] Among the first-colored light emitted by the first-color pixel circuit, the second-color light emitted by the second-color pixel circuit, and the third-color light emitted by the third-color pixel circuit, the proportion of the second-color light in white light will be the largest. The proportion of the third-color light in white light will be the smallest. For example, the foregoing description of the red pixel circuit, red data line, red data connection line, and red pixel electrode can be applied to the description of the first-color pixel circuit, first-color data line, first-color data connection line, and first-color pixel electrode. Similarly, the foregoing description of the green pixel circuit, green data line, green data connection line, and green pixel electrode can be applied to the description of the second-color pixel circuit, second-color data line, second-color data connection line, and second-color pixel electrode. Likewise, the foregoing description of the blue pixel circuit, blue data line, blue data connection line, and blue pixel electrode can be applied to the description of the third-color pixel circuit, third-color data line, third-color data connection line, and third-color pixel electrode.

[0207] For example, the above embodiment can be understood as the case where the first color light is red, the second color light is green, and the third color light is blue. Furthermore, as described above, this embodiment can also be applied to the case where the first color light is cyan, the second color light is yellow, and the third color light is magenta.

[0208] According to one or more embodiments described above, a display panel and electronic device in which high-quality images are displayed can be realized. However, the scope of this disclosure is not limited to those described above.

[0209] It should be understood that the embodiments described herein are to be considered in a descriptive sense only and not for limiting purposes. The description of features or aspects in each embodiment should typically be considered as other similar features or aspects that may be used in other embodiments. Although one or more embodiments have been described with reference to the accompanying drawings, those skilled in the art will understand that various modifications in form and detail may be made thereto without departing from the spirit and scope as defined by the claims.

Claims

1. A display panel, comprising: The pixel circuit includes a first color pixel circuit, a second color pixel circuit, and a third color pixel circuit; as well as A data line set is disposed on one side of the pixel circuit and includes a first color data line, a second color data line, and a third color data line, each extending in a first direction. Among the first color light emitted through the first color pixel circuit, the second color light emitted through the second color pixel circuit, and the third color light emitted through the third color pixel circuit, the second color light has the highest proportion in white light, and One of the first color data line and the third color data line in the data line set is located at the center of the data line set.

2. The display panel according to claim 1, wherein, Among the first color data line, the second color data line, and the third color data line, the second color data line is located closest to the pixel circuit.

3. The display panel according to claim 1, wherein, The second color data line includes a plurality of protrusions in the portion corresponding to the pixel circuit, which protrude in a direction intersecting the first direction.

4. The display panel according to claim 3, wherein, The third color light has the lowest proportion in the white light, one of the plurality of protrusions is configured to overlap with the second color pixel circuit, and another of the plurality of protrusions is configured to overlap with the third color pixel circuit.

5. The display panel according to claim 1, wherein, The second color data line includes two protrusions in the portion corresponding to the pixel circuit that protrude in a direction intersecting the first direction.

6. The display panel according to claim 5, wherein, The third color light has the lowest proportion in the white light, and one of the two protrusions of the second color data line is configured to overlap with the second color pixel circuit. The other of the two protrusions of the second color data line is configured to overlap with the third color pixel circuit.

7. The display panel according to claim 1, wherein, The first color pixel circuit includes a first color data connection line that electrically connects the thin-film transistor of the first color pixel circuit to the first color data line. The second color pixel circuit includes a second color data connection line that electrically connects the thin-film transistor of the second color pixel circuit to the second color data line, and The third color pixel circuit includes a third color data connection line that electrically connects the thin-film transistor of the third color pixel circuit to the third color data line.

8. The display panel according to claim 1, wherein, The third color light has the lowest proportion in the white light. The first color pixel circuit includes a first color data connection line that electrically connects the thin-film transistor of the first color pixel circuit to the first color data line. The second color pixel circuit includes a second color data connection line that electrically connects the thin-film transistor of the second color pixel circuit to the second color data line, and The third color pixel circuit includes a third color data connection line that electrically connects the thin-film transistor of the third color pixel circuit to the second color data line.

9. The display panel according to claim 8, further comprising: A dummy electrode is disposed on a layer above the third color data connection line, has an isolated shape in the plan view, and is electrically connected to the third color data line.

10. The display panel according to claim 8, further comprising: The first color pixel electrode is electrically connected to the first color pixel circuit. The second color pixel electrode is electrically connected to the second color pixel circuit. as well as An additional connection electrode is electrically connected to the third color pixel circuit and the second color pixel electrode.

11. The display panel according to claim 10, further comprising: The third color pixel electrode is located on a layer on which the additional connection electrode is disposed, spaced apart from the additional connection electrode, and has an isolated shape in the plan view.

12. The display panel according to claim 11, wherein, In the plan view, the second color pixel electrode is closer to the third color pixel electrode than the first color pixel electrode, and The additional connection electrode is disposed between the second color pixel electrode and the third color pixel electrode.

13. The display panel according to claim 1, wherein, Among the first color data line, the second color data line, and the third color data line, the second color data line is positioned furthest from the pixel circuit.

14. The display panel according to claim 13, wherein, The first color pixel circuit includes a first color data connection line that electrically connects the thin-film transistor of the first color pixel circuit to the first color data line. The second color pixel circuit includes a second color data connection line that electrically connects the thin-film transistor of the second color pixel circuit to the second color data line, and The third color pixel circuit includes a third color data connection line electrically connecting the thin-film transistor of the third color pixel circuit to the third color data line, and a dummy connection line electrically connecting the thin-film transistor of the third color pixel circuit and extending above the second color data line.

15. The display panel according to claim 13, wherein, The third color light has the lowest proportion in the white light. The first color pixel circuit includes a first color data connection line that electrically connects the thin-film transistor of the first color pixel circuit to the first color data line. The second color pixel circuit includes a second color data connection line that electrically connects the thin-film transistor of the second color pixel circuit to the second color data line, and The third color pixel circuit includes a dummy connection line that electrically connects the thin-film transistor of the third color pixel circuit to the second color data line.

16. The display panel according to claim 15, further comprising: The third color data connection line, on the layer above the dummy connection line, has an isolated shape in the plan view and is electrically connected to the third color data line; The first color pixel electrode is electrically connected to the first color pixel circuit. The second color pixel electrode is electrically connected to the second color pixel circuit. as well as An additional connection electrode is electrically connected to the third color pixel circuit and the second color pixel electrode.

17. The display panel according to claim 16, further comprising: The third color pixel electrode is located on a layer on which the additional connection electrode is disposed, spaced apart from the additional connection electrode, and has an isolated shape in the planar view.

18. The display panel according to claim 17, wherein, In the plan view, the second color pixel electrode is positioned closer to the third color pixel electrode than the first color pixel electrode, and The additional connection electrode is disposed between the second color pixel electrode and the third color pixel electrode.

19. The display panel according to claim 1, wherein, The first color of light includes red light. The second color light includes green light, and The third color light includes blue light.

20. An electronic device comprising: Display panel according to any one of claims 1 to 19; as well as The lower cover forms the exterior of the electronic device and has an opening that exposes a portion of the display panel.

Images