Multilayer ceramic capacitor and method of manufacturing same

Abstract

The invention provides a multilayer ceramic capacitor and a method of manufacturing the same. The multilayer ceramic capacitor includes: a capacitor body including a dielectric layer and an inner electrode layer; and an external electrode disposed on an outer surface of the capacitor body, in which the dielectric layer includes barium (Ba), titanium (Ti), and boron (B), the dielectric layer includes a plurality of dielectric grains and grain boundaries disposed between the plurality of dielectric grains, and an average thickness of the grain boundaries is about 1 nm to about 10 nm.

Description

Technical Field

[0001] This disclosure relates to a multilayer ceramic capacitor and a method for manufacturing the same. Background Technology

[0002] Electronic components using ceramic materials include capacitors, inductors, piezoelectric elements, varistors, and thermistors. Among these ceramic-based electronic components, multilayer ceramic capacitors (MLCCs) are used in a variety of electronic devices due to their advantages such as small size, high capacitance, and ease of installation.

[0003] For example, multilayer ceramic capacitors can be used as chip capacitors mounted on the substrates of various electronic products, such as imaging devices (e.g., liquid crystal displays (LCDs), plasma display panels (PDPs)), computers, personal portable terminals, smartphones, etc.) for charging or discharging from them.

[0004] Recently, as the use of multilayer ceramic capacitors has expanded into the electric vehicle industry, ensuring the high reliability of multilayer ceramic capacitors (exhibiting stable performance even under harsh operating conditions such as high voltage and high temperature) has become crucial. Summary of the Invention

[0005] This disclosure provides a multilayer ceramic capacitor with excellent reliability.

[0006] This disclosure provides a method for manufacturing a multilayer ceramic capacitor.

[0007] This disclosure provides a multilayer ceramic capacitor, the multilayer ceramic capacitor comprising: a capacitor body including a dielectric layer and an inner electrode layer; and an outer electrode disposed on the outer surface of the capacitor body, wherein the dielectric layer comprises barium (Ba), titanium (Ti) and boron (B), the dielectric layer includes a plurality of dielectric grains and grain boundaries, the grain boundaries are disposed between adjacent dielectric grains among the plurality of dielectric grains, and the average thickness of the grain boundaries is about 1 nm to about 10 nm.

[0008] The standard deviation of the thickness of the grain boundary can be from about 0.1 nm to about 2.5 nm, and the standard deviation can be the square root of the average of the squares of the thickness deviations of the grain boundary.

[0009] The dielectric layer may include a first dielectric layer and a second dielectric layer. The capacitor body may include an effective region, a cover region, and a side edge region. The effective region includes the first dielectric layer and the inner electrode layer, wherein the inner electrode layer is stacked on the first dielectric layer. The cover region includes the second dielectric layer, wherein the second dielectric layer is disposed on a first surface and a second surface of the effective region in the stacking direction. The side edge regions are disposed on opposite ends of the effective region in a direction perpendicular to the stacking direction. Boron (B) is included in at least one region of the effective region, the cover region, and the side edge region.

[0010] In the dielectric layer, based on 100 atomic parts of titanium (Ti), boron (B) may be included in an amount of about 0.01 atomic parts to about 5 atomic parts.

[0011] The dielectric layer may also include silicon (Si).

[0012] In the dielectric layer, silicon (Si) may be included in an amount of about 0.1 atomic parts to about 5 atomic parts based on 100 atomic parts of titanium (Ti).

[0013] The dielectric layer may also include at least one rare earth element.

[0014] The dielectric layer may further include two or more rare earth elements selected from La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and Y.

[0015] The dielectric layer may also include dysprosium (Dy) and terbium (Tb).

[0016] In the dielectric layer, based on 100 atomic parts of titanium (Ti), at least one rare earth element may be included in an amount of about 0.5 atomic parts to about 5 atomic parts.

[0017] The grain boundaries may include at least one selected from boron (B) and silicon (Si).

[0018] The grain boundaries may include boron (B) and silicon (Si).

[0019] The grain boundaries may also include at least one rare earth element.

[0020] The size of the dielectric grains among the plurality of dielectric grains can be from about 100 nm to about 500 nm.

[0021] This disclosure provides a method for manufacturing a multilayer ceramic capacitor, the method comprising: mixing a barium titanate-based compound with borosilicate glass to prepare a dielectric paste; using the dielectric paste to manufacture a plurality of dielectric green sheets, and forming a conductive paste layer on the surface of two or more of the plurality of dielectric green sheets; manufacturing a dielectric green sheet stack by stacking the two or more dielectric green sheets on which the conductive paste layer is formed; sintering the dielectric green sheet stack to manufacture a capacitor body including a dielectric layer and an inner electrode layer; and forming an outer electrode on the surface of the capacitor body, wherein the dielectric layer comprises barium (Ba), titanium (Ti), and boron (B), the dielectric layer includes a plurality of dielectric grains and grain boundaries, the grain boundaries being disposed between adjacent dielectric grains among the plurality of dielectric grains, and the average thickness of the grain boundaries being about 1 nm to about 10 nm.

[0022] The borosilicate glass may include silicon dioxide (SiO2) and boron oxide (B2O3).

[0023] The borosilicate glass can be mixed in such an amount that, based on 100 moles of titanium (Ti) included in the barium titanate compound, the amount of boron (B) included in the borosilicate glass can be from about 0.01 moles to about 10 moles.

[0024] The dielectric paste can be prepared by further mixing at least one rare earth element compound.

[0025] The at least one rare earth element compound may include dysprosium (Dy) compounds and terbium (Tb) compounds.

[0026] The dysprosium (Dy) compound may include Dy2O3, and the terbium (Tb) compound may include Tb4O7.

[0027] The multilayer ceramic capacitor according to the embodiment can improve reliability by having a dielectric layer that can be sintered at low temperatures, has excellent density, and has a uniform microstructure and uniform grain boundaries. Attached Figure Description

[0028] Figure 1 This is a perspective view showing a multilayer ceramic capacitor according to an embodiment.

[0029] Figure 2 It is along Figure 1 A cross-sectional view of a multilayer ceramic capacitor taken by line I-I'.

[0030] Figure 3 It is along Figure 1 A cross-sectional view of a multilayer ceramic capacitor taken from line II-II'.

[0031] Figure 4It is shown Figure 1 An exploded perspective view of the capacitor body.

[0032] Figure 5 This is a schematic diagram showing the dielectric layer according to an embodiment.

[0033] Figure 6 The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 2.

[0034] Figure 7 The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 4. Detailed Implementation

[0035] The present disclosure will now be described in detail with reference to the accompanying drawings, in which embodiments of the disclosure are illustrated. The drawings and description are to be considered illustrative rather than restrictive in nature. Throughout the specification, the same reference numerals denote the same elements. In the drawings, some elements are enlarged, omitted, or shown schematically, and the dimensions of each element do not perfectly reflect the actual dimensions.

[0036] The accompanying drawings are intended only to facilitate understanding of the embodiments disclosed in this specification, and it will be understood that the technical concepts disclosed herein are not limited to the drawings, and that this disclosure includes all variations, equivalents and alternatives within the scope of the technical concepts disclosed herein.

[0037] Although terms such as "first" and "second" are used to describe various elements, these elements are not limited by these terms. These terms are only used to distinguish one element from another.

[0038] Furthermore, it will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, the element may be directly on said other element, or there may be other elements in between. In contrast, when an element is referred to as being "directly on" another element, there are no other elements in between. Additionally, when an element is referred to as being "on" or "above" a reference element, the element may be located above or below the reference element, and not necessarily based on being "on" or "above" the reference element in a direction opposite to the direction of gravity.

[0039] Throughout this specification, the expressions “comprising” or “having” are intended to specify the presence of the stated features, quantities, steps, operations, components, parts, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, quantities, steps, operations, components, parts, and / or combinations thereof. Therefore, unless explicitly stated otherwise, the expressions “comprising” and variations such as “including” or “having” will be understood to mean that the stated elements are included but no other elements are excluded.

[0040] Furthermore, throughout the specification, the phrases "in a plan view" or "on a plane" indicate the target portion as viewed from the top, and the phrases "in a cross-sectional view" or "on a cross-section" indicate the cross-section formed by vertically cutting the target portion as viewed from the side.

[0041] Throughout the specification, the term "connection" can mean not only a direct connection between two or more constituent elements, but also an indirect connection between two or more constituent elements through other constituent elements, or an electrical or physical connection between two or more constituent elements, or two or more constituent elements that, although referred to by different names according to their location or function, form a single unit.

[0042] Furthermore, throughout the specification, when it is mentioned that "includes...as a main component", it means that among at least one component present in a certain region, one component has the highest content based on the total amount of the components.

[0043] In the following text, reference will be made to Figures 1 to 4 A multilayer ceramic capacitor according to an embodiment is described.

[0044] Figure 1 This is a perspective view showing a multilayer ceramic capacitor according to an embodiment. Figure 2 It is along Figure 1 A cross-sectional view of a multilayer ceramic capacitor taken by line I-I'. Figure 3 It is along Figure 1 A cross-sectional view of a multilayer ceramic capacitor taken from line II-II', and Figure 4 It is shown Figure 1 An exploded perspective view of the capacitor body.

[0045] Figures 1 to 4 The L-axis, W-axis, and T-axis directions shown represent the length, width, and thickness directions of the capacitor body 110, respectively. Here, the thickness direction (T-axis) can be perpendicular to the wide surface (main surface) of the sheet assembly, and can be used, for example, as the same concept as the stacking direction along which the stacked dielectric layers 111 are arranged. The length direction (L-axis) can be parallel to the wide surface (main surface) of the sheet assembly and can be approximately perpendicular to the thickness direction (T-axis). For example, the length direction (L-axis) can be the direction along which the first external electrode 131 and the second external electrode 132 are positioned relative to each other. The width direction (W-axis) can be parallel to the wide surface (main surface) of the sheet assembly and can be approximately perpendicular to both the thickness direction (T-axis) and the length direction (L-axis). The length of the sheet assembly in the length direction (L-axis) can be longer than its width in the width direction (W-axis).

[0046] Reference Figures 1 to 4 According to an embodiment, the multilayer ceramic capacitor 100 includes a capacitor body 110 and external electrodes 131 and 132 disposed on the outer surface of the capacitor body 110. The external electrodes 131 and 132 may include a first external electrode 131 and a second external electrode 132 disposed at opposite ends of the capacitor body 110 in the longitudinal direction (L-axis direction).

[0047] For example, the capacitor body 110 may have a generally hexahedral shape.

[0048] For ease of description of the embodiments, the two surfaces of the capacitor body 110 that are opposite to each other in the thickness direction (T-axis direction) are referred to as the first surface and the second surface, the two surfaces of the capacitor body 110 that are connected to the first surface and the second surface and are opposite to each other in the length direction (L-axis direction) are referred to as the third surface and the fourth surface, and the two surfaces of the capacitor body 110 that are connected to the first surface and the second surface, connected to the third surface and the fourth surface and are opposite to each other in the width direction (W-axis direction) are referred to as the fifth surface and the sixth surface.

[0049] As an example, the first surface (lower surface) can be a mounting surface. Alternatively, the first to sixth surfaces can be flat, but the embodiment is not limited to this. For example, the first to sixth surfaces can be curved surfaces with a convex central portion, and the edges of each surface (the boundaries between the surfaces) can be rounded.

[0050] The shape and size of the capacitor body 110 and the number of stacked dielectric layers 111 are not limited to the shape, size and number of stacks shown in the accompanying drawings of the embodiment.

[0051] The capacitor body 110 includes a plurality of dielectric layers 111 and inner electrode layers 121 and 122. Specifically, the capacitor body 110 includes a plurality of dielectric layers 111 and a first inner electrode layer 121 and a second inner electrode layer 122, the first inner electrode layer 121 and the second inner electrode layer 122 are alternately arranged in the thickness direction (T-axis direction), and the dielectric layer 111 is located between the first inner electrode layer 121 and the second inner electrode layer 122.

[0052] At this point, the adjacent dielectric layers 111 of the capacitor body 110 can be integrated to such an extent that the boundaries between them are difficult to identify without using a scanning electron microscope (SEM).

[0053] The capacitor body 110 may include an effective area 120 and coverage areas 112 and 113.

[0054] The effective region 120 is a region in which dielectric layer 111 (e.g., the first dielectric layer) and inner electrode layers 121 and 122 are alternately stacked in the thickness direction (T-axis direction) and contribute to the capacitance of the multilayer ceramic capacitor 100. Specifically, the effective region 120 may be a region in which the first inner electrode layer 121 and the second inner electrode layer 122 are stacked on top of each other along the thickness direction (T-axis direction).

[0055] Cover regions 112 and 113 are thickness-direction edges and may be located on the upper and lower surfaces of the effective region 120 in the thickness direction (T-axis direction), respectively. Cover regions 112 and 113 may be formed by stacking a single dielectric layer (e.g., a second dielectric layer) or two or more dielectric layers on the upper and lower surfaces of the effective region 120, respectively.

[0056] In addition, the capacitor body 110 may also include a side edge region.

[0057] The side edge regions are edges in the width direction and may be located on the ends of the effective region 120 that are opposite each other in the width direction (W-axis direction). The side edge regions may be formed in the following manner, but the formation method is not limited to this: when a conductive paste for an inner electrode layer is coated on the surface of the dielectric green sheet, the conductive paste is coated only in a portion of the surface of the dielectric green sheet (i.e., the area where the inner electrode layer will be formed), and the conductive paste is not coated on both sides of the surface of the dielectric green sheet in the width direction. Then the obtained dielectric green sheets are stacked and fired.

[0058] Coverage areas 112 and 113, as well as side edge areas, are used to prevent damage to the inner electrode layers 121 and 122 due to physical and / or chemical stress.

[0059] dielectric layer The dielectric layer 111 may include barium (Ba), titanium (Ti) and boron (B).

[0060] Boron (B) included in dielectric layer 111 may be present in any region of capacitor body 110. That is, boron (B) may be included in at least one region of capacitor body 110, including active region 120, cover regions 112 and 113, and side edge region.

[0061] When the dielectric layer 111 includes barium (Ba), titanium (Ti) and boron (B), a multilayer ceramic capacitor with excellent reliability can be obtained because the dielectric layer 111 can be sintered at low temperature and has excellent density.

[0062] The dielectric layer 111 may also include silicon (Si).

[0063] Barium (Ba) and titanium (Ti) can be constituent elements of barium titanate-based compounds, which are the main components of dielectric layer 111.

[0064] Barium titanate-based compounds are dielectric matrix materials with high dielectric constants and contribute to the dielectric properties of multilayer ceramic capacitors 100.

[0065] Barium titanate-based compounds can be compounds comprising barium (Ba) and titanium (Ti), and may include, for example, BaTiO3, Ba(Ti, Zr)O3, Ba(Ti, Sn)O3, (Ba, Ca)TiO3, (Ba, Ca)(Ti, Ca)O3, (Ba, Ca)(Ti, Zr)O3, (Ba, Ca)(Ti, Sn)O3, (Ba, Sr)TiO3, (Ba, Sr)(Ti, Zr)O3, (Ba, Sr)(Ti, Sn)O3, or combinations thereof.

[0066] Boron (B) and silicon (Si) may be derived from borosilicate glass used as a sintering agent (such as a liquid sintering agent) when forming dielectric layer 111. Borosilicate glass may include, for example, silicon dioxide (SiO2) and boron oxide (B2O3).

[0067] Borosilicate glasses have low softening points, and the activation energy decreases with increasing boron (B) content, thus increasing the densification rate. In other words, the low activation energy of borosilicate glasses increases viscous flow, thereby increasing the densification rate. Therefore, when borosilicate glasses are used as a sintering agent to form the dielectric layer, the softening temperature can be lowered to enhance the sinterability and wettability of barium titanate-based compounds, thereby reducing the sintering temperature and improving the density of the dielectric layer. Furthermore, since the sintering temperature can be lowered when using borosilicate glasses as a sintering agent to form the dielectric layer, the dielectric layer can be sintered at low temperatures.

[0068] Additionally, you can refer to Figure 5 Explanation of dielectric layer 111.

[0069] Figure 5 This is a schematic diagram showing the dielectric layer according to an embodiment.

[0070] Reference Figure 5 The dielectric layer 111 may include a plurality of dielectric grains 10 and grain boundaries 20 disposed between the plurality of dielectric grains 10.

[0071] According to the embodiment, the dielectric layer 111 has a uniform microstructure and uniform grain boundaries, thereby increasing the grain boundary resistance and thus ensuring the excellent reliability of the multilayer ceramic capacitor. The uniform microstructure means that the size of the dielectric grains 10 is uniform throughout the dielectric layer 111. Furthermore, the uniform grain boundaries mean that the thickness of the grain boundaries 20 is constant and uniform, without grain boundary agglomeration or interruption.

[0072] When borosilicate glass is used to form the dielectric layer, its higher band gap compared to BaTiO3 ensures insulation. Therefore, when borosilicate glass is used as a sintering agent to form the dielectric layer, uniform insulation can be achieved at grain boundaries, preventing degradation and improving reliability.

[0073] Specifically, the average thickness of the grain boundary 20 can be from about 1 nm to about 10 nm, for example, from about 2 nm to about 9 nm or from about 3 nm to about 8 nm. When the average thickness of the grain boundary 20 is within the above range, the dielectric layer 111 can obtain a uniform microstructure and uniform grain boundaries, thereby ensuring that the multilayer ceramic capacitor has increased grain boundary resistance and excellent reliability.

[0074] The standard deviation of the thickness of the grain boundary 20 can be from about 0.1 nm to about 2.5 nm, for example, from about 0.2 nm to about 2.4 nm, from about 0.3 nm to about 2.3 nm, or from about 0.4 nm to about 2.2 nm. When the standard deviation of the thickness of the grain boundary 20 is within the above range, the dielectric layer 111 can have a uniform microstructure and uniform grain boundaries, thereby ensuring that the multilayer ceramic capacitor has increased grain boundary resistance and excellent reliability.

[0075] As in Equation 1, the standard deviation (σ) of the grain boundary thickness can be obtained by dividing the sum of the squares of the thickness deviations by the number of measurements, and then taking the square root of the quotient (i.e., the square root of the average of the squares of the thickness deviations).

[0076] [Formula 1]

[0077] The average thickness and standard deviation of the grain boundary 20 can be obtained by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis. Other methods and / or other tools as understood by those skilled in the art may be used, even if not described in this disclosure.

[0078] More specifically, after immersing the multilayer ceramic capacitor 100 in an epoxy mixture and then curing it, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a position at half the length of the capacitor body 110 in the L-axis direction. It is then fixed and held in a vacuum chamber, thereby obtaining a cross-sectional sample in which the effective region where the dielectric layer 111 and the first inner electrode layer 121 and the second inner electrode layer 122 are alternately stacked can be observed. Next, the effective region of the cross-sectional sample can be observed using transmission electron microscopy (TEM), making at least one dielectric layer and at least one inner electrode layer visible. For example, when the effective region of the cross-sectional sample is divided into three parts (i.e., upper, middle, and lower), at least one dielectric layer and at least one inner electrode layer can be made visible by TEM measurements for each part. TEM images can be obtained using Xe-FIB (focused ion beam) at an accelerating voltage of 200 kV. Next, EDS (energy dispersive spectroscopy) analysis was performed on the dielectric layer in the TEM image of the obtained cross-sectional sample to confirm the structure of dielectric grains 10 and grain boundaries 20 and to obtain the average thickness and standard deviation of the thickness of grain boundaries 20.

[0079] Specifically, the shape of the grain boundary 20 can be confirmed by mapping the boron (B) and silicon (Si) elements, specifically silicon (Si), which is easily detected by EDS, and the average thickness and standard deviation of the grain boundary 20 can be obtained. For example, when the effective area of ​​the cross-sectional sample is divided into three parts (i.e., upper, middle, and lower), for each part, at least four points are taken from the grain boundary 20 within the dielectric layer, and the thickness of the grain boundary 20 at each point is measured. The average thickness of the grain boundary 20 can be the average of the thicknesses at at least 12 points, and the standard deviation of the thicknesses at at least 12 points can be obtained.

[0080] In dielectric layer 111, based on 100 atomic parts of titanium (Ti), boron (B) may be included in an amount from about 0.01 atomic parts to about 5 atomic parts (e.g., from about 0.05 atomic parts to about 4.8 atomic parts, from about 0.06 atomic parts to about 4.5 atomic parts, or from about 0.1 atomic parts to about 4.0 atomic parts). When boron (B) in the dielectric layer 111 is included in the above-mentioned content range, low-temperature sintering is feasible, and excellent density is achieved, as well as a uniform microstructure and uniform grain boundaries are achieved, so that the reliability of the multilayer ceramic capacitor can be improved as the grain boundary resistance increases.

[0081] In dielectric layer 111, silicon (Si) may be included in an amount of about 0.1 atomic parts to about 5 atomic parts (e.g., about 0.5 atomic parts to about 4.5 atomic parts or about 1 atomic part to about 4 atomic parts) based on 100 atomic parts of titanium (Ti). When silicon (Si) in the above-mentioned content range is included in dielectric layer 111, the reliability of multilayer ceramic capacitors can be improved because dielectric layer 111 can be sintered at low temperature, has excellent density, and has a uniform microstructure and uniform grain boundaries.

[0082] The dielectric layer 111 may also include at least one rare earth element.

[0083] Rare earth elements may include two or more of the following: La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, Y, etc., for example, dysprosium (Dy) and terbium (Tb), but are not limited thereto.

[0084] In dielectric layer 111, based on 100 atomic parts of titanium (Ti), rare earth elements may be included in an amount from about 0.5 atomic parts to about 5 atomic parts, for example, in an amount from about 1 atomic part to about 4.8 atomic parts, from about 1.5 atomic parts to about 4.5 atomic parts, or from about 2 atomic parts to about 4 atomic parts. When rare earth elements within the above-mentioned content range are included in dielectric layer 111, the reliability of the multilayer ceramic capacitor can be improved.

[0085] Specifically, the grain boundaries 20 in the dielectric layer 111 may include at least one selected from boron (B) and silicon (Si), for example, both boron (B) and silicon (Si). If at least one of boron (B) and silicon (Si) is present in the grain boundaries 20, the reliability of the multilayer ceramic capacitor can be improved because the dielectric layer 111 has a uniform microstructure and uniform grain boundaries, can be sintered at low temperatures, and has excellent compactness.

[0086] In addition, the grain boundary 20 may also include at least one rare earth element. For example, the grain boundary 20 may include dysprosium (Dy) and terbium (Tb), but is not limited thereto.

[0087] The composition and content of the dielectric layer 111 can be obtained by TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) or ICP-OES (inductively coupled plasma spectroscopy). Other methods and / or other tools as understood by those skilled in the art may be used, even if not described in this disclosure.

[0088] TEM-EDS analysis can be performed using the same method described above. EDS analysis of the dielectric layer can be performed on TEM images of cross-sectional samples to detect boron (B), silicon (Si), rare earth elements, etc., and to determine their content. For example, the content of each element can be obtained by dividing the effective area of ​​the cross-sectional sample into three parts (e.g., upper, middle, and lower), then taking three points within the dielectric layer for each part, measuring the content of the corresponding element at each of the nine points in total, and then calculating the average of the nine measurements.

[0089] After obtaining a sample by dissolving the dielectric layer of a multilayer ceramic capacitor in a mixed solution of hydrofluoric acid and nitric acid and diluting it 500 times, the obtained sample was analyzed by ICP-OES using an AVIO500 (Platinum Elmer) device with a plasma flow rate of 12 L / min and a plasma radio frequency (RF) power of 1400 W.

[0090] For example, since boron (B), an element with atomic number 5, may be difficult to detect in EDS analysis, its elemental content can be measured by ICP-OES analysis.

[0091] The size of the dielectric grain 10 can be from about 100 nm to about 500 nm, for example, from about 120 nm to about 480 nm, from about 150 nm to about 450 nm, from about 180 nm to about 420 nm, or from about 200 nm to about 400 nm. The size of the dielectric grain can be the average of the longest axis diameter and the shortest axis diameter of the dielectric grain.

[0092] The size of the dielectric grain 10 can be measured by SEM (scanning electron microscopy) analysis. Other methods and / or other tools as understood by those skilled in the art may be used, even if not described in this disclosure.

[0093] More specifically, after immersing the multilayer ceramic capacitor 100 in an epoxy mixture and then curing it, the W-axis and T-axis surfaces (WT surfaces) of the capacitor body 110 are polished to a point half the length of the capacitor body 110 in the L-axis direction. It is then fixed and held in a vacuum chamber, thereby obtaining a cross-sectional sample in which the effective region where the dielectric layer 111 and the first inner electrode layer 121 and the second inner electrode layer 122 are alternately stacked can be observed. Subsequently, the effective region of the cross-sectional sample can be observed by SEM, making at least one dielectric layer and at least one inner electrode layer visible. SEM images can be obtained at an accelerating voltage of approximately 2 kV. In the obtained SEM images, grain size can be measured. For example, after dividing the effective region of the cross-sectional sample into three parts (e.g., upper, middle, and lower), an area of ​​approximately 5 μm × approximately 5 μm (width × length) is taken from each part to measure the grain size in the dielectric layer, and then the average value is calculated. Here, the size of the dielectric grain can be the average of the longest axis diameter and the shortest axis diameter of the dielectric grain.

[0094] The average thickness of dielectric layer 111 (the average dimension of dielectric layer 111 in the T-axis direction) can be from about 0.1 μm to about 8.0 μm, for example, from about 0.1 μm to about 6.0 μm. If the average thickness of dielectric layer 111 is within the above range, the multilayer ceramic capacitor can exhibit excellent reliability.

[0095] The average thickness of dielectric layer 111 can be measured by immersing the multilayer ceramic capacitor 100 in an epoxy mixture, curing it, polishing it, and then ion-milling it to obtain cross-sectional samples in the L-axis and T-axis directions or the W-axis and T-axis directions, which are then analyzed using a scanning electron microscope (SEM). At least one layer (e.g., three, five, or ten or more layers) of dielectric layer 111 can be measured using a scanning electron microscope (e.g., a Verios G4 from Thermo Fisher Scientific, at 10 kV and 0.2 nA, magnification 100x). The average thickness of the dielectric layer 111 can be obtained by taking the center point of the dielectric layer 111 in the length direction (L-axis direction) or width direction (W-axis direction) as a reference point in the scanning electron microscope (SEM) image of the cross-sectional sample obtained above, and calculating the arithmetic mean of the thickness of the dielectric layer 111 at 10 points spaced apart from the reference point at predetermined intervals. The interval between any two adjacent points among the 10 points can be adjusted according to the size of the SEM image, and can be, for example, about 1 μm to about 100 μm, about 1 μm to about 50 μm, or about 1 μm to about 10 μm. In this case, all 10 points should be located within the dielectric layer 111, and if not all 10 points are located within the dielectric layer 111, the position of the reference point can be changed, or the interval between any two adjacent points among the 10 points can be adjusted.

[0096] Inner electrode layer The inner electrode layers 121 and 122 (i.e., the first inner electrode layer 121 and the second inner electrode layer 122) are electrodes with different polarities and are alternately arranged to be opposite each other along the T-axis direction with the dielectric layer 111 between them, and one end of the first inner electrode layer 121 and one end of the second inner electrode layer 122 can be exposed through the third surface and the fourth surface of the capacitor body 110, respectively.

[0097] The first inner electrode layer 121 and the second inner electrode layer 122 are electrically insulated from each other by a dielectric layer 111 disposed between them.

[0098] One end of the first inner electrode layer 121 and one end of the second inner electrode layer 122, which are alternately exposed through the third and fourth surfaces of the capacitor body 110, can be electrically connected to the first outer electrode 131 and the second outer electrode 132, respectively.

[0099] The inner electrode layers 121 and 122 comprise conductive metals and may include at least one metal selected from Ni, Cu, Ag, Pd, Au and alloys thereof.

[0100] Additionally, inner electrode layers 121 and 122 may include dielectric grains having the same composition as the ceramic material included in dielectric layer 111.

[0101] The inner electrode layers 121 and 122 can be formed using a conductive paste comprising a conductive metal. The printing method for the conductive paste can be screen printing or gravure printing.

[0102] The average thickness of the inner electrode layers 121 and 122 can be from about 0.1 μm to about 2 μm.

[0103] The average thickness of the inner electrode layers 121 and 122 can be measured by scanning electron microscopy (SEM) analysis. Specifically, in a cross-sectional SEM image of a sample obtained by the same method used to measure the average thickness of the dielectric layer 111, the center point of the inner electrode layers 121 and 122 in the length direction (L-axis direction) or width direction (W-axis direction) is used as a reference point, and the arithmetic mean of the thickness of the inner electrode layers 121 and 122 at 10 points spaced apart from the reference point by a predetermined interval is calculated. The interval between any two adjacent points among the 10 points can be adjusted according to the size of the SEM image and can be, for example, about 1 μm to about 100 μm, about 1 μm to about 50 μm, or about 1 μm to about 10 μm. At this point, all 10 points should be located within the inner electrode layers 121 and 122. If all 10 points are not located within the inner electrode layers 121 and 122, the position of the reference point can be changed, or the interval between two adjacent points among the 10 points can be adjusted.

[0104] The capacitor body 110 may include a stacked structure in which a plurality of dielectric layers 111 and a plurality of internal electrode layers 121 and 122 are stacked.

[0105] external electrode The first external electrode 131 and the second external electrode 132 are provided with voltages of different polarities and can be electrically connected to the exposed portions of the first inner electrode layer 121 and the second inner electrode layer 122, respectively.

[0106] According to the above structure, when a predetermined voltage is applied to the first external electrode 131 and the second external electrode 132, charge accumulates between the first inner electrode layer 121 and the second inner electrode layer 122 that are opposite to each other. At this time, the capacitance of the multilayer ceramic capacitor 100 is proportional to the stacked area of ​​the first inner electrode layer 121 and the second inner electrode layer 122 that are stacked together along the T-axis direction in the effective region.

[0107] The first external electrode 131 may include a first connecting portion disposed on the third surface of the capacitor body 110 and connected to the first inner electrode layer 121, and a first strip portion disposed on the edge where the third surface of the capacitor body 110 intersects with at least one of the first, second, fifth, and sixth surfaces. The second external electrode 132 may include a second connecting portion disposed on the fourth surface of the capacitor body 110 and connected to the second inner electrode layer 122, and a second strip portion disposed on the edge where the fourth surface of the capacitor body 110 intersects with at least one of the first, second, fifth, and sixth surfaces.

[0108] The first strip may extend from the first connecting portion to a portion of at least one of the first, second, fifth, and sixth surfaces of the capacitor body 110, and the second strip may extend from the second connecting portion to a portion of at least one of the first, second, fifth, and sixth surfaces of the capacitor body 110. The first strip and the second strip may be used to improve the bonding strength between the first external electrode 131 and the second external electrode 132 and the capacitor body 110, respectively.

[0109] The external electrodes 131 and 132 may include a sintered metal layer in contact with the capacitor body 110, a conductive resin layer configured to cover the sintered metal layer, and a plating layer configured to cover the conductive resin layer.

[0110] The sintered metal layer may include conductive metals and glass.

[0111] Conductive metals may include at least one of copper (Cu), nickel (Ni), silver (Ag), palladium (Pd), gold (Au), platinum (Pt), tin (Sn), tungsten (W), titanium (Ti), lead (Pb), and alloys thereof. For example, "conductive metal includes copper (Cu)" may mean that the conductive metal includes elemental copper (Cu) and / or copper (Cu) alloys. When the conductive metal includes copper (Cu), other metals may be included in an amount of less than or equal to about 5 moles of copper (Cu) based on 100 moles of copper (Cu).

[0112] The glass may comprise a composition of oxides (e.g., one or more selected from the group consisting of silicon oxides, boron oxides, aluminum oxides, transition metal oxides, alkali metal oxides, and alkaline earth metal oxides). The transition metal may be at least one selected from zinc (Zn), titanium (Ti), copper (Cu), vanadium (V), manganese (Mn), iron (Fe), and nickel (Ni); the alkali metal may be at least one selected from lithium (Li), sodium (Na), and potassium (K); and the alkaline earth metal may be at least one selected from magnesium (Mg), calcium (Ca), strontium (Sr), and barium (Ba).

[0113] Optionally, the conductive resin layer may be formed on the sintered metal layer, for example, in a shape that completely covers the sintered metal layer. Furthermore, the first external electrode 131 and the second external electrode 132 may not include the sintered metal layer, and in this case, the conductive resin layer may directly contact the capacitor body 110.

[0114] The conductive resin layer extends to at least one of the first, second, fifth, and sixth surfaces of the capacitor body 110, and the length of the region (i.e., the strip portion) where the conductive resin layer extends and is disposed on at least one of the first, second, fifth, and sixth surfaces of the capacitor body 110 may be longer than the length of the region (i.e., the strip portion) where the sintered metal layer extends and is disposed on at least one of the first, second, fifth, and sixth surfaces of the capacitor body 110. In other words, the conductive resin layer may be formed on the sintered metal layer and may be formed in a shape that completely covers the sintered metal layer.

[0115] The conductive resin layer may include resin and conductive metal.

[0116] The resin included in the conductive resin layer can be, but is not limited to, a material that has adhesive and shock-absorbing properties and can form a paste when mixed with conductive metal powder. For example, the resin may include phenolic resin, acrylic resin, silicone resin, epoxy resin, or polyimide resin.

[0117] The conductive metal included in the conductive resin layer is used to electrically connect the inner electrode layers 121 and 122 or the sintered metal layer to the plating described below.

[0118] The conductive metal included in the conductive resin layer may have a spherical shape, a sheet shape, or a combination thereof. That is, the conductive metal may be formed only as a sheet shape, or only as a spherical shape, or a mixture of sheet and spherical shapes.

[0119] Here, a spherical shape may also include shapes that are not perfect spheres. For example, a spherical shape may refer to a shape whose ratio of the major axis to the minor axis (major axis length / minor axis length) is less than or equal to about 1.45. A sheet shape refers to a flat and elongated shape, and there are no particular limitations. For example, a sheet shape may refer to a shape whose ratio of the major axis to the minor axis (major axis length / minor axis length) is greater than or equal to about 1.95.

[0120] The external electrodes 131 and 132 may also include a plating layer disposed on the outer surface of the conductive resin layer.

[0121] The coatings may be individual or in alloy form, including nickel (Ni), copper (Cu), tin (Sn), palladium (Pd), platinum (Pt), gold (Au), silver (Ag), tungsten (W), titanium (Ti), or lead (Pb). For example, the coating may be a nickel (Ni) coating or a tin (Sn) coating, or a combination of nickel (Ni) and tin (Sn) coatings stacked sequentially, or a combination of tin (Sn), nickel (Ni), and tin (Sn) coatings stacked sequentially. Additionally, the coating may include multiple nickel (Ni) coatings and / or multiple tin (Sn) coatings.

[0122] The coating can improve the mountability, structural reliability, external durability, heat resistance and equivalent series resistance (ESR) of the multilayer ceramic capacitor 100 on the substrate.

[0123] Method for manufacturing multilayer ceramic capacitors The method of manufacturing a multilayer ceramic capacitor 100 according to an embodiment will be described below.

[0124] The multilayer ceramic capacitor 100 according to the embodiment can be manufactured by mixing a barium titanate-based compound with borosilicate glass to prepare a dielectric paste; using the dielectric paste to manufacture a dielectric green sheet and forming a conductive paste layer on the surface of the dielectric green sheet; manufacturing a dielectric green sheet stack by stacking the dielectric green sheets on which the conductive paste layer is formed; firing the dielectric green sheet stack to manufacture a capacitor body including a dielectric layer and an inner electrode layer; and forming an outer electrode on the surface of the capacitor body.

[0125] Barium titanate-based compounds are compounds comprising barium (Ba) and titanium (Ti), and may include, for example, BaTiO3, Ba(Ti, Zr)O3, Ba(Ti, Sn)O3, (Ba, Ca)TiO3, (Ba, Ca)(Ti, Ca)O3, (Ba, Ca)(Ti, Zr)O3, (Ba, Ca)(Ti, Sn)O3, (Ba, Sr)TiO3, (Ba, Sr)(Ti, Zr)O3, (Ba, Sr)(Ti, Sn)O3, or combinations thereof.

[0126] Borosilicate glass can be used as a liquid sintering agent.

[0127] Borosilicate glass may include silicon dioxide (SiO2) and boron oxide (B2O3). In other words, borosilicate glass may include silicon (Si) and boron (B) elements.

[0128] By using borosilicate glass, the softening temperature is lowered, thereby enhancing the sinterability and wettability of barium titanate-based compounds, and the sintering temperature is reduced to form a dielectric layer with improved density.

[0129] Borosilicate glass can be mixed in amounts such that, based on 100 moles of titanium (Ti) included in the barium titanate-based compound, the amount of boron (B) included in the borosilicate glass can be from about 0.01 moles to about 10 moles. For example, borosilicate glass can be mixed in amounts such that, based on 100 moles of titanium (Ti) included in the barium titanate-based compound, the amount of boron (B) included in the borosilicate glass can be from about 0.05 moles to about 9 moles, or from about 0.1 moles to about 8 moles. When borosilicate glass is mixed within the above content ranges, the reliability of multilayer ceramic capacitors can be improved by forming a dielectric layer with a uniform microstructure and uniform grain boundaries, capable of low-temperature sintering, and exhibiting excellent density.

[0130] Dielectric pastes can be prepared by further mixing at least one rare earth element compound.

[0131] The rare earth element compound can be a compound that includes two or more rare earth elements (such as La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu and Y), and the rare earth element compound can include, for example, dysprosium (Dy) compound and terbium (Tb) compound.

[0132] Based on 100 moles of a barium titanate-based compound, a rare earth element compound can be mixed in amounts from about 0.5 moles to about 5 moles (e.g., from about 1 mole to about 4 moles). When the rare earth element compound is mixed within the above-mentioned content range, a multilayer ceramic capacitor with excellent reliability can be obtained.

[0133] Compounds containing rare earth elements can be oxides of rare earth elements, nitrides of rare earth elements, salts of rare earth elements, or compounds in the form of sols dispersed in organic solvents.

[0134] Dielectric pastes can be prepared by further mixing in additives such as dispersants, binders, plasticizers, lubricants, antistatic agents, and solvents.

[0135] The dispersant may include, for example, phosphate ester dispersants, polycarboxylic acid dispersants, or combinations thereof. Based on 100 parts by weight of a barium titanate-based compound, the dispersant can be mixed in amounts from about 0.1 parts by weight to about 5 parts by weight (e.g., from about 0.3 parts by weight to about 3 parts by weight). When the dispersant is mixed within the above-mentioned content range, the dielectric paste exhibits excellent dispersibility and reduces the amount of impurities included in the manufactured dielectric layer.

[0136] The binder can be, for example, acrylic resin, polyvinyl butyl resin, polyvinyl alcohol acetal resin, ethyl cellulose resin, etc. Based on 100 parts by weight of barium titanate compound, the binder can be added in amounts from about 0.1 parts by weight to about 50 parts by weight (e.g., from about 3 parts by weight to about 30 parts by weight). When the binder is mixed within the above content range, the dielectric paste exhibits excellent dispersibility and reduces the amount of impurities included in the manufactured dielectric layer.

[0137] Plasticizers can be, for example, phthalic acid compounds (such as dioctyl phthalate, butyl benzyl phthalate, dibutyl phthalate, dihexyl phthalate, di(2-ethylhexyl) phthalate, and di(2-ethylbutyl) phthalate), adipate compounds (such as dihexyl adipate and di(2-ethylhexyl) adipate), glycol compounds (such as ethylene glycol, diethylene glycol, and triethylene glycol), and glycol ester compounds (such as triethylene glycol dibutyrate, triethylene glycol di(2-ethylbutyrate), and triethylene glycol di(2-ethylhexanoate)). Based on 100 parts by weight of barium titanate compound, the plasticizer can be added in an amount of about 0.1 parts by weight to about 20 parts by weight (e.g., about 1 part by weight to about 10 parts by weight). When plasticizers are mixed within the above-mentioned content range, the dielectric paste exhibits excellent dispersibility and reduces the amount of impurities included in the manufactured dielectric layer.

[0138] The solvent can be an aqueous solvent (such as water), an alcohol solvent (such as ethanol, methanol, benzyl alcohol, and methoxyethanol), a glycol solvent (such as ethylene glycol and diethylene glycol), a ketone solvent (such as acetone, methyl ethyl ketone, methyl isobutyl ketone, and cyclohexanone), an ester solvent (such as butyl acetate, ethyl acetate, carbitol acetate, and butyl carbitol acetate), an ether solvent (such as methyl cellosolve, ethyl cellosolve, butyl ether, and tetrahydrofuran), an aromatic solvent (such as benzene, toluene, and xylene), etc. For example, the solvent can be an alcohol solvent or an aromatic solvent, taking into account the solubility or dispersibility of the various additives included in the dielectric paste. Based on 100 parts by weight of barium titanate compound, the solvent can be mixed in an amount of about 50 parts by weight to about 1000 parts by weight (e.g., about 100 parts by weight to about 500 parts by weight). When the solvent is mixed within the above-mentioned content range, the various components of the dielectric paste can be sufficiently mixed, and the solvent can be easily removed subsequently.

[0139] The dielectric slurry described above can be mixed using a wet ball mill or a stirred mill. When using zirconia balls in a wet ball mill, multiple zirconia balls with a diameter of about 0.1 mm to about 10 mm can be used for wet mixing for about 8 hours to about 48 hours, for example, about 10 hours to about 24 hours.

[0140] The prepared dielectric paste forms a dielectric layer after firing.

[0141] Methods such as strip forming (e.g., doctor blade forming) and calendering roll forming (e.g., using a roll forming coating machine with a coating head discharge method) can be used to form the prepared dielectric paste into a sheet-like molded body, and the dielectric green sheet can then be obtained by drying the molded body.

[0142] To form a conductive paste layer that becomes the inner electrode layer after firing, the conductive paste can be prepared by mixing conductive powder made from a conductive metal or its alloy, a binder, and a solvent. Additionally, if desired, barium titanate powder can be mixed in as a co-material (i.e., the same material as the dielectric layer). The co-material can be used to suppress the sintering of the conductive powder during the firing process. In the manufacturing step of the dielectric green sheet, a dielectric paste can be prepared by mixing a barium titanate-based compound as the main component powder with optional secondary component powders.

[0143] The conductive powder may include nickel (Ni) or nickel (Ni) alloys.

[0144] Next, a dielectric green sheet stack is manufactured by stacking multiple layers of dielectric green sheets on which conductive paste layers are formed, and then pressing the multiple layers of dielectric green sheets in the stacking direction. Before pressing, dielectric green sheets on which conductive paste layers are not formed can be stacked, such that the dielectric green sheets on which conductive paste layers are not formed are disposed at the upper and lower parts of the dielectric green sheet stack in the stacking direction.

[0145] Optionally, the manufactured dielectric green sheet stack can be cut into predetermined sizes by cutting or the like.

[0146] Additionally, if necessary, the dielectric green sheet stack can be cured and dried to remove plasticizers, etc., and after curing and drying, the dielectric green sheet stack can be tumble polished using a horizontal centrifugal tumbler or similar device. During tumble polishing, the dielectric green sheet stack is placed in a tumbler container containing a dielectric and polishing fluid, and rotational motion or vibration is applied to the tumbler container to polish unwanted parts (such as burrs generated during cutting). After tumble polishing, the dielectric green sheet stack can be washed with a cleaning solution (such as water) and then dried.

[0147] Subsequently, the capacitor body can be prepared after the binder removal treatment (calcination) and firing treatment of the dielectric green sheet stack.

[0148] The conditions for the adhesive removal process can be appropriately adjusted according to the composition of the dielectric layer and / or the composition of the internal electrode layer. For example, the heating rate during the adhesive removal process can be from about 5°C / hour to about 300°C / hour, the holding temperature can be from about 180°C to about 400°C, and the temperature holding time can be from about 0.5 hours to about 24 hours. The adhesive removal process can be carried out in an air atmosphere or a reducing atmosphere.

[0149] The firing conditions can be appropriately adjusted according to the main component composition of the dielectric layer and / or the main component composition of the inner electrode layer. For example, the firing process can be performed at a temperature of about 1100°C to about 1400°C (e.g., at a temperature of about 1200°C to about 1350°C). Additionally, the firing process can be performed for about 0.5 hours to about 8 hours (e.g., about 1 hour to about 3 hours). Furthermore, the firing process can be performed in a reducing atmosphere (e.g., in a wetting mixture of nitrogen and hydrogen), and under conditions such as a hydrogen concentration of less than or equal to about 1.0%. When the inner electrode layer comprises nickel (Ni) or a nickel (Ni) alloy, the oxygen partial pressure in the firing atmosphere can be about 1.0 × 10⁻⁶. -14 MPa to approximately 1.0 × 10 -10 MPa.

[0150] After firing, annealing may be performed as needed. Annealing is a process that re-oxidizes the dielectric layer, and it can be performed if firing is carried out in a reducing atmosphere. The annealing conditions can also be appropriately adjusted according to the composition of the dielectric layer. For example, the annealing temperature can be from about 950°C to about 1150°C, the annealing time can be greater than 0 hours and less than or equal to about 20 hours, and the heating rate can be from about 50°C / hour to about 500°C / hour. The annealing atmosphere can be a moistened nitrogen (N2) atmosphere, and the oxygen partial pressure can be about 1.0 × 10⁻⁶. -9 MPa to approximately 1.0 × 10 -5 MPa.

[0151] In adhesive removal, firing, or annealing processes, a wetting agent may be used, for example, to wet nitrogen or a gas mixture. In this case, the temperature of the wetting agent may be from about 5°C to about 75°C. Adhesive removal, firing, and annealing processes may be performed sequentially or individually.

[0152] Optionally, surface treatments (such as sandblasting, laser irradiation, tumble polishing, etc.) can be performed on the third and fourth surfaces of the prepared capacitor body 110. By performing this surface treatment, the ends of the first inner electrode layer and the second inner electrode layer can be exposed to the third and fourth surfaces, respectively, thereby improving the electrical connection between the first outer electrode and the first inner electrode layer and the electrical connection between the second outer electrode and the second inner electrode layer, and making it easier to form alloy portions.

[0153] Subsequently, an external electrode is formed on the surface of the manufactured capacitor body 110.

[0154] As an example, a paste for forming a sintered metal layer can be applied to the surface of the manufactured capacitor body and then sintered to form the sintered metal layer.

[0155] The paste used to form the sintered metal layer may include conductive metals and glass. Since the description of the conductive metals and glass included in the paste for forming the sintered metal layer is the same as described above, repeated descriptions will be omitted. Alternatively, the paste used to form the sintered metal layer may include binders, solvents, dispersants, plasticizers, oxide powders, etc. The binder may be, for example, ethyl cellulose resin, acrylic resin, butyral resin, etc., and the solvent may be, for example, an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, toluene, etc.) or an aqueous solvent.

[0156] Methods for applying a paste for forming a sintered metal layer to the outer surface of the capacitor body 110 may include impregnation, printing (such as screen printing), coating using a dispenser, and spraying using a sprayer. The paste for forming the sintered metal layer may be applied to the third and fourth surfaces of the capacitor body 110, and optionally, the paste may also be applied to portions of the first, second, fifth, or sixth surfaces where the first and second external electrodes will be formed.

[0157] Subsequently, the capacitor body 110 coated with a paste for forming a sintered metal layer is dried and fired at a temperature of about 700°C to about 1000°C for about 0.1 hours to about 3 hours to form a sintered metal layer.

[0158] Optionally, a paste for forming a conductive resin layer is coated onto the outer surface of the obtained capacitor body 110 and then cured to form a conductive resin layer.

[0159] The paste used to form the conductive resin layer may include resin and conductive metal, and optionally, non-conductive filler. Since the descriptions of the conductive metal and resin are the same as those described above, repeated descriptions will be omitted. Additionally, the paste used to form the conductive resin layer may optionally include binders, solvents, dispersants, plasticizers, oxide powders, etc. The binder may be, for example, ethyl cellulose resin, acrylic resin, butyral resin, etc., and the solvent may be an organic solvent (such as terpineol, butyl carbitol, ethanol, methyl ethyl ketone, acetone, and toluene) or an aqueous solvent.

[0160] For example, the conductive resin layer can be formed by immersing the capacitor body 110 in a paste for forming the conductive resin layer and then curing it, or by printing the paste for forming the conductive resin layer onto the surface of the capacitor body 110 by screen printing or gravure printing and then curing it, or by coating the paste for forming the conductive resin layer onto the surface of the capacitor body 110 and then curing it.

[0161] Next, a plating layer is formed on the outer surface of the conductive resin layer.

[0162] For example, a coating can be formed by plating or sputtering.

[0163] In the following description, embodiments will be illustrated in more detail with reference to examples. However, these examples are exemplary, and the scope of the claims is not limited thereto.

[0164] (Manufacturing of multilayer ceramic capacitors) Examples 1 to 6 BaTiO3 compound was prepared by mixing BaCO3 powder with TiO2 powder to achieve a Ba / Ti molar ratio of 1.0067. The prepared BaTiO3 compound was then mixed with borosilicate glass (containing SiO2 and B2O3) and Dy2O3 and Tb4O7 to prepare a dielectric paste. Here, the borosilicate glass was mixed such that, based on 100 molar parts of Ti included in the BaTiO3 compound, the B included in the borosilicate glass had the corresponding contents shown in Table 1. Additionally, based on 100 molar parts of BaTiO3 compound, Dy2O3 and Tb4O7 were mixed in amounts of 1 molar part and 0.05 molar parts, respectively.

[0165] In the step of preparing the dielectric paste, mixing is carried out by adding ethanol / toluene (solvent) and polyvinyl butyral (PVB) resin as a binder together to the BaTiO3 compound, followed by mechanical grinding using zirconia (ZrO2) balls as a dispersion medium.

[0166] Dielectric green sheets are manufactured by forming the prepared dielectric paste into sheets using a coating head discharge type roller forming coating machine.

[0167] A conductive paste layer including nickel (Ni) is printed on the surface of a dielectric green sheet, and multiple dielectric green sheets with the conductive paste layer formed thereon are stacked and then pressed to manufacture a dielectric green sheet stack.

[0168] The dielectric green sheet stack is calcined at 400°C or lower in a nitrogen atmosphere, and then calcined at 1300°C or lower with a hydrogen (H2) concentration (volume concentration) of less than or equal to 1.0% to form the capacitor body.

[0169] Subsequently, external electrodes are formed on the surface of the capacitor body, thereby manufacturing a multilayer ceramic capacitor.

[0170] Comparative Example 1 The multilayer ceramic capacitor was manufactured in the same manner as in Example 1, except that borosilicate glass was not used in Comparative Example 1.

[0171] Table 1 shows the content of B based on 100 moles of Ti included in the BaTiO3 compound.

[0172] (Table 1)

[0173] Evaluation 1: ICP-OES Analysis ICP-OES (Inductively Coupled Plasma Spectroscopy) analysis was performed on the dielectric layers of the multilayer ceramic capacitors according to Examples 1 to 6 and Comparative Example 1 to measure the content of each detected element, and the results are shown in Table 2.

[0174] The dielectric layers of the multilayer ceramic capacitors according to Examples 1 to 6 and Comparative Example 1 were dissolved in a mixed solution of hydrofluoric acid and nitric acid, and then diluted by about 500 times to obtain samples. The obtained samples were analyzed by ICP-OES using an AVIO500 (Platinum Elmer) device under conditions of plasma flow rate of 12 L / min and plasma RF power of 1400 W.

[0175] Table 2 shows the content of each detected element based on 100 atomic parts of Ti.

[0176] (Table 2)

[0177] Referring to Table 2, the dielectric layers of the multilayer ceramic capacitors according to Examples 1 to 6, formed using borosilicate glass, all comprise Ba, Ti, and B elements. In Examples 1 to 6, B element is included in amounts ranging from 0.01 atomic parts to 5 atomic parts based on 100 atomic parts of Ti. Conversely, in the dielectric layer of the multilayer ceramic capacitor according to Comparative Example 1, formed without using borosilicate glass, B element was not detected.

[0178] Evaluation 2: TEM-EDS Analysis The multilayer ceramic capacitors according to Examples 2 and 4 were subjected to TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis as follows to measure the average thickness of the grain boundaries of the dielectric layer and the standard deviation of the thickness, and the results are presented in... Figure 6 and Figure 7 And in Table 3.

[0179] A multilayer ceramic capacitor was immersed in an epoxy mixture and cured. The W-axis and T-axis surfaces (WT surfaces) of the capacitor body were polished to half the length of the capacitor body along the L-axis. The capacitor body was then fixed and held in a vacuum chamber to obtain a cross-sectional sample in which the effective region of alternating dielectric and inner electrode layers could be observed. Subsequently, TEM images of each section were taken, with at least one dielectric layer and at least one inner electrode layer visible, when the effective region of the cross-sectional sample was divided into three parts (e.g., upper, middle, and lower). TEM images were obtained using Xe-FIB (focused ion beam) at an accelerating voltage of 200 kV. EDS (energy-dispersive spectroscopy) analysis was then performed on the TEM images of the cross-sectional sample to observe the structure of dielectric grains and grain boundaries through silicon (Si) elemental mapping and to measure the average thickness of the grain boundaries. The average thickness of grain boundaries is obtained as follows: The effective area of ​​the cross-sectional sample is divided into three parts (e.g., upper, middle, and lower). For each part, four points are taken at the grain boundaries within the dielectric layer, and the thickness of the grain boundary at each point is measured. The average thickness measured at a total of twelve points is then calculated, and the standard deviation of the grain boundary thickness at the twelve points is obtained. The standard deviation is calculated as the square root of the average of the squares of the thickness deviations.

[0180] Figure 6 The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 2, and Figure 7 The image is based on the TEM-EDS (transmission electron microscopy-energy dispersive spectroscopy) analysis of the dielectric layer in Example 4.

[0181] exist Figure 6 and Figure 7 In the diagram, the structure of dielectric grains and grain boundaries present in the dielectric layer within the central portion of the effective region in Examples 2 and 4 is shown by mapping the Si element, and four points are marked to obtain the average thickness of the grain boundaries.

[0182] (Table 3)

[0183] Referring to Table 3, the average thickness of the grain boundaries in Example 2 is 3.58 nm with a standard deviation of 2.07 nm, and the average thickness of the grain boundaries in Example 4 is 6.58 nm with a standard deviation of 1.69 nm. Therefore, the dielectric layer according to the embodiment has continuous and uniformly thick grain boundaries with a predetermined thickness.

[0184] Evaluation 3: Characteristics of sintered body When manufacturing multilayer ceramic capacitors according to Examples 1 to 6 and Comparative Example 1, the densification initiation temperature and sintering density of the sintered body of the multilayer ceramic capacitor were measured as follows, and the results are shown in Table 4. The sintered body is the structure obtained after sintering the dielectric sheet stack.

[0185] The densification initial temperature is determined by measuring the density of the sintered body at different firing temperatures and setting the firing temperature at which the density reaches the expected value as the densification start temperature.

[0186] Sintered density represents the density of the sintered body.

[0187] Referring to Table 4, compared with Comparative Example 1, the multilayer ceramic capacitors according to Examples 1 to 6 exhibited lower densification initiation temperatures and higher sintering densities.

[0188] Evaluation 4: Reliability The mean time to failure (MTTF) of the multilayer ceramic capacitors according to Examples 1 to 6 and Comparative Example 1 were measured using the following method, and the results are shown in Table 4.

[0189] The mean time to failure (MTTF) (in hours) was measured for 10 hours using a step insulation resistance (Step IR) device at a temperature of 150°C and an applied voltage of 50V per 1μm thick dielectric layer.

[0190] In Table 4, the MTTF values ​​are shown as relative values ​​based on the numerical results of Example 2.

[0191] Referring to Table 4, the multilayer ceramic capacitors according to Examples 1 to 6 exhibit superior reliability compared to the multilayer ceramic capacitor according to Comparative Example 1. Therefore, the multilayer ceramic capacitors according to the embodiments have a dielectric layer that can be sintered at low temperatures and has excellent density, thereby exhibiting improved reliability.

[0192] (Table 4)

[0193] Although this disclosure has been described in conjunction with what are now considered to be actual embodiments, it should be understood that this disclosure is not limited to the disclosed embodiments, but rather is intended to cover various variations and equivalents included within the spirit and scope of the appended claims.

Claims

1. A multilayer ceramic capacitor, comprising: The capacitor body includes a dielectric layer and an inner electrode layer; as well as External electrodes are disposed on the outer surface of the capacitor body. The dielectric layer comprises Ba, Ti, and B. The dielectric layer includes a plurality of dielectric grains and grain boundaries, wherein the grain boundaries are disposed between adjacent dielectric grains among the plurality of dielectric grains, and The average thickness of the grain boundaries is 1 nm to 10 nm.

2. The multilayer ceramic capacitor according to claim 1, wherein, The standard deviation of the thickness of the grain boundaries is 0.1 nm to 2.5 nm, and The standard deviation is the square root of the average of the squares of the thickness deviations of the grain boundaries.

3. The multilayer ceramic capacitor according to claim 1, wherein, The dielectric layer includes a first dielectric layer and a second dielectric layer. The capacitor body includes an effective region, a cover region, and side edge regions. The effective region includes a first dielectric layer and an inner electrode layer, wherein the inner electrode layer is stacked on the first dielectric layer. The cover region includes a second dielectric layer, wherein the second dielectric layer is disposed on a first surface and a second surface of the effective region in the stacking direction. The side edge regions are disposed on opposite ends of the effective region in a direction perpendicular to the stacking direction. Boron (B) is included in at least one of the effective area, the coverage area, and the side edge area.

4. The multilayer ceramic capacitor according to claim 1, wherein, In the dielectric layer, B is included in an amount of 0.01 to 5 atomic parts based on 100 atomic parts of Ti.

5. The multilayer ceramic capacitor according to claim 1, wherein, The dielectric layer also includes Si.

6. The multilayer ceramic capacitor according to claim 5, wherein, In the dielectric layer, Si is included in an amount of 0.1 to 5 atomic parts based on 100 atomic parts of Ti.

7. The multilayer ceramic capacitor according to claim 1, wherein, The dielectric layer also includes at least one rare earth element.

8. The multilayer ceramic capacitor according to claim 1, wherein, The dielectric layer further includes two or more rare earth elements selected from La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, and Y.

9. The multilayer ceramic capacitor according to claim 1, wherein, The dielectric layer also includes Dy and Tb.

10. The multilayer ceramic capacitor according to claim 7, wherein, The dielectric layer comprises at least one rare earth element in an amount of 0.5 to 5 atomic parts based on 100 atomic parts of Ti.

11. The multilayer ceramic capacitor according to claim 1, wherein, The grain boundaries include at least one selected from B and Si.

12. The multilayer ceramic capacitor according to claim 1, wherein, The grain boundaries include B and Si.

13. The multilayer ceramic capacitor according to claim 11, wherein, The grain boundaries also include at least one rare earth element.

14. The multilayer ceramic capacitor according to claim 1, wherein, The size of the dielectric grains among the plurality of dielectric grains is from 100 nm to 500 nm.

15. A method for manufacturing a multilayer ceramic capacitor, comprising: Barium titanate-based compounds are mixed with borosilicate glass to prepare dielectric pastes; The dielectric paste is used to manufacture a plurality of dielectric green sheets, and a conductive paste layer is formed on the surface of two or more of the plurality of dielectric green sheets; A dielectric sheet stack is manufactured by stacking two or more dielectric sheets on which the conductive paste layer is formed; The dielectric green sheet stack is fired to manufacture a capacitor body including a dielectric layer and an inner electrode layer; and An external electrode is formed on the surface of the capacitor body. The dielectric layer comprises Ba, Ti, and B. The dielectric layer includes a plurality of dielectric grains and grain boundaries, wherein the grain boundaries are disposed between adjacent dielectric grains among the plurality of dielectric grains, and the average thickness of the grain boundaries is 1 nm to 10 nm.

16. The method according to claim 15, wherein, The borosilicate glass comprises SiO2 and B2O3.

17. The method according to claim 15, wherein, The borosilicate glass is mixed in the following amounts such that, based on 100 moles of Ti included in the barium titanate compound, the amount of B included in the borosilicate glass is from 0.01 moles to 10 moles.

18. The method according to claim 15, wherein, The dielectric paste is prepared by further mixing at least one rare earth element compound.

19. The method according to claim 18, wherein, The at least one rare earth element compound includes Dy-containing compounds and Tb-containing compounds.

20. The method according to claim 19, wherein, The Dy-containing compound includes Dy2O3, and The Tb-containing compound includes Tb4O7.

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