High-frequency impedance conversion device and high-speed digital communication test system

Abstract

The embodiment of the invention discloses a high-frequency impedance conversion device and a high-speed digital communication test system. The high-frequency impedance conversion device comprises four high-frequency impedance conversion channels; each high-frequency impedance conversion channel comprises a high-frequency impedance conversion module, a balanced interface and a non-balanced interface; the first end and the second end of the high-frequency impedance conversion module are connected with the unbalanced interface, the third end and the fourth end of the high-frequency impedance conversion module are both connected with the balanced interface, the balanced interface is connected with a pair of differential line pairs of a to-be-detected line, and different balanced interfaces correspond to different differential line pairs of the to-be-detected line. The unbalanced interface is connected with detection equipment; and the high-frequency impedance conversion module is used for converting the balanced type interface into the unbalanced type interface, or converting the unbalanced type interface into the balanced type interface. Therefore, the high-frequency impedance conversion device provided by the embodiment of the invention can realize the measurement of the mixed-mode signal.

Description

Technical Field

[0001] The present invention relates to the field of high-speed digital communication testing technology, and in particular to a high-frequency impedance conversion device and a high-speed digital communication testing system. Background Technology

[0002] In the field of high-speed digital communication testing, RF test equipment typically uses unbalanced interfaces. When testing RJ45 Ethernet cables, impedance converters are needed to convert balanced RJ45 interfaces to unbalanced RF interfaces (such as N-type or SMA-type). With the widespread application of 10GBase-T and higher-speed Ethernet technologies, the physical layer of Ethernet cables uses four pairs of twisted pairs for full-duplex transmission. Each twisted pair carries high-speed differential signals. In equipment development, testing, and diagnostics, in addition to measuring differential signals, common-mode signals also need to be measured. However, currently, impedance converters are generally only used for converting differential signals, that is, converting single-ended signals to balanced differential signals, or vice versa, and cannot be directly used for measuring mixed-mode signals. Summary of the Invention

[0003] This invention provides a high-frequency impedance conversion device and a high-speed digital communication test system to achieve the measurement of mixed-mode signals.

[0004] In a first aspect, embodiments of the present invention provide a high-frequency impedance conversion device, which includes four high-frequency impedance conversion channels; Each of the aforementioned high-frequency impedance conversion channels includes a high-frequency impedance conversion module, a balanced interface, and an unbalanced interface; The first and second ends of the high-frequency impedance conversion module are connected to the unbalanced interface, the third and fourth ends of the high-frequency impedance conversion module are both connected to the balanced interface, the balanced interface is connected to a pair of differential wires of the line under test, different balanced interfaces correspond to different differential wires of the line under test, and the unbalanced interface is connected to the testing equipment. The high-frequency impedance conversion module is used to convert the differential signal of the balanced interface into the differential-mode signal or common-mode signal of the unbalanced interface, or to convert the differential-mode signal or common-mode signal of the unbalanced interface into the differential signal of the balanced interface.

[0005] Optionally, the unbalanced class interface includes a first unbalanced interface and a second unbalanced interface; The first end of the high-frequency impedance conversion module is connected to the first unbalanced interface, and the second end of the high-frequency impedance conversion module is connected to the second unbalanced interface. The balance class interface includes a first contact point and a second contact point; The third terminal of the high-frequency impedance conversion module is connected to the first pin of the differential pair through the first contact point, and the fourth terminal of the high-frequency impedance conversion module is connected to the second pin of the differential pair through the second contact point.

[0006] Optionally, the high-frequency impedance conversion module includes a balanced-to-unbalanced converter, a passive resistor voltage divider network, a first microstrip line, a second microstrip line, and a third microstrip line; The first end of the first microstrip line serves as the first end of the high-frequency impedance conversion module. The second end of the first microstrip line is connected to the first end of the balun. The second end of the balun is connected to the first end of the second microstrip line. The second end of the second microstrip line serves as the third end of the high-frequency impedance conversion module. The third end of the balun is connected to the first end of the passive resistor divider network. The second end of the passive resistor divider network serves as the second end of the high-frequency impedance conversion module. The fourth end of the balun is connected to the first end of the third microstrip line. The second end of the third microstrip line serves as the fourth end of the high-frequency impedance conversion module. The fifth end of the balun is grounded.

[0007] Optionally, the balanced-to-unbalanced converter includes a balun chip; The first pin of the balun chip serves as the first terminal of the balanced-to-unbalanced converter, the second pin of the balun chip serves as the second terminal of the balanced-to-unbalanced converter, the third pin of the balun chip serves as the third terminal of the balanced-to-unbalanced converter, the fourth pin of the balun chip serves as the fourth terminal of the balanced-to-unbalanced converter, and the fifth pin of the balun chip serves as the fifth terminal of the balanced-to-unbalanced converter.

[0008] Optionally, the impedance ratio of the balun chip from one end to both ends is: the impedance ratio of the detection device to the impedance of the circuit under test.

[0009] Optionally, the passive resistor voltage divider network includes a DC blocking capacitor, a first resistor, a first compensation capacitor, a second resistor, and a second compensation capacitor; The first end of the DC blocking capacitor serves as the first end of the passive resistor voltage divider network. The second end of the DC blocking capacitor is connected to the first end of the first resistor. The second end of the first resistor and the first end of the first compensation capacitor are both connected to the first end of the second resistor. The second end of the second resistor and the first end of the second compensation capacitor are connected and serve as the second end of the passive resistor voltage divider network. The second ends of the first compensation capacitor and the second end of the second compensation capacitor are both grounded.

[0010] Optionally, the impedance of the first microstrip line is equal to the impedance of the detection device, the impedance of the second microstrip line is equal to the impedance of the circuit under test, and the impedance of the third microstrip line is equal to the impedance of the circuit under test.

[0011] Optionally, the high-frequency impedance conversion device may also include a multilayer impedance conversion board; The high-frequency impedance conversion modules included in the different high-frequency impedance conversion channels are disposed on different layers of the multilayer impedance conversion board, and each of the balanced interface, each of the first unbalanced interface and each of the second unbalanced interface are arranged along the edge of the multilayer impedance conversion board.

[0012] Optionally, the high-frequency impedance conversion device also includes a metal shielding housing; The metal shielding shell includes multiple openings; The multilayer impedance conversion board is disposed inside the metal shielding shell, and each of the balanced interface, each of the first unbalanced interface and each of the second unbalanced interface is disposed on one of the holes.

[0013] Secondly, embodiments of the present invention also provide a high-speed digital communication test system, which includes the high-frequency impedance conversion device provided in any embodiment of the present invention.

[0014] Each high-frequency impedance conversion channel of the high-frequency impedance conversion device proposed in this embodiment of the invention is connected to the detection device through an unbalanced interface and to a pair of differential wires of the circuit under test through a balanced interface. This allows the high-frequency impedance conversion module to convert the differential signal of the balanced interface into a differential-mode signal or a common-mode signal of the unbalanced interface, or to convert the differential-mode signal or common-mode signal of the unbalanced interface into a differential signal of the balanced interface. Therefore, the high-frequency impedance conversion device provided in this embodiment of the invention can realize the measurement of mixed-mode signals. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the structure of a high-frequency impedance conversion device provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of a high-frequency impedance conversion channel provided in an embodiment of the present invention; Figure 3This is a schematic diagram of another high-frequency impedance conversion channel provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of another high-frequency impedance conversion module provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of a multilayer impedance conversion board provided in an embodiment of the present invention; Figure 6 This is an external view of a high-frequency impedance conversion device provided in an embodiment of the present invention; Figure 7 An external view of another high-frequency impedance conversion device provided in an embodiment of the present invention; Figure 8 This is a schematic diagram of the internal connection of a high-frequency impedance conversion device provided in an embodiment of the present invention; Figure 9 This is a schematic diagram of the internal connection of another high-frequency impedance conversion device provided in an embodiment of the present invention. Detailed Implementation

[0017] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0018] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0019] Figure 1 This is a schematic diagram of a high-frequency impedance conversion device provided in an embodiment of the present invention, as shown below. Figure 1 As shown, the high-frequency impedance conversion device includes four high-frequency impedance conversion channels 10; each high-frequency impedance conversion channel 10 includes a high-frequency impedance conversion module 110, a balanced interface 120, and an unbalanced interface 130. The first and second ends of the high-frequency impedance conversion module 110 are connected to the unbalanced interface 130, and the third and fourth ends of the high-frequency impedance conversion module 110 are both connected to the balanced interface 120. The balanced interface 120 is connected to a pair of differential wires of the circuit to be tested. Different balanced interfaces 120 correspond to different differential wires of the circuit to be tested. The unbalanced interface 130 is connected to the testing equipment. The high-frequency impedance conversion module 110 is used to convert the differential signal of the balanced interface 120 into the differential-mode signal or common-mode signal of the unbalanced interface 130, or to convert the differential-mode signal or common-mode signal of the unbalanced interface 130 into the differential signal of the balanced interface 120.

[0020] The detection equipment can be connected to a pair of differential pairs of an Ethernet cable through each high-frequency impedance conversion channel 10. Each high-frequency impedance conversion channel 10 can convert the differential signal transmitted by the pair of differential pairs of the Ethernet cable into a differential-mode signal or a common-mode signal, or convert a differential-mode signal or a common-mode signal into a differential signal.

[0021] Specifically, the balanced interface 120 includes an RJ45 network interface. After the line under test is plugged into the balanced interface 120, it can only connect to one pair of differential wires of the line under test. The unbalanced interface 130 includes one SMA connector for outputting or inputting differential-mode signals and another SMA connector for outputting or inputting common-mode signals. The unbalanced interface 130 is connected to the testing equipment. The high-frequency impedance conversion module 110 can convert the differential signal of the balanced interface 120 into a differential-mode signal or a common-mode signal of the unbalanced interface 130, or convert the differential-mode signal or common-mode signal of the unbalanced interface 130 into a differential signal of the balanced interface 120.

[0022] In this embodiment of the invention, each high-frequency impedance conversion channel 10 of the high-frequency impedance conversion device is connected to the detection device via an unbalanced interface 130 and to a pair of differential wires of the circuit under test via a balanced interface 120. This allows the high-frequency impedance conversion module 110 to convert the differential signal from the balanced interface 120 into a differential-mode signal or a common-mode signal from the unbalanced interface 130, or vice versa. Therefore, the high-frequency impedance conversion device provided in this embodiment of the invention can realize the measurement of mixed-mode signals.

[0023] Based on the above embodiments, optionally, Figure 2 This is a schematic diagram of a high-frequency impedance conversion channel provided in an embodiment of the present invention. Figure 2 As shown, the unbalanced class interface 130 includes a first unbalanced interface 131 and a second unbalanced interface 132; The first end of the high-frequency impedance conversion module 110 is connected to the first unbalanced interface 131, and the second end of the high-frequency impedance conversion module 110 is connected to the second unbalanced interface 132. The balanced interface 120 includes a first contact point and a second contact point; the third terminal of the high-frequency impedance conversion module 110 is connected to the first pin of the differential pair through the first contact point, and the fourth terminal of the high-frequency impedance conversion module 110 is connected to the second pin of the differential pair through the second contact point.

[0024] The first unbalanced interface 131 includes an SMA connector for outputting or inputting differential-mode signals. The second unbalanced interface 132 includes an SMA connector for outputting or inputting common-mode signals. The balanced interface 120 includes an RJ45 network interface, which includes a pair of metal contacts, namely a first contact and a second contact. When the interface of the line under test is connected to the RJ45 network interface, the third terminal of the high-frequency impedance conversion module 110 is connected to the first pin of the differential pair through the first contact, and the fourth terminal of the high-frequency impedance conversion module 110 is connected to the second pin of the differential pair through the second contact.

[0025] Based on the above embodiments, optionally, Figure 3 This is a schematic diagram of another high-frequency impedance conversion channel provided in an embodiment of the present invention. Figure 3 As shown, the high-frequency impedance conversion module 110 includes a balanced-to-unbalanced converter 111, a passive resistor voltage divider network 112, a first microstrip line 113, a second microstrip line 114, and a third microstrip line 115. The first end of the first microstrip line 113 serves as the first end of the high-frequency impedance conversion module 110. The second end of the first microstrip line 113 is connected to the first end of the balun 111. The second end of the balun 111 is connected to the first end of the second microstrip line 114. The second end of the second microstrip line 114 serves as the third end of the high-frequency impedance conversion module 110. The third end of the balun 111 is connected to the first end of the passive resistor divider network 112. The second end of the passive resistor divider network 112 serves as the second end of the high-frequency impedance conversion module 110. The fourth end of the balun 111 is connected to the first end of the third microstrip line 115. The second end of the third microstrip line 115 serves as the fourth end of the high-frequency impedance conversion module 110. The fifth end of the balun 111 is grounded.

[0026] Specifically, the first end of the first microstrip line 113 is connected to the first unbalanced interface 131, the second end of the second microstrip line 114 is connected to the first contact point of the balanced interface 120, the second end of the passive resistor voltage divider network 112 is connected to the second unbalanced interface 132, and the second end of the third microstrip line 115 is connected to the second contact point of the balanced interface 120.

[0027] The balanced-to-unbalanced converter 111 can convert the two-ended differential signal of a specified pair of wires provided by the line under test (Ethernet cable) into a single-ended differential mode signal or a single-ended common mode signal; the passive resistor divider network 112 and the first microstrip line 113 are used to match the impedance of the detection device to reduce signal reflection; the second microstrip line 114 and the third microstrip line 115 are used to match the impedance of the line under test to reduce signal reflection.

[0028] Based on the above embodiments, optionally, Figure 4 This is a schematic diagram of another high-frequency impedance conversion module provided in an embodiment of the present invention. Figure 4 As shown, the balun chip 111 includes a balun chip U1; the first pin PIN1 of the balun chip serves as the first terminal of the balun chip 111, the second pin PIN2 of the balun chip serves as the second terminal of the balun chip 111, the third pin PIN3 of the balun chip serves as the third terminal of the balun chip 111, the fourth pin PIN4 of the balun chip serves as the fourth terminal of the balun chip 111, and the fifth pin PIN5 of the balun chip serves as the fifth terminal of the balun chip 111.

[0029] The passive resistor voltage divider network 112 includes a DC blocking capacitor CM, a first resistor R1, a first compensation capacitor C1, a second resistor R2, and a second compensation capacitor C2. The first end of the DC blocking capacitor CM serves as the first end of the passive resistor voltage divider network 112. The second end of the DC blocking capacitor CM is connected to the first end of the first resistor R1. The second ends of the first resistor R1 and the first ends of the first compensation capacitor C1 are both connected to the first end of the second resistor R2. The second end of the second resistor R2 is connected to the first end of the second compensation capacitor C2 and serves as the second end of the passive resistor voltage divider network 112. The second ends of the first compensation capacitor C1 and the second ends of the second compensation capacitor C2 are both grounded.

[0030] Specifically, the first pin PIN1 of the balun chip is connected to the second end of the first microstrip line 113, the fifth pin PIN5 of the balun chip is grounded, the second pin PIN2 of the balun chip is connected to the first end of the second microstrip line 114, the third pin PIN3 of the balun chip is connected to the first end of the DC blocking capacitor CM, and the fourth pin PIN4 of the balun chip is connected to the first end of the third microstrip line 115.

[0031] The common-mode signal transmission path is as follows: the signal transmitted by a pair of differential lines of the circuit under test is input to the second pin PIN2 and the fourth pin PIN4 of the balun chip through the balanced interface 120. The third pin PIN3 (center tap [common-mode port]) of the balun chip outputs the common-mode signal through the passive resistor voltage divider network 112 and the second unbalanced interface 132. This common-mode signal path attenuates the common-mode voltage signal transmitted by the differential line pair connecting the circuit under test and the balun chip at a fixed ratio, allowing for direct measurement by the testing equipment. The passive resistor voltage divider network 112 ensures a flat frequency response for the common-mode voltage signal across a wide bandwidth. Furthermore, setting the parallel time constant of R1 and C1 to be equal to the parallel time constant of R2 and C2 effectively compensates for the parasitic parameters and high-frequency effects of the printed circuit board of the high-frequency impedance conversion channel 10, ensuring that the signal obtained from the second unbalanced interface 132 (common-mode signal measurement port) accurately reflects the common-mode component of the measured differential line pair.

[0032] Differential signal path: The signal transmitted by a pair of differential wires of the line under test is input to the second pin PIN2 and the fourth pin PIN4 of the balun chip through the balanced interface 120. The first pin PIN1 of the balun chip is output through the first unbalanced interface 131 (differential signal measurement port) for direct measurement by the testing equipment.

[0033] Based on the above embodiments, optionally, the impedance ratio from one end to both ends of the balun chip is: the ratio of the impedance of the detection device to the impedance of the circuit under test. The impedance of the first microstrip line 113 is equal to the impedance of the detection device, the impedance of the second microstrip line 114 is equal to the impedance of the circuit under test, and the impedance of the third microstrip line 115 is equal to the impedance of the circuit under test.

[0034] The testing equipment includes a network analyzer with an impedance of 50Ω; the lines to be tested include an Ethernet cable with an impedance of 100Ω; the impedance ratio of the balun chip from single-ended to double-ended is 1:2; the impedance of the first microstrip line 113 is 50Ω, and the impedances of the second microstrip line 114 and the third microstrip line 115 are both 100Ω.

[0035] The first pin PIN1 of the balun chip is connected to the first unbalanced interface 131 through a first microstrip line 113 with a characteristic impedance of 50Ω. The second pin PIN2 of the balun chip is connected to the balanced interface 120 through a second microstrip line 114 with a characteristic impedance of 100Ω. The fourth pin PIN4 of the balun chip is connected to the balanced interface 120 through a third microstrip line 115 with a characteristic impedance of 100Ω. The third pin PIN3 of the balun chip is connected to the second unbalanced interface 132 through a passive resistor voltage divider network 112 with a characteristic impedance of 50Ω. This enables bidirectional impedance conversion from 100Ω differential double-ended to 50Ω single-ended.

[0036] In addition, setting the impedance of the first microstrip line 113 to be equal to the impedance of the detection device, the impedance of the second microstrip line 114 to be equal to the impedance of the circuit under test, and the impedance of the third microstrip line 115 to be equal to the impedance of the circuit under test can reduce signal reflection and improve the accuracy of signal measurement.

[0037] For example, if the balanced interface 120 of the first high-frequency impedance conversion channel 10 can connect to the first differential pair (wire sequence 1 & 2) of the line under test, the balanced interface 120 of the second high-frequency impedance conversion channel 10 can connect to the second differential pair (wire sequence 3 & 6) of the line under test, the balanced interface 120 of the third high-frequency impedance conversion channel 10 can connect to the third differential pair (wire sequence 4 & 5) of the line under test, and the balanced interface 120 of the fourth high-frequency impedance conversion channel 10 can connect to the fourth differential pair (wire sequence 7 & 8) of the line under test. Taking the first high-frequency impedance conversion channel 10 as an example. The first differential pair (pin 1) is connected to the second pin (PIN2) of the balun chip via the first contact point of the balanced interface 120 (RJ45 interface) and a 100Ω second microstrip line 114. The first differential pair (pin 2) is connected to the fourth pin (PIN4) of the balun chip via the second contact point of the balanced interface 120 (RJ45 interface) and a 100Ω third microstrip line 115. The first pin (PIN1) of the balun chip is connected to the first unbalanced interface 131 via a 50Ω first microstrip line 113. The third pin (PIN3) of the balun chip is connected to the second unbalanced interface 132 via a 50Ω passive resistor voltage divider network 112. The preferred parameters of the passive resistor voltage divider network 112 are: R1 = 470Ω, R2 = 51Ω, C1 = 0.5pF, C2 = 6.8pF, and CM = 100nF.

[0038] Based on the above embodiments, optionally, Figure 5 This is a schematic diagram of a multilayer impedance conversion board provided in an embodiment of the present invention. Figure 5 As shown, the high-frequency impedance conversion device also includes a multilayer impedance conversion board 140; The high-frequency impedance conversion modules 110 included in the different high-frequency impedance conversion channels 10 are disposed on different layers of the multilayer impedance conversion board 140, and each balanced interface 120, each first unbalanced interface 131 and each second unbalanced interface 132 are arranged along the edge of the multilayer impedance conversion board 140.

[0039] The multilayer impedance conversion board 140 includes four printed circuit boards 141, with each high-frequency impedance conversion channel 10 including a high-frequency impedance conversion module 110 disposed on one layer of printed circuit board 141. A balanced interface 120 (e.g., RJ45 interface), a first unbalanced interface 131 (e.g., SMA interface), and a second unbalanced interface 132 (e.g., SMA interface) are arranged along the board edge. The printed circuit board 141 uses an epoxy fiberglass cloth substrate or a higher frequency board material.

[0040] Based on the above embodiments, optionally, Figure 6 This is an external view of a high-frequency impedance conversion device provided in an embodiment of the present invention. Figure 7 This is an external view of another high-frequency impedance conversion device provided in an embodiment of the present invention. Figure 8 This is a schematic diagram of the internal connections of a high-frequency impedance conversion device provided in an embodiment of the present invention. Figure 9 This is a schematic diagram of the internal connections of another high-frequency impedance conversion device provided in an embodiment of the present invention. Figures 6-9 As shown, the high-frequency impedance conversion device also includes a metal shielding housing; the metal shielding housing includes multiple holes; The multilayer impedance conversion board 140 is disposed inside a metal shielded housing, and each balanced interface J1-J4, each first unbalanced interface P1-P4, and each second unbalanced interface P5-P8 are disposed on a hole.

[0041] The metal shielding shell provides electromagnetic shielding and physical protection for the internally installed multi-layer impedance conversion board 140 and high-frequency impedance conversion channel 10.

[0042] In addition, the housings of all first unbalanced interfaces P1-P4 and all second unbalanced interfaces P5-P8 are well soldered to the ground plane of the multilayer impedance conversion board 140.

[0043] This invention also provides a high-speed digital communication test system, which includes the high-frequency impedance conversion device provided in any embodiment of this invention. Therefore, it has the beneficial effects of a high-frequency impedance conversion device, which will not be described in detail here.

[0044] Specifically, the high-speed digital communication test system includes two high-frequency impedance conversion devices and a network analyzer.

[0045] Usage: Connect the network cable of the 10GBASE-T device under test to the balanced interface 120 (RJ45 interface) of the high-frequency impedance conversion device. Connect the two ports of the network analyzer to the first unbalanced interface 131 and the second unbalanced interface 132, which belong to the same high-frequency impedance conversion channel 10 connected to the balanced interface 120, respectively, via SMA cables. You can then directly read the differential-mode / common-mode signal frequency response of each wire pair for signal integrity analysis.

[0046] Detailed measurement steps are as follows: (Refer to...) Figures 6-9(1) Use two high-frequency impedance conversion devices, numbered A and B respectively, with each port number ending in A or B. (2) Connect the balanced interface J1A and balanced interface J1B of the high-frequency impedance conversion devices numbered A and B directly through a CAT8 network cable not exceeding 10cm. Connect a 50-ohm load to the second unbalanced interface P5A and the second unbalanced interface P5B of the high-frequency impedance conversion devices numbered A and B. (3) After the first port Port1 and the second port Port2 of the network analyzer are calibrated for direct connection, connect them to the first unbalanced interface P1A and the first unbalanced interface P1B respectively to measure the transmission coefficient and obtain the measurement curve Trace_DMIL_2. Half of the measurement result of this curve will be used as the differential mode insertion loss measurement result Trace_DMIL from the first unbalanced interface P1 to the balanced interface J1 of the high-frequency impedance conversion devices numbered A and B. (4) Connect the balanced interfaces J1A and J1B of the high-frequency impedance conversion devices numbered A and B through a CAT8 network cable not exceeding 10cm. Connect the first unbalanced interfaces P1A and P1B of the high-frequency impedance conversion devices numbered A and B to an external 50-ohm load. (5) After performing through-through calibration on the first port Port1 and the second port Port2 of the network analyzer, connect them to the second unbalanced interfaces P5A and P5B respectively. Perform transmission coefficient measurement to obtain the measurement curve Trace_CMIL_2. Half of the measurement result of this curve will be used as the common-mode insertion loss measurement result Trace_CMIL from the second unbalanced interface P5 to the balanced interface J1 of the high-frequency impedance conversion devices numbered A and B. (6) Connect the balanced interfaces J1A and J1B of the high-frequency impedance conversion devices numbered A and B through a network cable with the RJ45 interface to be tested. Using the first port Port1 and the second port Port2 of the network analyzer, connect any two of the following interfaces of the high-frequency impedance conversion device numbered A and B: the first unbalanced interface P1A, the first unbalanced interface P1B, the second unbalanced interface P5A, and the second unbalanced interface P5B. For example, the measurement results Trace_mix of near-end transmission, near-end reflection, far-end transmission, and far-end reflection in the mixed mode to be corrected can be obtained respectively. (7) Use Trace_MIX = Trace_mix - Trace_DMIL - Trace_CMIL to obtain the corrected measurement results of near-end transmission, near-end reflection, far-end transmission, and far-end reflection in the mixed mode.

[0047] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0048] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A high frequency impedance conversion device, characterized by, Includes four high-frequency impedance conversion channels; Each of the aforementioned high-frequency impedance conversion channels includes a high-frequency impedance conversion module, a balanced interface, and an unbalanced interface; The first and second ends of the high-frequency impedance conversion module are connected to the unbalanced interface, the third and fourth ends of the high-frequency impedance conversion module are both connected to the balanced interface, the balanced interface is connected to a pair of differential wires of the line under test, different balanced interfaces correspond to different differential wires of the line under test, and the unbalanced interface is connected to the testing equipment. The high-frequency impedance conversion module is used to convert the differential signal of the balanced interface into the differential-mode signal or common-mode signal of the unbalanced interface, or to convert the differential-mode signal or common-mode signal of the unbalanced interface into the differential signal of the balanced interface.

2. The high-frequency impedance conversion device according to claim 1, characterized by The unbalanced class interface includes a first unbalanced interface and a second unbalanced interface; The first end of the high-frequency impedance conversion module is connected to the first unbalanced interface, and the second end of the high-frequency impedance conversion module is connected to the second unbalanced interface; The balance class interface includes a first contact point and a second contact point; The third terminal of the high-frequency impedance conversion module is connected to the first pin of the differential pair through the first contact point, and the fourth terminal of the high-frequency impedance conversion module is connected to the second pin of the differential pair through the second contact point.

3. The high-frequency impedance conversion device according to claim 1, wherein The high-frequency impedance conversion module includes a balanced-to-unbalanced converter, a passive resistor voltage divider network, a first microstrip line, a second microstrip line, and a third microstrip line; The first end of the first microstrip line serves as the first end of the high-frequency impedance conversion module. The second end of the first microstrip line is connected to the first end of the balun. The second end of the balun is connected to the first end of the second microstrip line. The second end of the second microstrip line serves as the third end of the high-frequency impedance conversion module. The third end of the balun is connected to the first end of the passive resistor divider network. The second end of the passive resistor divider network serves as the second end of the high-frequency impedance conversion module. The fourth end of the balun is connected to the first end of the third microstrip line. The second end of the third microstrip line serves as the fourth end of the high-frequency impedance conversion module. The fifth end of the balun is grounded.

4. The high-frequency impedance conversion device according to claim 3, wherein The balanced-to-unbalanced converter includes a balun chip; The first pin of the balun chip serves as the first terminal of the balanced-to-unbalanced converter, the second pin of the balun chip serves as the second terminal of the balanced-to-unbalanced converter, the third pin of the balun chip serves as the third terminal of the balanced-to-unbalanced converter, the fourth pin of the balun chip serves as the fourth terminal of the balanced-to-unbalanced converter, and the fifth pin of the balun chip serves as the fifth terminal of the balanced-to-unbalanced converter.

5. The high frequency impedance conversion device according to claim 4, wherein The impedance ratio of the balun chip from one end to both ends is: the ratio of the impedance of the detection device to the impedance of the circuit to be tested.

6. The high frequency impedance conversion device according to claim 3, wherein The passive resistor voltage divider network includes a DC blocking capacitor, a first resistor, a first compensation capacitor, a second resistor, and a second compensation capacitor; The first end of the DC blocking capacitor serves as the first end of the passive resistor voltage divider network. The second end of the DC blocking capacitor is connected to the first end of the first resistor. The second end of the first resistor and the first end of the first compensation capacitor are both connected to the first end of the second resistor. The second end of the second resistor and the first end of the second compensation capacitor are connected and serve as the second end of the passive resistor voltage divider network. The second ends of the first compensation capacitor and the second end of the second compensation capacitor are both grounded.

7. The high frequency impedance conversion device according to claim 3, wherein The impedance of the first microstrip line is equal to the impedance of the detection device, the impedance of the second microstrip line is equal to the impedance of the circuit under test, and the impedance of the third microstrip line is equal to the impedance of the circuit under test.

8. The high-frequency impedance conversion device according to claim 2, characterized in that, It also includes multilayer impedance transformation boards; The high-frequency impedance conversion modules included in the different high-frequency impedance conversion channels are disposed on different layers of the multilayer impedance conversion board, and each of the balanced interface, each of the first unbalanced interface and each of the second unbalanced interface are arranged along the edge of the multilayer impedance conversion board.

9. The high frequency impedance conversion device according to claim 8, wherein It also includes a metal shielding shell; The metal shielding shell includes multiple openings; The multilayer impedance conversion board is disposed inside the metal shielding shell, and each of the balanced interface, each of the first unbalanced interface and each of the second unbalanced interface is disposed on one of the holes.

10. A high speed digital communications test system, characterized by, Includes the high-frequency impedance conversion device according to any one of claims 1-9.

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