Cable fault protection and battery quick start in electronic devices

Abstract

Cable fault protection and battery quick start in an electronic device are provided. When the electronic device is attached to an external power supply via a Universal Serial Bus Type C (USB-C) cable, it is important to protect the electronic device from damage due to cable faults (e.g., overcurrent, overheating, and / or defective cables). In addition, when the battery in the electronic device is fully depleted, it is necessary to quickly initiate recharging of the depleted battery when attached to the USB-C cable. Herein, a power management integrated circuit (PMIC) is disposed in the electronic device and is configured according to the USB-C standard to protect the electronic device from the cable failure and to quickly initiate recharging of the depleted battery. By integrating cable fault protection and battery quick start functions into the PMIC, it is possible to reduce the cost and occupied space of the PMIC, thereby making the PMIC suitable for miniaturized electronic devices.

Description

[0001] Related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 708,444, filed October 17, 2024, and U.S. Provisional Patent Application No. 63 / 742,042, filed January 6, 2025, the disclosures of which are hereby incorporated herein by reference in their entirety. Technical Field

[0003] This disclosure relates to fault protection of Universal Serial Bus Type-C (USB-C) cables and rapid startup of depleted batteries in electronic devices. Background Technology

[0004] Today's electronic devices, such as smartphones and wireless headsets, are typically powered by embedded batteries and / or low-dropout (LDO) regulators. These devices are usually charged periodically via a Universal Serial Bus Type-C (USB-C) cable that connects them to an external power supply, such as a wall charger or portable power bank.

[0005] USB-C is an industry-standard connector used to transmit both data and power over a single cable. The USB-C connector was developed by the USB Implementers Forum (USB-IF), a group of companies that has been dedicated to the development, certification, promotion, and maintenance of the USB standard for many years.

[0006] Standard USB-C receptacles and plugs contain numerous pins. Among these, a pair of Configuration Channel (CC) pins (labeled CC1 and CC2), multiple Bus Voltage (VBUS) pins, and multiple Ground (GND) pins are particularly relevant for charging purposes. The pair of CC pins is used to detect the attachment of the USB-C cable and its orientation after attachment. The VBUS pins are used to supply charging voltage / current from the external power supply to the electronic device when the USB-C cable is properly attached between the external power supply and the electronic device.

[0007] Figure 1This is a schematic diagram providing an exemplary illustration of how a valid connection can be detected between a USB-C source 12 (e.g., an external power supply) and a USB-C receiver 14 (e.g., an electronic device) via a USB-C cable 10. According to version 2.0 of the USB-C Cable and Connector Specification, the general concept for establishing a valid connection between the USB-C source 12 and the USB-C receiver 14 is based on the ability to detect terminations residing in the USB-C receiver 14. Initially, the USB-C source 12 exposes separate Rp terminations on the CC1 and CC2 pins, while the USB-C receiver 14 exposes separate Rd terminations on the CC1 and CC2 pins. To detect a valid connection between the USB-C source 12 and the USB-C receiver 14, the USB-C source 12 monitors whether the voltage on the CC1 and CC2 pins is lower than an unterminated voltage, which indicates that the USB-C receiver 14 is attached to the USB-C source 12 via the USB-C cable 10. Upon detecting the attachment of the USB-C receiver 14, the USB-C source 12 asserts the bus voltage on the VBUS pin (not shown). Therefore, the USB-C receiver 14 can charge the embedded battery and / or LDO regulator based on the bus voltage. Summary of the Invention

[0008] Embodiments of this disclosure relate to cable fault protection and fast battery startup in electronic devices. When the electronic device is attached to an external power supply via a Universal Serial Bus Type-C (USB-C) cable, it is important to protect the electronic device from damage due to cable faults (e.g., overcurrent, overheating, and / or defective cables). Additionally, when the battery in the electronic device is completely depleted, it is necessary to quickly initiate recharging of the depleted battery upon attachment to the USB-C cable. In this regard, a power management integrated circuit (PMIC) is incorporated in the electronic device and configured according to the USB-C standard to protect the electronic device from cable faults and quickly initiate recharging of the depleted battery. Compared to using discrete solutions, integrating cable fault protection and fast battery startup functionality into the PMIC can potentially reduce the cost and footprint of the PMIC, thereby making the PMIC suitable for miniaturized electronic devices.

[0009] In one aspect, a USB-C charging system is provided. The USB-C charging system includes a USB-C connector. The USB-C connector includes a pair of configuration channel (CC) pins. The pair of CC pins are configured to indicate whether the USB-C connector is attached to an external power supply via a USB-C cable. The USB-C connector also includes a bus voltage (VBUS) pin. The VBUS pin is configured to receive a bus voltage from the external power supply when the pair of CC pins indicate that the USB-C connector is attached to the external power supply. The USB-C charging system also includes a power input circuit (PMIC). The PMIC is coupled to the USB-C connector. The PMIC includes battery charging circuitry. The battery charging circuitry is coupled to the VBUS pins. The battery charging circuitry is configured to charge an internal normally open voltage regulator based on the bus voltage to provide a normally open voltage (VAO). The PMIC also includes control circuitry. The control circuitry is coupled to the pair of CC pins. The control circuitry is configured to simulate a disconnection from the external power supply via the pair of CC pins in response to a detected fault condition of the USB-C cable, thereby eliminating the bus voltage on the VBUS pin. The control circuitry is also configured to simulate an attachment to the external power supply via the pair of CC pins when the internal normally open voltage regulator is depleted, thereby quickly activating the bus voltage on the VBUS pin to charge the internal normally open voltage regulator.

[0010] In another aspect, an electronic device is provided. The electronic device includes a USB-C charging system. The USB-C charging system includes a USB-C connector. The USB-C connector includes a pair of CC pins. The pair of CC pins is configured to indicate whether the USB-C connector is attached to an external power supply via a USB-C cable. The USB-C connector also includes a VBUS pin. The VBUS pin is configured to receive a bus voltage from the external power supply when the pair of CC pins indicate that the USB-C connector is attached to the external power supply. The USB-C charging system also includes a PMIC. The PMIC is coupled to the USB-C connector. The PMIC includes battery charging circuitry. The battery charging circuitry is coupled to the VBUS pins. The battery charging circuitry is configured to charge an internal normally open voltage regulator based on the bus voltage to provide VAO. The PMIC also includes control circuitry. The control circuitry is coupled to the pair of CC pins. The control circuitry is configured to simulate a disconnection from the external power supply via the pair of CC pins in response to detecting a fault condition of the USB-C cable, thereby eliminating the bus voltage on the VBUS pins. The control circuit is also configured to emulate the attachment status of the external power supply via the pair of CC pins when the internal normally open voltage regulator is depleted, thereby quickly activating the bus voltage on the VBUS pin to charge the internal normally open voltage regulator.

[0011] In another aspect, a method is provided for implementing cable fault protection and fast battery startup in a USB-C charging system. The method includes indicating, via a pair of CC pins in a USB-C connector, whether the USB-C connector is attached to an external power supply via a USB-C cable. The method further includes receiving a bus voltage from the external power supply via a VBUS pin in the USB-C connector when the pair of CC pins indicates that the USB-C connector is attached to the external power supply. The method further includes charging an internal normally open voltage regulator based on the bus voltage to provide VAO. The method further includes simulating a disconnection from the external power supply via the pair of CC pins in response to detecting a fault condition of the USB-C cable, thereby eliminating the bus voltage on the VBUS pin. The method further includes simulating an attachment condition to the external power supply via the pair of CC pins when the internal normally open voltage regulator is depleted, thereby quickly starting the bus voltage on the VBUS pin to charge the internal normally open voltage regulator.

[0012] Those skilled in the art will understand the scope of this disclosure and implement its additional aspects after reading the following preferred embodiments associated with the accompanying drawings. Attached Figure Description

[0013] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate several aspects of this disclosure and, together with embodiments, serve to explain the principles of this disclosure.

[0014] Figure 1 This is a schematic diagram providing an exemplary illustration of how a valid Universal Serial Bus Type-C (USB-C) cable connection between a USB-C source and a USB-C receiver can be detected;

[0015] Figure 2 This is a schematic diagram of an exemplary USB-C charging system, in which protection and control circuitry can be integrated into the power management integrated circuit (PMIC) to enable cable fault protection and fast battery startup when the power management integrated circuit (PMIC) is attached to an external power supply via a USB-C cable.

[0016] Figure 3 It is provided to configure according to embodiments of this disclosure. Figure 2 A schematic diagram illustrating an exemplary detailed illustration of a PMIC in a USB-C charging system.

[0017] Figure 4 It provides information about Figure 3 A graphic illustration illustrating how protection and control circuits in a PMIC can enable rapid battery startup in a PMIC.

[0018] Figure 5 It provides information about Figure 3 A graphic illustration illustrating how protection and control circuits in a PMIC can protect the PMIC from cable faults.

[0019] Figure 6 It is one of the services that can be provided. Figure 2 and 3 A schematic diagram of an exemplary communication device for a USB-C charging system; and

[0020] Figure 7 It is used in Figure 2 and 3 A flowchart illustrating an exemplary process for providing fast battery startup and cable fault protection in a USB-C charging system. Detailed Implementation

[0021] The embodiments described below illustrate the information necessary to enable those skilled in the art to practice the embodiments and demonstrate the best mode of practice. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and will appreciate the application of these concepts, which are not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0022] It will be understood that while terms such as first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish different elements. For example, a first element may be referred to as a second element without departing from the scope of this disclosure, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0023] It should be understood that when an element, such as a layer, region, or substrate, is referred to as "on another element" or "extending to another element," it may be directly located on or directly extended to the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly located on another element" or "directly extended to another element," no intermediate elements are present. Similarly, it should be understood that when an element, such as a layer, region, or substrate, is referred to as "on top of another element" or "extending over another element," it may be directly located on top of or directly extended over the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly located on top of another element" or "extending directly over another element," no intermediate elements are present. It will also be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected to or coupled to the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly connected" or "directly coupled" to another element, no intermediate elements are present.

[0024] For example, relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region as shown in the figures. It should be understood that these terms, and those discussed above, are intended to include different orientations of the device other than those depicted in the figures.

[0025] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a”, “an”, and “described” are also intended to include the plural forms. It should also be understood that, when used herein, the terms “comprises,” “comprising,” “includes,” and / or “including” specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0026] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will also be understood that the terms used herein shall be interpreted in a meaning consistent with that in the context of this specification and relevant precedents, and shall not be construed in an idealized or overly formal sense unless expressly defined herein.

[0027] This document describes embodiments with reference to cable fault protection and fast battery start-up in electronic devices. When the electronic device is attached to an external power supply via a Universal Serial Bus Type-C (USB-C) cable, it is important to protect the electronic device from damage due to cable faults (e.g., overcurrent, overheating, and / or defective cables). Additionally, when the battery in the electronic device is completely depleted, it is necessary to quickly initiate recharging of the depleted battery upon attachment to the USB-C cable. In this regard, a power management integrated circuit (PMIC) is incorporated into the electronic device and configured according to the USB-C standard to protect the electronic device from cable faults and quickly initiate recharging of the depleted battery. Compared to using discrete solutions, integrating cable fault protection and fast battery start-up functionality into the PMIC can potentially reduce the cost and footprint of the PMIC, thereby making it suitable for miniaturized electronic devices.

[0028] Figure 2This is a schematic diagram of an exemplary USB-C charging system 16, in which protection circuitry 18 and control circuitry 20 can be integrated into PMIC 22 to provide cable fault protection and fast battery startup when PMIC 22 is attached to an external power supply 24 via USB-C cable 26. PMIC 22 is attached to external power supply 24 (e.g., a wall charger, portable power bank, etc.) via USB-C connector 28. USB-C connector 28 contains all the physical pins defined in USB-C Cable and Connector Specification (hereinafter referred to as the “USB-C Specification”) Version 2.0. Of all the physical pins in USB-C connector 28, only the configuration channel (CC) pin pair (labeled CC1, CC2) and the bus voltage pin VBUS are shown herein. All other pins in USB-C connector 28 are omitted for simplicity.

[0029] According to the USB-C specification, PMIC 22 will maintain the corresponding unterminated voltage V on the pair of CC pins CC1 and CC2 before the USB-C connector 28 is attached to the external power supply 24. CC1 V CC2 When the USB-C connector 28 is attached to an external power supply 24, the PMIC 22 will pull down the unterminated voltage V. CC1 V CC2 At least one of these enables the external power supply 24 to detect the attachment of the PMIC 22 and assert the bus voltage V on the bus voltage pin VBUS. BUS Therefore, the battery charging circuit 30 can be based on the bus voltage V. BUS Generate charging current I CHG This allows battery 32 to be charged to battery voltage V. BAT The PMIC 22 may also include an internal normally open voltage regulator 34, which may be a low-dropout (LDO) regulator. The internal normally open voltage regulator 34 may be based on the bus voltage V. BUS A normally open voltage (VAO) is generated to power the PMIC 22 for normal operation. When the PMIC 22 is disconnected from the external power supply 24, the voltage on the pair of CC pins CC1 and CC2 will return to the unterminated voltage V. CC1 V CC2 Therefore, the external power supply can detect the disconnection of PMIC 22 and eliminate the bus voltage V. BUS .

[0030] As described in detail below, PMIC 22 can be configured to increase voltage V in response to the detection of cable fault conditions (e.g., overcurrent, overheating, defective cable, etc.). CC1 V CC2This allows the external power supply 24 to eliminate the bus voltage V. BUS This simulates a disconnection situation without physically disconnecting PMIC 22 from external power supply 24. In the event that battery 32 is completely depleted, PMIC 22 can operate based on the corresponding voltages on a pair of CC pins CC1 and CC2, pulled down by voltage V. CC1 V CC2 This is to simulate the attachment condition. Therefore, the external power supply 24 will assert the bus voltage V on the bus voltage pin VBUS. BUS This allows the battery charging circuit 30 to recharge the completely depleted battery 32 to provide the normally open voltage VAO.

[0031] In one embodiment, a negative temperature coefficient (NTC) thermistor 36 (e.g., 10 KΩ, 3380K) is disposed near the USB-C connector 28 to generate an NTC voltage V. NTC In this paper, the NTC voltage V NTC The NTC voltage V is negatively correlated with the temperature of the USB-C connector 28. As the temperature of the USB-C connector 28 increases, the NTC voltage V... NTC This will decrease. In contrast, when the temperature of the USB-C connector 28 decreases, the NTC voltage V... NTC It will rise.

[0032] The protection circuit 18 can be activated by the battery charging circuit 30 based on the start signal VAO_OK. Once activated, the protection circuit 18 is configured based on the NTC voltage V. NTC The protection circuit 18 determines whether the USB-C connector 28 and / or USB-C cable 26 are defective. If the protection circuit 18 determines that the USB-C connector 28 and / or USB-C cable 26 are defective, the protection circuit 18 provides a fault correction signal CC_PLDWN to the control circuit 20. Therefore, the control circuit 20 will apply a voltage V to one or more of the pair of CC pins CC1 and CC2. CC1 V CC2 To simulate a disconnection situation. In response, external power supply 24 will eliminate the bus voltage V. BUS This is to protect PMIC 22.

[0033] It is worth noting that under normal operating conditions, the control circuit 20 is also powered by the normally open voltage VAO. However, when the battery 32 is completely depleted, the control circuit 20 may no longer be able to operate based on the normally open voltage VAO. In this regard, the control circuit 20 can alternatively operate based on the voltage V on one or more of the pair of CC pins CC1 and CC2. CC1 V CC2 To perform the operation. Specifically, control circuit 20 can pull down voltage V.CC1 V CC2 One or more of these are used to simulate the attachment condition. Therefore, the external power supply 24 will assert the bus voltage V on the bus voltage pin VBUS. BUS This allows the battery charging circuit 30 to recharge the completely depleted battery 32.

[0034] Figure 3 It is provided to configure according to embodiments of this disclosure. Figure 2 A schematic diagram of an exemplary detailed illustration of PMIC 22. Figure 2 and 3 The common elements between them are shown in the document with common element designations and will not be described again here.

[0035] In this document, the battery charging circuit 30 includes a charging circuit 38 coupled to the bus voltage pin VBUS. When the external power supply 24 asserts the bus voltage V on the bus voltage pin VBUS... BUS At that time, the charging circuit 38 is based on the bus voltage V BUS Generate charging current I CHG This allows the battery 32 to be charged. The internal normally open voltage regulator 34 is also controlled by the bus voltage V. BUS Charging is performed to provide the normally open voltage VAO. In this regard, when the bus voltage V... BUS When present on the bus voltage pin VBUS, both battery 32 and internal normally open voltage regulator 34 will be charged.

[0036] Protection circuit 18 is coupled to NTC thermistor 36 via NTC pin 40 in PMIC 22. Protection circuit 18 includes an internal current source 42 powered by an internal normally open voltage VAO. Internal current source 42 is coupled to fault detection circuit 44 via switch SW. In this respect, fault detection circuit 44 can be activated by closing switch SW when the internal normally open voltage VAO is present, or deactivated by opening switch SW when the internal normally open voltage VAO is absent.

[0037] The fault detection circuit 44 includes a fault detection comparator 46. The fault detection comparator 46 is coupled to the NTC pin 40 to receive the NTC voltage V. NTC And the NTC voltage V NTC Compare with the detection threshold TMP_REF. When the NTC voltage V... NTC Below the detection threshold TMP_REF(V) NTCWhen < TMP_REF), the fault detection comparator 46 generates a fault indication USB_FAULT and provides it to the fault detection AND gate 48. The fault detection AND gate 48 then provides the fault correction signal CC_PLDWN to the control circuit 20. It is worth noting that the fault detection AND gate 48 only generates the fault correction signal CC_PLDWN when the fault detection circuit 44 is activated in the presence of the normally open voltage VAO.

[0038] Protection circuit 18 also includes a pair of CC comparators 50 and 52, each CC comparator being coupled to a corresponding CC pin in a pair of CC pins CC1 and CC2. Each of the CC comparators 50 and 52 converts the voltage V... CC1 V CC2 A corresponding voltage is compared with a detection threshold DET_TH to determine whether the USB-C connector 28 is attached to the external power supply 24. The OR gate 54 is configured to... CC1 V CC2 A CC detection indicator CC_DET is generated when any one of the values ​​in the table exceeds the detection threshold DET_TH.

[0039] Protection circuit 18 also includes a protection control comparator 56 that generates a protection enable signal TMP_PRO when both the CC detection indicator CC_DET and the start signal VAO_OK (which indicates the presence of a normally open voltage VAO) are present. The protection enable signal TMP_PRO closes switch SW, thereby activating fault detection circuit 44. In one embodiment, internal normally open voltage regulator 34 asserts the start signal VAO_OK only when the normally open voltage VAO is above a certain voltage level. Therefore, when battery 32 is completely depleted, fault detection circuit 44 and thus protection circuit 18 will not be activated.

[0040] The control circuit 20 includes a pair of resistors R respectively coupled to a pair of CC pins CC1 and CC2. A R B (For example, 5.1 kΩ). The control circuit 20 also includes a first transistor 58, a second transistor 60, a third transistor 62, and a fourth transistor 64. The first transistor 58 and the second transistor 60 are coupled in parallel to a resistor R. A Between and ground (GND), while the third transistor 62 and the fourth transistor 64 are coupled in parallel to resistor R. B Between GND and GND.

[0041] The control circuit 20 also includes a first inverter U1, a second inverter U2, a third inverter U3, and a fourth inverter U4. The first inverter U1 is coupled between the second transistor 60 and the resistor R1, the second inverter U2 is coupled between the fourth transistor 64 and the resistor R1, the third inverter U3 is coupled between the first transistor 58 and the resistor R1, and the fourth inverter U4 is coupled between the third transistor 62 and the resistor R1.

[0042] In one embodiment, resistor R1 is coupled to GND to ensure that the default state of the fault correction signal CC_PLDWN remains low, such that when battery 32 is completely depleted and the rest of PMIC 22 is de-energized, the first inverter U1 and the second inverter U2 can respectively turn on the second transistor 60 and the fourth transistor 64. Specifically, when the second transistor 60 is turned on by the first inverter U1, resistor R1... A It will be coupled to GND to reduce the voltage V. CC1 Similarly, when the fourth transistor 64 is turned on by the second inverter U2, resistor R... B It will be coupled to GND to reduce the voltage V. CC2 As mentioned earlier, by pulling down the voltage V on the pair of CC pins CC1 and CC2... CC1 V CC2 It is possible to simulate the attachment condition, thereby enabling the external power supply 24 to assert the bus voltage V. BUS To recharge battery 32.

[0043] Figure 4 It provides information about Figure 3 The diagram illustrates an exemplary illustration of how the protection circuit 18 and control circuit 20 in the PMIC 22 can enable rapid battery startup operation. Figure 3 and 4 Common elements between them are shown here by reference numerals in the accompanying drawings and will not be described again herein.

[0044] Before time T1, PMIC 22 was not yet attached to external power supply 24, but battery 32 was completely depleted. At time T1, PMIC 22 was attached to external power supply 24 via USB-C cable 26 and USB-C connector 28. Therefore, the voltage V on the pair of CC pins CC1 and CC2... CC1 V CC2 All remain high at the unterminated level. At time T2 (T2>T1), the control circuit 20 pulls down the voltage V. CC1 V CC2 To simulate the attached condition. Therefore, at time T3 (T3 ≥ T2), the bus voltage V on the external power supply 24 asserts the voltage supply pin VBUS. BUSSubsequently, at time T4 (T4 > T3), the internal normally open voltage regulator 34 is fully charged to the normally open voltage VAO and generates a start signal VAO_OK. Next, the protection control comparator 56 generates a protection enable signal TMP_PRO at time T5 (T5 > T4) to activate the protection circuit 18. The fault correction signal CC_PLDWN remains low until the protection circuit 18 detects a cable fault.

[0045] Return to reference Figure 3 The third inverter U3 and the fourth inverter U4 are each powered by a normally open voltage VAO. In this respect, when the battery U32 is completely depleted, the third inverter U3 and the fourth inverter U4 will not operate. When the internal normally open voltage regulator 34 is fully charged to provide the normally open voltage VAO, the third inverter U3 and the fourth inverter U4 will operate together with the protection circuit 18. Therefore, when the fault detection circuit 44 asserts the fault correction signal CC_PLDWN, the third inverter U3 and the fourth inverter U4 will disconnect the first transistor 58 and the third transistor 62. Therefore, resistor R... A R B It will become float, thereby pulling up the voltage V. CC1 V CC2 This is to simulate escaping the situation.

[0046] Figure 5 It provides information about Figure 3 A graphic illustration of an exemplary diagram showing how the protection circuit 18 and control circuit 20 in the PMIC 22 can protect the PMIC from cable faults. Figure 3 and 5 Common elements between them are indicated by common element designations and will not be described again in this document.

[0047] At time T1, protection circuit 18 is activated to monitor NTC voltage V. NTC At time T2 (T2≥T1), the NTC voltage V NTC The voltage drops below the detection threshold TMP_REF. Therefore, at time T3 (T3 ≥ T2), the fault detection comparator 46 will generate a fault indication USB_FAULT, thereby causing the fault detection logic AND gate 48 to assert the fault correction signal CC_PLDWN. Consequently, the third inverter U3 and the fourth inverter U4 will disconnect the first transistor 58 and the third transistor 62 respectively, to raise the voltage V on the pair of CC pins CC1 and CC2. CC1 V CC2 This allows the external power supply 24 to eliminate the bus voltage V on the bus voltage pin VBUS. BUS At time T4 (T4 > T3), the NTC voltage V NTCThe voltage rises above the detection threshold TMP_REF. Therefore, the fault indicator USB_FAULT goes low, thus deasserting the fault correction signal CC_PLDWN. The third inverter U3 and the fourth inverter U4 then close the first transistor 58 and the third transistor 62 respectively, pulling down the voltage V on the pair of CC pins CC1 and CC2. CC1 V CC2 This allows the external power supply 24 to re-assert the bus voltage V on the bus voltage pin VBUS. BUS .

[0048] Figure 2 and 3 The USB-C charging system 16 can be incorporated into the communication device to support the above embodiments. In this regard, Figure 6 It is one of the services that can be provided. Figure 2 and 3 A schematic diagram of an exemplary communication device 100 of a USB-C charging system 16.

[0049] In this document, communication device 100 can be any type of communication device, such as a mobile terminal, smartwatch, tablet computer, computer, navigation device, access point, base station (e.g., eNB, gNB, etc.), and similar wireless communication devices that support wireless communication (e.g., cellular, wireless local area network (WLAN), ultra-wideband (UWB), Bluetooth, and near-field communication). Communication device 100 will typically include a control system 102, a baseband processor 104, a transmission circuit system 106, a receiving circuit system 108, an antenna switching circuit system 110, multiple antennas 112, and a user interface circuit system 114. In a non-limiting example, as an example, the control system 102 can be a field-programmable gate array (FPGA). In this respect, the control system 102 can at least include a microprocessor, embedded memory circuitry, and a communication bus interface. The receiving circuit system 108 receives radio frequency signals from one or more base stations via antennas 112 and through the antenna switching circuit system 110. Low-noise amplifiers and filters cooperate to amplify and eliminate broadband interference from the received signals for processing. Then, a down-conversion and digitization circuitry system (not shown) down-converts the filtered received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using an analog-to-digital converter (ADC).

[0050] The baseband processor 104 processes the digitized received signal to extract the information or data bits transmitted in the received signal. This processing typically includes demodulation, decoding, and error correction operations, which will be discussed in more detail below. The baseband processor 104 is typically implemented in one or more digital signal processors (DSPs) and application-specific integrated circuits (ASICs).

[0051] For transmission, baseband processor 104 receives digitized data representing voice, data, or control information from control system 102, and encodes the digitized data for transmission. The encoded data is output to transmission circuitry 106, where a digital-to-analog converter (DAC) converts the digitized data into an analog signal, and a modulator modulates the analog signal onto a carrier signal at one or more desired transmission frequencies. A power amplifier amplifies the modulated carrier signal to a level suitable for transmission, and the modulated carrier signal is transmitted to antenna 112 via antenna switching circuitry 110. Multiple antennas 112, along with repeated transmission circuitry 106 and receiver circuitry 108, can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0052] In one embodiment, Figure 2 and 3 The USB-C charging system 16 can operate according to a process. In this regard, Figure 7 It is used in Figure 2 and 3 A flowchart of an exemplary process 200 for implementing cable fault protection and fast battery startup in a USB-C charging system 16.

[0053] In this document, process 200 includes indicating, via a pair of CC pins CC1, CC2 in the USB-C connector 28, whether the USB-C connector 28 is attached to an external power supply 24 via a USB-C cable 26 (step 202). Process 200 also includes receiving a bus voltage V from the external power supply 24 via a VBUS pin in the USB-C connector 28 when the pair of CC pins CC1, CC2 indicates that the USB-C connector 28 is attached to the external power supply 24. BUS (Step 204). Process 200 also includes steps based on bus voltage V. BUS The internal normally open voltage regulator 34 is charged to provide the normally open voltage VAO (step 206). Process 200 also includes simulating a disconnection from the external power supply 24 via a pair of CC pins CC1, CC2 in response to a detected fault condition of the USB-C cable 26, thereby eliminating the bus voltage V on the VBUS pin. BUS (Step 208). Process 200 also includes simulating the attachment status of the external power supply 24 via a pair of CC pins CC1, CC2 when the internal normally open voltage regulator 34 is depleted, thereby quickly starting the bus voltage V on the VBUS pin. BUS To charge the internal normally open voltage regulator 34 (step 210).

[0054] Those skilled in the art will recognize improvements and modifications to the preferred embodiments of this disclosure. All such improvements and modifications are considered to be within the scope of the concepts disclosed herein and the claims below.

Claims

1. A universal serial bus Type-C (USB-C) charging system, comprising: The USB-C connector includes: A pair of configuration channel (CC) pins configured to indicate whether the USB-C connector is attached to an external power supply via a USB-C cable; and A bus voltage (VBUS) pin is configured to receive a bus voltage from an external power supply when the pair of CC pins indicate that the USB-C connector is attached to the external power supply; and Power management integrated circuit (PMIC) coupled to the USB-C connector and including: A battery charging circuit, coupled to the VBUS pin, is configured to charge an internal normally open voltage regulator based on the bus voltage to provide a normally open voltage (VAO); and The control circuit, coupled to the pair of CC pins, is configured to: In response to the detection of a fault condition in the USB-C cable, a disconnection from the external power supply is simulated via the pair of CC pins to eliminate the bus voltage on the VBUS pin; and When the internal normally open voltage regulator is depleted, the connection status of the external power supply is simulated via the pair of CC pins to quickly activate the bus voltage on the VBUS pin to charge the internal normally open voltage regulator.

2. The USB-C charging system of claim 1, wherein the control circuit is further configured to simulate the disconnection condition under the fault condition without requiring the USB-C connector to be physically disconnected from the external power supply.

3. The USB-C charging system of claim 1, wherein the control circuit is further configured to pull up the corresponding voltage on each of the pair of CC pins in the fault condition to simulate the disconnection condition from the external power supply.

4. The USB-C charging system of claim 1, wherein the control circuit is further configured to pull down the corresponding voltage on each of the pair of CC pins when the internal normally open voltage regulator is depleted, thereby simulating the attachment condition of the external power supply.

5. The USB-C charging system of claim 4, wherein the control circuit is further configured to operate based on the corresponding voltage on each of the pair of CC pins when the internal normally open voltage regulator is depleted.

6. The USB-C charging system of claim 1, wherein the PMIC further comprises a protection circuit coupled to the battery charging circuit and the control circuit, the protection circuit being configured to detect the fault condition of the USB-C cable and to provide a fault correction signal to the control circuit in response to detecting the fault condition.

7. The USB-C charging system of claim 6, wherein the protection circuit is activated when the USB-C connector is attached to the external power supply and the normally open voltage (VAO) is higher than a reference threshold.

8. The USB-C charging system of claim 6, wherein the protection circuit is further configured to: Receives negative temperature coefficient (NTC) voltage from an NTC thermistor located near the USB-C connector; and When the NTC voltage is lower than the detection threshold, the fault correction signal is provided to the control circuit.

9. An electronic device including a Universal Serial Bus Type-C (USB-C) charging system, said USB-C charging system comprising: The USB-C connector includes: A pair of configuration channel (CC) pins configured to indicate whether the USB-C connector is attached to an external power supply via a USB-C cable; and A bus voltage (VBUS) pin is configured to receive a bus voltage from an external power supply when the pair of CC pins indicate that the USB-C connector is attached to the external power supply; and Power management integrated circuit (PMIC) coupled to the USB-C connector and including: A battery charging circuit, coupled to the VBUS pin, is configured to charge an internal normally open voltage regulator based on the bus voltage to provide a normally open voltage (VAO); and The control circuit, coupled to the pair of CC pins, is configured to: In response to the detection of a fault condition in the USB-C cable, a disconnection from the external power supply is simulated via the pair of CC pins to eliminate the bus voltage on the VBUS pin; and When the internal normally open voltage regulator is depleted, the connection status of the external power supply is simulated via the pair of CC pins to quickly activate the bus voltage on the VBUS pin to charge the internal normally open voltage regulator.

10. The electronic device of claim 9, wherein the control circuitry is further configured to simulate the disconnection condition under the fault condition without requiring the USB-C connector to be physically disconnected from the external power supply.

11. The electronic device of claim 9, wherein the control circuit is further configured to pull up a corresponding voltage on each of the pair of CC pins in the fault condition to simulate the disconnection condition from the external power supply.

12. The electronic device of claim 9, wherein the control circuitry is further configured to pull down the corresponding voltage on each of the pair of CC pins when the internal normally open voltage regulator is depleted, thereby simulating the attachment condition of the external power supply.

13. The electronic device of claim 12, wherein the control circuitry is further configured to operate based on the respective voltage on each of the pair of CC pins when the internal normally open voltage regulator is depleted.

14. The electronic device of claim 9, wherein the PMIC further comprises a protection circuit coupled to the battery charging circuit and the control circuit, the protection circuit being configured to detect the fault condition of the USB-C cable and, in response to detecting the fault condition, provide a fault correction signal to the control circuit.

15. The electronic device of claim 14, wherein the protection circuit is activated when the USB-C connector is attached to the external power supply and the normally open voltage (VAO) is higher than a reference threshold.

16. The electronic device of claim 14, wherein the protection circuit is further configured to: Receives negative temperature coefficient (NTC) voltage from an NTC thermistor located near the USB-C connector; and When the NTC voltage is lower than the detection threshold, the fault correction signal is provided to the control circuit.

17. A method for implementing cable fault protection and fast battery start-up in a Universal Serial Bus Type-C (USB-C) charging system, comprising: A pair of configuration channel (CC) pins in the USB-C connector indicate whether the USB-C connector is attached to an external power supply via a USB-C cable; When the pair of CC pins indicate that the USB-C connector is attached to the external power supply, the bus voltage is received from the external power supply via the bus voltage (VBUS) pin in the USB-C connector; The internal normally open voltage regulator is charged based on the bus voltage to provide a normally open voltage (VAO). In response to the detection of a fault condition in the USB-C cable, a disconnection from the external power supply is simulated via the pair of CC pins to eliminate the bus voltage on the VBUS pin; as well as When the internal normally open voltage regulator is depleted, the connection status of the external power supply is simulated via the pair of CC pins to quickly activate the bus voltage on the VBUS pin to charge the internal normally open voltage regulator.

18. The method of claim 17, further comprising, under the fault condition, pulling up the corresponding voltage on each of the pair of CC pins to simulate the disconnection condition from the external power supply.

19. The method of claim 17, further comprising pulling down the corresponding voltage on each of the pair of CC pins when the internal normally open voltage regulator is depleted, thereby simulating the attachment condition of the external power supply.

20. The method of claim 17, further comprising: Receives negative temperature coefficient (NTC) voltage from an NTC thermistor placed near the USB-C connector; as well as When the NTC voltage is lower than the detection threshold, the fault condition is indicated.

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