Fast starting overtone crystal oscillator circuit, its starting method and high speed clock

Abstract

The application discloses a fast-vibration overtone crystal oscillation circuit, a vibration method thereof and a high-speed clock, and belongs to the field of electronic technology.The overtone crystal oscillation circuit comprises an overtone crystal, a temperature compensation current source module, a temperature compensation timing module, a ring-shaped temperature compensation frequency injection module and a negative resistance enhancement module.The temperature compensation current source module generates positive temperature current and negative temperature current.The temperature compensation timing module sets a first time and a second time based on the negative temperature current, and controls the connection time of the ring-shaped temperature compensation frequency injection module, the negative resistance enhancement module and the overtone crystal.The ring-shaped temperature compensation frequency injection module injects a target overtone frequency into the overtone crystal based on the positive temperature current.The negative resistance enhancement module enhances the oscillation current of the overtone crystal.The fast and reliable vibration of the overtone crystal is realized through the cooperation of the modules, the temperature adaptability and the oscillation stability of the circuit are improved, the defects of slow vibration and poor temperature adaptability of the existing overtone crystal oscillator are solved, and the electronic equipment with high requirements for starting speed and frequency stability is suitable.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to a fast-starting overtone crystal oscillator circuit. Background Technology

[0002] Crystal oscillators, with their excellent frequency stability and low phase noise characteristics, have become an indispensable clock source in various electronic systems, providing a precise timing reference for stable system operation. In electronic devices that need to operate at hundreds of megahertz or even higher frequencies, fundamental frequency high-frequency crystals suffer from problems such as excessively small physical size, complex manufacturing processes, and high costs. Therefore, overtone mode quartz crystal resonators, also known as overtone crystals, are widely used to achieve high-frequency oscillation output, effectively avoiding the shortcomings of fundamental frequency high-frequency crystals.

[0003] However, overtone crystal oscillators have more stringent start-up conditions than fundamental frequency crystal oscillators, and in practical applications, they generally suffer from slow start-up speed, poor temperature adaptability, and insufficient start-up reliability. Specifically, overtone crystals have a high equivalent dynamic resistance, limited excitation power, and multiple resonant orders, which makes the oscillation circuit prone to start-up delays or even failure to start normally. At the same time, changes in ambient temperature affect the stability of key parameters such as current and frequency in the oscillation circuit, further exacerbating the start-up difficulties and failing to meet the requirements of some electronic devices for rapid start-up and stable operation over a wide temperature range.

[0004] To achieve rapid and reliable oscillation of overtone crystals, existing technologies typically employ simple frequency injection or negative resistance enhancement methods to assist oscillation. However, these methods have significant limitations: they lack a temperature-adaptive current regulation mechanism, making it impossible to dynamically adjust relevant current parameters according to temperature changes, resulting in unstable oscillation performance during temperature fluctuations; they lack precise timing control methods, making it difficult to reasonably coordinate the working timing of frequency injection and negative resistance enhancement, thus hindering their synergistic effect to maximize the reduction of oscillation time; furthermore, the enhancement effect of existing negative resistance enhancement structures is limited, failing to rapidly increase the oscillation current of the overtone crystal and fundamentally solve the problem of slow oscillation. Summary of the Invention

[0005] The technical problem to be solved by this invention is the technical defects of existing overtone crystal oscillator circuits, such as slow start-up speed, poor temperature adaptability, and insufficient start-up reliability. Therefore, this invention provides an overtone crystal oscillator circuit with fast start-up speed.

[0006] A fast-start overtone crystal oscillator circuit includes an overtone crystal, a temperature-compensated current source module, a temperature-compensated timing module, a ring-shaped temperature-compensated frequency injection module, and a negative resistance enhancement module.

[0007] The temperature-compensated current source module is used to generate positive temperature current Itemp2 and negative temperature current Itemp1 based on temperature.

[0008] The temperature-compensated timing module is used to set a first time t1 and a second time t2 based on the negative temperature current Itemp1, and to control the connection between the ring temperature-compensated frequency injection module and the negative resistance enhancement module and the overtone crystal based on the first time t1 and the second time t2, respectively.

[0009] The ring-shaped temperature-compensated frequency injection module is used to form a target overtone frequency based on the positive temperature current Itemp2 and inject it into the overtone crystal;

[0010] The negative resistance enhancement module is used to enhance the oscillation current of the overtone crystal.

[0011] Furthermore, the temperature-compensated current source module includes a negative temperature current generation branch and a positive temperature current Itemp2 generation branch; the negative temperature current generation branch generates a negative temperature current Itemp1 output based on the first operational amplifier OP1 and the positive temperature resistor R1; the positive temperature current generation branch generates a positive temperature current Itemp2 output based on the second operational amplifier OP2 and the negative temperature resistor R2.

[0012] Furthermore, the temperature-compensated timing module includes a current input and mirror network, a capacitor array and adjustment network, and a signal triggering and output network;

[0013] The current input and mirror network are based on the charging current of the capacitor array and adjustment network formed by the negative temperature current Itemp1;

[0014] The capacitor array and tuning network include a capacitor array that can be connected to capacitors.

[0015] The signal triggering and output network outputs signals at the first time t1 and the second time t2 based on the charging state of the capacitor array and the tuning network.

[0016] Furthermore, the ring temperature-compensated frequency injection module includes a current bias and temperature compensation network, a three-stage ring inverter oscillator chain, a tuning capacitor array, and an output buffer and drive.

[0017] The current bias and temperature compensation network provides bias current to the three-stage ring inverter oscillator chain based on the positive temperature current Itemp2;

[0018] The three-stage ring inverter oscillation chain includes a three-stage inverter structure;

[0019] The adjustment capacitor array is used to adjust the load capacitance of each inverter stage.

[0020] The output buffer and drive are used to enhance the driving capability of the ring oscillator output signal.

[0021] Furthermore, the negative resistance enhancement module includes a port and switch control unit, a coupling capacitor network, and a core negative resistance generation unit;

[0022] The port and switch control unit is used to control the input and output connections between the negative resistance enhancement module and the overtone crystal;

[0023] The coupling capacitor network is used to couple the AC oscillation signal at both ends of the overtone crystal to the input and output terminals of the inverter;

[0024] The core negative resistance generation unit is used to invert and amplify the input signal.

[0025] Furthermore, it also includes a Pierce oscillator connected to the overtone crystal, comprising a core inverting amplifier unit, a feedback bias network, and a load capacitor tuning array;

[0026] The core inverting amplifier unit forms an inverting amplifier and provides gain;

[0027] The feedback bias network is used to provide DC negative feedback, biasing the DC operating point of the inverting amplifier in the subthreshold region, so that it operates in a linear amplification state.

[0028] The load capacitance adjustment array is used to adjust the load capacitance of the overtone crystal.

[0029] Furthermore, it also includes a fundamental frequency suppression module, which is connected to the overtone crystal and includes a coupling and frequency selection network, a core amplification unit, and a negative feedback suppression loop;

[0030] The coupling and frequency selection network is used to provide frequency selection for negative feedback suppression;

[0031] The core amplification unit is used to amplify the frequency-selected signal;

[0032] The negative feedback suppression loop is used to achieve negative feedback suppression.

[0033] A method for starting an overtone crystal oscillator circuit, based on the aforementioned overtone crystal oscillator circuit, includes the following steps:

[0034] At the start of oscillation, the ring temperature-compensated frequency injection module is connected to the overtone crystal and injects the target overtone frequency;

[0035] At the first moment t1, the annular temperature-compensated frequency injection module is disconnected from the overtone crystal, and the negative resistance enhancement module is connected to the overtone crystal to enhance the oscillation current of the overtone crystal.

[0036] At the second time t2, the negative resistance enhancement module is disconnected from the overtone crystal.

[0037] Furthermore, it also includes the following steps:

[0038] The temperature-compensated current source module generates a positive temperature current Itemp2 and a negative temperature current Itemp1. The positive temperature current Itemp2 increases with increasing temperature, and the negative temperature current Itemp1 decreases with increasing temperature.

[0039] The ring-shaped temperature-compensated frequency injection module adjusts the output frequency based on the positive temperature current Itemp2. ​​The larger the positive temperature current Itemp2, the higher the output frequency.

[0040] The temperature compensation timing module adjusts the first time t1 and the second time t2 based on the negative temperature current Itemp1. The larger the negative temperature current Itemp1, the earlier the first time t1 and the second time t2 are output.

[0041] A high-speed clock includes a crystal oscillator circuit, a clock shaping buffer, and a power supply decoupling circuit connected in sequence, wherein the structure of the crystal oscillator circuit is as described above.

[0042] Beneficial Effects: The overtone crystal oscillator circuit disclosed in this invention injects the target overtone frequency into the overtone crystal based on a positive temperature current through a ring temperature-compensated frequency injection module, providing precise initial excitation for the overtone crystal and quickly guiding it into the target overtone resonance state. Simultaneously, the negative resistance enhancement module amplifies the oscillation current of the overtone crystal, accelerating the amplitude increase of the oscillation signal and effectively solving the technical defect of slow start-up in existing overtone crystal oscillators. The temperature-compensated current source module generates positive and negative temperature currents, providing temperature-adaptive current support for the ring temperature-compensated frequency injection module and the temperature-compensated timing module, respectively. This allows the output frequency of the ring temperature-compensated frequency injection module to adapt to temperature changes, and the timing control of the temperature-compensated timing module to be dynamically adjusted with temperature. Combined with the precise control of the connection timing between the ring temperature-compensated frequency injection module, the negative resistance enhancement module, and the overtone crystal by the temperature-compensated timing module, interference between modules is avoided, ensuring reliable oscillation under different temperature environments and improving the circuit's environmental adaptability. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a schematic block diagram of the overall structure of the present invention;

[0045] Figure 2 This is a schematic diagram of the circuit structure of the temperature-compensated current source module of the present invention;

[0046] Figure 3 This is a schematic diagram of the temperature compensation timing module circuit structure of the present invention;

[0047] Figure 4 This is a schematic diagram of the circuit ring temperature-compensated frequency injection module structure of the present invention;

[0048] Figure 5 This is a schematic diagram of the negative resistance enhancement module circuit structure of the present invention;

[0049] Figure 6 This is a schematic diagram of the Pierce oscillator circuit structure of the present invention;

[0050] Figure 7 This is a schematic diagram of the fundamental frequency suppression module circuit structure of the present invention. Detailed Implementation

[0051] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, the specific embodiments of this application are described in detail below with reference to the accompanying drawings. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0052] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0053] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0054] Reference Figure 1As shown, this embodiment provides a fast-start overtone crystal oscillator circuit, including an overtone crystal, a temperature-compensated current source module, a temperature-compensated timing module, a ring temperature-compensated frequency injection module, and a negative resistance enhancement module.

[0055] The temperature-compensated current source module is used to generate positive temperature current Itemp2 and negative temperature current Itemp1 based on temperature.

[0056] The temperature-compensated timing module is used to set a first time t1 and a second time t2 based on the negative temperature current Itemp1, and to control the connection between the ring temperature-compensated frequency injection module and the negative resistance enhancement module and the overtone crystal based on the first time t1 and the second time t2, respectively.

[0057] The ring-shaped temperature-compensated frequency injection module is used to form a target overtone frequency based on the positive temperature current Itemp2 and inject it into the overtone crystal;

[0058] The negative resistance enhancement module is used to enhance the oscillation current of the overtone crystal.

[0059] Specifically, refer to Figure 2 As shown, the temperature-compensated current source module includes a negative temperature current generation branch and a positive temperature current generation branch; the negative temperature current generation branch generates a negative temperature current Itemp1 output based on the first operational amplifier OP1 and the positive temperature resistor R1; the positive temperature current generation branch generates a positive temperature current Itemp2 output based on the second operational amplifier OP2 and the negative temperature resistor R1.

[0060] The negative temperature current generating branch includes a first operational amplifier OP1, a positive temperature resistor R1, an NPN transistor, a first PMOS transistor PM1, a second PMOS transistor PM2, and a third PMOS transistor PM3. The sources of the first PMOS transistor PM1, the second PMOS transistor PM2, and the third PMOS transistor PM3 are connected to a power supply. The gates of the first PMOS transistor PM1 and the second PMOS transistor PM2 are shorted and connected to the output terminal of the first operational amplifier OP1. The non-inverting input terminal of the first operational amplifier OP1 is connected to the drain of the first PMOS transistor PM1, the base of the NPN transistor, and the first terminal of the positive temperature resistor R1, while the inverting input terminal is connected to the drain of the second PMOS transistor PM2 and the collector of the NPN transistor. The emitter of the NPN transistor and the second terminal of the positive temperature resistor R1 are both grounded. The gate of the third PMOS transistor PM3 is shorted to the gates of the first PMOS transistor PM1 and the second PMOS transistor PM2, and its drain serves as the output terminal of the negative temperature current Itemp1.

[0061] The first operational amplifier OP1 forces the voltages at the non-inverting and inverting inputs to be equal through negative feedback, causing the Vbe voltage of the NPN transistor and the voltage drop across the positive temperature resistor R1 to form a temperature-dependent current. This current decreases as the temperature increases, and after being mirrored by the third PMOS transistor PM3, it forms a negative temperature coefficient current Itemp1.

[0062] The positive temperature current generating branch includes a second operational amplifier OP2, a negative temperature resistor R2, a first PNP transistor PNP1, a second PNP transistor PNP2, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, and a sixth PMOS transistor PM6; the sources of the fourth PMOS transistor PM4, the fifth PMOS transistor PM5, and the sixth PMOS transistor PM6 are all connected to a power supply; the gates of the fourth PMOS transistor PM4 and the fifth PMOS transistor PM5 are shorted and connected to the output terminal of the second operational amplifier OP2; the non-inverting input terminal of the second operational amplifier OP2 is connected to the drain of the fourth PMOS transistor PM4 and the first PMOS transistor PM6. The emitter and inverting input of PNP transistor PNP1 are connected to the drain of the fifth PMOS transistor PM5 and the emitter of the second PNP transistor PNP2; the bases of the first PNP transistor PNP1 and the second PNP transistor PNP2 are shorted; the collector of the first PNP transistor PNP1 is grounded, the collector of the second PNP transistor PNP2 is connected to the first end of the negative temperature resistor R2, and the first end of the negative temperature resistor R1 is grounded; the gate of the sixth PMOS transistor PM6 is shorted to the gates of the fourth PMOS transistor PM4 and the fifth PMOS transistor PM5, and its drain serves as the output terminal of the positive temperature current Itemp2.

[0063] The operational amplifier forces the voltages at the non-inverting and inverting inputs to be equal through negative feedback, causing the Vbe voltage of the PNP transistor and the voltage drop across the negative temperature resistor R2 to form a temperature-dependent current. This current increases with temperature and, after being mirrored by the sixth PMOS transistor PM6, forms the positive temperature coefficient current Itemp2.

[0064] The temperature-compensated current source module precisely generates two temperature-compensated currents that vary with temperature by combining positive and negative temperature resistors with transistors, operational amplifiers, and PMOS current mirrors. These currents are used to compensate for the frequency offset of the ring temperature-compensated frequency injection module and the time offset of the temperature-compensated timing module, thereby improving the start-up speed and stability of the overtone crystal oscillator at different temperatures.

[0065] The temperature-compensated current source module is used to generate the temperature-compensated current required by the ring temperature-compensated frequency injection module and the temperature-compensated timing module. As the temperature increases, the positive temperature resistor used in the ring temperature-compensated frequency injection module becomes larger, and the frequency decreases. Using a positive temperature current can increase the magnitude of the tail current of this module, thereby compensating for the current reduction caused by temperature. Due to the increase in temperature, even after compensation, the injection frequency will still decrease due to the temperature rise, and the internal electromobility of the device will decrease, reducing conductivity and lengthening the time required for crystal oscillation. Therefore, compared to t1 and t2 at room temperature, the acceleration time required at high temperature should be longer. So, using a negative temperature current to charge the capacitor will lengthen t1 and t2 as the temperature increases, potentially giving the crystal more acceleration time, but shortening the overall oscillation time.

[0066] Reference Figure 3 As shown, the temperature-compensated timing module includes a current input and mirror network, a capacitor array and adjustment network, and a signal triggering and output network;

[0067] The current input and mirror network are based on the charging current of the capacitor array and adjustment network formed by the negative temperature current Itemp1;

[0068] The capacitor array and tuning network include a capacitor array that can be connected to capacitors.

[0069] The signal triggering and output network outputs signals at the first time t1 and the second time t2 based on the charging state of the capacitor array and the tuning network.

[0070] The temperature-compensated timing module includes an eighth NMOS transistor NM8, a first NMOS transistor NM1, a seventh PMOS transistor PM7, an eighth PMOS transistor PM8, a ninth PMOS transistor PM9, an inverter INV1, a NOR gate, a first charging capacitor array, and a second charging current array.

[0071] The first charging capacitor array includes C11, C12, and C13. The first end of C11, C12, and C13 is connected to the drain of PM2, and the second end is grounded by NM2, NM3, and NM4 respectively, which is used to adjust the timing of t1.

[0072] The second charging current array includes C21, C22, and C23. The first terminal of C21, C22, and C23 is connected to the drain of PM3, and the second terminal is grounded by NM5, NM6, and NM7 respectively, which are used to adjust the timing of t2.

[0073] By controlling the on / off state of NM2–NM7, different numbers of capacitors can be connected to change the total capacitance value, thereby adjusting the durations of t1 and t2 and offsetting the effects of process fluctuations.

[0074] The drain of the eighth NMOS transistor NM8 is connected to the negative temperature current Itemp1 / Itemp2, its gate is shorted to the gate of the first NMOS transistor NM1, and its source is grounded. Together with the first NMOS transistor NM1, they form an NMOS current mirror, replicating the negative temperature current Itemp1 to the drain of the first NMOS transistor NM1. The sources of the seventh PMOS transistor PM7, the eighth PMOS transistor PM8, and the ninth PMOS transistor PM9 are all connected to the power supply, and their gates are shorted. The drain of the seventh PMOS transistor PM7 is connected to the drain of the first NMOS transistor NM1, forming a PMOS current mirror. This mirrors the current from the first NMOS transistor NM1 to the drains of the eighth PMOS transistor PM8 and the ninth PMOS transistor PM9, respectively, serving as the first and second charging capacitor arrays. Charging current; the first terminal of the first charging capacitor array is connected to the drain of the eighth PMOS transistor PM8, and the second terminal is used to adjust the timing of the first time t1; the first terminal of the second charging current array is connected to the drain of the ninth PMOS transistor PM9, and the second terminal is grounded, used to adjust the timing of the second time t2; the charging node of the first charging capacitor array is connected to the input terminal of the inverter INV1. When the charging voltage of the first charging capacitor array reaches the flip threshold of the inverter INV1, the inverter INV1 outputs the first time t1; the charging node of the second charging current array and the first time t1 are input to the NOR gate. When the first charging capacitor array is charged to the flip threshold of the NOR gate, the NOR gate outputs the timing signal t2.

[0075] Since the negative temperature current Itemp1 decreases as the temperature rises, the capacitor charging speed slows down as the temperature rises, and the durations t1 and t2 are automatically extended, thereby compensating for the problem of the crystal oscillation time becoming longer at high temperatures and ensuring a more stable overall oscillation process.

[0076] The timing duration of the temperature-compensated timing module can be adjusted by adjusting capacitors. These capacitors can extend or shorten the values ​​of t1 and t2 to offset the effects of process fluctuations. Temperature affects the driving capability and frequency accuracy of other modules, so a temperature-compensated current Itemp1 is used to inject charge into the timing capacitors to achieve a timing effect with temperature compensation.

[0077] Reference Figure 4 As shown, the ring temperature-compensated frequency injection module includes a current bias and temperature compensation network, a three-stage ring inverter oscillator chain, a tuning capacitor array, and an output buffer and drive.

[0078] The current bias and temperature compensation network provides bias current to the three-stage ring inverter oscillator chain based on the positive temperature current Itemp2;

[0079] The three-stage ring inverter oscillation chain includes a three-stage inverter structure;

[0080] The adjustment capacitor array is used to adjust the load capacitance of each inverter stage.

[0081] The output buffer and drive are used to enhance the driving capability of the ring oscillator output signal.

[0082] The ring-shaped temperature-compensated frequency injection module includes a tenth PMOS transistor PM10, an eleventh PMOS transistor PM11, a twelfth PMOS transistor PM12, a ninth NMOS transistor NM9, a tenth NMOS transistor NM10, an eleventh NMOS transistor NM11, a third coupling resistor R3, a fourth coupling resistor R4, a fifth coupling resistor R5, a buffer, and a second inverter INV.

[0083] The tenth PMOS transistor PM10 and the ninth NMOS transistor NM9 form the first-stage inverter; the eleventh PMOS transistor PM11 and the tenth NMOS transistor NM10 form the second-stage inverter; and the twelfth PMOS transistor PM12 and the eleventh NMOS transistor NM11 form the third-stage inverter.

[0084] The positive temperature current Itemp2 provides a larger tail current to the inverter through the current mirror, which speeds up the inverter's switching speed and compensates for the decrease in oscillation frequency caused by the increase in temperature, thus achieving temperature compensation of the frequency.

[0085] The output of the first-stage inverter is connected to the input of the second-stage inverter through the third coupling resistor R3. The output of the second stage is connected to the input of the third stage through the fourth coupling resistor R4. The output of the third stage is connected back to the input of the first stage through the feedback line via the fifth coupling resistor R5, forming a closed-loop ring oscillation structure. The superposition of the delays of the three-stage inverters forms the oscillation period of the ring oscillator. The oscillation frequency is determined by the delay of each stage inverter, which in turn is determined by the bias current, load capacitance, and coupling resistor.

[0086] Adjustment capacitors C31, C32, C33, C41, C42, C43, C51, C52, and C53, along with NMOS switches NM11–NM13, NM21–NM23, and NM31–NM33, form three adjustment capacitor groups, which are connected to the back end of the three-stage inverter. By controlling the on / off state of the NMOS switches, the load capacitance of each stage of the inverter is adjusted, thereby changing the delay and fine-tuning the output frequency of the ring oscillator to offset the impact of process variations on frequency accuracy.

[0087] The output of the third-stage inverter is connected to the input of the buffer, and the output of the buffer is connected to the input of the second inverter INV2. The outputs of the second inverter INV2 and the buffer are respectively connected to the two ends of the overtone crystal. The buffer and the second inverter INV2 are used to enhance the driving capability of the ring oscillator output signal, ensure that the signal injected into the overtone crystal is strong enough, and isolate the effect of the crystal load on the ring oscillator frequency.

[0088] Upon power-up, the ring-shaped temperature-compensated frequency injection module first injects the target frequency signal into the overtone crystal. At this time, the negative resistance enhancement module is disconnected, and the Pierce oscillator module is disabled to avoid interfering with the injection of the target frequency. The output frequency of this module is determined by the delay resistor and capacitor, and a trimming bit is also added to cope with process fluctuations. In addition, the module incorporates temperature compensation by using a current mirror structure constructed with temperature-sensitive current to provide a bias voltage that can compensate for frequency changes caused by temperature.

[0089] Reference Figure 5 As shown, the negative resistance enhancement module includes a port and switch control unit, a coupling capacitor network, and a core negative resistance generation unit;

[0090] The port and switch control unit is used to control the input and output connections between the negative resistance enhancement module and the overtone crystal;

[0091] The coupling capacitor network is used to couple the AC oscillation signal at both ends of the overtone crystal to the input and output terminals of the inverter;

[0092] The core negative resistance generating unit is used to invert and amplify the input signal, thereby providing negative resistance for the oscillation signal and accelerating the startup process.

[0093] The negative resistance enhancement module includes a first transmission gate TG1, a second transmission gate TG2, a first coupling capacitor C1, a second coupling capacitor C2, a thirteenth PMOS transistor PM13, and a twelfth NMOS transistor NM12;

[0094] One end of the first transmission gate TG1 is connected to the second terminal XI of the overtone crystal, and the other end is connected to the inverter input node through the first coupling capacitor C1; one end of the second transmission gate TG2 is connected to the first terminal XO of the overtone crystal, and the other end is connected to the inverter output node through the second coupling capacitor C2.

[0095] The first coupling capacitor C1 is connected in series between the output of the first transmission gate TG1 and the input of the inverter, and the second coupling capacitor C2 is connected in series between the output of the second transmission gate TG2 and the output of the inverter.

[0096] The inverter consists of a thirteenth PMOS transistor PM13 and a twelfth NMOS transistor NM12;

[0097] The source of the thirteenth PMOS transistor PM13 is connected to the power supply, and its drain is shorted to the drain of the twelfth NMOS transistor NM12, serving as the output node of the inverter; the source of the twelfth NMOS transistor NM12 is grounded.

[0098] The gates of the thirteenth PMOS transistor PM13 and the twelfth NMOS transistor NM12 are shorted to serve as the input node of the inverter.

[0099] Near the crystal's resonant frequency, the inverter amplifies the input signal in reverse phase, resulting in an output signal that is out of phase with the input signal and has increased amplitude. This inverting amplification characteristic is equivalent to a negative resistance, which can cancel out the crystal's equivalent series resistance, lower the oscillation threshold, and accelerate the increase in oscillation amplitude.

[0100] At time t1, the ring temperature-compensated frequency injection module disconnects from the overtone crystal, and the negative resistance enhancement module connects. After the frequency injection process into the overtone crystal is complete, the Pierce oscillator module is enabled and begins to excite and maintain the overtone frequency. Simultaneously, to accelerate this excitation process, the negative resistance enhancement module connects and amplifies the waveform on the crystal oscillator to reach a stable state as quickly as possible. At time t2, the negative resistance enhancement module disconnects, and the Pierce oscillator module maintains a stable output of the overtone frequency.

[0101] Reference Figure 6 As shown, it also includes a Pierce oscillator connected to the overtone crystal, which includes a core inverting amplifier unit, a feedback bias network, and a load capacitor tuning array.

[0102] The core inverting amplifier unit forms an inverting amplifier and provides gain;

[0103] The feedback bias network is used to provide DC negative feedback, biasing the DC operating point of the inverting amplifier in the subthreshold region, so that it operates in a linear amplification state; specifically, the inverting amplifier will be connected and operated after the crystal starts oscillating, and its AC equivalent circuit can generate a large negative resistance, thereby accelerating the oscillation process.

[0104] The load capacitance adjustment array is used to adjust the load capacitance of the overtone crystal.

[0105] The Pierce oscillator includes: the fourteenth PMOS transistor PM14, the thirteenth NMOS transistor NM13, the feedback resistor Rf, the sixth adjustment capacitor group, and the seventh adjustment capacitor group.

[0106] The source of the fourteenth PMOS transistor PM14 is connected to the power supply VDD, the gate is controlled by the bias voltage Vb, and the drain is shorted to the drain of NM1, both connected to the first terminal XO of the overtone crystal. The fourteenth PMOS transistor PM14 and the thirteenth NMOS transistor NM13 form an inverting amplifier, providing the necessary gain for the oscillation circuit and satisfying the amplitude condition of the oscillation.

[0107] The source of the thirteenth NMOS transistor NM13 is grounded, and its gate is connected to the second terminal XI of the overtone crystal.

[0108] The feedback resistor Rf is connected in series between the second terminal XI of the overtone crystal and the first terminal XO of the overtone crystal; it provides DC negative feedback, biases the DC operating point of the inverter in the subthreshold region, so that it works in the linear amplification state, while ensuring the phase condition of the oscillation circuit.

[0109] The first terminal of the sixth tuning capacitor group C61 / C62 / C63 is connected to the second terminal XI of the overtone crystal, and the second terminal is grounded through NM41 / NM42 / NM43.

[0110] The first terminal of the seventh tuning capacitor group C71 / C72 / C73 is connected to the first terminal XO of the overtone crystal, and the second terminal is grounded through NM51 / NM52 / NM53.

[0111] By controlling the on / off state of the NMOS switch, the total load capacitance of the XI and XO nodes can be adjusted, thereby fine-tuning the output frequency of the crystal oscillator and offsetting the effects of process fluctuations and environmental changes on frequency accuracy.

[0112] Reference Figure 7 As shown, it also includes a fundamental frequency suppression module, which is connected to the overtone crystal and includes a coupling and frequency selection network, a core amplification unit, and a negative feedback suppression loop;

[0113] The coupling and frequency selection network is used to provide frequency selection for negative feedback suppression;

[0114] The core amplification unit is used to amplify the frequency-selected signal;

[0115] The negative feedback suppression loop is used to achieve negative feedback suppression.

[0116] Fourth coupling capacitor C4, third transmission gate TG3, fourth transmission gate TG4, fifth transmission gate TG5, eleventh resistor R11, twelfth resistor R12, thirteenth resistor R13, eighth adjustment capacitor group C11 / C12 / C13, sixth NMOS switch group NM11 / NM12 / NM13;

[0117] The first terminal XO of the overtone crystal is coupled to the input node of the module through the fourth coupling capacitor C4. This node is connected to three parallel branches: the third transmission gate TG3, the fourth transmission gate TG4, and the fifth transmission gate TG5 are connected in series with the eleventh resistor R11, the twelfth resistor R12, and the thirteenth resistor R13, respectively. The other end of each branch is connected to the gate of NM2 after they are combined.

[0118] The first end of the eighth adjustment capacitor group is connected to the gate of the fifteenth NMOS transistor NM15, and the second end is grounded by the sixth NMOS switch group, forming a capacitor array.

[0119] By controlling the conduction of TG3-TG5, different resistors R11-R13 are selected; by controlling the conduction of NM61-NM23, the connected capacitors C81-C83 are adjusted. Together, they form an RC frequency selection network, exhibiting different impedance characteristics for the fundamental frequency and the third overtone frequency, providing frequency selectivity for subsequent negative feedback suppression.

[0120] It also includes the fourteenth NMOS transistor NM14, the fifteenth NMOS transistor NM15, the fifteenth PMOS transistor PM15, the sixteenth PMOS transistor PM16, and the bias voltage Vb;

[0121] The gate of the fifteenth NMOS transistor NM15 is connected to the output of the frequency selection network, the source is grounded, and the drain is connected to the gate of the fourteenth NMOS transistor NM14.

[0122] The sources of the fifteenth PMOS transistor PM15 and the sixteenth PMOS transistor PM16 are connected to the power supply, and their gates are controlled by the bias voltage Vb, forming a PMOS current mirror. The drain of the fifteenth PMOS transistor PM15 is shorted to the drain of the fourteenth NMOS transistor NM14, and the drain of the sixteenth PMOS transistor PM16 serves as the output terminal of the current mirror.

[0123] NM15 serves as the input stage, amplifying the frequency-selected signal; NM14 and the PM15 / PM16 current mirrors constitute the second stage of amplification, providing gain for the oscillation circuit.

[0124] It also includes the sixteenth NMOS transistor NM16, the sixth resistor R6, and the third capacitor C3;

[0125] The gate of the sixteenth NMOS transistor NM16 is connected to the drain of the sixteenth PMOS transistor PM16, and the source is grounded. The drain is connected to the gate of the fourteenth NMOS transistor NM14 through the sixth resistor R6 and the third capacitor C3 connected in series, forming a negative feedback loop.

[0126] Since manufacturing process fluctuations can affect the parameters of the RC network, the module provides adjustment positions through TG3-TG5 and NM61-NM63. The combination of resistors and capacitors can be adjusted according to the actual situation to precisely adjust the frequency selection characteristics, ensuring that the fundamental frequency is effectively suppressed, while the oscillation conditions of the third overtone are not affected.

[0127] The signal output from the overtone crystal is coupled through C4 and then frequency-selected by the RC frequency selection network. The fundamental frequency signal is suppressed by deep negative feedback, while the third overtone signal obtains sufficient gain, thereby ensuring that the oscillator starts up first and works stably in the third overtone mode, avoiding oscillations in the fundamental frequency or other non-target orders.

[0128] This embodiment also provides a method for starting an overtone crystal oscillator circuit. Based on the above-mentioned overtone crystal oscillator circuit, the oscillation is started. During time t1, the ring temperature-compensated frequency injection module is connected to the crystal oscillator and injects the target overtone frequency. At time t1, the ring temperature-compensated frequency injection module is disconnected, and the negative resistance enhancement module is connected to the crystal oscillator. At this time, the injected oscillation current of the crystal oscillator is still relatively weak. The negative resistance enhancement module will accelerate the enhancement process of the oscillation current. At time t2, the negative resistance enhancement module is disconnected, and the overtone crystal oscillator has basically completed the start-up and is operating normally and outputting waveforms.

[0129] At the start of oscillation, the ring temperature-compensated frequency injection module is connected to the overtone crystal and injects the target overtone frequency;

[0130] At the first moment t1, the annular temperature-compensated frequency injection module is disconnected from the overtone crystal, and the negative resistance enhancement module is connected to the overtone crystal to enhance the oscillation current of the overtone crystal.

[0131] At the second time t2, the negative resistance enhancement module is disconnected from the overtone crystal.

[0132] The temperature-compensated current source module generates a positive temperature current Itemp2 and a negative temperature current Itemp1. The positive temperature current Itemp2 increases with increasing temperature, and the negative temperature current Itemp1 decreases with increasing temperature.

[0133] The ring-shaped temperature-compensated frequency injection module adjusts the output frequency based on the positive temperature current Itemp2. ​​The larger the positive temperature current Itemp2, the higher the output frequency.

[0134] The temperature compensation timing module adjusts the first time t1 and the second time t2 based on the negative temperature current Itemp1. The larger the negative temperature current Itemp1, the earlier the first time t1 and the second time t2 are output.

[0135] Regarding tuning bits, when the Pierce oscillator module requires frequency fine-tuning, the appropriate tuning bit should be turned on according to the requirements. The fundamental frequency suppression module needs to adjust the tuning bit number according to process fluctuations to accurately suppress the fundamental frequency. The ring temperature-compensated frequency injection module needs to adjust the tuning bits of the delay resistor and capacitor to output an injection signal closer to the target frequency and speed up crystal startup; however, if the startup time is sufficient, tuning may not be necessary.

[0136] Working Principle: After power-on, the ring temperature-compensated frequency injection module connects to the overtone crystal, the Pierce oscillator module and the fundamental frequency suppression module are disabled, the negative resistance enhancement module is disconnected, and the temperature-compensated timing module starts working normally and begins timing. The ring temperature-compensated frequency injection module can quickly start and inject a signal of the target frequency into the overtone crystal. After time t1, the temperature-compensated timing module outputs a switching signal of t1, the negative resistance enhancement module connects to the overtone crystal, the ring temperature-compensated frequency injection module is disconnected, the Pierce oscillator module and the fundamental frequency suppression module work normally, and the negative resistance enhancement module will accelerate the amplification rate of the signal on the overtone crystal, accelerating the startup process. After time t2, the negative resistance enhancement module is disconnected, the Pierce oscillator module and the fundamental frequency suppression module work normally, the overtone crystal oscillator completes startup, and can stably and normally output the overtone frequency.

[0137] This embodiment also provides a high-speed clock, including a crystal oscillator circuit, a clock shaping buffer, and a power supply decoupling circuit connected in sequence, the structure of which is as described above.

[0138] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0139] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A fast-start overtone crystal oscillator circuit, characterized in that, This includes an overtone crystal, a temperature-compensated current source module, a temperature-compensated timing module, a ring-shaped temperature-compensated frequency injection module, and a negative resistance enhancement module; The temperature-compensated current source module is used to generate positive and negative temperature currents based on temperature. The temperature-compensated timing module is used to set a first time and a second time based on the negative temperature current, and to control the connection between the ring temperature-compensated frequency injection module and the negative resistance enhancement module and the overtone crystal based on the first time and the second time, respectively. The ring-shaped temperature-compensated frequency injection module is used to form a target overtone frequency based on the positive temperature current and inject it into the overtone crystal; The negative resistance enhancement module is used to enhance the oscillation current of the overtone crystal; The temperature-compensated current source module includes a negative temperature current generating branch and a positive temperature current generating branch; the negative temperature current generating branch generates a negative temperature current output based on a first operational amplifier and a positive temperature resistor; the positive temperature current generating branch generates a positive temperature current output based on a second operational amplifier and a negative temperature resistor. The temperature compensation timing module includes a current input and mirror network, a capacitor array and adjustment network, and a signal triggering and output network. The current input and mirror network are based on the charging current of the capacitor array and the tuning network formed by the negative temperature current. The capacitor array and tuning network include a capacitor array that can be connected to capacitors. The signal triggering and output network outputs signals at the first time t1 and the second time t2 based on the charging state of the capacitor array and the tuning network. The ring temperature-compensated frequency injection module includes a current bias and temperature compensation network, a three-stage ring inverter oscillator chain, a trimming capacitor array, and an output buffer and driver. The current bias and temperature compensation network provides bias current to the three-stage ring inverter oscillator chain based on positive temperature current; The three-stage ring inverter oscillation chain includes a three-stage inverter structure; The adjustment capacitor array is used to adjust the load capacitance of each inverter stage. The output buffer and drive are used to enhance the driving capability of the ring oscillator output signal; The negative resistance enhancement module includes a port and switch control unit, a coupling capacitor network, and a core negative resistance generation unit. The port and switch control unit is used to control the input and output connections between the negative resistance enhancement module and the overtone crystal; The coupling capacitor network is used to couple the AC oscillation signal at both ends of the overtone crystal to the input and output terminals of the inverter; The core negative resistance generation unit is used to invert and amplify the input signal.

2. The fast-start overtone crystal oscillator circuit according to claim 1, characterized in that, It also includes a Pierce oscillator connected to the overtone crystal, comprising a core inverting amplifier unit, a feedback bias network, and a load capacitor tuning array; The core inverting amplifier unit forms an inverting amplifier and provides gain; The feedback bias network is used to provide DC negative feedback, biasing the DC operating point of the inverting amplifier in the subthreshold region, so that it operates in a linear amplification state. The load capacitance adjustment array is used to adjust the load capacitance of the overtone crystal.

3. The fast-start overtone crystal oscillator circuit according to claim 1, characterized in that, It also includes a fundamental frequency suppression module, which is connected to the overtone crystal and includes a coupling and frequency selection network, a core amplification unit, and a negative feedback suppression loop. The coupling and frequency selection network is used to provide frequency selection for negative feedback suppression; The core amplification unit is used to amplify the frequency-selected signal; The negative feedback suppression loop is used to achieve negative feedback suppression.

4. A method for starting an overtone crystal oscillator circuit, characterized in that, The oscillation is initiated based on the overtone crystal oscillator circuit according to any one of claims 1-3, comprising the following steps: At the start of oscillation, the ring temperature-compensated frequency injection module is connected to the overtone crystal and injects the target overtone frequency; At the first moment, the annular temperature-compensated frequency injection module is disconnected from the overtone crystal, and the negative resistance enhancement module is connected to the overtone crystal to enhance the oscillation current of the overtone crystal; At the second moment, the negative resistance enhancement module is disconnected from the overtone crystal.

5. The method for starting an overtone crystal oscillator circuit according to claim 4, characterized in that, It also includes the following steps: The temperature-compensated current source module generates a positive temperature current and a negative temperature current. The positive temperature current increases with increasing temperature, and the negative temperature current decreases with increasing temperature. The ring-shaped temperature-compensated frequency injection module adjusts the output frequency based on the positive temperature current; the larger the positive temperature current, the higher the output frequency. The temperature compensation timing module adjusts the first and second time points based on the negative temperature current. The larger the negative temperature current, the earlier the first and second time points are output.

6. A high-speed clock, comprising an overtone crystal oscillator circuit, a clock shaping buffer circuit, and a power supply decoupling circuit connected in sequence, characterized in that, The structure of the overtone crystal oscillator circuit is as described in any one of claims 1-3.

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