Crystalline silicon cell module, perovskite crystalline silicon laminated assembly and preparation method of perovskite crystalline silicon laminated assembly

Abstract

The invention provides a crystalline silicon cell module, a perovskite crystalline silicon laminated assembly and a preparation method thereof, and relates to the technical field of solar cells. The crystalline silicon battery module comprises a first crystalline silicon battery area, a second crystalline silicon battery area and a first junction box. The first crystalline silicon battery region comprises N first crystalline silicon battery packs which are connected in series; the second crystalline silicon battery area comprises M second crystalline silicon battery packs which are connected in series; the first junction box is provided with a first shell and a conductive part, the conductive part is arranged in the first shell, and the conductive part is used for electrically connecting the first crystalline silicon battery packs and the second crystalline silicon battery packs, so that the N first crystalline silicon battery packs connected in series are connected with the M second crystalline silicon battery packs connected in series. According to the crystalline silicon cell module, electrical connection of the plurality of crystalline silicon cell areas can be realized outside the crystalline silicon cell module, circuit welding point positions inside the crystalline silicon cell module can be reduced, damage caused by high-temperature welding can be avoided, and the electrical performance of the crystalline silicon cell module is more reliable.

Description

Technical Field

[0001] This application relates to the technical field of solar cells, and more specifically, to a crystalline silicon cell module, a perovskite-silicon tandem module, and a method for preparing the same. Background Technology

[0002] A perovskite-silicon tandem module consists of a top perovskite solar cell module and a bottom crystalline silicon solar cell module. Due to the characteristics of perovskite solar cell modules (high voltage, low current) and crystalline silicon solar cell modules (high current, low voltage), voltage matching between the two modules requires either step-down processing of the perovskite solar cell module or step-up processing of the crystalline silicon solar cell module.

[0003] Currently, the voltage reduction process for perovskite solar cell modules requires dividing the originally fully connected perovskite module into multiple smaller sub-cells using techniques such as laser scribing, and then connecting these sub-cells in parallel. However, the inventors of this application have discovered that this leads to a dramatic increase in the number of parallel sections. The large amount of conductive tape not only occupies the effective power generation area and reduces the light transmittance of the perovskite solar cell module, but also increases the difficulty and reliability risks of the lamination process due to the large amount of conductive tape. These problems become even more pronounced as the size of perovskite solar cell modules increases.

[0004] For boosting the voltage of crystalline silicon solar cell modules, some methods divide the module into multiple crystalline silicon cell regions, allowing a larger number of cells to be connected in series, thereby increasing the overall voltage of the module. However, the inventors of this application have also discovered that this boosting method requires connecting multiple crystalline silicon cell regions in series on the adhesive film layer using connecting wires (i.e., string welding). The high temperatures generated during the welding process can easily damage the crystalline silicon solar cell module, resulting in complex processes and low yield rates.

[0005] The content in the background section is merely technology known to the public and does not necessarily represent existing technology in this field. Summary of the Invention

[0006] This application provides a crystalline silicon solar cell module, a perovskite-crystalline silicon stacked module, and a method for preparing the same, aiming to solve at least one technical problem in the background art.

[0007] According to one aspect of this application, a crystalline silicon battery module is provided. The crystalline silicon battery module includes a first crystalline silicon battery region, a second crystalline silicon battery region, and a first junction box. The first crystalline silicon battery region includes N first crystalline silicon battery packs connected in series; the second crystalline silicon battery region includes M second crystalline silicon battery packs connected in series; the first junction box has a first housing and conductive components, the conductive components being disposed within the first housing, and the conductive components being used to electrically connect the first crystalline silicon battery packs and the second crystalline silicon battery packs, thereby connecting the N first crystalline silicon battery packs connected in series and the M second crystalline silicon battery packs connected in series.

[0008] According to some embodiments of this application, the crystalline silicon cell module further includes an encapsulation layer. The encapsulation layer is disposed on the first crystalline silicon cell region and the second crystalline silicon cell region, and the encapsulation layer has lead-through holes corresponding to the first junction box; wherein the first junction box is disposed on the encapsulation layer, and conductive components are electrically connected to the first crystalline silicon cell group and the second crystalline silicon cell group through the lead-through holes.

[0009] According to some embodiments of this application, N first crystalline silicon battery packs connected in series and M second crystalline silicon battery packs connected in series are connected in series.

[0010] According to some embodiments of this application, the first junction box further includes: a first bypass diode connected in parallel with a corresponding first crystalline silicon battery pack; and a second bypass diode connected in parallel with a corresponding second crystalline silicon battery pack; wherein the polarity of the second bypass diode is opposite to that of the first bypass diode.

[0011] According to some embodiments of this application, the silicon battery module further includes at least one second junction box, which electrically connects at least one first crystalline silicon battery pack and at least one second crystalline silicon battery pack. The second junction box includes: a third bypass diode connected in parallel with the corresponding first crystalline silicon battery pack; and a fourth bypass diode connected in parallel with the corresponding second crystalline silicon battery pack; wherein the polarities of the third bypass diode and the fourth bypass diode are opposite.

[0012] According to some embodiments of this application, the crystalline silicon battery module further includes a third junction box, which electrically connects at least one first crystalline silicon battery pack and at least one second crystalline silicon battery pack. The third junction box includes: a positive connection line for current output of the crystalline silicon battery module; a negative connection line for current return of the crystalline silicon battery module; a fifth bypass diode connected in parallel with the corresponding first crystalline silicon battery pack; and a sixth bypass diode connected in parallel with the corresponding second crystalline silicon battery pack. The fifth bypass diode and the sixth bypass diode have opposite polarities.

[0013] According to some embodiments of this application, the first junction box further includes: a first cover disposed on the first housing, and conductive components disposed in the accommodating cavity formed by the first cover and the first housing.

[0014] According to some embodiments of this application, the second junction box further includes: a second housing; a second cover disposed on the second housing; and a third bypass diode and a fourth bypass diode both disposed in the accommodating cavity formed by the second cover and the second housing.

[0015] According to some embodiments of this application, the third junction box further includes: a third housing; a third cover disposed on the third housing, and a fifth bypass diode and a sixth bypass diode both disposed in the accommodating cavity formed by the third cover and the third housing.

[0016] According to some embodiments of this application, a first crystalline silicon solar cell pack includes at least two first crystalline silicon solar cell strings connected in series, and each first crystalline silicon solar cell string includes at least two first crystalline silicon solar cells connected in series; a second crystalline silicon solar cell pack includes at least two second crystalline silicon solar cell strings connected in series, and each second crystalline silicon solar cell string includes at least two second crystalline silicon solar cells connected in series.

[0017] According to some embodiments of this application, the first crystalline silicon solar cell is a half-crystalline silicon solar cell; or, the first crystalline silicon solar cell is a quarter-crystalline silicon solar cell; and / or, the second crystalline silicon solar cell is a half-crystalline silicon solar cell; or, the second crystalline silicon solar cell is a quarter-crystalline silicon solar cell.

[0018] According to some embodiments of this application, the first junction box further includes: at least two first connection points, respectively disposed at both ends of the first bypass diode; and at least two second connection points, respectively disposed at both ends of the second bypass diode.

[0019] According to some embodiments of this application, the first junction box further includes: at least two first lead holes, respectively disposed on one side of at least two first connection points; and at least two second lead holes, respectively disposed on one side of at least two second connection points.

[0020] According to another aspect of this application, a perovskite-silicon tandem module is also provided, including a substrate, a perovskite cell module, and a crystalline silicon cell module as described above. The perovskite cell module is disposed on one side of the substrate; the crystalline silicon cell module is disposed on the other side of the perovskite cell module.

[0021] According to some embodiments of this application, the perovskite-silicon stacked assembly further includes: a first spacer layer disposed between the perovskite cell module and the crystalline silicon cell module; the crystalline silicon cell module further includes an encapsulation layer disposed on the first crystalline silicon cell region and the second crystalline silicon cell region; the perovskite-silicon stacked assembly further includes: a second spacer layer disposed between the first crystalline silicon cell region, the second crystalline silicon cell region, and the encapsulation layer.

[0022] According to some embodiments of this application, the first spacer layer is a first adhesive film layer, and / or the first spacer layer is a first light-transmitting insulating layer; and / or the second spacer layer is a second adhesive film layer, and / or the second spacer layer is a second light-transmitting insulating layer.

[0023] According to some embodiments of this application, the crystalline silicon battery module further includes a third junction box, which includes a positive electrode connection line and a negative electrode connection line; the positive electrode lead-out line of the perovskite battery module is electrically connected to the positive electrode connection line, and the negative electrode lead-out line of the perovskite battery module is electrically connected to the negative electrode connection line, so that the perovskite battery module and the crystalline silicon battery module are connected in parallel.

[0024] According to another aspect of this application, this application also provides a method for fabricating a perovskite-silicon tandem module, comprising: fabricating a perovskite battery module; setting a first crystalline silicon battery region and a second crystalline silicon battery region on the perovskite battery module, wherein the first crystalline silicon battery region includes N first crystalline silicon battery groups connected in series, and the second crystalline silicon battery region includes M second crystalline silicon battery groups connected in series, where N is a positive integer greater than 1 and M is a positive integer greater than 1; electrically connecting the first crystalline silicon battery groups and the second crystalline silicon battery groups through a conductive component disposed in the first housing of a first junction box, so that the N first crystalline silicon battery groups connected in series and the N second crystalline silicon battery groups connected in series are connected to obtain a crystalline silicon battery module; and connecting the crystalline silicon battery module and the perovskite battery module to obtain a perovskite-silicon tandem module.

[0025] According to some embodiments of this application, the first junction box further includes a first cover. Electrically connecting the first crystalline silicon battery pack and the second crystalline silicon battery pack via conductive components disposed within the first housing of the first junction box includes: disposing of an encapsulation layer on the first crystalline silicon battery region and the second crystalline silicon battery region, the encapsulation layer having lead wire through holes corresponding to the first junction box; fixing the first housing at the lead wire through holes, and electrically connecting the conductive components to the first crystalline silicon battery pack and the second crystalline silicon battery pack through the lead wire through holes; and disposing of the first cover on the first housing.

[0026] According to some embodiments of this application, the crystalline silicon battery module further includes a third junction box, which includes a positive electrode connection line and a negative electrode connection line. Connecting the crystalline silicon battery module and the perovskite battery module includes: electrically connecting the positive electrode lead-out line of the perovskite battery module to the positive electrode connection line through a lead-through hole; and electrically connecting the negative electrode lead-out line of the perovskite battery module to the negative electrode connection line through a lead-through hole, so that the perovskite battery module and the crystalline silicon battery module are connected in parallel.

[0027] According to some embodiments of this application, the preparation of a perovskite solar cell module includes: preparing a perovskite solar cell stack; cutting the perovskite solar cell stack along a first direction to obtain multiple perovskite sub-cells; and connecting the multiple perovskite sub-cells in series to obtain a perovskite solar cell module.

[0028] According to some embodiments of this application, setting a first crystalline silicon cell region and a second crystalline silicon cell region on a perovskite cell module includes: laying N first crystalline silicon cell groups in a first region of the perovskite cell module and laying M second crystalline silicon cell groups in a second region of the perovskite cell module; connecting the N first crystalline silicon cell groups in series to obtain the first crystalline silicon cell region; and connecting the M second crystalline silicon cell groups in series to obtain the second crystalline silicon cell region.

[0029] Beneficial effects

[0030] This application provides a crystalline silicon battery module, which includes a first crystalline silicon battery region, a second crystalline silicon battery region, and a first junction box. The first crystalline silicon battery region includes N first crystalline silicon battery packs connected in series, and the second crystalline silicon battery region includes M second crystalline silicon battery packs connected in series. The first junction box has a first housing and conductive components. The conductive components are disposed within the first housing and are used to electrically connect the first crystalline silicon battery packs and the second crystalline silicon battery packs, thereby connecting the N first crystalline silicon battery packs connected in series and the M second crystalline silicon battery packs connected in series.

[0031] This application achieves electrical connection between the first and second crystalline silicon cell regions through conductive components, enabling full connection of N series-connected first crystalline silicon cell groups and M series-connected second crystalline silicon cell groups. Traditional connection methods using flying wires to electrically connect the first and second crystalline silicon cell regions require additional welding steps, resulting in complex processes and low yield rates.

[0032] Compared to traditional wire bonding, this application utilizes conductive components located in the first junction box to achieve electrical connection between the first and second crystalline silicon cell regions. This application enables electrical connection between multiple crystalline silicon cell regions external to the crystalline silicon cell module, reducing the number of soldering points inside the module and thus preventing damage caused by high-temperature soldering. This results in more reliable electrical performance of the crystalline silicon cell module and lower manufacturing costs. Attached Figure Description

[0033] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 A schematic diagram of a crystalline silicon battery module according to an embodiment of this application is shown; Figure 2 A circuit diagram of a crystalline silicon battery module according to an embodiment of this application is shown; Figure 3 This diagram shows a structural schematic of the first junction box according to an embodiment of this application; Figure 4 This diagram illustrates the structure of the encapsulation layer according to an embodiment of this application. Figure 5 A schematic diagram of a traditional bypass diode structure is shown; Figure 6 This diagram shows a structural schematic of the second junction box according to an embodiment of this application; Figure 7 This invention provides a schematic diagram of the structure of the third junction box according to an embodiment of the present application. Figure 8 A schematic diagram of a half-crystalline silicon solar cell according to an embodiment of this application is shown; Figure 9 A schematic diagram of a quarter-crystalline silicon solar cell according to an embodiment of this application is shown; Figure 10 This diagram illustrates the structure of a perovskite-silicon stacked assembly according to an embodiment of this application. Figure 11 This diagram illustrates the connection of a perovskite-silicon stacked assembly according to an embodiment of this application. Figure 12 A schematic flowchart of the preparation method according to an embodiment of this application is shown; Figure 13 This diagram illustrates yet another flow chart of the preparation method according to an embodiment of this application; Figure 14 This diagram illustrates yet another flow chart of the preparation method according to an embodiment of this application; Figure 15 This diagram illustrates yet another flow chart of the preparation method according to an embodiment of this application; Figure 16 This diagram illustrates the structure of a perovskite solar cell stack according to an embodiment of this application. Figure 17 This paper shows a schematic diagram of the structure of a perovskite battery module according to an embodiment of this application; Figure 18 This is another schematic flowchart illustrating the preparation method of an embodiment of this application.

[0035] Explanation of reference numerals in the attached figures: First crystalline silicon cell region 11; Second crystalline silicon cell region 12; First crystalline silicon cell array 111; Second crystalline silicon cell array 121; First junction box 13; First housing 131; Conductive component 132; First bypass diode A; Second bypass diode B; First connection point 133A; Second connection point 133B; Encapsulation layer 14; Lead through-hole 141; Second junction box 15; Third bypass diode C; Fourth bypass diode D; Second housing 151; Third junction box 16; Positive connection line 161; Negative connection line 162; Fifth bypass diode E; Sixth bypass diode F; Third housing 163; First crystalline silicon cell string 1111; First crystalline silicon cell 111A; Second crystalline silicon cell string 1211; Second crystalline silicon cell 121A. Detailed Implementation

[0036] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0037] Perovskite solar cell modules effectively absorb short-wavelength visible light, while crystalline silicon solar cell modules effectively absorb long-wavelength near-infrared light that penetrates the perovskite module. When perovskite and crystalline silicon modules are stacked, they can fully absorb all bands of the solar spectrum due to spectral complementarity. Furthermore, perovskite modules have high photoelectric conversion efficiency, while crystalline silicon modules have high electron collection efficiency. The stacking of perovskite and crystalline silicon modules allows for efficient light absorption and electron transport, achieving complementary effects. Therefore, perovskite-crystalline silicon stacked modules can improve conversion efficiency through the complementary and synergistic effects of the perovskite and crystalline silicon modules.

[0038] Currently, the industrial production routes for perovskite crystalline silicon tandem modules mainly include two-end tandem modules and mechanically stacked tandem modules.

[0039] 1. The two-end stacked module is a perovskite solar cell module formed directly on the crystalline silicon solar cell module with two ends connected in series.

[0040] The inventors of this application have discovered that when depositing perovskite solar cell modules (such as perovskite thin films) on crystalline silicon solar cell modules, the textured surface of crystalline silicon has a higher degree of undulation than float glass (FTO: Fluorine-doped Tin Oxide coated glass), leading to significant challenges in fabricating perovskite solar cell modules, including high process difficulty, difficulty in controlling film quality, and high equipment requirements. Furthermore, scaling up from a single cell to a module requires high-temperature welding at the top electrode to connect them in series or parallel to form the module. During this high-temperature welding process, the perovskite solar cell modules face a certain risk of damage. Overall, this method is technically challenging and costly. Moreover, while traditional bypass diode configurations can effectively protect up to 24 crystalline silicon sub-cells, their protection range is expected to be significantly reduced when facing the high open-circuit voltage of perovskite-crystalline silicon tandem modules.

[0041] II. Mechanically stacked multilayer modules are multilayer modules obtained by separately preparing perovskite solar cell modules and crystalline silicon solar cell modules and then physically stacking them. They can be divided into four-terminal multilayer modules and two-terminal parallel modules.

[0042] (1) Four-terminal stacked module: Perovskite cell module and crystalline silicon cell module are fabricated separately, and then mechanically stacked to form a four-terminal stacked module.

[0043] The inventors discovered that the crystalline silicon cell module in the four-terminal cascaded module can use the existing series-parallel configuration. However, this requires the introduction of more wires, inverters, and labor at the power plant system level, which increases costs.

[0044] (2) Two-terminal parallel module: The perovskite cell module and the crystalline silicon cell module are manufactured separately and then mechanically stacked to form a two-terminal parallel module.

[0045] Due to the characteristics of perovskite solar cell modules (high voltage, low current) and crystalline silicon solar cell modules (high current, low voltage), in order to match the voltage of perovskite solar cell modules and crystalline silicon solar cell modules, it is necessary to perform voltage reduction processing on perovskite solar cell modules or voltage boost processing on crystalline silicon solar cell modules.

[0046] Currently, the voltage reduction process for perovskite solar cell modules requires dividing the originally fully connected perovskite module into multiple smaller sub-cells using techniques such as laser scribing, and then connecting these sub-cells in parallel. However, the inventors of this application have discovered that this leads to a dramatic increase in the number of parallel sections. The large amount of conductive tape not only occupies the effective power generation area and reduces the light transmittance of the perovskite solar cell module, but also increases the difficulty and reliability risks of the lamination process due to the large amount of conductive tape. These problems become even more pronounced as the size of perovskite solar cell modules increases.

[0047] For boosting the voltage of crystalline silicon solar cell modules, some methods divide the module into multiple crystalline silicon cell regions, allowing more cells to be connected in series, thereby increasing the overall voltage of the module. However, the inventors of this application have also discovered that this boosting method requires connecting multiple crystalline silicon cell regions in series on the adhesive layer using wiring (i.e., string welding). The high temperatures generated during the welding process can easily damage the module, resulting in complex processes and low yield rates.

[0048] Additionally, some boost converters can increase the overall voltage of the crystalline silicon solar cell module by cutting it into smaller sizes to allow for more cells to be connected in series. However, the inventors also discovered that this significantly increases the cell breakage rate and efficiency loss. Furthermore, with the increase in the number of cells connected in series, the reverse bias voltage experienced by the shaded cells is more likely to exceed the protection limit of the bypass diodes during partial shading. The bypass diodes can only effectively protect a limited number of crystalline silicon cells, leading to severe localized overheating (i.e., hot spot effect), directly threatening the performance, lifespan, and safety of the crystalline silicon solar cell module.

[0049] Example 1 According to one aspect of this application, a crystalline silicon battery module is provided.

[0050] According to the example embodiment, such as Figure 1 As shown, the crystalline silicon battery module includes a first crystalline silicon battery region 11, a second crystalline silicon battery region 12, and a first junction box 13. The first crystalline silicon battery region 11 includes N first crystalline silicon battery groups 111 connected in series, and the second crystalline silicon battery region 12 includes M second crystalline silicon battery groups 121 connected in series, where N and M are both positive integers greater than 1.

[0051] Optionally, N and M can be the same or different. Optionally, when N and M are the same, N first crystalline silicon solar cell groups 111 connected in series and M second crystalline silicon solar cell groups 121 connected in series are arranged in a one-to-one correspondence. For example... Figure 1 As shown, each first crystalline silicon cell pack 111 can correspond to one second crystalline silicon cell pack 121.

[0052] For example, N first crystalline silicon battery packs 111 are connected in series, and M second crystalline silicon battery packs 121 are connected in series. The first crystalline silicon battery packs 111 and the second crystalline silicon battery packs 121 are respectively arranged on both sides of the first junction box 13.

[0053] Optionally, such as Figure 1 As shown, the first crystalline silicon cell region 11 and the second crystalline silicon cell region 12 can be arranged symmetrically in a vertical structure. Optionally, the first crystalline silicon cell region 11 and the second crystalline silicon cell region 12 can also be arranged symmetrically in a horizontal structure, and this application does not limit this.

[0054] Optionally, such as Figure 1 As shown, the first crystalline silicon cell region 11 includes three first crystalline silicon cell groups 111, which are connected in series. The second crystalline silicon cell region 12 includes three second crystalline silicon cell groups 121, which are connected in series.

[0055] Optionally, such as Figure 2 As shown, N first crystalline silicon solar cell groups 111 are connected in series, and the positive and negative electrodes of adjacent first crystalline silicon solar cell groups 111 are connected. M second crystalline silicon solar cell groups 121 are connected in series, and the positive and negative electrodes of adjacent second crystalline silicon solar cell groups 121 are connected.

[0056] Optionally, such as Figure 1 As shown, the first junction box 13 is disposed between the first crystalline silicon cell region 11 and the second crystalline silicon cell region 12. Optionally, one end of the first junction box 13 is electrically connected to the first crystalline silicon cell group 111, and the other end is electrically connected to the second crystalline silicon cell group 121.

[0057] According to the example embodiment, such as Figure 3 As shown, the first junction box 13 has a first housing 131 and a conductive component 132. The conductive component 132 is disposed inside the first housing 131 and is used to electrically connect the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121, so that N first crystalline silicon battery packs 111 connected in series and M second crystalline silicon battery packs 121 connected in series are connected.

[0058] For example, the conductive component 132 has an electrical connection function. The conductive component 132 can be connected to the first crystalline silicon battery pack 111 located on one side of the first crystalline silicon battery region 11 (such as the first crystalline silicon battery pack 111 located at the last position of the first crystalline silicon battery region 11), and the conductive component 132 can also be connected to the second crystalline silicon battery pack 121 located on one side of the second crystalline silicon battery region 12 (such as the second crystalline silicon battery pack 121 located at the beginning position of the second crystalline silicon battery region 12), so that the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121 can be electrically connected through the conductive component 132.

[0059] It is understandable that in existing technologies, after dividing a crystalline silicon solar cell module into multiple crystalline silicon cell regions, connecting lines are needed to connect these regions in series on the encapsulating film layer (i.e., string welding). The high temperatures generated during the welding process can easily damage the crystalline silicon solar cell module. This application utilizes conductive components to achieve electrical connection between the first and second crystalline silicon cell regions, thereby enabling electrical connection of all crystalline silicon cells inside the encapsulating glass of the crystalline silicon solar cell module.

[0060] Through the above embodiments, this application provides a crystalline silicon battery module, which includes a first crystalline silicon battery region, a second crystalline silicon battery region, and a first junction box. The first crystalline silicon battery region includes N first crystalline silicon battery packs connected in series, and the second crystalline silicon battery region includes M second crystalline silicon battery packs connected in series. The first junction box has a first housing and a conductive component. The conductive component is disposed within the first housing and is used to electrically connect the first crystalline silicon battery packs and the second crystalline silicon battery packs, thereby connecting the N first crystalline silicon battery packs connected in series and the M second crystalline silicon battery packs connected in series.

[0061] This application achieves electrical connection between the first and second crystalline silicon battery regions through conductive components, enabling full connection of N series-connected first crystalline silicon battery packs and M series-connected second crystalline silicon battery packs. Traditional connection methods using flying wires to electrically connect the first and second crystalline silicon battery regions require additional soldering steps, resulting in complex processes and low yield rates. Compared to traditional flying wire soldering, this application achieves electrical connection between the first and second crystalline silicon battery regions through conductive components located in the first junction box. This application allows for electrical connection of multiple crystalline silicon battery regions external to the crystalline silicon battery module, reducing the number of soldering points inside the module and thus avoiding damage caused by high-temperature soldering. This results in more reliable electrical performance of the crystalline silicon battery module and reduces manufacturing costs.

[0062] Optionally, such as Figure 4 As shown, the crystalline silicon cell module may further include an encapsulation layer 14. The encapsulation layer 14 is disposed on the first crystalline silicon cell region 11 and the second crystalline silicon cell region 12, and the encapsulation layer 14 has lead through-holes 141 corresponding to the first junction box 13. The first junction box 13 is disposed on the encapsulation layer 14, and conductive components 132 are electrically connected to the first crystalline silicon cell group 111 and the second crystalline silicon cell group 121 through the lead through-holes 141.

[0063] For example, the encapsulation layer 14 can be deposited on the first crystalline silicon cell region 11 and the second crystalline silicon cell region 12 to physically encapsulate the first crystalline silicon cell region 11 and the second crystalline silicon cell region 12. Optionally, the encapsulation layer 14 can be a transparent glass substrate.

[0064] Optionally, the first housing 131 can be fixedly installed at the lead wire through hole 141, and the conductive component 132 can be connected to the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121 through the lead wire through hole 141.

[0065] Through the above embodiments, this application can electrically connect the first crystalline silicon cell region and the second crystalline silicon cell region using conductive components disposed in the first junction box on the encapsulation layer. This allows the internal soldering connection method on the crystalline silicon cell module to be changed to an external lead connection method on the encapsulation layer. This configuration reduces the number of circuit soldering points inside the crystalline silicon cell module, avoids damage caused by high-temperature soldering, makes the electrical performance of the crystalline silicon cell module more reliable, and also reduces manufacturing costs.

[0066] Optionally, N first crystalline silicon solar cell groups 111 connected in series and M second crystalline silicon solar cell groups 121 connected in series are connected in series.

[0067] For example, the conductive component 132 can electrically connect the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121, so that N first crystalline silicon battery packs 111 connected in series and M second crystalline silicon battery packs 121 connected in series are connected in series.

[0068] Since the N first crystalline silicon battery packs 111 in the first crystalline silicon battery region 11 are connected in series, and the M second crystalline silicon battery packs 121 in the second crystalline silicon battery region 12 are connected in series, the N first crystalline silicon battery packs 111 can be connected in series and then connected in series with the M second crystalline silicon battery packs 121 through the conductive component 132, forming a "series-then-series" electrical structure, thereby realizing the fully series structure of the first crystalline silicon battery region 11 and the second crystalline silicon battery region 12.

[0069] For example, such as Figure 1 As shown, this application can connect three first crystalline silicon battery packs 111 in the first crystalline silicon battery region 11 and three second crystalline silicon battery packs 121 in the second crystalline silicon battery region 12 in series through the first junction box 13.

[0070] This application enables the first crystalline silicon cell region and the second crystalline silicon cell region to be connected in series through the first junction box. By setting the layout structure of the crystalline silicon cell panel in a "series-then-series" manner, the voltage of the crystalline silicon cell module can be increased through a fully series connection.

[0071] Optionally, such as Figure 3 As shown, the first junction box 13 also includes a first bypass diode A and a second bypass diode B.

[0072] The first bypass diode A is connected in parallel with the corresponding first crystalline silicon cell group 111, and the second bypass diode B is connected in parallel with the corresponding second crystalline silicon cell group 121. The first bypass diode A and the second bypass diode B have opposite polarities.

[0073] For example, the first bypass diode A is connected in parallel with the corresponding first crystalline silicon cell pack 111. When the first crystalline silicon cell pack 111 is operating normally, it generates a forward voltage, and the first bypass diode A is in a reverse bias state. However, if a crystalline silicon cell in the first crystalline silicon cell pack 111 is blocked by an obstruction, the blocked faulty cell will impede current flow and generate a reverse voltage. When this reverse voltage exceeds the forward voltage of the first bypass diode A, the first bypass diode A momentarily conducts. This prevents current from flowing through the faulty crystalline silicon cell, avoiding localized high temperatures (preventing hot spot effect) and thus preventing damage to the crystalline silicon cell module.

[0074] The second bypass diode B is connected in parallel with the corresponding second crystalline silicon cell pack 121. Under normal operating conditions, the second crystalline silicon cell pack 121 generates a forward voltage, and the second bypass diode B is in a reverse bias state. However, if a crystalline silicon cell in the second crystalline silicon cell pack 121 is blocked by an obstruction, the blocked faulty crystalline silicon cell will impede current flow and generate a reverse voltage. When this reverse voltage exceeds the forward voltage of the second bypass diode B, the second bypass diode B momentarily conducts. This prevents current from flowing through the faulty crystalline silicon cell, avoiding localized high temperatures (i.e., preventing hot spot effects) and thus preventing damage to the crystalline silicon cell module.

[0075] like Figure 5 As shown, on the one hand, traditional bypass diodes can typically connect a maximum of 24 crystalline silicon solar cells. However, for large-size crystalline silicon solar cell modules, the number of crystalline silicon solar cells in a fully series structure can reach dozens or even hundreds. Therefore, current bypass diode structures cannot meet the requirements of a fully series connection for crystalline silicon solar cell modules. On the other hand, current bypass diodes are all single bypass diodes. A single bypass diode isolates all crystalline silicon solar cells connected to it when a crystalline silicon solar cell is shaded and generates a reverse voltage.

[0076] Through the above embodiments, this application, by connecting a first bypass diode and a second bypass diode (dual bypass diodes) to the first and second crystalline silicon solar cell packs respectively, can provide isolated protection for the first and second crystalline silicon solar cell packs. In the event of reverse voltage generated when a crystalline silicon solar cell is blocked, only the corresponding faulty crystalline silicon solar cell pack needs to be isolated, rather than isolating all crystalline silicon solar cell packs. This application can provide independent circuit protection for the first and second crystalline silicon solar cell packs. Compared with conventional bypass diode structures, this application can reduce the power loss impact by half in the event of a hot spot effect.

[0077] Optionally, such as Figure 1As shown, the crystalline silicon cell module also includes at least one second junction box 15. The second junction box 15 is electrically connected to at least one first crystalline silicon cell pack 111 and at least one second crystalline silicon cell pack 121. Figure 6 As shown, each second junction box 15 includes a third bypass diode C and a fourth bypass diode D.

[0078] The third bypass diode C is connected in parallel with the corresponding first crystalline silicon cell group 111, and the fourth bypass diode D is connected in parallel with the corresponding second crystalline silicon cell group 121. The polarities of the third bypass diode C and the fourth bypass diode D are opposite.

[0079] For example, such as Figure 1 As shown, except for the first junction box 13, the first crystalline silicon battery pack 111 located in the middle of the first crystalline silicon battery area 11 and the corresponding second crystalline silicon battery pack 121 can be connected to the same second junction box 15.

[0080] In the above embodiments, a third bypass diode and a fourth bypass diode with opposite polarities are provided in the second junction box. The third bypass diode and the fourth bypass diode are respectively connected to the corresponding first crystalline silicon battery pack and second crystalline silicon battery pack. Based on the same working principle as the first bypass diode and the second bypass diode, the third bypass diode and the fourth bypass diode can provide fault isolation protection for the first crystalline silicon battery pack and the second crystalline silicon battery pack.

[0081] Optionally, such as Figure 1 As shown, the crystalline silicon cell module also includes a third junction box 16. The third junction box 16 electrically connects at least one first crystalline silicon cell pack 111 and at least one second crystalline silicon cell pack 121. Figure 7 As shown, the third junction box 16 includes a fifth bypass diode E and a sixth bypass diode F.

[0082] The fifth bypass diode E is connected in parallel with the corresponding first crystalline silicon cell group 111, and the sixth bypass diode F is connected in parallel with the corresponding second crystalline silicon cell group 121. The polarities of the fifth bypass diode F and the sixth bypass diode E are opposite.

[0083] For example, such as Figure 1 As shown, in addition to the first junction box 13 and the second junction box 15, a third junction box 16 is also provided between the first crystalline silicon battery pack 111 and the corresponding second crystalline silicon battery pack 121 located on one side of the first crystalline silicon battery area 11.

[0084] In the above embodiment, a fifth bypass diode and a sixth bypass diode with opposite polarities are provided in the third junction box. The fifth bypass diode and the sixth bypass diode are respectively connected to the corresponding first crystalline silicon battery pack and second crystalline silicon battery pack. Based on the same working principle as the first bypass diode and the second bypass diode, the fifth bypass diode and the sixth bypass diode can provide fault isolation protection for the first crystalline silicon battery pack and the second crystalline silicon battery pack.

[0085] Optionally, such as Figure 7 As shown, the third junction box 16 also includes a positive connection line 161 and a negative connection line 162. The positive connection line 161 is used for the current output of the crystalline silicon cell module. The negative connection line 162 is used for the current return of the crystalline silicon cell module.

[0086] For example, this application can connect the electrical energy generated by the crystalline silicon battery module to the outside through the positive terminal connection line 161 and the negative terminal connection line 162. The two can together form a complete external electrical interface, which can provide current to the external load.

[0087] As an example, such as Figure 1 As shown, the crystalline silicon cell module includes a first junction box 13, a second junction box 15, and a third junction box 16. The first crystalline silicon cell region 11 and the second crystalline silicon cell region 12 can be electrically connected through the conductive component 132 in the first junction box 13, thereby realizing a fully series structure of the crystalline silicon cell module.

[0088] This application provides dual bypass diode protection for the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121 located on one side of the first crystalline silicon region 11 and the second crystalline silicon region 12 via the first junction box 13, thereby avoiding hot spot effects. This application provides dual bypass diode protection for the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121 located in the middle via the second junction box 15, thereby avoiding hot spot effects. This application provides dual bypass diode protection for the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121 located on the other side of the first crystalline silicon region 11 and the other side of the second crystalline silicon region 12 via the third junction box 16, thereby avoiding hot spot effects. Furthermore, this application enables electrical connection between the crystalline silicon battery module and an external load via the positive connection line 161 and the negative connection line 162 of the third junction box 16.

[0089] It is understandable that during the formation of a perovskite-silicon tandem solar cell with parallel terminals, a voltage difference will exist between the perovskite and crystalline silicon modules as the size of the perovskite module increases. This application addresses this by using a fully series structure for the crystalline silicon module to boost its voltage, eliminating the need to adjust the perovskite module's structure (e.g., by cutting the perovskite module into multiple parallel sections to reduce its voltage). This application achieves the effect of increasing the power generation of the perovskite-silicon tandem module while simultaneously increasing the voltage of the crystalline silicon module, without reducing the number of sections in the perovskite module.

[0090] Optionally, the first junction box 13 further includes a first cover. The first cover is disposed on the first housing 131, and the conductive component 132 is disposed in the accommodating cavity formed by the first cover and the first housing 131.

[0091] For example, after electrically connecting the conductive component 132 to the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121, and connecting the first bypass diode A and the second bypass diode B, a first cover is disposed on the first housing 131. The first cover encapsulates the first housing 131, allowing all electrical components to be housed in a separate junction box. This arrangement ensures that all electrical connections can be completed inside the first junction box, avoiding any impact on the crystalline silicon battery module during the electrical connection process (e.g., avoiding high-temperature soldering on the crystalline silicon electrical module).

[0092] Optionally, the second junction box 15 further includes a second housing 151 and a second cover. The second cover is disposed on the second housing 151, and the third bypass diode C and the fourth bypass diode D are both disposed in the accommodating cavity formed by the second cover and the second housing 151.

[0093] For example, after connecting the third bypass diode C and the fourth bypass diode D, a second cover is placed on the second housing 151. The second cover encapsulates the second housing 151, allowing all electrical components to be housed in a separate junction box. This arrangement ensures that all electrical connections are completed within the second junction box, preventing the electrical connection process from affecting the crystalline silicon cell module.

[0094] Optionally, the third junction box 16 further includes a third housing 163 and a third cover. The third cover is disposed on the third housing 163, and the fifth bypass diode E and the sixth bypass diode F are both disposed in the accommodating cavity formed by the third cover and the third housing 163.

[0095] For example, after connecting the fifth bypass diode E and the sixth bypass diode F, a third cover is placed on the third housing 163. The third cover encapsulates the third housing 163, allowing all electrical components to be housed in independent junction boxes. This arrangement ensures that all electrical connections are completed within the third junction box, preventing the electrical connection process from affecting the crystalline silicon cell module.

[0096] Optionally, such as Figure 1 As shown, the first crystalline silicon solar cell pack 111 includes at least two first crystalline silicon cell strings 1111 connected in series, and each first crystalline silicon cell string 1111 includes at least two first crystalline silicon solar cells 111A connected in series. The second crystalline silicon solar cell pack 121 includes at least two second crystalline silicon cell strings 1211 connected in series, and each second crystalline silicon cell string 1211 includes at least two second crystalline silicon solar cells 121A connected in series.

[0097] For example, the first crystalline silicon solar cell group 111 may include a plurality of first crystalline silicon solar cells 111A connected in series, and the second crystalline silicon solar cell group 121 may include a plurality of second crystalline silicon solar cells 121A connected in series. This arrangement allows the first crystalline silicon solar cell region 11 to be a series structure as a whole, and the second crystalline silicon solar cell region 12 to be a series structure as a whole.

[0098] Optionally, such as Figure 2 As shown, the positive electrode of each first crystalline silicon solar cell 111A is connected to the negative electrode of the adjacent first crystalline silicon solar cell 111A, and the negative electrode of each first crystalline silicon solar cell 111A is connected to the positive electrode of another adjacent first crystalline silicon solar cell 111A.

[0099] For example, such as Figure 1 As shown, adjacent first crystalline silicon cell strings 1111 are connected in series, and multiple first crystalline silicon cell sheets 111A are connected in series. With this configuration, the first crystalline silicon cell sheets 111A in the first crystalline silicon cell region 11 are in a fully series structure. Furthermore, the first crystalline silicon cell sheets 111A at the beginning and end of the first crystalline silicon cell group 111 are connected in parallel with the first bypass diode A, so that the first bypass diode A only controls the first crystalline silicon cell group 111 connected to it.

[0100] Optionally, such as Figure 2 As shown, the positive electrode of each second crystalline silicon solar cell 121A is connected to the negative electrode of the adjacent second crystalline silicon solar cell 121A, and the negative electrode of each second crystalline silicon solar cell 121A is connected to the positive electrode of another adjacent second crystalline silicon solar cell 121A.

[0101] For example, such as Figure 1As shown, adjacent strings of second crystalline silicon cells 1211 are connected in series, and multiple second crystalline silicon cells 121A are connected in series. This configuration allows the second crystalline silicon cells 121A in the second crystalline silicon cell region 12 to be in a fully series structure. Furthermore, by connecting the first and last second crystalline silicon cells 121A of the second crystalline silicon cell group 121 in parallel with the second bypass diode B, the second bypass diode B can control only the second crystalline silicon cell group 121 connected to it.

[0102] Optionally, the first crystalline silicon solar cell 111A is a half-crystalline silicon solar cell. Alternatively, the first crystalline silicon solar cell 111A is a quarter-crystalline silicon solar cell.

[0103] Optionally, the second crystalline silicon solar cell 121A is a half-crystalline silicon solar cell. Alternatively, the second crystalline silicon solar cell 121A is a quarter-crystalline silicon solar cell.

[0104] A half-cell crystalline silicon solar cell (i.e., a halved cell) refers to a standard, complete square crystalline silicon solar cell that has been cut in half using laser cutting technology, along a direction perpendicular to the main grid lines (usually also parallel to the long side of the cell), resulting in two smaller, identical rectangular cells. A quarter-cell crystalline silicon solar cell (i.e., a quarter-cell cell) refers to a standard, complete square crystalline silicon solar cell that has been cut in half using laser cutting technology, first along one direction (usually perpendicular to the main grid lines), and then each half is cut again along the perpendicular direction, ultimately resulting in four small rectangular cells of equal area and identical shape.

[0105] For example, such as Figure 8 As shown, both the first crystalline silicon solar cell 111A and the second crystalline silicon solar cell 121A are half-crystalline silicon solar cells. For example... Figure 9 As shown, both the first crystalline silicon solar cell 111A and the second crystalline silicon solar cell 121A are quarter-crystalline silicon solar cells.

[0106] Through the above embodiments, this application minimizes the area of ​​a single failed or shaded cell (e.g., 1 / 2 or 1 / 4 of the entire cell) by setting the crystalline silicon solar cell to a half-crystalline silicon cell or a quarter-crystalline silicon cell. Furthermore, since heat can be confined to a smaller area, heat accumulation on the crystalline silicon solar cell is avoided, reducing the peak temperature at high-temperature points and effectively preventing hot spot effects.

[0107] Optionally, such as Figure 3 As shown, the first junction box 13 also includes at least two first connection points 133A and at least two second connection points 133B. The at least two first connection points 133A are respectively disposed at both ends of the first bypass diode A, and the at least two second connection points 133B are respectively disposed at both ends of the second bypass diode B.

[0108] For example, such as Figure 3 As shown, a first connection point 133A is provided at each of the two ends (e.g., the positive and negative terminals) of the first bypass diode A. A second connection point 133B is provided at each of the two ends (e.g., the positive and negative terminals) of the second bypass diode B.

[0109] Optionally, such as Figure 3 As shown, the first junction box 13 also includes at least two first lead holes 133C and at least two second lead holes 133D. The at least two first lead holes 133C are respectively disposed on one side of the at least two first connection points 133A, and the at least two second lead holes 133D are respectively disposed on one side of the at least two second connection points 133B.

[0110] For example, such as Figure 3 As shown, each of the two first connection points 133A has a first lead hole 133C on one side, and each of the two second connection points 133B has a second lead hole 133D on one side.

[0111] Optionally, the lead wire of the first crystalline silicon cell 111A located at the first position of the first crystalline silicon cell group 111 passes through the first lead hole 133C and is connected to the first connection point 133A adjacent to the positive (or negative) terminal of the first bypass diode A, and the lead wire of the first crystalline silicon cell 111A located at the last position of the first crystalline silicon cell group 111 passes through the first lead hole 133C and is connected to the first connection point 133A adjacent to the negative (or positive) terminal of the first bypass diode A.

[0112] Similarly, the lead wire of the second crystalline silicon cell 121A located at the first position of the second crystalline silicon cell 121 passes through the second lead hole 133D and is connected to the second connection point 133B adjacent to the positive (or negative) terminal of the second bypass diode B. The lead wire of the second crystalline silicon cell 121A located at the last position of the second crystalline silicon cell 121 passes through the second lead hole 133D and is soldered to the second connection point 133B adjacent to the negative (or positive) terminal of the second bypass diode B.

[0113] Optionally, the conductive component 132 is pre-fixed on the first connection point 133A and the second connection point 133B.

[0114] For example, the conductive component 132 is fixedly disposed on the first connection point 133A and the second connection point 133B, so that the conductive component 132 can realize electrical connection with the first crystalline silicon battery pack 111 and the second crystalline silicon battery pack 121.

[0115] Through the above embodiments, this application can achieve electrical connection between conductive components and the first and second crystalline silicon battery packs by setting the first connection point and the second connection point. This application can also achieve electrical connection between the first bypass diode and the first crystalline silicon battery pack, and between the second bypass diode and the second crystalline silicon battery pack, by setting the first connection point, the second connection point, the first lead hole, and the second lead hole.

[0116] Optionally, the second and third junction boxes can be electrically connected to the first and second crystalline silicon battery packs through lead wire through holes, which will not be elaborated here.

[0117] Optionally, the second junction box further includes at least two third connection points and at least two fourth connection points. The at least two third connection points are respectively located at both ends of the third bypass diode, and the at least two fourth connection points are respectively located at both ends of the fourth bypass diode. The second junction box also includes at least two third lead holes and at least two fourth lead holes. The at least two third lead holes are respectively located on one side of the at least two third connection points, and the at least two fourth lead holes are respectively located on one side of the at least two fourth connection points.

[0118] Optionally, the third junction box further includes at least two fifth connection points and at least two sixth connection points. The at least two fifth connection points are respectively located at both ends of the fifth bypass diode, and the at least two sixth connection points are respectively located at both ends of the sixth bypass diode. The third junction box also includes at least two fifth lead holes and at least two sixth lead holes. The at least two fifth lead holes are respectively located on one side of the at least two fifth connection points, and the at least two sixth lead holes are respectively located on one side of the at least two sixth connection points.

[0119] It is understood that the connection points and lead hole structures of the second and third junction boxes are the same as those of the first junction box, and will not be described again here.

[0120] Example 2 According to another aspect of this application, this application provides a perovskite-silicon tandem module.

[0121] Optionally, such as Figure 10 As shown, the perovskite-silicon tandem module includes a substrate, a perovskite solar cell module, and a crystalline silicon solar cell module as described above. Figure 10 As shown, the perovskite solar cell module is disposed on one side of the substrate, and the crystalline silicon solar cell module is disposed on the other side of the perovskite solar cell module.

[0122] Optionally, such as Figure 10 As shown, the perovskite-silicon stacked module also includes a first spacer layer. The first spacer layer is disposed between the perovskite solar cell module and the crystalline silicon solar cell module.

[0123] For example, a first spacer layer can be used to isolate the perovskite solar cell module from the crystalline silicon solar cell module.

[0124] Optionally, the first spacer layer is a first adhesive film layer. And / or, the first spacer layer is a first light-transmitting insulating layer. For example, the first adhesive film layer can bond and encapsulate the perovskite solar cell module and the crystalline silicon solar cell module. The first light-transmitting insulating layer can ensure that, while allowing light to pass through, it forms electrical insulation between the perovskite solar cell module and the crystalline silicon solar cell module.

[0125] Optionally, such as Figure 10 As shown, the perovskite silicon tandem module also includes a second spacer layer. The second spacer layer is disposed between the first silicon cell region, the second silicon cell region, and the encapsulation layer.

[0126] For example, by setting a second spacer layer, the first crystalline silicon cell region and the second crystalline silicon cell region can be isolated from the encapsulation layer.

[0127] Optionally, the second spacer layer is a second adhesive film layer, and / or, the second spacer layer is a second light-transmitting insulating layer. For example, the second adhesive film layer can bond to and encapsulate the first crystalline silicon cell region and the second crystalline silicon cell region with the encapsulation layer. The second light-transmitting insulating layer can ensure electrical insulation between the first crystalline silicon cell region, the second crystalline silicon cell region, and the encapsulation layer while allowing light to pass through.

[0128] Optionally, the perovskite-silicon stacked module can be a two-terminal parallel module, a four-terminal stacked module, or a module where the outputs of the two ends of the crystalline silicon cell module and the perovskite cell module are connected via an optimizer. This application does not impose any restrictions on this.

[0129] As an example, the perovskite crystalline silicon tandem module can be a perovskite crystalline silicon voltage-matched tandem module with a glass size of 1.15 × 2.4 meters (the first crystalline silicon cell 111A and the second crystalline silicon cell 121A are both quarter-crystalline silicon cells).

[0130] Through the above embodiments, the crystalline silicon solar cell module provided in this application can be connected with a perovskite solar cell module to form a perovskite-crystalline silicon multilayer assembly. This application achieves electrical connection between the first and second crystalline silicon solar cell regions through conductive components disposed in the first junction box. This application allows for electrical connection of multiple crystalline silicon solar cell regions outside the crystalline silicon solar cell module, reducing the number of circuit soldering points inside the crystalline silicon solar cell module, thereby avoiding damage caused by high-temperature soldering, making the electrical performance of the crystalline silicon solar cell module more reliable, and ultimately enabling the perovskite-crystalline silicon multilayer assembly to have excellent electrical performance.

[0131] Optionally, the crystalline silicon cell module also includes a third junction box 16, which includes a positive terminal connection line 161 and a negative terminal connection line 162. The structure of the third junction box 16 has been described in detail above and will not be repeated here.

[0132] For example, such as Figure 11 As shown, the positive electrode lead 21 of the perovskite solar cell module is electrically connected to the positive electrode connection line 161, and the negative electrode lead 22 of the perovskite solar cell module is electrically connected to the negative electrode connection line 162, so that the perovskite solar cell module and the crystalline silicon solar cell module are connected in parallel. This configuration allows for the parallel connection of the crystalline silicon solar cell module and the perovskite solar cell module, thereby obtaining a perovskite-crystalline silicon stacked module with two terminals connected in parallel.

[0133] It is understandable that during the formation of a perovskite-silicon tandem module with parallel terminals, a voltage difference will exist between the perovskite and crystalline silicon modules as the size of the perovskite module increases. This application addresses this by using a fully series structure of the crystalline silicon solar panel to boost the voltage of the crystalline silicon module, eliminating the need to adjust the perovskite module structure (e.g., by cutting the perovskite module into multiple parallel sections to reduce its voltage). This application achieves the effect of increasing the power generation of the perovskite-silicon tandem module while simultaneously increasing the voltage of the crystalline silicon module, without reducing the number of sections in the perovskite module.

[0134] Example 3 According to another aspect of this application, this application provides a method for preparing a perovskite-silicon tandem module.

[0135] According to the example embodiment, such as Figure 12 As shown, the preparation method may include steps S100-S400.

[0136] In step S100, a perovskite solar cell module is prepared.

[0137] In step S200, a first crystalline silicon cell region and a second crystalline silicon cell region are formed on the perovskite solar cell module. The first crystalline silicon cell region includes N first crystalline silicon cell groups connected in series, and the second crystalline silicon cell region includes M second crystalline silicon cell groups connected in series, where N is a positive integer greater than 1 and M is a positive integer greater than 1.

[0138] For example, after fabricating the perovskite solar cell module, a first crystalline silicon cell region and a second crystalline silicon cell region are formed on one side of the perovskite solar cell module. The specific structures of the first crystalline silicon cell region and the second crystalline silicon cell region have been described in detail above and will not be repeated here.

[0139] In step S300, the first crystalline silicon battery pack and the second crystalline silicon battery pack are electrically connected by a conductive component disposed in the first housing of the first junction box, so that N series-connected first crystalline silicon battery packs and N series-connected second crystalline silicon battery packs are connected to obtain a crystalline silicon battery module.

[0140] In step S400, the crystalline silicon cell module and the perovskite cell module are connected to obtain a perovskite-crystalline silicon stacked assembly.

[0141] For example, a first junction box can be placed between the first crystalline silicon cell region and the second crystalline silicon cell region, and the first crystalline silicon cell group and the second crystalline silicon cell group can be electrically connected through conductive components in the first junction box, thereby realizing the electrical connection between the first crystalline silicon cell group and the second crystalline silicon cell group. The structure of the first junction box has been described in detail above and will not be repeated here.

[0142] Optionally, conductive components are connected to a first crystalline silicon cell group located on one side of the first crystalline silicon cell region (e.g., the first crystalline silicon cell group located at the end of the first crystalline silicon cell region), and conductive components are connected to a second crystalline silicon cell group located on one side of the second crystalline silicon cell region (e.g., the second crystalline silicon cell group located at the beginning of the second crystalline silicon cell region). This allows for electrical connection between the first and second crystalline silicon cell groups via the conductive components. Finally, the crystalline silicon cell module and the perovskite cell module are electrically connected to obtain a perovskite-crystalline silicon stacked module.

[0143] Through the above embodiments, this application enables electrical connection between the first crystalline silicon cell region and the second crystalline silicon cell region by using conductive components disposed in the first junction box. This application allows for electrical connection of multiple crystalline silicon cell regions outside the crystalline silicon cell module, reducing the number of circuit soldering points inside the module and thus avoiding damage caused by high-temperature soldering. This makes the electrical performance of the crystalline silicon cell module more reliable, thereby enabling the perovskite crystalline silicon tandem module to have excellent electrical performance.

[0144] Optionally, such as Figure 13 As shown, step S300 may also include steps S310-S330.

[0145] In step S310, an encapsulation layer is provided on the first crystalline silicon cell region and the second crystalline silicon cell region, and the encapsulation layer is provided with lead through holes corresponding to the first junction box.

[0146] In step S320, the first housing is fixed at the lead wire through hole, and the conductive component is electrically connected to the first crystalline silicon battery pack and the second crystalline silicon battery pack through the lead wire through hole.

[0147] In step S330, the first cover is disposed on the first housing.

[0148] For example, an encapsulation layer (which can be a transparent glass substrate) is laid on the first and second crystalline silicon cell regions to physically encapsulate them. Then, a first housing is fixedly mounted at the lead-through holes, and conductive components are connected to the first and second crystalline silicon cell groups via these holes. Finally, a first cover is placed on the first housing to encapsulate it, allowing all electrical components to be housed in independent junction boxes.

[0149] Through the above embodiments, this application can electrically connect the first crystalline silicon battery pack and the second crystalline silicon battery pack using conductive components disposed in the first junction box on the encapsulation layer. This allows for a change from internal soldering connections on the crystalline silicon battery module to external lead connections on the encapsulation layer. This configuration reduces the number of circuit soldering points inside the crystalline silicon battery module, avoiding damage caused by high-temperature soldering, resulting in more reliable electrical performance of the crystalline silicon battery module, and ultimately enabling the perovskite crystalline silicon tandem module to possess excellent electrical performance.

[0150] Optionally, such as Figure 14 As shown, step S400 may also include steps S410-S420.

[0151] The crystalline silicon cell module also includes a third junction box, which contains positive and negative connection lines. The specific structure of the third junction box has been described in detail above and will not be repeated here.

[0152] In step S410, the positive electrode lead-out line of the perovskite battery module is electrically connected to the positive electrode connection line through the lead-out hole.

[0153] In step S420, the negative electrode lead-out line of the perovskite battery module is electrically connected to the negative electrode connection line through the lead-out hole, so that the perovskite battery module and the crystalline silicon battery module are connected in parallel.

[0154] For example, the positive lead of the perovskite solar cell module is electrically connected to the positive terminal connection line, and the negative lead of the perovskite solar cell module is electrically connected to the negative terminal connection line, so that the perovskite solar cell module and the crystalline silicon solar cell module are connected in parallel. This configuration allows for the parallel connection of the crystalline silicon solar cell module and the perovskite solar cell module, resulting in a perovskite-crystalline silicon stacked module with two terminals connected in parallel.

[0155] It is understandable that during the formation of a perovskite-silicon tandem module with parallel terminals, a voltage difference will exist between the perovskite and crystalline silicon modules as the size of the perovskite module increases. This application addresses this by using a fully series structure of the crystalline silicon solar panel to boost the voltage of the crystalline silicon module, eliminating the need to adjust the perovskite module structure (e.g., by cutting the perovskite module into multiple parallel sections to reduce its voltage). This application achieves the effect of increasing the power generation of the perovskite-silicon tandem module while simultaneously increasing the voltage of the crystalline silicon module, without reducing the number of sections in the perovskite module.

[0156] Optionally, such as Figure 15 As shown, step S100 may also include steps S110-S130.

[0157] In step S110, a perovskite solar cell stack is prepared.

[0158] In step S120, the perovskite solar cell stack is cut along the first direction to obtain multiple perovskite sub-cells.

[0159] In step S130, multiple perovskite sub-cells are connected in series to obtain a perovskite cell module.

[0160] For example, such as Figure 16 As shown, the perovskite solar cell stack consists of, from bottom to top, FTO glass (Fluorine-doped Tin Oxide Glass, transparent conductive substrate), HTL transport layer (Hole Transport Layer), PVSK layer (Perovskite absorber layer), ETL transport layer (Electron Transport Layer), and TCO conductive layer (Transparent Conductive Oxide, transparent conductive layer).

[0161] like Figure 17 As shown, the perovskite solar cell stack is divided into x perovskite sub-cells along the first direction using laser cutting, and these x perovskite sub-cells are connected in series to form a fully series structure. Then, the positive and negative electrodes of the perovskite solar cell stack are led out via leads to form a perovskite solar cell module.

[0162] Optionally, such as Figure 18 As shown, step S200 may also include steps S210-S230.

[0163] In step S210, N first crystalline silicon solar cells are laid in the first region of the perovskite solar cell module, and M second crystalline silicon solar cells are laid in the second region of the perovskite solar cell module.

[0164] In step S220, N first crystalline silicon cell groups are connected in series to obtain the first crystalline silicon cell region.

[0165] In step S230, M second crystalline silicon cell groups are connected in series to obtain a second crystalline silicon cell region.

[0166] For example, multiple first crystalline silicon solar cells are laid in a specific region (such as the upper half) of a perovskite solar cell module (the surface of which may have a first spacer layer), so that the multiple first crystalline silicon solar cells form multiple first crystalline silicon solar cell packs, and the multiple first crystalline silicon solar cell packs form a first crystalline silicon solar cell region. Similarly, multiple second crystalline silicon solar cells are laid in a specific region (such as the lower half) of the perovskite solar cell module, so that the multiple second crystalline silicon solar cells form multiple second crystalline silicon solar cell packs, and the multiple second crystalline silicon solar cell packs form a second crystalline silicon solar cell region.

[0167] Subsequently, multiple first crystalline silicon solar cells are connected in series (e.g., using a busbar connection method) to achieve electrical connection of all first crystalline silicon solar cells within the first crystalline silicon solar cell region. Similarly, multiple second crystalline silicon solar cells are connected in series (e.g., using a busbar connection method) to achieve electrical connection of all second crystalline silicon solar cells within the second crystalline silicon solar cell region. This configuration ensures that both the first and second crystalline silicon solar cell regions are fully series-connected.

[0168] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions of the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A crystalline silicon battery module, characterized in that, include: The first crystalline silicon cell region includes N first crystalline silicon cell groups connected in series. The second crystalline silicon cell region includes M second crystalline silicon cell groups connected in series, where N is a positive integer greater than 1 and M is a positive integer greater than 1. as well as The first junction box has a first housing and a conductive component. The conductive component is disposed inside the first housing and is used to electrically connect the first crystalline silicon battery pack and the second crystalline silicon battery pack, so that the N series-connected first crystalline silicon battery packs and the M series-connected second crystalline silicon battery packs are connected.

2. The crystalline silicon battery module according to claim 1, characterized in that, The crystalline silicon battery module also includes: An encapsulation layer is disposed on the first crystalline silicon cell region and the second crystalline silicon cell region, and the encapsulation layer is provided with lead through holes corresponding to the first junction box; The first junction box is disposed on the encapsulation layer, and the conductive component is electrically connected to the first crystalline silicon battery pack and the second crystalline silicon battery pack through the lead through hole.

3. The crystalline silicon battery module according to claim 2, characterized in that, The N first crystalline silicon battery packs connected in series and the M second crystalline silicon battery packs connected in series are connected in series.

4. The crystalline silicon battery module according to claim 3, characterized in that, The first junction box also includes: The first bypass diode is connected in parallel with the corresponding first crystalline silicon battery pack; The second bypass diode is connected in parallel with the corresponding second crystalline silicon battery pack; The second bypass diode has the opposite polarity to the first bypass diode.

5. The crystalline silicon battery module according to claim 4, characterized in that, The crystalline silicon cell module further includes at least one second junction box, the second junction box being electrically connected to at least one first crystalline silicon cell pack and at least one second crystalline silicon cell pack, the second junction box comprising: The third bypass diode is connected in parallel with the corresponding first crystalline silicon battery pack; The fourth bypass diode is connected in parallel with the corresponding second crystalline silicon battery pack; The third bypass diode has the opposite polarity to the fourth bypass diode.

6. The crystalline silicon battery module according to claim 5, characterized in that, The crystalline silicon battery module further includes a third junction box, which electrically connects at least one first crystalline silicon battery pack and at least one second crystalline silicon battery pack. The third junction box includes: The positive electrode connection line is used for the current output of the crystalline silicon battery module; The negative terminal connection line is used for current return of the crystalline silicon battery module; The fifth bypass diode is connected in parallel with the corresponding first crystalline silicon battery pack; The sixth bypass diode is connected in parallel with the corresponding second crystalline silicon battery pack; The fifth bypass diode has the opposite polarity to the sixth bypass diode.

7. The crystalline silicon battery module according to claim 6, characterized in that, The first junction box also includes: A first cover is disposed on the first housing, and the conductive component is disposed in the accommodating cavity formed by the first cover and the first housing.

8. The crystalline silicon battery module according to claim 7, characterized in that, The second junction box also includes: Second shell; The second cover is disposed on the second housing, and the third bypass diode and the fourth bypass diode are both disposed in the accommodating cavity formed by the second cover and the second housing.

9. The crystalline silicon battery module according to claim 8, characterized in that, The third junction box also includes: Third shell; A third cover is disposed on the third housing, and the fifth bypass diode and the sixth bypass diode are both disposed in the accommodating cavity formed by the third cover and the third housing.

10. The crystalline silicon battery module according to claim 9, characterized in that, The first crystalline silicon solar cell pack includes at least two first crystalline silicon solar cell strings connected in series, and each first crystalline silicon solar cell string includes at least two first crystalline silicon solar cells connected in series. The second crystalline silicon solar cell pack includes at least two second crystalline silicon cell strings connected in series, and the second crystalline silicon cell string includes at least two second crystalline silicon cell cells connected in series.

11. The crystalline silicon battery module according to claim 10, characterized in that, The first crystalline silicon solar cell is a half-crystalline silicon solar cell; or, the first crystalline silicon solar cell is a quarter-crystalline silicon solar cell. and / or The second crystalline silicon solar cell is a half-crystalline silicon solar cell; or, the second crystalline silicon solar cell is a quarter-crystalline silicon solar cell.

12. The crystalline silicon battery module according to claim 11, characterized in that, The first junction box also includes: At least two first connection points are respectively set at both ends of the first bypass diode; At least two second connection points are respectively located at both ends of the second bypass diode.

13. The crystalline silicon battery module according to claim 12, characterized in that, The first junction box also includes: At least two first lead holes are respectively provided on one side of the at least two first connection points; At least two second lead holes are respectively provided on one side of the at least two second connection points.

14. A perovskite-silicon multilayer module, characterized in that, include: Base; A perovskite solar cell module is disposed on one side of the substrate; The crystalline silicon solar cell module as described in any one of claims 1-13 is disposed on one side of the perovskite solar cell module.

15. The perovskite-silicon multilayer module according to claim 14, characterized in that, The perovskite-silicon multilayer assembly also includes: A first spacer layer is disposed between the perovskite solar cell module and the crystalline silicon solar cell module; and / or The crystalline silicon cell module further includes an encapsulation layer disposed on the first crystalline silicon cell region and the second crystalline silicon cell region. The perovskite crystalline silicon stacked assembly further includes: The second spacer layer is disposed between the first crystalline silicon cell region and the second crystalline silicon cell region and the encapsulation layer.

16. The perovskite-silicon multilayer module according to claim 15, characterized in that, The first spacer layer is a first adhesive film layer, and / or the first spacer layer is a first light-transmitting insulating layer; and / or The second spacer layer is a second adhesive film layer, and / or the second spacer layer is a second light-transmitting insulating layer.

17. The perovskite-silicon multilayer module according to claim 16, characterized in that, The crystalline silicon battery module also includes a third junction box, which includes a positive terminal connection line and a negative terminal connection line. The positive electrode lead of the perovskite battery module is electrically connected to the positive electrode connection line, and the negative electrode lead of the perovskite battery module is electrically connected to the negative electrode connection line, so that the perovskite battery module and the crystalline silicon battery module are connected in parallel.

18. A method for preparing a perovskite-silicon tandem module, characterized in that, The preparation method includes: Fabrication of perovskite solar cell modules; A first crystalline silicon cell region and a second crystalline silicon cell region are provided on the perovskite cell module, wherein the first crystalline silicon cell region includes N first crystalline silicon cell groups connected in series, and the second crystalline silicon cell region includes M second crystalline silicon cell groups connected in series, where N is a positive integer greater than 1 and M is a positive integer greater than 1. The first crystalline silicon battery pack and the second crystalline silicon battery pack are electrically connected by conductive components disposed in the first housing of the first junction box, so that the N series-connected first crystalline silicon battery packs and the N series-connected second crystalline silicon battery packs are connected to obtain a crystalline silicon battery module. The crystalline silicon cell module and the perovskite cell module are connected to obtain the perovskite-crystalline silicon stacked assembly.

19. The preparation method according to claim 18, characterized in that, The first junction box further includes a first cover, and the electrical connection between the first crystalline silicon battery pack and the second crystalline silicon battery pack via a conductive component disposed within the first housing of the first junction box includes: An encapsulation layer is provided on the first crystalline silicon cell region and the second crystalline silicon cell region, and the encapsulation layer is provided with lead through holes corresponding to the first junction box; The first housing is fixed at the lead wire through hole, and the conductive component is electrically connected to the first crystalline silicon battery pack and the second crystalline silicon battery pack through the lead wire through hole; The first cover is placed on the first housing.

20. The preparation method according to claim 19, characterized in that, The crystalline silicon solar cell module further includes a third junction box, which includes a positive terminal connection line and a negative terminal connection line. The connection between the crystalline silicon solar cell module and the perovskite solar cell module includes: The positive electrode lead-out line of the perovskite battery module is electrically connected to the positive electrode connection line through the lead-out hole; The negative electrode lead-out line of the perovskite battery module is electrically connected to the negative electrode connection line through the lead-out hole, so that the perovskite battery module and the crystalline silicon battery module are connected in parallel.

21. The preparation method according to claim 20, characterized in that, The preparation of the perovskite solar cell module includes: Preparation of perovskite solar cell stacks; Cut the perovskite solar cell stack along the first direction to obtain multiple perovskite sub-cells; The multiple perovskite sub-cells are connected in series to obtain the perovskite cell module.

22. The preparation method according to claim 21, characterized in that, The step of setting a first crystalline silicon cell region and a second crystalline silicon cell region on the perovskite cell module includes: N first crystalline silicon solar cell groups are laid in the first region of the perovskite solar cell module, and M second crystalline silicon solar cell groups are laid in the second region of the perovskite solar cell module. The N first crystalline silicon cell groups are connected in series to obtain the first crystalline silicon cell region; The M second crystalline silicon cell groups are connected in series to obtain the second crystalline silicon cell region.

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