On-chip integrated single autocorrelator and measuring method thereof

Abstract

The invention belongs to the technical field of pulse characteristic measurement, and relates to an on-chip integrated single autocorrelator and a measurement method thereof. The autocorrelator comprises an SOI substrate, a photonic crystal waveguide is formed on the SOI substrate through etching, and an insulating layer, an indium selenide layer and a chromium gold electrode array are sequentially arranged on the photonic crystal waveguide; the photonic crystal waveguide is composed of a straight waveguide area in the middle area and photonic crystal areas on the two sides. The chromium-gold electrode array is composed of a plurality of pairs of chromium-gold electrodes which are arranged at equal intervals in the photonic crystal waveguide direction, and each pair of chromium-gold electrodes serve as a source electrode and a drain electrode respectively; a back gate electrode is arranged on an unetched region of the SOI substrate; during measurement, a p-i-n homojunction is formed in the indium selenide material; the source electrode is connected with the p-type region of the indium selenide layer, the drain electrode is connected with the n-type region of the indium selenide layer, and the indium selenide p-i-n homojunction photoelectric detector is formed by the source electrode and the drain electrode. The problem that an existing autocorrelator is difficult to integrate and cannot meet actual requirements is solved.

Description

Technical Field

[0001] This invention belongs to the field of pulse characteristic measurement technology, specifically relating to an on-chip integrated single autocorrelation meter and its measurement method. Background Technology

[0002] With the rapid development of ultrafast laser technology, the precise measurement of femtosecond and picosecond pulses is of great significance for fields such as optical communication, biomedical imaging, and precision machining.

[0003] Traditional autocorrelators work by splitting a single pulse into two paths and introducing a controllable time delay. The two pulses meet and interact nonlinearly in a nonlinear medium, generating a signal curve that varies with the delay. From this, the pulse's time width and time-domain symmetry are deduced. Typically, a bulk nonlinear crystal and an external photodetector (such as a photomultiplier tube or photodiode) are used. The bulk nonlinear crystal requires sufficient crystal length and phase matching to effectively generate the nonlinear signal, resulting in a large overall instrument size. The external photodetector, as the signal detection element, requires a separate power supply system and optical path alignment, further increasing size, complexity, and cost. Ultimately, existing autocorrelators are bulky and expensive, failing to meet current demands for chip-based miniaturization. For example, they cannot be integrated into optical communication chip modules or portable biological imaging devices.

[0004] In summary, the main reason for the incompatibility between traditional autocorrelators and chips lies in their discrete component structure. Nonlinear crystals require sufficient crystal length and phase matching conditions, resulting in a large size; external photodetectors require independent power supply systems, optical path alignment, etc., and these discrete components are difficult to integrate onto a chip, so they can only be used as offline detection tools.

[0005] Therefore, there is an urgent need to develop a compact and easily integrated autocorrelator. Summary of the Invention

[0006] The purpose of this invention is to provide an on-chip integrated single autocorrelator and its measurement method, which solves the problem that existing autocorrelators are difficult to be compatible with chips and cannot meet practical needs.

[0007] This invention is achieved through the following technical solution: This invention discloses an on-chip integrated single autocorrelator, including an SOI substrate, a photonic crystal waveguide formed by etching on the silicon layer of the SOI substrate, and an insulating layer, an indium selenide layer and a chromium-gold electrode array sequentially disposed above the photonic crystal waveguide. The photonic crystal waveguide has two air slots to divide it into three segments for electrical isolation. The chromium-gold electrode array consists of multiple pairs of chromium-gold electrodes arranged at equal intervals along the direction of the photonic crystal waveguide. In each pair of chromium-gold electrodes, one electrode serves as the source and the other as the drain. Both the source and the drain are connected to an indium selenide layer. A first back gate electrode and a second back gate electrode are provided on the unetched area of ​​the SOI substrate; When a voltage is applied to the first back gate electrode and the second back gate electrode, a pin homojunction is formed in the indium selenide layer. Each pair of chromium-gold electrodes and the pin homojunction form an indium selenide pin homojunction photodetector. Multiple indium selenide pin homojunction photodetectors constitute an indium selenide pin homojunction photodetector array.

[0008] Furthermore, the two air slots divide the photonic crystal waveguide into a straight waveguide region in the middle and photonic crystal regions located on both sides of the straight waveguide region, with the photonic crystal regions on both sides serving as a double back grid.

[0009] Furthermore, when a voltage is applied to the first back gate electrode and the second back gate electrode, the indium selenide material in the indium selenide layer above the straight waveguide region maintains a near-eigenstate i-type; the first back gate electrode can induce the indium selenide material in the indium selenide layer above the photonic crystal region on one side to form a p-type; the second back gate electrode can induce the indium selenide material in the indium selenide layer above the photonic crystal region on the other side to form an n-type, that is, to form a pin homojunction in the indium selenide layer; The source of each pair of chromium-gold electrodes is connected to the p-type region of the indium selenide layer, and the drain of each pair of chromium-gold electrodes is connected to the n-type region of the indium selenide layer.

[0010] Furthermore, the photonic crystal region is composed of periodically arranged triangular lattice air holes.

[0011] Furthermore, the insulating layer is made of hexagonal boron nitride.

[0012] Furthermore, the on-chip integrated single autocorrelation meter exhibits a rectification ratio greater than 10 under DC testing. 7 Under reverse bias conditions, the dark current is less than 1 pA; the sensitivity can reach 6.1 × 10⁻⁶. -10 W 2 .

[0013] Furthermore, the chromium-gold electrode array consists of 16 pairs of chromium-gold electrodes arranged at equal intervals along the direction of the photonic crystal waveguide.

[0014] Furthermore, the chromium-gold electrode array is in ohmic contact with the indium selenide layer.

[0015] This invention also discloses a method for measuring pulse width information using an on-chip integrated single autocorrelation instrument, comprising the following steps: 1) Applying a negative bias voltage to the first back gate electrode induces the indium selenide material in the indium selenide layer above the photonic crystal waveguide located outside one of the air slots to form a p-type; applying a positive bias voltage to the second back gate electrode induces the indium selenide material in the indium selenide layer above the photonic crystal waveguide located outside the other air slot to form an n-type; the remaining indium selenide material remains in the near-eigenstate i-type; thus forming a pin homojunction in the indium selenide layer; thereby forming multiple indium selenide pin homojunction photodetectors with the chromium-gold electrode array and the indium selenide layer, and the multiple indium selenide pin homojunction photodetectors constitute an indium selenide pin homojunction photodetector array; 2) Divide the pulse to be tested into two equal paths and inject them in reverse from both ends of the middle region between the two air slots; The two pulses to be tested overlap in the middle region between the two air slots, and excite the indium selenide layer to generate a second harmonic signal; 3) Using the aforementioned indium selenide pin homojunction photodetector array, second harmonic signals at different spatial locations are sampled and converted into current intensity distributions. 4) Record the photocurrent intensity output by each indium selenide pin homojunction photodetector in the indium selenide pin homojunction photodetector array, and convert the spatial position of each indium selenide pin homojunction photodetector into relative delay time according to a predetermined space-time mapping relationship. With photocurrent intensity as the vertical axis and relative delay time as the horizontal axis, obtain a single autocorrelation curve, and obtain pulse width information based on the width of the single autocorrelation curve.

[0016] Furthermore, the space-time mapping relationship is determined by the coverage length of the chromium-gold electrode array and the group refractive index of the photonic crystal waveguide.

[0017] Compared with the prior art, the present invention has the following beneficial technical effects: This invention discloses an on-chip integrated single autocorrelator, comprising an SOI substrate, a photonic crystal waveguide, an insulating layer, an indium selenide layer, and a chromium-gold electrode array. The photonic crystal waveguide is located on the upper surface of the SOI substrate and is formed by etching the silicon layer on its upper surface. The insulating layer covers the upper surface of the photonic crystal waveguide, the indium selenide layer is located on the upper surface of the insulating layer, and the chromium-gold electrode array is located on the upper surface of the indium selenide layer. Two air slots divide the photonic crystal waveguide into three electrically isolated segments, achieving electrical isolation between the central region and the two side regions. All functional units are integrated on the SOI substrate, resulting in a compact structure that is compatible with existing silicon-based optoelectronic processes, suitable for mass production, and can be integrated with other photonic functional modules. This solves the problem of traditional discrete autocorrelators being bulky and difficult to integrate with other optoelectronic chips, significantly reducing the system's size, cost, and integration complexity. During measurement, the indium selenide layer features a pin homojunction, ensuring high responsivity and low power consumption of the on-chip integrated single-shot autocorrelator in a low-noise environment. This avoids the carrier recombination loss and thermal noise problems commonly found in traditional on-chip integrated single-shot autocorrelators, thus achieving high-sensitivity, low-noise measurement of ultrafast optical pulses within an integrated on-chip structure. By combining the pin homojunction with an array of equally spaced chromium-gold electrodes, a parallel-operating indium selenide pin homojunction photodetector array is constructed. This indium selenide pin homojunction photodetector array can perform multi-point synchronous, real-time spatial sampling and photoelectric conversion of the second harmonic signal generated by ultrashort pulses propagating along the waveguide, thereby achieving single-shot measurement of the pulse waveform and overcoming the limitation of slow measurement speed in traditional scanning autocorrelators.

[0018] Furthermore, the strong second harmonic generation effect of the indium selenide layer belongs to a second-order nonlinear process, which has a higher nonlinear conversion efficiency compared with the scheme based on the third-order nonlinear (two-photon absorption) mechanism. At the same time, the photonic crystal waveguide enhances the interaction between the light field and the indium selenide layer through mode confinement, further improving the light-matter interaction efficiency, thus enabling the detection sensitivity to reach 6.1 × 10⁻⁶. -10 W 2 It is significantly higher than that of autocorrelators based on traditional two-photon absorption mechanisms.

[0019] This invention also discloses a measurement method for an on-chip integrated single-shot autocorrelation meter, which transforms the traditional method of obtaining autocorrelation curves by scanning point-by-point with time delay into a measurement method based on parallel sampling of spatial location. By injecting two beams of test pulses from opposite ends of the central region, they propagate towards each other within the central region and form a time-domain overlap. Within this time-domain overlap region, the indium selenide layer generates a second harmonic signal, and the intensity of the second harmonic signal varies symmetrically along the waveguide propagation direction with spatial location. This signal is synchronously captured by an indium selenide pin homojunction photodetector array along the waveguide direction. This design allows the instrument to obtain a complete autocorrelation curve through a single injection measurement without adjusting the time delay or performing point-by-point scanning, achieving real-time characterization of non-repetitive, single-shot ultrashort pulses and overcoming the fundamental limitation of traditional scanning autocorrelation meters in being unable to measure single events. Forming a pin homojunction in the indium selenide material is the key step, achieved by applying a back-gate voltage, which is electrically controlled, simple to operate, and reversible. The entire measurement process requires no moving parts for optical path scanning; all optical interactions and photoelectric conversions are completed on an integrated chip. This not only avoids complex optical path calibration and greatly simplifies the operation process, but also significantly reduces measurement errors introduced by mechanical vibration and environmental disturbances, improving measurement stability and repeatability.

[0020] Furthermore, the accuracy of the measurement results is highly dependent on the correspondence between time delay and spatial location. The mapping relationship upon which this method relies is jointly determined by the coverage length of the electrode array and the group refractive index of the photonic crystal waveguide. Because the dispersion characteristics of the photonic crystal waveguide are carefully designed, its group refractive index is stable within the operating wavelength range, and the electrode positions are precisely controlled through micro-nano fabrication, the time-space mapping is linear and accurate, providing a reliable basis for the accurate inversion of pulse width. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of an on-chip integrated single autocorrelation instrument according to the present invention; Figure 2 This is a schematic diagram of the structure of the photonic crystal waveguide region. Figure 3 This is an indium selenide pin homojunction formed under dual back-gate control; Figure 4 The figure shows the test results of the second-order nonlinear photoelectric response characteristics of the indium selenide pin homojunction photodetector. Figure 5 The pulse width characterization results are for an on-chip integrated single autocorrelation instrument based on an indium selenide pin homojunction photodetector array. Figure 6 The figure shows the sensitivity verification results of an on-chip integrated single autocorrelation meter based on an indium selenide pin homojunction photodetector array.

[0022] Among them, 1. SOI substrate; 2. Photonic crystal waveguide; 31. First back gate electrode; 32. Second back gate electrode; 4. Insulating layer; 5. Indium selenide layer; 6. Chromium-gold electrode array; 21. Straight waveguide region; 22. Photonic crystal region; 23. Air slot. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the present invention clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention; that is, the described embodiments are only a part of the embodiments of the present invention, and not all of them.

[0024] The detailed description of the embodiments of the present invention provided in the following drawings is not intended to limit the scope of the claimed invention, but merely to illustrate one selected embodiment. All other embodiments obtained by those skilled in the art based on the drawings and embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0025] The features and performance of the present invention will be further described in detail below with reference to embodiments.

[0026] like Figure 1 As shown, the present invention discloses an on-chip integrated single autocorrelator, including an SOI substrate 1, a photonic crystal waveguide 2, an insulating layer 4, an indium selenide layer 5, and a chromium-gold electrode array 6.

[0027] SOI stands for Silicon on Insulator. SOI substrate 1 is a semiconductor substrate structure whose core feature is that an insulating material is sandwiched between the silicon layer and the supporting substrate. From top to bottom, the layers are silicon, insulating material, and supporting silicon substrate.

[0028] like Figure 2 As shown, the photonic crystal waveguide 2 is a structure formed on the silicon layer of the SOI substrate 1 through photolithography and etching processes. The photonic crystal waveguide 2 consists of a straight waveguide region 21 in the middle and photonic crystal regions 22 on both sides. An air groove 23 is provided between the straight waveguide and the photonic crystal regions 22, dividing the photonic crystal waveguide 2 into three electrically isolated segments to achieve electrical isolation between the straight waveguide region 21 and the photonic crystal regions 22. The photonic crystal regions 22 can serve as part of the photonic crystal waveguide 2 or as independent back gates, thus forming a dual back gate configuration.

[0029] Back gate electrodes are provided on the unetched area of ​​SOI substrate 1, namely a first back gate electrode 31 and a second back gate electrode 32.

[0030] Among them, the photonic crystal region 22 is composed of periodically arranged triangular lattice air holes with a lattice constant of A1 and an air hole diameter of D1; the width of the straight waveguide is W1.

[0031] The insulating layer 4 is located above the photonic crystal waveguide 2; the material of the insulating layer 4 is preferably hexagonal boron nitride.

[0032] The indium selenide layer 5 is laid on the insulating layer 4, and the indium selenide layer 5 forms a pin homojunction under the dual back gate voltage regulation.

[0033] The formation process of indium selenide pin homojunction is as follows: Indium selenide material is laid on insulating layer 4, and the carrier type of indium selenide material is precisely controlled by applying an independent voltage to the back gate electrode to achieve p-type and n-type conduction of indium selenide material, thereby forming indium selenide pin homojunction.

[0034] Specifically, a negative bias voltage is applied to the first back gate electrode 31 to induce hole accumulation in the indium selenide material above the photonic crystal region 22 to form a p-type; a positive bias voltage is applied to the second back gate electrode 32 to induce electron accumulation in the indium selenide material above the photonic crystal region 22 on the other side to form an n-type; since no bias voltage is applied, the indium selenide material above the straight waveguide region 21 maintains a near-eigenstate i-type due to the weakened electric field or near-zero bias, thereby forming an indium selenide pin homojunction.

[0035] A pin homojunction is a classic semiconductor junction consisting of three closely connected layers: a p-type semiconductor, an intrinsic semiconductor (i-region), and an n-type semiconductor.

[0036] The chromium-gold electrode array 6 is disposed above the indium selenide layer 5 and arranged above the photonic crystal region 22. Each pair of chromium-gold electrodes in the chromium-gold electrode array 6 is connected to the p-type region and the n-type region of the indium selenide layer 5 respectively, thereby obtaining an indium selenide pin homojunction photodetector array with rectification and detection functions.

[0037] An indium selenide pin homojunction photodetector array refers to a photodetector array formed by applying a back gate voltage to an indium selenide layer 5 and an uppermost chromium-gold electrode array 6.

[0038] Specifically, the chromium-gold electrode array 6 is in ohmic contact with the indium selenide layer 5. An ohmic contact is a type of electrical contact between a semiconductor and a metal, characterized by extremely low contact resistance and a linear ohmic relationship between current and voltage.

[0039] The chromium-gold electrode array 6 consists of 16 electrode pairs arranged at equal intervals along the direction of the photonic crystal waveguide 2. Each electrode pair includes a pair of chromium-gold electrodes, with one electrode serving as the source and the other as the drain. The first back gate electrode 31 and the second back gate electrode 32 are connected to an external power supply via leads and are capacitively coupled to the indium selenide layer 5 directly above them through the insulating layer 4. Each pair of chromium-gold electrodes forms a pixel unit. Under the gate control of the dual back gate electrodes, the indium selenide layer 5 forms a pin homojunction, which generates and separates photogenerated carriers under the action of incident light and is electrically read out by the pair of chromium-gold electrodes, thus forming an indium selenide pin homojunction photodetector. The 16 indium selenide pin homojunction photodetectors constitute an indium selenide pin homojunction photodetector array.

[0040] like Figure 1 As shown, the present invention fabricates a photonic crystal waveguide 2 on an SOI substrate 1 using electron beam lithography and etching processes; then, an insulating layer 4 is sequentially deposited on the surface of the photonic crystal waveguide 2 using dry transfer technology, and indium selenide material is deposited on the insulating layer 4; the photonic crystal regions 22 on both sides of the photonic crystal waveguide 2 are used as dual back gates, and p-type and n-type conductivity of the indium selenide material is achieved by applying different back gate voltages, thereby obtaining an indium selenide layer 5 with a pin homojunction, and a chromium-gold electrode array 6 is fabricated on it. The rectification ratio of the on-chip integrated single autocorrelator of this invention is greater than 10. 7 The dark current is less than 1 pA. pA is a picoampere, a unit of measurement for electric current.

[0041] Current-voltage tests were performed on a single indium selenide pin junction photodetector on a shielded probe stage in a dark environment at room temperature: the source was grounded, and a voltage was applied between the source and drain, gradually scanning from a negative value to a positive value (range approximately...). (3 to +3V, in small voltage increments); simultaneously, a negative bias voltage is applied to the first back gate electrode 31 to induce hole accumulation in the indium selenide material above the photonic crystal region 22 to form a p-type; a positive bias voltage is applied to the second back gate electrode 32 to induce electron accumulation in the indium selenide material above the photonic crystal region 22 on the other side to form an n-type; the indium selenide material in the middle region maintains a near-intrinsic i-type state, thus establishing p-regions, i-regions, and n-regions within the indium selenide layer 5. The results are recorded as follows: Figure 3 The figure shows a logarithmic curve of current versus voltage. The rectification ratio is calculated as the ratio of current under forward high voltage to current under reverse same amplitude voltage; dark current is taken as... The measured value under 3 V reverse bias conditions is less than 1 pA.

[0042] Nonlinear photoelectric response tests were performed on each indium selenide pin homojunction photodetector in the on-chip integrated single autocorrelation instrument of this invention. The test process is as follows: A 1550 nm subbandgap pulsed light is injected from one end of the straight waveguide region 21 of the photonic crystal waveguide 2, allowing the injected light to propagate within the straight waveguide region 21. The evanescent field formed on the waveguide surface interacts with the upper indium selenide layer 5, achieving photoelectric detection. Measurements were taken under a fixed bias voltage as follows... Figure 4 The photocurrent shown exhibits a power-law relationship with the incident power, and the double logarithmic fitting slope is 2.10 ± 0.04, verifying that the on-chip integrated single-order autocorrelator of this invention possesses typical second-order nonlinear photoelectric response characteristics. This test is a photoelectric performance calibration experiment of the on-chip integrated single-order autocorrelator, used to demonstrate that the on-chip integrated single-order autocorrelator can achieve a significant photocurrent under illumination.

[0043] The measurement method of the on-chip integrated single autocorrelation meter of the present invention includes the following steps: 1) A negative bias voltage is applied to the first back gate electrode 31 to induce hole accumulation in the indium selenide material above the photonic crystal region 22 to form a p-type; a positive bias voltage is applied to the second back gate electrode 32 to induce electron accumulation in the indium selenide material above the photonic crystal region 22 to form an n-type; the indium selenide material in the middle maintains a near-intrinsic i-type state; a pin homojunction is formed in the indium selenide material; The source of each pair of chromium-gold electrodes is connected to the p-type region of the indium selenide layer 5, and the drain is connected to the n-type region of the indium selenide layer 5. Each pair of chromium-gold electrodes and the pin homojunction form an indium selenide pin homojunction photodetector, so that the chromium-gold electrode array 6 and the indium selenide layer 5 form multiple indium selenide pin homojunction photodetectors, and the multiple indium selenide pin homojunction photodetectors constitute an indium selenide pin homojunction photodetector array. 2) The pulse to be tested is divided into two equal paths and injected in reverse from both ends of the straight waveguide region 21 of the photonic crystal waveguide 2; The two pulses under test overlap in the straight waveguide region 21 and excite the indium selenide material in the indium selenide layer 5 to generate a second harmonic generation (SHG) signal. 3) A 16-pair indium selenide pin homojunction photodetector array formed by a chromium-gold electrode array 6 arranged along the waveguide direction samples SHG signals at different spatial locations and converts them into current intensity distributions. 4) Record the photocurrent intensity output by each indium selenide pin homojunction photodetector in the indium selenide pin homojunction photodetector array, and convert the spatial position of each detector into relative delay time according to the predetermined space-time mapping relationship. With photocurrent intensity as the vertical axis and relative delay time as the horizontal axis, obtain the single autocorrelation curve; obtain the pulse width information based on the width of the single autocorrelation curve.

[0044] The space-time mapping relationship is determined by the coverage length of the chromium-gold electrode array 6 on the photonic crystal waveguide 2 (i.e., the geometric length of the array along the waveguide direction) and the group refractive index of the photonic crystal waveguide 2 in the working band.

[0045] In one embodiment, in order to obtain Figure 5 and Figure 6 The autocorrelation test results shown indicate that the array coverage length of the on-chip integrated single autocorrelation instrument used in this invention is 160 μm, the group refractive index of photonic crystal waveguide 2 in the working band is 9.5, and the corresponding total time delay window is approximately 7.16 ps. The pulse width can be obtained by taking the full width at half maximum (FWHM) of the obtained autocorrelation curve and combining it with the deconvolution factor of the selected pulse shape.

[0046] Figure 5 This paper presents a comparison of the on-chip integrated single-shot autocorrelation instrument of this invention and a commercial autocorrelation instrument under the same test conditions, performing sequential measurements on the same pulsed laser source. During testing, the pulsed laser was first coupled into the on-chip integrated single-shot autocorrelation instrument of this invention, and the single-shot autocorrelation curve was obtained according to the aforementioned steps, with the pulse width calculated based on the full width at half maximum (FWHM). Subsequently, without changing the laser settings and incident conditions (center wavelength, repetition frequency, average power, and polarization remained consistent), the same laser source was switched to the commercial autocorrelation instrument, a reference autocorrelation curve was obtained, and the pulse width was calculated. It can be seen that the two autocorrelation curves are highly consistent in peak position, curve shape, and FWHM, thus demonstrating that the on-chip integrated single-shot autocorrelation instrument of this invention has comparable measurement accuracy to the commercial autocorrelation instrument in pulse width characterization. Figure 5 As shown.

[0047] In this invention, sensitivity is defined as the minimum detectable peak power P, provided that the autocorrelation curve can still be clearly identified and the pulse width extraction requirements are met. peak With the corresponding average power P avg The product of P, where P peak and P avg These represent the peak power and average power of the input pulse, respectively. Specifically, while maintaining consistent light source parameters and coupling conditions, different input powers are sequentially injected into photonic crystal waveguide 2 to obtain... Figure 6 The autocorrelation curve shown. Figure 6 In the diagram, the four solid lines represent the test results (reference curves) of a commercial autocorrelation instrument; the scatter points of different shapes superimposed on them form the autocorrelation curves obtained by the on-chip integrated single autocorrelation instrument of this invention under the same input power.

[0048] When P avg = 30 μW, P peak At 150 mW, the sensitivity is 4.5 × 10⁻⁶. -6 W 2The curves of both are highly consistent; When P avg =0.60 μW, P peak At 3.0 mW, the sensitivity is 1.8 × 10⁻⁶. -9 W 2 , good overlap; When P avg =0.35 μW, P peak At 1.75 mW, the sensitivity is 6.1 × 10⁻⁶. -10 W 2 The curves of the single autocorrelation instrument integrated on the chip in this invention are still clearly distinguishable and the pulse width can be extracted; When P avg =0.15 μW, P peak At a power of 0.75 mW, the sensitivity is 1.0 × 10⁻⁶. -10 W 2 The curve shows broadening and deformation, and noise dominates, no longer meeting the judgment criteria.

[0049] In summary, the usable sensitivity of the on-chip integrated single autocorrelation meter of this invention is 6.1 × 10⁻⁶. -10 W 2 ,correspond Figure 6 The third set of curves in the diagram.

[0050] The above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the present invention.

Claims

1. An on-chip integrated single autocorrelation meter, characterized in that, The system includes an SOI substrate (1), a photonic crystal waveguide (2) is formed by etching on the silicon layer of the SOI substrate (1), and an insulating layer (4), an indium selenide layer (5), and a chromium-gold electrode array (6) are sequentially disposed above the photonic crystal waveguide (2). Two air slots (23) are provided on the photonic crystal waveguide (2) to divide the photonic crystal waveguide (2) into three segments to achieve electrical isolation; The chromium-gold electrode array (6) is composed of multiple pairs of chromium-gold electrodes arranged at equal intervals along the direction of the photonic crystal waveguide (2). One electrode in each pair of chromium-gold electrodes serves as the source and the other electrode serves as the drain. Both the source and the drain are connected to the indium selenide layer (5). A first back gate electrode (31) and a second back gate electrode (32) are provided on the unetched area of ​​the SOI substrate (1). When a voltage is applied to the first back gate electrode (31) and the second back gate electrode (32), a pin homojunction is formed in the indium selenide layer (5). Each pair of chromium-gold electrodes and the pin homojunction form an indium selenide pin homojunction photodetector. Multiple indium selenide pin homojunction photodetectors constitute an indium selenide pin homojunction photodetector array.

2. The on-chip integrated single autocorrelation instrument according to claim 1, characterized in that, Two air slots (23) divide the photonic crystal waveguide (2) into a straight waveguide region (21) in the middle region and photonic crystal regions (22) on both sides of the straight waveguide region (21). The photonic crystal regions (22) on both sides serve as a double back grid.

3. The on-chip integrated single autocorrelation instrument according to claim 2, characterized in that, When a voltage is applied to the first back gate electrode (31) and the second back gate electrode (32), the indium selenide material in the indium selenide layer (5) above the straight waveguide region (21) maintains a near-intrinsic i-type state; the first back gate electrode (31) can induce the indium selenide material in the indium selenide layer (5) above the photonic crystal region (22) on one side to form a p-type state; the second back gate electrode (32) can induce the indium selenide material in the indium selenide layer (5) above the photonic crystal region (22) on the other side to form an n-type state, that is, a pin homojunction is formed in the indium selenide layer (5); The source of each pair of chromium-gold electrodes is connected to the p-type region of the indium selenide layer (5), and the drain of each pair of chromium-gold electrodes is connected to the n-type region of the indium selenide layer (5).

4. The on-chip integrated single autocorrelation instrument according to claim 2, characterized in that, The photonic crystal region (22) is composed of periodically arranged triangular lattice air holes.

5. The on-chip integrated single autocorrelation instrument according to claim 1, characterized in that, The insulating layer (4) is made of hexagonal boron nitride.

6. An on-chip integrated single autocorrelation instrument according to claim 1, characterized in that, The chip integrates a single autocorrelation meter, achieving a rectification ratio greater than 10 under DC testing. 7 Under reverse bias conditions, the dark current is less than 1 pA; the sensitivity can reach 6.1 × 10⁻⁶. -10 W 2 .

7. The on-chip integrated single autocorrelation instrument according to claim 1, characterized in that, The chromium-gold electrode array (6) consists of 16 pairs of chromium-gold electrodes arranged at equal intervals along the direction of the photonic crystal waveguide (2).

8. The on-chip integrated single autocorrelation instrument according to claim 1, characterized in that, The chromium-gold electrode array (6) is in ohmic contact with the indium selenide layer (5).

9. A method for measuring pulse width information using an on-chip integrated single autocorrelation instrument as described in any one of claims 1 to 8, characterized in that, Includes the following steps: 1) Apply a negative bias voltage to the first back gate electrode (31) to induce the indium selenide material in the indium selenide layer (5) above the photonic crystal waveguide (2) outside one of the air slots (23) to form a p-type; apply a positive bias voltage to the second back gate electrode (32) to induce the indium selenide material in the indium selenide layer (5) above the photonic crystal waveguide (2) outside the other air slot (23) to form an n-type; the remaining indium selenide material remains in the near-eigenstate i-type; then a pin homojunction is formed in the indium selenide layer (5); so that the chromium gold electrode array (6) and the indium selenide layer (5) form multiple indium selenide pin homojunction photodetectors, and the multiple indium selenide pin homojunction photodetectors constitute an indium selenide pin homojunction photodetector array; 2) Divide the pulse to be tested into two equal paths and inject them in reverse from both ends of the middle region between the two air slots (23); The two pulses to be tested overlap in the middle region between the two air slots (23) and excite the indium selenide layer (5) to generate a second harmonic signal; 3) Using the aforementioned indium selenide pin homojunction photodetector array, second harmonic signals at different spatial locations are sampled and converted into current intensity distributions. 4) Record the photocurrent intensity output by each indium selenide pin homojunction photodetector in the indium selenide pin homojunction photodetector array, and convert the spatial position of each indium selenide pin homojunction photodetector into relative delay time according to a predetermined space-time mapping relationship. With photocurrent intensity as the vertical axis and relative delay time as the horizontal axis, obtain a single autocorrelation curve, and obtain pulse width information based on the width of the single autocorrelation curve.

10. The measurement method according to claim 9, characterized in that, The space-time mapping relationship is determined by the coverage length of the chromium-gold electrode array (6) and the group refractive index of the photonic crystal waveguide (2).

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