Gallium nitride power device packaging structure and electronic equipment

Abstract

The invention provides a gallium nitride power device packaging structure and electronic equipment, the gallium nitride power device packaging structure comprises a main body structure, the main body structure comprises a substrate, the substrate comprises a central bonding pad area and a plurality of interconnection outer pins corresponding to the central bonding pad area, and the substrate further comprises a first independent outer pin and a second independent outer pin which are independently arranged relative to the central bonding pad area; the DBC ceramic substrate and the gallium nitride chip are pasted on the central bonding pad area side by side, and the Mosfet chip is pasted on the DBC ceramic substrate. The source electrode of the Mosfet chip is connected with a plurality of interconnected outer pins on the substrate through a first copper sheet; the source electrode of the Mosfet chip is further connected with the first independent outer pin through a metal lead, and the gate electrode of the Mosfet chip is connected with the second independent outer pin through a metal lead. Copper sheet interconnection with good heat dissipation performance is adopted to replace copper wire bonding, and the chip and the lead frame are directly connected through copper and metal sheets in a copper sheet interconnection technology, so that the resistance is reduced by more than 40%, and meanwhile, the heat dissipation efficiency is improved.

Description

Technical Field

[0001] This invention relates to the field of chips, and more specifically, to a gallium nitride power device packaging structure and electronic device. Background Technology

[0002] Gallium nitride (GaN) is a synthetically produced semiconductor material and a typical representative of third-generation semiconductor materials. GaN possesses characteristics such as a large bandgap, high thermal conductivity, high temperature resistance, radiation resistance, acid and alkali resistance, high strength, and high hardness. Currently, it is mainly used in core components in fields such as 5G, new energy vehicles, charging piles, photovoltaics, and rail transportation. GaN wafer material has characteristics such as high hardness, hard coating, and brittleness, which allows it to be used in TOLL (Thin Outline Leadless) packaging.

[0003] Direct Bond Copper (DBC) is a method of bonding highly insulating alumina (copper ceramic substrate) to ceramic substrates. Al 2 O 3) or aluminum nitride ( AlN A novel composite material consisting of a ceramic substrate coated with copper metal. The DBC substrate is heated at high temperature to directly sinter copper foil onto the ceramic surface, forming a eutectic melt, thereby achieving the bonding between the ceramic substrate and the copper plate.

[0004] In TOLL packaging, it is necessary to achieve three-dimensional stacking and integration of gallium nitride (GaN) chips, MOSFET chips and DBC substrates. How to improve the performance of packaged products has become a problem that has been continuously concerned by those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a gallium nitride power device packaging structure and electronic device to improve the above-mentioned problems.

[0006] To achieve the above objectives, the technical solutions adopted in the embodiments of the present invention are as follows: In a first aspect, embodiments of the present invention provide a gallium nitride power device packaging structure, including a main structure, the main structure comprising: a substrate, the substrate including a central pad area and a plurality of corresponding interconnect external pins, the substrate further including a first independent external pin and a second independent external pin independently disposed relative to the central pad area; a DBC ceramic substrate and a gallium nitride chip pasted side by side to the central pad area, and a MOSFET chip pasted to the DBC ceramic substrate; the source of the MOSFET chip is connected to the plurality of interconnect external pins on the substrate through a first copper sheet; the source of the MOSFET chip is also connected to the first independent external pin through a first metal lead, and the gate of the MOSFET chip is also connected to the second independent external pin through a second metal lead.

[0007] Secondly, embodiments of the present invention provide an electronic device including the gallium nitride power device packaging structure described above.

[0008] Compared to existing technologies, the gallium nitride power device packaging structure and electronic device provided in this invention include a main structure, comprising: a substrate, the substrate including a central pad area and a plurality of corresponding interconnect external pins, the substrate also including a first independent external pin and a second independent external pin independently disposed relative to the central pad area; a DBC ceramic substrate and a gallium nitride chip pasted side-by-side on the central pad area, and a MOSFET chip pasted on the DBC ceramic substrate; the source of the MOSFET chip is connected to the plurality of interconnect external pins on the substrate through a first copper sheet; the source of the MOSFET chip is also connected to the first independent external pin through a first metal lead, and the gate of the MOSFET chip is also connected to the second independent external pin through a second metal lead. The use of copper sheet interconnects with good heat dissipation instead of copper wire bonding, the copper sheet interconnect technology directly connects the chip and the lead frame through copper metal sheets, reducing resistance by more than 40% while improving heat dissipation efficiency.

[0009] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0010] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 This is a top view of the gallium nitride power device package structure provided in an embodiment of the present invention.

[0012] Figure 2 This is a cross-sectional schematic diagram of the encapsulated gallium nitride power device packaging structure provided in an embodiment of the present invention.

[0013] In the diagram: 10-Fourth metal lead; 11-Third metal lead; 13-Second metal lead; 14-First metal lead; 20-Molded package; 200-Substrate; 202-Second independent external pin; 203-First independent external pin; 204-First interconnect external pin; 205-Second interconnect external pin; 206-Third interconnect external pin; 207-Fourth interconnect external pin; 208-Fifth interconnect external pin; 209-Sixth external pin; 210-Central pad area; 220-Third independent external pin; 300-DBC ceramic substrate; 400-GaN chip; 402-First gate pad; 404-Second gate pad; 406-Drain; 500-MOSFET chip; 502-Gate; 504-Source; 600-First copper sheet; 700-Second copper sheet; 800-Third copper sheet. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0015] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0016] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, in the description of this invention, terms such as "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0017] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0018] In the description of this invention, it should be noted that the terms "upper," "lower," "inner," "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of this invention is usually placed when in use. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0019] In the description of this invention, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set" and "connection" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0020] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.

[0021] Please refer to Figure 1 , Figure 1 This is a top view of a gallium nitride (GaN) power device package structure provided in an embodiment of the present invention. The GaN power device package structure includes a main structure, which includes: The substrate 200 includes a central pad area 210 and a plurality of corresponding external interconnect pins. The substrate 200 also includes a first independent external pin 203 and a second independent external pin 202, which are independently disposed relative to the central pad area 210. The plurality of external interconnect pins includes a first external interconnect pin 204, a second external interconnect pin 205, a third external interconnect pin 206, a fourth external interconnect pin 207, a fifth external interconnect pin 208, and a sixth external pin 209. It should be noted that the number of external pins interconnecting with the central pad area 210 may be greater than, but is not limited to, a certain number. Figure 1 The six shown.

[0022] In one alternative implementation, the first independent external pin 203, the second independent external pin 202, and a plurality of interconnecting external pins are all located on the right side of the central pad area 210.

[0023] The DBC ceramic substrate 300 and gallium nitride chip 400 are attached side by side to the central pad area 210, and the MOSFET chip 500 is attached to the DBC ceramic substrate 300.

[0024] The DBC ceramic substrate 300 is attached to the side near the interconnect pins. In this embodiment of the invention, the adhesive may be, but is not limited to, high thermal conductivity sintered silver paste, and may also be solder wire or solder paste.

[0025] The source 504 of the MOSFET chip 500 is connected to multiple external interconnect pins on the substrate 200 via a first copper plate 600. One end of the first copper plate 600 is connected to the source 504 of the MOSFET chip 500, and the other end is connected to the first external interconnect pin 204, the second external interconnect pin 205, the third external interconnect pin 206, the fourth external interconnect pin 207, the fifth external interconnect pin 208, and the sixth external interconnect pin 209 on the substrate 200. Figure 1 In this diagram, Clip represents a copper sheet, Clip1 represents the first copper sheet, Clip2 represents the second copper sheet, and Clip3 represents the third copper sheet.

[0026] The source 504 of the MOSFET chip 500 is also connected to the first independent external pin 203 via the first metal lead 14, and the gate 502 of the MOSFET chip 500 is also connected to the second independent external pin 202 via the second metal lead 13.

[0027] In the gallium nitride power device packaging structure provided in this embodiment of the invention, copper sheet interconnect with good heat dissipation is used instead of copper wire bonding. The copper sheet interconnect technology directly connects the chip and the lead frame through copper metal sheets, which reduces the resistance by more than 40% and improves the heat dissipation efficiency.

[0028] Optionally, the source of the gallium nitride chip 400 is connected to the DBC ceramic substrate 300.

[0029] Optionally, the source of the gallium nitride chip 400 is connected to the DBC ceramic substrate 300 via a second copper sheet 700, with one end of the second copper sheet 700 connected to the DBC ceramic substrate 300 and the other end of the second copper sheet 700 connected to the source of the gallium nitride chip 400.

[0030] Optionally, the substrate 200 also includes a third independent external pin 220 disposed independently relative to the central pad area 210.

[0031] The drain 406 of the gallium nitride chip 400 is connected to the third independent external pin 220.

[0032] Optionally, the drain 406 of the gallium nitride chip 400 is connected to the third independent external pin 220 via the third copper sheet 800. The third independent external pin 220 may, but is not limited to, be a long strip pin. The third independent external pin 220 is used to connect the edge length of the third copper sheet to the edge length of the third copper sheet 800.

[0033] Optionally, the third independent external pin 220 is a strip pin.

[0034] Optionally, the gate of the gallium nitride chip 400 is connected to the source 504 of the MOSFET chip 500 via metal leads.

[0035] The gate of the gallium nitride chip 400 includes a first gate pad 402 and a second gate pad 404. The metal lead corresponding to the first gate pad 402 is a third metal lead 11, and the metal lead corresponding to the second gate pad 404 is a fourth metal lead 10.

[0036] Optionally, in the application of the gallium nitride power device packaging structure provided in this embodiment of the invention, an inductor is provided after the source 504 of the MOSFET chip 500, and then grounded. Therefore, at the instant the current is interrupted, the charge remaining in the inductor after the source 504 of the MOSFET chip 500 will be released back in reverse, which affects the performance and stability of the device. By adding a KS (Kelvin Source), the KS pin separates the source inductance of the MOSFET chip 500 from the driving circuit, thereby reducing the inductance of the source line in the package, improving the switching speed of the MOSFET, and reducing switching losses.

[0037] Alternatively, the metal leads may be made of gold, copper, or aluminum.

[0038] Optionally, the gallium nitride power device package structure also includes a molding compound 20, which encapsulates the main body structure and exposes all external leads on the back of the central pad area 210. Please refer to [reference needed]. Figure 2 , Figure 2 This is a cross-sectional schematic diagram of the encapsulated gallium nitride power device packaging structure provided in an embodiment of the present invention.

[0039] This invention also provides an electronic device including the gallium nitride power device packaging structure described above.

[0040] In summary, the gallium nitride power device packaging structure and electronic device provided by this invention include a main structure, which comprises: a substrate, the substrate including a central pad area and a plurality of corresponding interconnect external pins, the substrate also including a first independent external pin and a second independent external pin independently disposed relative to the central pad area; a DBC ceramic substrate and a gallium nitride chip pasted side by side on the central pad area, and a MOSFET chip pasted on the DBC ceramic substrate; the source of the MOSFET chip is connected to the plurality of interconnect external pins on the substrate through a first copper sheet; the source of the MOSFET chip is also connected to the first independent external pin through a first metal lead, and the gate of the MOSFET chip is also connected to the second independent external pin through a second metal lead. The use of copper sheet interconnects with good heat dissipation instead of copper wire bonding, and the direct connection of the chip and lead frame through copper sheet interconnects, reduces resistance by more than 40% while improving heat dissipation efficiency.

[0041] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

[0042] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A gallium nitride power device packaging structure, characterized in that, Includes a main structure, the main structure comprising: The substrate (200) includes a central pad area (210) and a plurality of corresponding interconnect external pins. The substrate (200) also includes a first independent external pin (203) and a second independent external pin (202) that are independently disposed relative to the central pad area (210). The DBC ceramic substrate (300) and gallium nitride chip (400) are pasted side by side on the central pad area (210), and the MOSFET chip (500) is pasted on the DBC ceramic substrate (300). The source (504) of the MOSFET chip (500) is connected to a plurality of interconnect external pins on the substrate (200) via a first copper sheet (600); The source (504) of the MOSFET chip (500) is also connected to the first independent external pin (203) via the first metal lead (14), and the gate (502) of the MOSFET chip (500) is also connected to the second independent external pin (202) via the second metal lead (13).

2. The gallium nitride power device packaging structure as described in claim 1, characterized in that, The source of the gallium nitride chip (400) is connected to the DBC ceramic substrate (300).

3. The gallium nitride power device packaging structure as described in claim 2, characterized in that, The source of the gallium nitride chip (400) is connected to the DBC ceramic substrate (300) via a second copper sheet (700).

4. The gallium nitride power device packaging structure as described in claim 1, characterized in that, The substrate (200) also includes a third independent external pin (220) that is independently disposed relative to the central pad area (210). The drain (406) of the gallium nitride chip (400) is connected to the third independent external pin (220).

5. The gallium nitride power device packaging structure as described in claim 4, characterized in that, The drain (406) of the gallium nitride chip (400) is connected to the third independent external pin (220) via a third copper sheet (800).

6. The gallium nitride power device packaging structure as described in claim 5, characterized in that, The third independent external pin (220) is a long strip pin.

7. The gallium nitride power device packaging structure as described in claim 1, characterized in that, The gate of the gallium nitride chip (400) is connected to the source (504) of the MOSFET chip (500) via a metal lead.

8. The gallium nitride power device packaging structure as described in claim 7, characterized in that, Metal leads are made of gold, copper, or aluminum.

9. The gallium nitride power device packaging structure as described in claim 1, characterized in that, The gallium nitride power device package structure also includes a molding compound (20), which is wrapped around the main structure and exposes all the external pins on the back of the central pad area (210).

10. An electronic device, characterized in that, The package structure of gallium nitride power devices as described in any one of claims 1-9.

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