Dual-core multiplexing-based ff-fb cooperative four-unit active filter
By using a dual-core multiplexed FF-FB coordinated four-unit active filter, and utilizing multiplexed operational amplifiers and gain multiplier operators G3 and G4, high-efficiency noise suppression of the active filter at high frequencies is achieved, solving the problems of insufficient gain and increased size, and improving the practicality and robustness of the circuit.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SOUTH CHINA UNIV OF TECH
- Filing Date
- 2026-03-24
- Publication Date
- 2026-06-19
Smart Images

Figure CN121923618B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of electronic circuits, specifically relating to an FF-FB cooperative four-unit active filter based on dual-core multiplexing. Background Technology
[0002] As modern power electronic systems continue to evolve towards higher frequencies, higher efficiency, and higher density, the operating frequency of switching power supplies is constantly increasing, and the power density is significantly increasing. While this trend optimizes power supply size and efficiency, it also brings more severe electromagnetic compatibility challenges, among which common-mode electromagnetic interference (EMI) is particularly prominent. The rapid changes in voltage and current caused by high-frequency switching generate significant common-mode noise through parasitic capacitance coupling. This noise not only conducts along the power lines but also radiates and propagates in the form of electric and magnetic fields, interfering with surrounding sensitive electronic equipment and even affecting the system's own reliability and safety. Traditional passive EMI filters mainly rely on bulky inductors, capacitors, and common-mode chokes to form an LC network for noise suppression. However, their limitations become increasingly apparent in high-frequency applications. Therefore, developing common-mode interference suppression technology based on active devices has broad prospects.
[0003] Current active EMI filters mainly include eight basic types: voltage / current sampling, voltage / current compensation, and feedback / feedforward techniques. Some emerging filter structures include basic cascading and multiplexing techniques. Cascading technology connects two different topologies in series to create a completely new circuit, while multiplexing technology combines feedforward and feedback techniques.
[0004] Although existing technologies have made significant progress, traditional single-loop feedback current sampling and compensation structures are simple and their parameter design is intuitive. However, they are affected by loop feedback, and to maintain system stability, gain must be sacrificed at high frequencies. While feedforward current sampling and compensation offer high gain, they require extremely high accuracy of the compensation branch transfer function G2, which must approach 1 infinitely. Therefore, achieving higher insertion loss in practical applications is difficult, making it less than ideal. Recently emerging simple composite structures can approximate the insertion loss of both topologies by linear superposition. However, in real-world high-noise common-mode environments, neither a single structure nor simple linear superposition can guarantee excellent noise suppression performance. Ultimately, large-capacity capacitors are still needed to increase bandwidth, leading to increased filter size. In other words, maximizing filter cost and filtering efficiency within limited bandwidth and permissible component size constraints has become a major challenge for modern filters.
[0005] Furthermore, although current active filters are topologically cascaded, each superposition of topologies introduces a completely new operational amplifier, leading to increased costs and insufficient component utilization. Simultaneously, current active filters generally suffer from low sensitivity of the gain stage to total insertion loss; most filters have a gain sensitivity of less than 1, meaning that even adjusting and improving the filter's gain stage will ultimately have limited impact on the system's filtering performance.
[0006] In conclusion, solving the above problems is an urgent task. Summary of the Invention
[0007] The main objective of this invention is to overcome the shortcomings and deficiencies of the prior art and provide an FF-FB cooperative four-unit active filter based on dual-core multiplexing. It utilizes a multiplexed operational amplifier to complete feedforward current sampling and current compensation, and completes compensation at the source and load ends of the current transformer through two branches, thereby realizing a second structure multiplexing and solving the problem of increasing the number of operational amplifiers due to topological addition.
[0008] To achieve the above objectives, the present invention adopts the following technical solution:
[0009] In a first aspect, the present invention provides an FF-FB cooperative four-unit active filter based on dual-core multiplexing, comprising the following steps:
[0010] The system comprises a noise source section, a load LISN network section, and an active filter section. The active filter section includes a current sampling branch, a first operational amplifier module, a second operational amplifier module, a voltage sampling branch, several current compensation branches, a first complementary output stage circuit, and a second complementary output stage circuit. The two ends of the noise source section are connected to the left side of the active filter section, and the load LISN network section is connected to the right side of the active filter section.
[0011] The current sampling branch includes a current transformer (CT) and a sampling resistor (R). L The current transformer CT includes an L line, an N line, and a secondary side, the two ends of which are connected to the sampling resistor R. L connect;
[0012] The input terminal of the first operational amplifier module is connected to both ends of the secondary side, and the output terminal is connected to the input of the first complementary output stage circuit; the inverting input terminal of the second operational amplifier module is connected to both ends of the left side of the current transformer CT through a voltage sampling branch, and the output terminal is connected to the input of the second complementary output stage circuit. The voltage sampling branch includes a resistor R3 and a capacitor C1. The resistor R3 is connected in series with the parallel capacitor C1, and the parallel capacitor C1 is connected to both ends of the left side of the current transformer CT.
[0013] The output terminal of the first complementary output stage circuit is connected to the two ends of the right side of the current transformer CT through the first current compensation branch, and is also connected to the two ends of the left side of the current transformer CT through the second current compensation branch; the output terminal of the second complementary output stage circuit is connected to the two ends of the right side of the current transformer CT through the third current compensation branch, and is also connected to the two ends of the left side of the current transformer CT through the fourth current compensation branch.
[0014] As a preferred technical solution, the L-line and N-line windings have opposite winding directions and the same number of turns.
[0015] As a preferred technical solution, the first operational amplifier module includes resistors R1 and R2 and operational amplifier OP1. The inverting input terminal of operational amplifier OP1 is connected to resistor R1, and resistor R2 is connected in parallel between the inverting input terminal and the output terminal. The non-inverting input terminal is connected to resistor R1, and the non-inverting input terminal is grounded through resistor R2. Resistors R1 and R2 are connected in parallel.
[0016] As a preferred technical solution, the second operational amplifier module includes resistors R4 and R5 and operational amplifier OP2. Resistor R4 is connected in parallel between the inverting input terminal and the output terminal of operational amplifier OP2, and the non-inverting input terminal is grounded through resistor R5.
[0017] As a preferred technical solution, the resistor R5 needs to meet the following requirements: .
[0018] As a preferred technical solution, the current compensation branch includes a first current compensation branch, a second current compensation branch, a third current compensation branch and a fourth current compensation branch, each branch including two branches, which are respectively connected to the L line and N line of the current transformer CT.
[0019] The first current compensation branch includes a capacitor C4 and a resistor R8, which are connected in series.
[0020] The second current compensation branch includes a capacitor C5 and a resistor R9, which are connected in series.
[0021] The third current compensation branch includes a capacitor C2 and a resistor R6, which are connected in series.
[0022] The fourth current compensation branch includes a capacitor C3 and a resistor R7, which are connected in series.
[0023] As a preferred technical solution, the first complementary output stage circuit or the second complementary output stage circuit includes an input terminal, complementary power transistors, a bias circuit, a voltage source, and an output terminal. The complementary power transistors include an NPN type T1 and a PNP type T2. The bias circuit includes a resistor R.Ⅰ Resistance R Ⅱ Resistance R Ⅲ Diodes D1 and D2; the bias circuit is connected to voltage sources +Vcc and -Vcc respectively, and the resistor R... Ⅰ Resistance R Ⅱ Diode D1, diode D2, and resistor R Ⅲ The resistors R are connected in series in sequence. Ⅱ The cathode of diode D1 is connected to the anode of diode D1, and the cathode of diode D1 is connected to the anode of diode D2. The emitters of diodes T1 and T2 are connected together. The collector of diode T1 is connected to a voltage source +Vcc, the collector of voltage source T2 is connected to a voltage source -Vcc, and the base of diode T1 is connected to a resistor R. Ⅰ and resistance R Ⅱ Between them, the base of T2 is connected to the cathode of diode D2, the cathode of diode D1 is the input terminal, and the base of T1 is the output terminal.
[0024] As a preferred technical solution, the gain multiplication operator G3 and the gain multiplication operator G4 satisfy the following:
[0025] ,
[0026] ,
[0027] Where G1 is the transfer function of the feedforward branch, G2 is the transfer function of the compensation branch, and Z... s Z is the source impedance. L Let S be the load impedance and S be the final insertion loss.
[0028] As a preferred technical solution, the noise source is a flyback converter with a source impedance Z. S It is 250-500Ω.
[0029] As a preferred technical solution, the load impedance Z L It is equivalent to 25Ω.
[0030] Compared with the prior art, the present invention has the following advantages and beneficial effects:
[0031] (1) This invention is based on a low-cost and high-efficiency structure with dual operational amplifiers. This model integrates four circuit topologies into one through double reuse. First, it uses a multiplexed operational amplifier to complete feedforward current sampling and current compensation. Then, it samples the residual voltage and uses another operational amplifier to complete compensation at the source and load ends of the current transformer via two branches, thereby realizing a second structure reuse. This filter system with four branches of inner and outer loops theoretically has excellent noise suppression performance and solves the problem of increasing the number of operational amplifiers with the increase of topology.
[0032] (2) This invention constructs two additional feedback paths, coupling the independent and controllable gain multiplication operators G3 and G4 with the (1-G2) feedforward path and (1+G1) feedback path in the main circuit, respectively. This unique coupling generates two core advantages: First, G3 and G4 act as adjustable "leverages," effectively relaxing the stringent precision requirements of parameters such as G2 in traditional feedforward structures to achieve high gain, thereby improving the practicality and robustness of the circuit. Second, while satisfying the predetermined frequency roll-off characteristics, this structure maximizes the integration and utilization of the contributions of all gain factors (G1, G2, G3, G4), thus achieving excellent insertion loss and filtering performance over a wide bandwidth. It solves the problem of insufficient gain caused by the inability to precisely control the feedforward in traditional laboratory settings and the problem of not being able to obtain good gain with single-loop control.
[0033] (3) The G3 and G4 dual-gain multiplication operators introduced in this invention not only provide additional degrees of freedom for adjustment, but also achieve multi-precision collaborative control through their inherent asymmetric sensitivity characteristics. Simultaneously, they exhibit a sensitivity to the newly introduced gain element far greater than 1, and the higher sensitivity of the insertion loss S to G4 is of great significance for laboratory component selection and filter circuit debugging. In high-precision applications, precision resistors can be used to implement the G4 loop, while ordinary resistors can be used for the G3 loop, optimizing costs while ensuring performance. For rapid calibration systems, wide-range rapid convergence can be achieved first through G4, followed by fine calibration through G3, thereby significantly shortening the debugging time. Attached Figure Description
[0034] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0035] Figure 1 This is a circuit schematic diagram of a dual-core multiplexed FF-FB collaborative four-unit active filter, noise source, and load according to an embodiment of the present invention.
[0036] Figure 2 This is a schematic diagram of the structure of a current transformer according to an embodiment of the present invention;
[0037] Figure 3 This is a circuit topology diagram of a dual-core multiplexed FF-FB cooperative four-unit active filter based on an embodiment of the present invention;
[0038] Figure 4 This is a flowchart illustrating the principle of a dual-core multiplexed FF-FB collaborative four-unit active filter according to an embodiment of the present invention.
[0039] Figure 5 This is a schematic diagram of the complementary output stage circuit according to an embodiment of the present invention;
[0040] Figure 6 This is a schematic diagram of a LISN network according to an embodiment of the present invention;
[0041] Figure 7 This is a schematic diagram comparing the effects of an embodiment of the present invention with a filterless structure;
[0042] Figure 8 This is a schematic diagram comparing the filtering effect of an embodiment of the present invention with that of a traditional single-ring structure;
[0043] Figure 9 This is a schematic diagram comparing the filtering effects of an embodiment of the present invention with those of an emerging multiplexing structure. Detailed Implementation
[0044] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present application, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present application without creative effort are within the scope of protection of the present application.
[0045] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application can be combined with other embodiments.
[0046] FF: Feed-Forward, feed forward.
[0047] FB: Feedback.
[0048] CSCC: Current Sampling, Current Compensation.
[0049] VSCC: Voltage Sampling, Current Compensation.
[0050] Please see Figure 1In this invention, the directional terms "left side" and "right side" are defined with reference to the current transformer (CT). "Left side" is defined with reference to the left side of the current transformer (CT), and "right side" is defined with reference to the right side of the current transformer (CT). Other directional terms such as "above" and "below" are defined in the same way.
[0051] Please see Figure 1 This embodiment provides a dual-core multiplexed FF-FB collaborative four-unit active filter, including a noise source section, a load LISN network section, and an active filter section. The active filter section includes a current sampling branch, a first operational amplifier module, a second operational amplifier module, a voltage sampling branch, several current compensation branches, a first complementary output stage circuit, and a second complementary output stage circuit. The two ends of the noise source section are connected to the two ends on the left side of the active filter section, and the load LISN network section is connected to the two ends on the right side of the active filter section. The complementary output stage circuit can eliminate crossover distortion by constructing a reverse compensation branch and a feedforward current compensation branch.
[0052] Among them, such as Figure 2 As shown, this embodiment uses a three-winding coupling to form a current transformer (CT). The windings on the L and N lines have opposite directions and the same number of turns to filter out differential-mode signals and transmit the current signal to the secondary side. The current signal passes through the sampling resistor R. L This is converted into a voltage signal, so the current transformer CT and the sampling resistor R... L Together they form the current sampling branch.
[0053] In the first operational amplifier module, the input terminal is connected to both ends of the secondary side, and the output terminal is connected to the input of the first current compensation branch; the inverting input terminal of the second operational amplifier module is connected to both ends of the left side of the current transformer CT through the voltage sampling branch, and the output terminal is connected to the input of the second current compensation branch. The voltage sampling branch includes a resistor R3 and a capacitor C1. The resistor R3 and the capacitor C1 are connected in series, and the capacitor C1 is connected to both ends of the left side of the current transformer CT.
[0054] Furthermore, the first operational amplifier module includes resistors R1 and R2 and operational amplifier OP1. The inverting input terminal of operational amplifier OP1 is connected to resistor R1, and resistor R2 is connected in parallel between the inverting input terminal and the output terminal. The non-inverting input terminal is connected to resistor R1, and the non-inverting input terminal is grounded through resistor R2. Resistors R1 and R2 are connected in parallel.
[0055] Resistor R1 is connected to the inverting input of operational amplifier OP1, and resistor R2 is connected between the inverting input and the output stage to form feedback. The non-inverting input of the operational amplifier is connected to a symmetrical R1R2 structure to realize the inverse proportional amplification of the voltage of the previous stage, forming the main gain stage.
[0056] The output stage of operational amplifier OP1 is connected to a complementary output stage to eliminate crossover distortion, thereby amplifying the current and preventing the output current from saturating. Simultaneously, reverse compensation current is injected into the output of the complementary output stage through a series branch of C4 and R8, forming a feedback current compensation branch. To enable circuit reuse without introducing a new operational amplifier and reduce cost, a feedforward current compensation branch is formed through a series branch of C5 and R9, completing the integration of current sampling and current compensation with feedback.
[0057] It should be noted that each of the above current compensation branches involves two branches, and each branch is connected to the L line and N line of the current transformer CT respectively.
[0058] Furthermore, the second operational amplifier module includes resistors R4 and R5 and operational amplifier OP2. Resistor R4 is connected in parallel between the inverting input terminal and the output terminal of operational amplifier OP2, and the non-inverting input terminal is grounded through resistor R5.
[0059] Capacitor C1 and resistor R3 are connected in series to the inverting input of operational amplifier OP2, forming a voltage sampling circuit.
[0060] R4 is connected between the output and inverting input of the operational amplifier to form feedback. Meanwhile, resistor R5 is connected to the non-inverting input of operational amplifier OP2, ensuring that the following conditions are met. This forms an inverting proportional amplifier.
[0061] The output stage of operational amplifier OP2 is connected to a complementary circuit to eliminate crossover distortion and amplify the current. At the same time, feedback current compensation is formed through the series branch of C2 and R6. In order to combine the front feedback, the complementary output stage also forms feedback current compensation through the series branch of C3 and R7. This ensures the symmetry of the circuit topology and combines the four basic circuit topologies.
[0062] Please see Figure 3 and Figure 4 Based on the circuit topology, the principle of this embodiment is as follows: A low-cost, high-efficiency structure based on dual operational amplifiers integrates four circuit topologies into one through double reuse. Specifically, one multiplexed operational amplifier performs feedforward current sampling and compensation, followed by sampling of the residual voltage, which is then compensated via two branches at the source and load ends of the current transformer by another operational amplifier, thus achieving a second layer of structural reuse. This filter system employing four branches with inner and outer loops theoretically possesses excellent noise suppression performance, solving the problem of increased operational amplifiers with topology increases.
[0063] See again Figure 4This embodiment constructs two additional feedback paths through a voltage sampling branch and a current feedback branch, coupling the independent and controllable gain multiplication operators G3 and G4 with the (1 - G2) feedforward path and (1 + G1) feedback path in the main circuit, respectively. This unique coupling generates two core advantages: First, G3 and G4 act as adjustable "leverages," effectively relaxing the stringent precision requirements for parameters such as G2 in traditional feedforward structures to achieve high gain, thereby improving the practicality and robustness of the circuit. Second, while satisfying the predetermined frequency roll-off characteristics, this structure maximizes the integration and utilization of the contributions of all gain factors (G1, G2, G3, G4), thus achieving excellent insertion loss and filtering performance over a wide bandwidth.
[0064] The introduced G3 and G4 dual-gain multiplication operators not only provide additional degrees of freedom for adjustment, but also achieve multi-precision collaborative control through their inherent asymmetric sensitivity characteristics.
[0065] The G3 and G4 double-gain multiplication operators satisfy:
[0066] ,
[0067] ,
[0068] This embodiment exhibits a sensitivity to the newly introduced gain stage far exceeding 1. The higher sensitivity of S to G4 is significant for laboratory component selection and filter circuit debugging. In high-precision applications, precision resistors can be used to implement the G4 loop, while ordinary resistors can be used for the G3 loop, optimizing cost while maintaining performance. For rapid calibration systems, wide-range rapid convergence can be achieved first through G4, followed by fine calibration through G3, significantly shortening debugging time.
[0069] The insertion loss design scheme for the circuit in this embodiment is as follows:
[0070] Let the injection impedances of G1, G2, G3, and G4 be Z1, Z2, Z3, and Z4, respectively, and the gains before the injection stage be G1, Z2, Z3, and Z4, respectively. a G b G c G d .
[0071] Since the amplifier is an inverting amplifier, therefore:
[0072] ,
[0073] ,
[0074] Considering that this embodiment uses dual-multiplexing integration, it can be expressed as:
[0075] ,
[0076] Consider the current transformer model and the operational amplifier gain model:
[0077] ,
[0078] ,
[0079] ,
[0080] ,
[0081] ,
[0082] Among them, L m R is the equivalent magnetizing inductance of the current transformer. c R is the additional resistance for the secondary-side parasitic capacitance. L For the sampling resistor, C s The secondary side equivalent parasitic capacitance is denoted by n, which is the turns ratio of the primary and secondary windings of the current transformer. In this embodiment, n is 1:1, meaning n equals 1. Since the operational amplifier has an inherent unity-gain frequency, all parameters in this embodiment are mapped to the Laplace domain, i.e., the s-domain, for the convenience of loop control.
[0083] Based on circuit topology analysis and considering the load voltage, the following should be satisfied:
[0084] ,
[0085] ,
[0086] ,
[0087] ,
[0088] Where i2 is the current flowing through the load, u L For the load voltage, i k This is the current flowing through the current transformer.
[0089] Based on the above statements, we can conclude that:
[0090] ,
[0091] Finally, the insertion loss S is defined as the ratio of the load power without a filter to the load voltage with a filter.
[0092] ,
[0093] ,
[0094] ,
[0095] Among them, u L1 The load voltage without a filter is obtained by voltage division of the load impedance and the source impedance, and u is the assumed equivalent voltage of the noise source.
[0096] Considering the frequency constraints of the injection process, we should have:
[0097] ,
[0098] In the topology, f1, f2, and f3 are the lower cutoff frequencies of the resistors and capacitors connected in series in the first, second, third, and fourth compensation current branches, respectively, and f5 is the lower cutoff frequency of the voltage sampling branch. a and f b These are the upper cutoff frequencies introduced by the feedback resistors of the two operational amplifiers. Z1, Z2, Z3 and Z4 correspond to the series branches of C4 and R8, C5 and R9, C2 and R6, and C3 and R7, respectively.
[0099] In this embodiment, the noise source is a flyback converter, and the source impedance Z is measured. S It is 250Ω.
[0100] The operational amplifier model in this embodiment is ADA4817-1ARDZ-R7.
[0101] In this embodiment, the load is a LISN network, and the load impedance is Z. L The impedance is 50Ω, and when connected in parallel within a common-mode circuit, it is equivalent to 25Ω. This LISN is connected in series between the AC signal source and the filter. Its core functions are: to provide a stable test impedance for the device under test, to isolate inherent noise from the mains power supply, and to accurately extract high-frequency conducted interference signals generated by the device under test for measurement by the EMI test receiver.
[0102] The circuit adopts a dual-path fully symmetrical design with phase line (L) and neutral line (N). The component parameters and topology of the upper and lower lines are completely identical. It can test the conducted noise of the L line and N line separately, and can also support the separation test of common-mode / differential-mode noise.
[0103] For the high-frequency decoupling unit (i.e., the input terminal) on the AC signal source side, a 1μF ground bypass capacitor is connected in parallel to each of the L-line and N-line input terminals to bypass the high-frequency EMI noise inherent on the power grid side, prevent inherent interference from the power grid from entering the test circuit, and avoid contaminating the test results; at the same time, it exhibits extremely high capacitive reactance in the 50 / 60Hz power frequency band, which hardly affects the normal transmission of power frequency power supply.
[0104] Next, a 50μH linear inductor is connected in series with both the L and N lines. This structure forms high-frequency isolation with the filter while ensuring impedance stability within the test frequency band. For the 50 / 60Hz power frequency band, the inductor reactance is extremely low (approximately 0.016Ω@50Hz), with almost no voltage drop, and does not affect the power supply of the device under test. For the 150kHz~30MHz conducted emission standard test frequency band, the inductor exhibits high reactance (minimum approximately 47Ω@150kHz, maximum up to 9.4kΩ@30MHz), isolating the impedance fluctuations on the mains side and ensuring that the power port of the device under test always shows a stable 50Ω standard impedance within the test frequency band, ensuring the consistency and repeatability of the test results.
[0105] Then, on the output side of the 50μH inductor (near the filter side), a series branch consisting of a 0.1μF DC blocking coupling capacitor and a 50Ω resistor to ground is set on both the L and N lines, with identical parameters for both branches. This structure can achieve the following functions:
[0106] DC isolation and protection: The 0.1 protection capacitor isolates the power frequency high voltage / DC component, preventing the power supply voltage from damaging the EMI test receiver, while also exhibiting extremely low capacitive reactance to high frequency noise, achieving efficient coupling;
[0107] Standard impedance matching: The 50Ω resistor provides a standard 50Ω characteristic impedance for the test frequency band, which is the legal standard impedance for conducted emission testing, ensuring the compliance of test data;
[0108] Noise extraction: The high-frequency conducted interference signal emitted by the device under test to the power supply is coupled out through this branch and sent to the EMI test receiver for amplitude and spectrum measurement.
[0109] Finally, after the inductor and RC extraction branch, the L and N lines are directly led out and connected to the filter on the right. This provides a low-impedance power frequency supply path for the device under test (DUT), ensuring its normal operation, while simultaneously picking up conducted emission noise generated by the DUT and feeding it back into the LISN extraction branch.
[0110] To better demonstrate the beneficial effects of this invention, the present invention compares noise levels with and without filters, and compares the filtering effect of this embodiment with other traditional single-loop structures, such as... Figures 7 to 9 As shown.
[0111] In this invention, the noise in the low-frequency band was reduced by an average of 60 dB compared to the original noise after adding the filter, demonstrating good filtering efficiency. Please refer to [link / reference needed]. Figure 7The blue curve represents the noise level. In the mid-frequency range, the parasitic inductance and capacitance of the unfiltered circuit resonate, generating noise peaks. With the filter added, the active filter detects this amplified noise signal and immediately generates a stronger reverse current to cancel it out. This demonstrates that the filtering bandwidth of this invention is sufficient to cover the EMI Class B standard, which is a key design feature. The filtering efficiency at high frequencies also meets the EMI Class B standard.
[0112] It is worth mentioning that the main reason for the high-frequency gain reduction of traditional active filters is the gain loss caused by the negative feedback of the operational amplifier itself. In order to ensure that the bandwidth gain product is within a stable range, the inverse amplification ratio has to be sacrificed to improve the bandwidth. This requires the impedance in the injection stage to be as small as possible, which leads to an increase in the size of the compensation capacitor. The multi-branch compensation of this invention can achieve the EMI Class B standard while appropriately relaxing the gain requirements of a single branch, thereby reducing the size of the passive part.
[0113] like Figure 8 As shown in Table 1, the dual-core FF-FB structure of this invention has better common-mode noise suppression performance than the two traditional single-loop active filter structures across the entire test frequency band, and its performance advantage in the high-frequency band is further improved. At the same time, it has smaller noise fluctuations and stronger loop robustness, breaking through the performance bottleneck of the traditional single-loop structure.
[0114] Table 1 compares the filtering effects of the present invention with those of the traditional single-ring structure.
[0115] Structure type Full-band noise amplitude range Full-band average amplitude Comparison of the average noise difference of the present invention Equivalent noise amplitude attenuation ratio This invention features a dual-core FF-FB (blue curve) processor. 20dBμV~50dBμV ~40dBμV baseline baseline Traditional CSCC-FB (red curve) 60dBμV~80dBμV ~70dBμV 30dB higher than this invention The noise level of this invention is only 1 / 31.6 of its original value. Traditional CSCC-FF (green curve) 80dBμV~110dBμV ~90dBμV 50dB higher than this invention The noise level of this invention is only 1 / 316 of its original value.
[0116] Note: dB is a logarithmic unit. 20dB corresponds to a 10-fold reduction in noise amplitude, 30dB corresponds to a 31.6-fold reduction, and 50dB corresponds to a 316-fold reduction. This invention achieves an order-of-magnitude improvement in noise suppression capability.
[0117] against Figure 7 The following is a detailed analysis of the frequency band performance:
[0118] (1) Low frequency band (150kHz~1MHz, core frequency band of fundamental / low harmonic of switching power supply)
[0119] In this embodiment (blue curve): the noise rises smoothly from the starting point of ~30dBμV to ~45dBμV, without any severe spikes, and the fluctuation range is only 15dB, achieving stable and deep suppression of the fundamental noise of the switching power supply.
[0120] Traditional CSCC-FB (red curve): noise remains at 75dBμV~80dBμV, which is more than 30dB higher than this embodiment throughout the entire range. It is close to the EMI Class B standard limit (66dBμV@150kHz-500kHz) and shows multiple obvious spikes.
[0121] Traditional CSCC-FF (green curve): noise remains at 90dBμV~105dBμV, which is more than 60dB higher than this embodiment throughout the entire process, significantly exceeding the standard limit, with more dense and larger peaks.
[0122] It can be seen that even in the low-frequency range where traditional active filters perform relatively best, this embodiment still achieves overwhelming suppression advantages, and its stability is far superior to that of traditional structures.
[0123] (2) Mid-to-high frequency band (1MHz~10MHz, parasitic resonance noise concentration area)
[0124] In this embodiment (blue curve): the noise is stable at 35dBμV~50dBμV with only slight fluctuations. The lowest valley value is close to 10dBμV, and there are no spikes exceeding 50dBμV throughout the entire range, which fully meets the EMI Class B standard limit (56dBμV@500kHz-30MHz).
[0125] Traditional CSCC-FB (red curve): noise rises to 70dBμV~80dBμV, fluctuation amplitude increases significantly, with a large number of peaks exceeding 75dBμV, exceeding the standard limit across the board, and the performance gap with this embodiment widens to 30~40dB;
[0126] Traditional CSCC-FF (green curve): noise is stable at 85dBμV~100dBμV, with dense peaks and extremely large amplitudes, widening the performance gap with this embodiment to 50~60dB.
[0127] As can be seen, the traditional single-loop structure deteriorates rapidly with increasing frequency due to the decrease in op-amp bandwidth and loop phase margin. However, the dual-core FF-FB cooperative structure in this embodiment significantly alleviates high-frequency performance degradation and maintains stable suppression capability through dual sampling and dual-loop complementarity.
[0128] (3) Ultra-high frequency band (10MHz~30MHz, the performance bottleneck area of traditional active filters)
[0129] In this embodiment (blue curve): the noise remains stable at 30dBμV~50dBμV, with only slight fluctuations and no significant increase throughout the entire range. The highest value does not exceed 55dBμV, which still meets the standard limit.
[0130] Traditional CSCC-FB (red curve): noise rises to 75dBμV~80dBμV, with a large number of deep valleys and peaks, the highest value is close to 85dBμV, and the difference from this embodiment is maintained at more than 30dB.
[0131] Traditional CSCC-FF (green curve): The noise level is stable at 90dBμV~100dBμV, still maintaining an extremely high noise level, and the difference from this embodiment is maintained at more than 50dB.
[0132] It is evident that this invention breaks through the high-frequency bottleneck of traditional single-loop active filters, maintaining extremely strong noise suppression capabilities in the ultra-high frequency band above 10MHz, and solving the performance collapse problem caused by insufficient loop delay and phase margin in the high-frequency band of traditional structures.
[0133] In summary, the present invention exhibits small noise fluctuation amplitude across the entire frequency band, with a peak-to-peak difference not exceeding 40dB. The curve is smooth overall, without discrete large-amplitude spikes, indicating sufficient phase margin of the filter loop, no resonance or loop instability issues, and robustness to changes in operating conditions and parameters. In contrast, the traditional CSCC-FB characteristic shows a fluctuation amplitude exceeding 30dB across the entire frequency band, with dense spikes, indicating insufficient phase margin of the single feedback loop in the high-frequency band, making it prone to resonance and resulting in noise spikes. The traditional CSCC-FF characteristic shows a fluctuation amplitude exceeding 50dB across the entire frequency band, with extremely large spike amplitudes, indicating that the single feedforward loop is highly sensitive to parameter matching and frequency changes, has poor robustness, and cannot maintain a stable suppression effect over a wide frequency band.
[0134] like Figure 9 As shown in Table 2, the dual-core FF-FB structure exhibits good common-mode noise suppression performance across the entire test frequency band, comparable to two emerging multi-loop multiplexing structures. Furthermore, it achieves the performance of complex multi-loop superposition schemes with a simpler topology, while also solving the problem that emerging structure loops still rely on large-capacity capacitors to increase bandwidth, leading to an increase in filter size.
[0135] Table 2 compares the filtering effects of the present invention with those of emerging multiplexing structures.
[0136] Structure type Full-band noise amplitude range Average noise amplitude across the entire frequency band Difference in average amplitude from the present invention Equivalent noise amplitude ratio This invention features a dual-core FF-FB (light blue curve) technology. 20dBμV~50dBμV, with the lowest trough value approaching -20dBμV ~38dBμV Benchmark Optimal Line 1x (benchmark) Emerging double-ring composite structure (red curve) 60dBμV~80dBμV ~70dBμV 32dB higher than this invention The noise level of this invention is only 1 / 39.8 of its original value. Emerging three-ring composite structure (dark blue curve) 60dBμV~80dBμV ~72dBμV 34dB higher than this invention The noise level of this invention is only 1 / 50.1
[0137] Emerging solutions, by adding more sampling loops and increasing topology complexity, have not brought about performance improvements; instead, they have resulted in the problem that "the more loops there are, the worse the performance becomes." In contrast, this invention achieves an order-of-magnitude improvement in noise suppression capability through an innovative architecture of dual-core sampling and feedforward-feedback collaboration.
[0138] against Figure 8 The following is a detailed analysis of the frequency band performance:
[0139] (1) Low frequency band (150kHz~1MHz, core region of fundamental / low harmonic of switching power supply)
[0140] This invention maintains noise levels consistently between 38 and 50 dBμV, with no severe spikes throughout and fluctuations not exceeding 12 dB. It achieves stable and deep suppression of the fundamental noise of switching power supplies, and the noise level is far below the EMI Class B standard limit (66 dBμV @ 150 kHz - 500 kHz) throughout the entire process.
[0141] The emerging dual-ring structure has a noise level of 60~78dBμV throughout the entire circuit, which is 20~30dB higher than that of the present invention. It is close to or even exceeds the standard limit, and multiple obvious spikes appear, indicating insufficient loop stability.
[0142] Emerging three-loop structure: Noise is basically the same as that of dual-loop, with more dense spikes appearing around 1MHz, reaching a maximum of nearly 80dBμV. The additional voltage feedforward loop does not bring any performance improvement, but instead introduces loop interference.
[0143] (2) Mid-to-high frequency band (1MHz~10MHz, parasitic resonance noise concentration area)
[0144] This invention achieves noise stability of 30~50dBμV with minimal fluctuations and no spikes exceeding 55dBμV throughout, fully meeting the EMI Class B standard limits (56dBμV@500kHz-30MHz) and providing ample design margin; the lowest suppression valley value is close to -20dBμV, achieving ultra-deep noise suppression.
[0145] Emerging dual-ring structure: Noise rises to 65~80dBμV, spikes are more dense, fluctuation amplitude exceeds 20dB, comprehensively exceeding the standard limit, and the performance gap with the present invention widens to 30~40dB; performance deteriorates rapidly after 5MHz, with a large number of spikes exceeding 75dBμV.
[0146] Emerging three-ring structure: Noise is 1~3dB higher than that of dual-ring structure throughout the entire range, with more concentrated spikes, approaching 80dBμV near 10MHz. The superposition of multiple loops leads to insufficient phase margin in the high-frequency band, exacerbates loop coupling problems, and further deteriorates the filtering effect.
[0147] (3) Ultra-high frequency band (10MHz~30MHz, the general performance bottleneck area of active filters)
[0148] This invention achieves stable noise levels between 30 and 55 dBμV, with the highest noise level not exceeding 55 dBμV at 30 MHz, still meeting EMI standard limits. It also achieves deep suppression after 10 MHz, with the lowest valley value approaching -20 dBμV, completely breaking through the high-frequency performance bottleneck of active filters.
[0149] Emerging dual-ring / triple-ring structure: noise is stable at 75~80dBμV, maintained at an extremely high level throughout, with a performance gap of more than 30dB compared to the present invention, and the gap widens to more than 40dB near 30MHz; the delay and phase mismatch problems of multi-loop are amplified in the high-frequency band, the filtering effect is completely destroyed, and effective suppression cannot be achieved.
[0150] In summary, the present invention exhibits a smooth full-band curve with no discrete large-amplitude spikes, and the noise fluctuation amplitude is much smaller than that of the comparative scheme. This indicates that the dual-core FF-FB topology has sufficient loop phase margin, and the feedforward and feedback loops are complementary and have no coupling interference. It is highly robust to operating condition fluctuations and parameter drift, and has good performance consistency in practical engineering applications.
[0151] It is also worth explaining that the three-ring structure has one more compensation loop than the two-ring structure, making the topology more complex and the cost higher, but the performance is worse. This fully proves that "simple superposition of loops" cannot break through the performance bottleneck of active filters. The dual-core collaborative architecture of this invention is a reuse of the underlying topology logic, rather than a simple superposition of functions.
[0152] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0153] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.
Claims
1. A FF-FB co-4-tap active filter based on dual-core multiplexing, characterized by, It includes a noise source section, a load LISN network section, and an active filter section; the active filter section includes a current sampling branch, a first operational amplifier module, a second operational amplifier module, a voltage sampling branch, several current compensation branches, a first complementary output stage circuit, and a second complementary output stage circuit; the two ends of the noise source section are connected to the left side of the active filter section, and the load LISN network section is connected to the right side of the active filter section; The current sampling branch includes a current transformer (CT) and a sampling resistor (R). L The current transformer CT includes an L line, an N line, and a secondary side, the two ends of which are connected to the sampling resistor R. L connect; The input terminal of the first operational amplifier module is connected to both ends of the secondary side, and the output terminal is connected to the input of the first complementary output stage circuit; the inverting input terminal of the second operational amplifier module is connected to both ends of the left side of the current transformer CT through a voltage sampling branch, and the output terminal is connected to the input of the second complementary output stage circuit. The voltage sampling branch includes a resistor R3 and a capacitor C1. The resistor R3 is connected in series with the parallel capacitor C1, and the parallel capacitor C1 is connected to both ends of the left side of the current transformer CT. The output terminal of the first complementary output stage circuit is connected to the two ends of the right side of the current transformer CT through the first current compensation branch, and is also connected to the two ends of the left side of the current transformer CT through the second current compensation branch; the output terminal of the second complementary output stage circuit is connected to the two ends of the right side of the current transformer CT through the third current compensation branch, and is also connected to the two ends of the left side of the current transformer CT through the fourth current compensation branch.
2. The FF-FB cooperative four-unit active filter based on dual-core multiplexing according to claim 1, characterized in that, The L-line and N-line windings have opposite directions and the same number of turns.
3. The FF-FB co-4-tap active filter based on dual-core multiplexing according to claim 1, wherein, The first operational amplifier module includes resistors R1 and R2 and operational amplifier OP1. The inverting input terminal of operational amplifier OP1 is connected to resistor R1, and resistor R2 is connected in parallel between the inverting input terminal and the output terminal. The non-inverting input terminal is connected to resistor R1 and is grounded through resistor R2. Resistors R1 and R2 are connected in parallel.
4. The FF-FB co-4-tap active filter based on dual-core multiplexing according to claim 1, wherein, The second operational amplifier module includes resistors R4 and R5 and operational amplifier OP2. Resistor R4 is connected in parallel between the inverting input terminal and the output terminal of operational amplifier OP2, and the non-inverting input terminal is grounded through resistor R5.
5. The FF-FB co-4-tap active filter based on dual-core multiplexing according to claim 4, characterized in that, The resistance R5 needs to satisfy .
6. The FF-FB co-4-tap active filter based on dual-core multiplexing according to claim 1, wherein, The current compensation branch includes a first current compensation branch, a second current compensation branch, a third current compensation branch and a fourth current compensation branch. Each branch includes two branches, which are connected to the L line and N line of the current transformer CT respectively. The first current compensation branch includes a capacitor C4 and a resistor R8, which are connected in series. The second current compensation branch includes a capacitor C5 and a resistor R9, which are connected in series. The third current compensation branch includes a capacitor C2 and a resistor R6, which are connected in series. The fourth current compensation branch includes a capacitor C3 and a resistor R7, which are connected in series.
7. The FF-FB co-4-tap active filter based on dual-core multiplexing according to claim 1, wherein, The first complementary output stage circuit or the second complementary output stage circuit includes an input terminal, a complementary power transistor, a bias circuit, a voltage source, and an output terminal, wherein the complementary power transistor includes an NPN type. and PNP type The bias circuit includes a resistor. ,resistance ,resistance ,diode and diodes The bias circuit is connected to voltage sources +Vcc and -Vcc at its two ends, respectively, and the resistor... ,resistance ,diode ,diode and resistance The resistors are connected in series in sequence. With diode The positive terminal is connected to the diode. negative terminal and diode The positive terminal connection, the and The emitters are connected. The collector is connected to the voltage source +Vcc. The collector of the voltage source is connected to the voltage source -Vcc. Base connection resistor and resistance between, base and diode The negative terminal of the diode is connected. The negative terminal is the input terminal, the The base is the output terminal.
8. The FF-FB cooperative four-unit active filter based on dual-core multiplexing according to claim 1, characterized in that, Including gain multiplication operators G3 and G4, satisfying: , , Where G1 is the transfer function of the feedforward branch, G2 is the transfer function of the compensation branch, and Z... s Z is the source impedance. L Let S be the load impedance and S be the final insertion loss.
9. The FF-FB cooperative four-unit active filter based on dual-core multiplexing according to claim 8, characterized in that, The load impedance Z L is equivalent to 25 Ω.
10. The FF-FB co-4-tap active filter based on dual-core multiplexing according to claim 1, wherein, The noise source is a flyback converter.