Signal measurement method, device, equipment and medium
By capturing signal edges during the MCU timer counting process and amplifying them when the count value is insufficient, the measurement error caused by the mismatch between the timer counting frequency and the frequency of the signal under test is solved, thus achieving higher precision signal measurement.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- WUXI YISI SEMICONDUCTOR CO LTD
- Filing Date
- 2024-10-28
- Publication Date
- 2026-04-28
AI Technical Summary
In existing technologies, the MCU timer counting frequency and the frequency of the signal under test are not necessarily integer multiples, which leads to a large error in signal measurement.
By capturing the target edge of the signal under test, counting at a preset frequency, and amplifying the signal before reaching a preset multiple, the proportion of the last count deviation is reduced, thereby improving measurement accuracy.
It effectively reduces signal measurement errors and improves the measurement accuracy of signal period, frequency, and duty cycle.
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Figure CN121933804A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of signal measurement technology, and in particular to a signal measurement method, apparatus, equipment and medium. Background Technology
[0002] MCUs (Microcontroller Units) typically provide TIMERs (multi-channel timers). Besides their normal counting function, timers also have a CAPTURE function. The CAPTURE function allows for the measurement of external input signals. By averaging multiple captures, the period, duty cycle, and other measurements of the input signal can be obtained. However, when using the timer's CAPTURE function to measure signals, because the timer's counting frequency and the frequency of the signal being measured are not necessarily integer multiples, there is a possibility that the last count may not be completed before being triggered by an external edge signal, resulting in a deviation where the last count is not included, leading to a significant measurement error.
[0003] In summary, improving the accuracy of signal measurement is a technical problem that needs to be solved. Summary of the Invention
[0004] In view of this, the purpose of this application is to provide a signal measurement method, apparatus, device, and medium that can improve the accuracy of signal measurement. The specific solution is as follows:
[0005] In a first aspect, this application discloses a signal measurement method, comprising:
[0006] The target edge of the signal to be measured is captured, and counting begins at a preset frequency when the first target edge of two adjacent target edges is captured, and counting stops when the second target edge of the two adjacent target edges is captured, thus obtaining a first count value.
[0007] If the first count value is less than a preset multiple, the signal to be tested is amplified to obtain an amplified signal, wherein the preset multiple is a value determined based on the expected multiple between the preset frequency and the frequency of the signal to be tested;
[0008] The amplified signal is measured to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
[0009] Optionally, amplifying the signal under test to obtain an amplified signal includes:
[0010] The magnification factor is determined based on the first count value and the preset multiplier value;
[0011] The signal under test is amplified based on the amplification factor to obtain an amplified signal.
[0012] Optionally, measuring the amplified signal to obtain the target measurement value includes:
[0013] The target edge of the amplified signal is captured, and counting begins at the preset frequency when the first target edge of two adjacent target edges is captured, and counting stops when the second target edge of two adjacent target edges is captured, to obtain a second count value;
[0014] The target measurement value of the signal under test is determined based on the second count value and the amplification factor.
[0015] Optionally, determining the target measurement value of the signal under test based on the second count value and the amplification factor includes:
[0016] The period and / or frequency of the signal under test are determined based on the second count value, the amplification factor, and the preset frequency.
[0017] Optionally, determining the target measurement value of the signal under test based on the second count value and the amplification factor includes:
[0018] The duty cycle of the signal under test is determined based on the second count value, the amplification factor, and the third count value;
[0019] The third counting value is obtained by capturing the target edge of the target signal, starting counting at the preset frequency when the first target edge of two adjacent target edges is captured, and stopping counting when the second target edge of two adjacent target edges is captured. The target signal is a signal obtained by amplifying the signal under test by the amplification factor several times and adding half a cycle.
[0020] Optionally, amplifying the signal under test based on the amplification factor to obtain an amplified signal includes:
[0021] Enable interrupt for the first general purpose input / output interface, with the interrupt triggered by an external edge.
[0022] The signal to be tested is input into the first general-purpose input / output interface. When the first interrupt is triggered, the output signal of the second general-purpose input / output interface is controlled to flip the level, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches the first target number, the output signal of the second general-purpose input / output interface is controlled to flip the level.
[0023] Wherein, the output signal of the second general-purpose input / output interface serves as the amplified signal, and the first target quantity is a quantity determined based on the amplification factor.
[0024] Optionally, the triggering condition is double-edge triggering, and correspondingly, the number of targets is twice the magnification factor.
[0025] Optional, also includes:
[0026] Enable interrupt for the first general purpose input / output interface, with the interrupt triggered by both double edges;
[0027] The signal to be tested is input into the first general-purpose input / output interface. When the first interrupt is triggered, the output signal of the second general-purpose input / output interface is controlled to flip the level, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches the second target number, the output signal of the second general-purpose input / output interface is controlled to flip the level.
[0028] The output signal of the second general-purpose input / output interface is used as the target signal, and the second target quantity is a quantity determined based on the amplification factor.
[0029] Secondly, this application discloses a signal measuring device, comprising:
[0030] The first acquisition module is used to capture the target edge of the signal to be measured, and to start counting at a preset frequency when the first target edge of two adjacent target edges is captured, and to stop counting when the second target edge of the two adjacent target edges is captured, thereby obtaining a first count value;
[0031] A signal amplification module is used to amplify the signal under test to obtain an amplified signal if the first count value is less than a preset multiple value, wherein the preset multiple value is a value determined based on the expected multiple between the preset frequency and the frequency of the signal under test;
[0032] A signal measurement module is used to measure the amplified signal to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
[0033] Thirdly, this application discloses an electronic device, including a memory and a processor, wherein:
[0034] The memory is used to store computer programs;
[0035] The processor is used to execute the computer program to implement the aforementioned signal measurement method.
[0036] Fourthly, this application discloses a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the aforementioned signal measurement method.
[0037] As can be seen from the above scheme, the present invention provides a signal measurement method, including: capturing the target edge of the signal to be measured, and starting to count at a preset frequency when the first target edge of two adjacent target edges is captured, and stopping counting when the second target edge of the two adjacent target edges is captured, to obtain a first count value; if the first count value is less than a preset multiple, amplifying the signal to be measured to obtain an amplified signal, wherein the preset multiple is a value determined based on the expected multiple between the preset frequency and the frequency of the signal to be measured; measuring the amplified signal to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
[0038] As can be seen, the beneficial effects of this application are as follows: first, the target edge of the signal to be measured is captured to obtain the corresponding count value. The count value represents the multiple relationship between the preset frequency and the frequency of the signal to be measured. The count value is compared with the preset multiple value. If it is less than the preset multiple value, the signal to be measured is amplified and then measured again. After the signal to be measured is amplified, the frequency decreases accordingly, which can reduce the proportion of the last count deviation, thereby improving the accuracy of signal measurement.
[0039] Accordingly, the signal measuring device, equipment, and readable storage medium provided in this application also have the above-mentioned technical effects. Attached Figure Description
[0040] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0041] Figure 1 A flowchart of a signal measurement method provided in an embodiment of this application;
[0042] Figure 2 A schematic diagram illustrating a timer capture function for measuring clock signals, provided in an embodiment of this application;
[0043] Figure 3 A schematic diagram of the error measured by a timer capture function provided in an embodiment of this application;
[0044] Figure 4 A schematic diagram of frequency measurement error after the clock under test is amplified by M times, provided as an embodiment of this application;
[0045] Figure 5 A schematic diagram illustrating the duty cycle measurement error of a clock under test amplified by M times, provided in an embodiment of this application;
[0046] Figure 6 This application provides an architecture diagram of a signal measurement scheme.
[0047] Figure 7 A flowchart illustrating the implementation of measuring the clock cycle under test, as provided in this application embodiment;
[0048] Figure 8 A flowchart illustrating the implementation of duty cycle measurement for a clock under test, provided in an embodiment of this application;
[0049] Figure 9 This is a schematic diagram of the structure of a signal measurement device disclosed in an embodiment of this application;
[0050] Figure 10 This is a structural diagram of an electronic device disclosed in an embodiment of this application. Detailed Implementation
[0051] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0052] The MCU timer capture function enables the measurement of external input pulses and clock signals. By capturing multiple signals and averaging the results, the period and duty cycle of the input signal can be obtained. This function is widely used in applications that utilize MCUs to measure the period and duty cycle of signals under test. However, since the timer counting frequency and the frequency of the signal under test are not necessarily integer multiples, there is a possibility that the last count may not be completed before being triggered by an external edge signal, resulting in a deviation where the last count is not included, leading to a large measurement error. To address this, this application provides a signal measurement scheme that can improve the accuracy of signal measurement.
[0053] See Figure 1 As shown in the figure, this application discloses a signal measurement method, including:
[0054] Step S11: Capture the target edge of the signal to be tested, and start counting at a preset frequency when the first target edge of two adjacent target edges is captured, and stop counting when the second target edge of the two adjacent target edges is captured, to obtain the first count value.
[0055] The signal to be measured can be a rectangular wave signal, such as a clock signal or a rectangular pulse signal. The target edge can be a rising edge or a falling edge. Taking the rising edge as an example, this embodiment can capture the rising edge of the signal to be measured, and start counting at a preset frequency when the first of two adjacent rising edges is captured, and stop counting when the second of the two adjacent rising edges is captured, thus obtaining a first count value.
[0056] In this embodiment, a first timer can be used to capture the target edge of the signal under test, and the preset frequency is the counting frequency of the first timer. After enabling the capture function of the first timer in the MCU, the hardware automatically triggers at a fixed frequency f at the first target edge. TIMER Counting begins; the second target edge automatically triggers a timer to stop counting. The count value is now N. See also... Figure 2 As shown, Figure 2 This embodiment provides a schematic diagram of a timer capture function for measuring clock signals. CLOCK represents the clock signal under test, TIMER CLOCK represents the timer clock, and 1CLOCK CYCLE represents one period of the clock signal under test. Figure 2 It can be seen that if there is no error, T CLOCK =N*T TIMER f CLOCK = f TIMER / N. Where, T CLOCK T is the period of the clock signal under test. TIMER f is the period of the timer clock. CLOCK The frequency of the clock signal to be measured is denoted as N. It can be understood that the count value N represents the multiple relationship between the preset frequency and the frequency of the signal to be measured.
[0057] Step S12: If the first count value is less than a preset multiple, the signal to be tested is amplified to obtain an amplified signal, wherein the preset multiple is a value determined based on the expected multiple between the preset frequency and the frequency of the signal to be tested.
[0058] In specific implementations, if strict accuracy is required, and the desired multiple is to be achieved, then the preset multiple value is the desired multiple. Alternatively, the preset multiple value can be set slightly less than the desired multiple, depending on actual needs.
[0059] In one optional implementation, the amplification factor can be determined based on the first count value and the preset multiplier; the signal under test is amplified based on the amplification factor to obtain an amplified signal. It is understood that determining the amplification factor based on the first count value and the preset multiplier allows for a reasonable determination of the amplification factor to achieve the corresponding accuracy requirements. For example, the ratio of the expected multiplier to the first count value can be determined as the amplification factor. Amplifying the signal under test means amplifying the period of the signal under test; the period of the signal under test can be amplified to a factor of several times the original period to obtain an amplified signal.
[0060] It should be noted that when using the timer capture function to measure signals, the timer counting frequency and the clock frequency under test are not necessarily integer multiples, resulting in a deviation where the last count is not included. This deviation ranges from 0 to 1 T. TIMER Within the counting clock, see Figure 3 As shown, Figure 3 This is a schematic diagram illustrating the error measurement using a timer capture function provided in this embodiment. TEST CLOCK represents the clock signal under test.
[0061] For example, the timer counting frequency is f TIMER =10MHz, T TIMER =0.1us, the clock frequency to be measured is f CLOCK =1MHz, T CLOCK =1us, N=T CLOCK / T TIMER =10, deviation ΔT=T CLOCK –N*T TIMER =1us - 10 * 0.1us = 0, meaning the measurement error is 0. However, if f TIMER =10MHz, T TIMER =0.1us, the clock frequency to be measured is f CLOCK =1.01MHz, T CLOCK =0.99us, the count value N measured by the capture function is T CLOCK / T TIMER =9.9, N takes the integer value 9, and the corresponding deviation is:
[0062] ΔT=T CLOCK –N*T TIMER =0.99-0.1*9=0.09us, the measurement error is 0.09 / 0.99≈10%. Similarly, if the ratio between the counting frequency and the frequency to be measured is approximately 5, the measurement error can reach 20%. Such measurement accuracy cannot meet the needs of practical applications. That is, the larger the ratio between the timer counting frequency and the clock frequency to be measured, the smaller the measurement error; conversely, the smaller the ratio, the larger the measurement error.
[0063] Since the frequency to be measured is unknown, it cannot be guaranteed that the frequency to be measured will always maintain an integer multiple relationship with the counting frequency of the TIMER. In practical applications, the counting frequency of the TIMER is generally a fixed value. In this case, the higher the frequency of the clock to be measured (i.e., the closer it is to the counting frequency of the TIMER), the greater the deviation of the measured value of the frequency to be measured. Even if the counting frequency of the TIMER is about 10 times the frequency to be measured, the measurement error can still reach 10%. This embodiment amplifies the signal to be measured when the count value is not as expected, thereby reducing the frequency of the signal to be measured and increasing the multiple between the frequency of the signal to be measured and the counting frequency, thus reducing the error.
[0064] In one alternative implementation, the signal under test can be amplified using the first general-purpose input / output interface to obtain an amplified signal. Typically, the GPIO (General-purpose input / output) of an MCU has external interrupt functionality. This embodiment utilizes the external interrupt function of the GPIO, combined with timer counting. The external interrupt of the GPIO converts M consecutively input signals under test into a single pulse (including rising and falling edges) to trigger the timer capture and count function. See [link to relevant documentation]. Figure 4 As shown, Figure 4 This embodiment provides a schematic diagram of the frequency measurement error after the clock under test is amplified by M times. While keeping the timer counting frequency constant, the M clocks under test are converted into a single new clock under test, GPIO_OUT (GPIO output signal). This increases the frequency multiplier difference between the clock under test frequency and the timer counting frequency, reducing the proportion of the last count deviation of the timer in the measured frequency, thereby improving measurement accuracy.
[0065] M*T CLOCK =N*T TIMER +ΔT Equation (1);
[0066] T CLOCK =N*T TIMER / M+ΔT / M Equation (2);
[0067] Where ΔT is the inherent CAPTURE bias of the timer, and its bias will only occur within 1 T. TIMER Within the range. Because now for T CLOCK The sampling count is amplified by M times, so the bias ΔT introduced by the CAPTURE itself can be reduced to 1 / M of the original value, i.e., ΔT / M. If M=10, and the original ΔT bias is 10%, then the bias introduced by ΔT can be reduced from 10% to 1%.
[0068] In one optional implementation, an interrupt can be enabled for the first general-purpose input / output (GPIO) interface, triggered by an external edge. The signal to be measured is input to the first GPIO interface. When the first interrupt is triggered, the output signal of the second GPIO interface is controlled to undergo a level transition, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches a first target number, the output signal of the second GPIO interface is controlled to undergo a level transition again. The output signal of the second GPIO interface serves as the amplified signal, and the first target number is a number determined based on the amplification factor. It is understood that when the first interrupt is triggered, the level transition of the output signal of the second GPIO interface is simultaneously triggered, and a count is initiated. When the number of interrupt triggers reaches the first target number, the level transition of the output signal of the second GPIO interface is stopped, and a second count value is obtained. For example, the output signal of the second GPIO interface initially outputs a low level. When the first interrupt is triggered, the output signal of the second GPIO interface transitions to a high level. When the number of interrupt triggers reaches the first target number, the output signal of the second GPIO interface transitions to a low level. The output signal of the second GPIO interface can also initially be a high level.
[0069] In one optional implementation, the triggering condition is a double-edge trigger, and correspondingly, the first target number is twice the magnification factor. Double-edge triggering means that both the rising and falling edges will trigger an interrupt. In another optional implementation, either rising or falling edge triggering can be set, and the target number is the magnification factor.
[0070] Step S13: Measure the amplified signal to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
[0071] This embodiment can capture the target edge of the amplified signal, and start counting at the preset frequency when the first of two adjacent target edges is captured, and stop counting when the second of two adjacent target edges is captured, to obtain a second count value; the target measurement value of the signal under test is determined based on the second count value and the amplification factor. It is understood that the target edge of the amplified signal can be a rising edge or a falling edge. In an optional implementation, a second timer can be used to capture the target edge of the amplified signal.
[0072] Furthermore, in this embodiment, the period and / or frequency of the signal under test can be determined based on the second count value, the amplification factor, and the preset frequency. Specifically, the period corresponding to the preset frequency can be obtained, and the period of the signal under test can be the product of the second count value and the period corresponding to the preset frequency, divided by the second count value. The frequency of the signal under test can be obtained by dividing 1 by the period of the signal under test, or by calculating the product of the amplification factor and the second count value, and then dividing the preset frequency by this product.
[0073] Furthermore, this embodiment can also determine the duty cycle of the signal under test based on the target signal, the second count value, and the amplification factor, wherein the target signal is a signal obtained by amplifying the signal under test by the amplification factor by the amplification factor and adding half a cycle. This embodiment can also determine the duty cycle of the signal under test based on the second count value, the amplification factor, and a third count value; wherein the third count value is the count value obtained by capturing the target edge of the target signal, starting counting at the preset frequency when the first of two adjacent target edges is captured, and stopping counting when the second of two adjacent target edges is captured.
[0074] For example, see Figure 5 As shown, Figure 5 This is a schematic diagram illustrating the duty cycle measurement error after the clock under test is amplified by M times, as provided in an embodiment of this application. During duty cycle measurement, at T... CLOCK On top of the M-fold magnification, add half a T more CLOCK (The high-level portion of CLOCK or the low-level portion of CLOCK), defined as T H That is, M*T CLOCK +T H Its CAPTURE measurement count value is N2, and the period is N2*T. TIMER .
[0075] M*T CLOCK =N1*T TIMER +ΔT1; Equation (3);
[0076] M*T CLOCK +T H =N2*T TIMER +ΔT2; Equation (4);
[0077] Equation (4) - Equation (3) yields:
[0078] T H =(N2-N1)*T TMIER +ΔT2-ΔT1≈(N2-N1)*T TMIER
[0079] DUTY=TH / T CLOCK ≈ (N2-N1)*M*T TMIER / N1* T TMIER =(N2-N1)*M / N1
[0080] Where DUTY is the duty cycle, T H The inherent deviation of the measurement ΔT2-ΔT1 is still within 1 T TIMER Within a time period, compared to M*T CLOCK In this case, the deviation will also decrease by approximately M times. N1 is the count value captured by amplifying the value by M times.
[0081] Therefore, this embodiment can reduce the measurement error of the period, frequency, and duty cycle of an external clock measured through the MCU's timer capture function to 1 / M of the original value. The larger M is, the smaller the error. This achieves the required measurement accuracy of the clock under test.
[0082] In one optional implementation, an interrupt can be enabled on the first general-purpose input / output (GPIO) interface, triggered by a double-edge trigger. The signal under test is input to the first GPIO interface. When the first interrupt is triggered, the output signal of the second GPIO interface is controlled to undergo a level transition, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches a second target number, the output signal of the second GPIO interface is controlled to undergo a level transition. The output signal of the second GPIO interface serves as the target signal, and the second target number is a number determined based on the amplification factor. Specifically, the second target number can be obtained by doubling the amplification factor plus one.
[0083] Further, see Figure 6 As shown, Figure 6This is an architecture diagram of a signal measurement scheme disclosed in this embodiment. The scheme utilizes two timer modules TIMER1 and TIMER2 with capture functions in an MCU, as well as GPIO1 (the first general-purpose input / output interface) and GPIO2 (the second general-purpose input / output interface) with external interrupts to improve measurement accuracy. The timer module TIMER1 (the first timer) measures the clock under test. Based on the count value, it performs preprocessing and calculates the amplification factor M. The clock period input by the GPIO1 interrupt is amplified by M times, and a square wave clock is output through GPIO2 to timer TIMER2 (the second timer) for capture measurement. Specifically, timer TIMER1 first measures the period of the external clock and determines whether the measured clock period and the count clock factor KI (the count value obtained by the TIMER1 capture function) are greater than or equal to KT (the desired factor). The larger KT is, the smaller the actual measurement error. For example, when KT=10, the error is about 10%. To control the error by 2%, KT can be set to 50. If KI does not reach the expected multiple, the external edge interrupt of GPIO1 is enabled to trigger an external edge interrupt for the TEST CLOCK clock under test. After entering the interrupt, the number of edge triggers is counted to cause GPIO2 to toggle its output level (from high to low or low to high) by M times the CLOCK time. The toggle level of GPIO2 is used for CAPUTRE counting in TIMER2. The value of M can be set according to the target value of KT. For example, if the current ratio KI=10 and the target KT=100, then M=KT / KI=100 / 10=10. Since the instructions for GPIO1 interrupt response and entering the interrupt to control the GPIO2 output level toggle (first low to high, then high to low) are the same, the output edge toggle time of GPIO2 is consistent. This way, the software operation will not introduce additional delay deviation into the pulse width of GPIO2. In this way, the external clock under test is regenerated into a single cycle after M consecutive cycles, and then the MCU capture function is used to measure the clock under test with a period amplified by M times. This reduces the problem of large measurement error caused by the MCU timer frequency not being a multiple of the clock frequency under test. Two MCU timers, one GPIO1 with external interrupt input, and one general-purpose GPIO2 are used. Timer 1 is connected to the external clock input under test. GPIO1 with external interrupt input can be selectively connected to the external clock under test. General-purpose GPIO2 is used to output the clock under test amplified by M times and connected to another timer 2 of the MCU. The capture function of MCU timer 1 is used to preprocess the external clock measurement and determine whether the multiple KI of the MCU timer frequency and the external clock is greater than a certain target value KT. This is used to infer whether the measurement error meets expectations. If it does not meet expectations, the amplification factor M = KT / KI of the external clock period is calculated based on the target error accuracy.The external clock is connected to the MCU's GPIO1 interface in two paths. One path connects to the MCU's Timer 1 input interface for timer capture function to measure and preprocess the external clock. The other path connects to the MCU's external interrupt input GPIO1 interface, acquiring the number of external clock inputs via interrupt triggering. The count increments by 1 with each toggle until the number of external clock inputs reaches M. The measured clock, amplified by M times, is output as a square wave via GPIO2 and connected to another Timer 2 on the MCU for capture and measurement. Another Timer 2 is used to capture and measure the square wave clock output from GPIO2, which is amplified by M times compared to the measured clock period. The count value N obtained from the timer capture is used to calculate the measured clock period. The count value N is then used to calculate the measured clock period. This method allows for the sequential acquisition of key parameters such as the measured clock period, frequency, and duty cycle. This general-purpose MCU can overcome the inherent measurement bias caused by the MCU's timer capture characteristics without increasing the number of external devices or internal modules, thereby improving the measurement accuracy of clock frequency and duty cycle.
[0084] Further, see Figure 7 As shown, this embodiment discloses a flowchart for measuring the clock cycle under test. TIMER1 CAPTURE basic settings: counting frequency F, counting clock period T = 1 / F. The input CLOCK is sampled through the CAPTURE, and the count value is recorded as KI. It is determined whether the multiple of the CLOCK to the sampling frequency KI is greater than a certain expected value KT. If yes, the process ends; otherwise, it ends. TIMER2 CAPTURE basic settings: counting frequency F, counting clock period T = 1 / F, amplification factor M, and GPIO1 external interrupt enabled; GPIO2 outputs low; waiting for the first external edge to trigger an interrupt, entering interrupt handling, GPIO2 outputs high; GPIO2 output high automatically triggers TIMER2 CAPTURE to automatically count, waiting for the next GPIO1 external edge (both rising and falling edges will trigger an interrupt), triggering an interrupt, entering interrupt handling, incrementing the sampling count by 1, and determining whether the number of samples equals 2M. If yes, GPIO2 outputs low, and simultaneously, TIMER2 CAPTURE automatically ends counting, reading the TIMER2 CAPTURE count value, and calculating the CLOCK period and frequency. See also... Figure 8 As shown, this embodiment discloses a flowchart for measuring the duty cycle of a clock under test. The calculation of the duty cycle is basically the same as that of the clock cycle, except that the duty cycle measurement is half a cycle longer than the clock cycle, i.e., (M+1 / 2)*Tclock. Thus, GPIO1 determines the number of external edge triggers as 2M+1. After the CAPTURE count is completed, the CAPTURE count value obtained from the above-mentioned clock cycle measurement needs to be subtracted. The count value after the subtraction is the count value of half a clock cycle, which is then converted into the duty cycle.
[0085] As can be seen, in this embodiment, the target edge of the signal to be measured is captured first to obtain the corresponding count value. The count value represents the multiple relationship between the preset frequency and the frequency of the signal to be measured. The count value is compared with the preset multiple value. If it is less than the preset multiple value, the signal to be measured is amplified and then measured again. After the signal to be measured is amplified, the frequency decreases accordingly, which can reduce the proportion of the last count deviation, thereby improving the accuracy of signal measurement.
[0086] See Figure 9 As shown, this embodiment provides a signal measurement device, including:
[0087] The first capture module 11 is used to capture the target edge of the signal to be measured, and start counting at a preset frequency when the first target edge of two adjacent target edges is captured, and stop counting when the second target edge of the two adjacent target edges is captured, so as to obtain a first count value.
[0088] The signal amplification module 12 is used to amplify the signal under test to obtain an amplified signal if the first count value is less than a preset multiple value, wherein the preset multiple value is a value determined based on the expected multiple between the preset frequency and the frequency of the signal under test;
[0089] The signal measurement module 13 is used to measure the amplified signal to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
[0090] The signal amplification module 12 may include:
[0091] A magnification factor determination submodule is used to determine the magnification factor based on the first count value and the preset magnification factor.
[0092] The signal amplification submodule is used to amplify the signal under test based on the amplification factor to obtain an amplified signal.
[0093] The signal measurement module 13 may include:
[0094] The capture submodule is used to capture the target edge of the amplified signal, and start counting at the preset frequency when the first target edge of two adjacent target edges is captured, and stop counting when the second target edge of two adjacent target edges is captured, to obtain a second count value;
[0095] The measurement value determination submodule is used to determine the target measurement value of the signal under test based on the second count value and the amplification factor.
[0096] Specifically, the measurement value determination submodule can be used to determine the period and / or frequency of the signal under test based on the second count value, the amplification factor, and the preset frequency.
[0097] The measurement value determination submodule can also determine the duty cycle of the signal under test based on the second count value, the amplification factor, and the third count value.
[0098] The third counting value is obtained by capturing the target edge of the target signal, starting counting at the preset frequency when the first target edge of two adjacent target edges is captured, and stopping counting when the second target edge of two adjacent target edges is captured. The target signal is a signal obtained by amplifying the signal under test by the amplification factor several times and adding half a cycle.
[0099] Furthermore, the signal amplification submodule can be specifically used to: enable the interrupt of the first general-purpose input / output interface, the interrupt is triggered by an external edge; input the signal to be tested into the first general-purpose input / output interface; when the first interrupt is triggered, control the output signal of the second general-purpose input / output interface to perform level toggling, and count the number of interrupt triggers; when the number of interrupt triggers reaches a first target number, control the output signal of the second general-purpose input / output interface to perform level toggling.
[0100] Wherein, the output signal of the second general-purpose input / output interface serves as the amplified signal, and the first target quantity is a quantity determined based on the amplification factor.
[0101] In one alternative implementation, the triggering condition is a double-edge triggering, and correspondingly, the number of the first targets is twice the magnification.
[0102] Furthermore, the device also includes a target signal generation module, used for:
[0103] Enable interrupt for the first general purpose input / output interface, with the interrupt triggered by both double edges;
[0104] The signal to be tested is input into the first general-purpose input / output interface. When the first interrupt is triggered, the output signal of the second general-purpose input / output interface is controlled to flip the level, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches the second target number, the output signal of the second general-purpose input / output interface is controlled to flip the level.
[0105] The output signal of the second general-purpose input / output interface is used as the target signal, and the second target quantity is a quantity determined based on the amplification factor.
[0106] As can be seen, in this embodiment, the target edge of the signal to be measured is captured first to obtain the corresponding count value. The count value represents the multiple relationship between the preset frequency and the frequency of the signal to be measured. The count value is compared with the preset multiple value. If it is less than the preset multiple value, the signal to be measured is amplified and then measured again. After the signal to be measured is amplified, the frequency decreases accordingly, which can reduce the proportion of the last count deviation, thereby improving the accuracy of signal measurement.
[0107] See Figure 10 As shown in the figure, this application discloses an electronic device 20, including a processor 21 and a memory 22; wherein, the memory 22 is used to store a computer program; the processor 21 is used to execute the computer program, the signal measurement method disclosed in the foregoing embodiment.
[0108] For details regarding the specific process of the above signal measurement method, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.
[0109] Furthermore, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk, or optical disk, and the storage method can be temporary storage or permanent storage.
[0110] In addition, the electronic device 20 also includes a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26; wherein, the power supply 23 is used to provide operating voltage for the various hardware devices on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.
[0111] Furthermore, embodiments of this application also disclose a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the signal measurement method disclosed in the foregoing embodiments.
[0112] For details regarding the specific process of the above signal measurement method, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.
[0113] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.
[0114] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0115] The above provides a detailed description of a signal measurement method, apparatus, device, and medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A signal measurement method, characterized in that, include: The target edge of the signal to be measured is captured, and counting begins at a preset frequency when the first target edge of two adjacent target edges is captured, and counting stops when the second target edge of the two adjacent target edges is captured, thus obtaining a first count value. If the first count value is less than a preset multiple, the signal to be tested is amplified to obtain an amplified signal, wherein the preset multiple is a value determined based on the expected multiple between the preset frequency and the frequency of the signal to be tested; The amplified signal is measured to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
2. The signal measurement method according to claim 1, characterized in that, The amplification of the signal under test to obtain an amplified signal includes: The magnification factor is determined based on the first count value and the preset multiplier value; The signal under test is amplified based on the amplification factor to obtain an amplified signal.
3. The signal measurement method according to claim 2, characterized in that, The step of measuring the amplified signal to obtain the target measurement value includes: The target edge of the amplified signal is captured, and counting begins at the preset frequency when the first target edge of two adjacent target edges is captured, and counting stops when the second target edge of two adjacent target edges is captured, to obtain a second count value; The target measurement value of the signal under test is determined based on the second count value and the amplification factor.
4. The signal measurement method according to claim 3, characterized in that, Determining the target measurement value of the signal under test based on the second count value and the amplification factor includes: The period and / or frequency of the signal under test are determined based on the second count value, the amplification factor, and the preset frequency.
5. The signal measurement method according to claim 3, characterized in that, Determining the target measurement value of the signal under test based on the second count value and the amplification factor includes: The duty cycle of the signal under test is determined based on the second count value, the amplification factor, and the third count value; The third counting value is obtained by capturing the target edge of the target signal, starting counting at the preset frequency when the first target edge of two adjacent target edges is captured, and stopping counting when the second target edge of two adjacent target edges is captured. The target signal is a signal obtained by amplifying the signal under test by the amplification factor several times and adding half a cycle.
6. The signal measurement method according to claim 2, characterized in that, The amplification of the signal under test based on the amplification factor to obtain the amplified signal includes: Enable interrupt for the first general purpose input / output interface, with the interrupt triggered by an external edge. The signal to be tested is input into the first general-purpose input / output interface. When the first interrupt is triggered, the output signal of the second general-purpose input / output interface is controlled to flip the level, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches the first target number, the output signal of the second general-purpose input / output interface is controlled to flip the level. Wherein, the output signal of the second general-purpose input / output interface serves as the amplified signal, and the first target quantity is a quantity determined based on the amplification factor.
7. The signal measurement method according to claim 6, characterized in that, The triggering condition is double-edge triggering, and correspondingly, the number of the first target is twice the magnification factor.
8. The signal measurement method according to claim 5, characterized in that, Also includes: Enable interrupt for the first general purpose input / output interface, with the interrupt triggered by both double edges; The signal to be tested is input into the first general-purpose input / output interface. When the first interrupt is triggered, the output signal of the second general-purpose input / output interface is controlled to flip the level, and the number of interrupt triggers is counted. When the number of interrupt triggers reaches the second target number, the output signal of the second general-purpose input / output interface is controlled to flip the level. The output signal of the second general-purpose input / output interface is used as the target signal, and the second target quantity is a quantity determined based on the amplification factor.
9. A signal measuring device, characterized in that, include: The first acquisition module is used to capture the target edge of the signal to be measured, and to start counting at a preset frequency when the first target edge of two adjacent target edges is captured, and to stop counting when the second target edge of the two adjacent target edges is captured, thereby obtaining a first count value; A signal amplification module is used to amplify the signal under test to obtain an amplified signal if the first count value is less than a preset multiple value, wherein the preset multiple value is a value determined based on the expected multiple between the preset frequency and the frequency of the signal under test; A signal measurement module is used to measure the amplified signal to obtain a target measurement value, wherein the target measurement value includes a period and / or a period-related measurement value.
10. An electronic device, characterized in that, Includes memory and processor, wherein: The memory is used to store computer programs; The processor is configured to execute the computer program to implement the signal measurement method as described in any one of claims 1 to 8.
11. A computer-readable storage medium, characterized in that, Used to store a computer program, wherein the computer program, when executed by a processor, implements the signal measurement method as described in any one of claims 1 to 8.