Electrode-resistance network generation method of focus-adjustable liquid crystal lens and power supply system

Abstract

The invention discloses an electrode-resistance network generation method and a power supply system of a focusable liquid crystal lens, which are applied to the technical field of electroactive optical devices. The system comprises a concentric ring electrode array, a resistance network, a small number of power supply buses and peripheral boundary potential electrodes. According to the method, a target voltage profile (V (r)) is mapped into a manufacturable resistance network topology and resistance value distribution, a minimum power supply bus is taken as an optimization target, collaborative design with a Fresnel phase reset position is carried out, and wavefront errors are suppressed near a phase reset radius. The method comprises the steps of obtaining a target OPD and performing phase reset; solving a network topology and a resistance value; outputting layout parameters; and recharging correction is carried out through wavefront measurement, and a tracing data unit is generated. According to the invention, the driving complexity is reduced from O (N) to O (1), interconnection and driving are greatly simplified, the yield and consistency are improved, and the method is suitable for the fields of high-resolution zoom glasses, camera modules, light beam control and the like.

Description

Technical Field

[0001] This invention relates to the field of electroactive optical device technology, and in particular to a method and system for generating a resistor network and supplying power to a minimum bus for Fresnelized OPD tunable liquid crystal lenses. Background Technology

[0002] High-aperture / high-resolution GRIN liquid crystal tunable lenses typically require a large number of concentric ring electrodes to form a precise radial electric field / potential distribution. Using "independent wiring and independent driving ring by ring" will result in: 1. Huge total number of power supplies or pins: The number of cables, pads, connectors and drive channels increases linearly with the number of rings N, resulting in a significant increase in size, power consumption and cost, and a decrease in yield.

[0003] 2. High manufacturing and reliability risks: Dense transparent electrode leads increase the risk of edge short circuits / breaks, and worsen the compatibility of packaging and edge cutting.

[0004] 3. Fresnelized OPD does not eliminate driving complexity: Phase reset (Fresnel) can reduce the amplitude of continuous OPD, but the target V(r) still needs to be accurately realized within the aperture, otherwise wavefront error and edge distortion will be introduced.

[0005] Therefore, a method is needed to map the target V(r) to a manufacturable resistor network and a small number of power supply buses, under the premise of constraining OPD error and boundary continuity, thereby reducing the driving complexity from O(N) to O(1) or O(logN). Summary of the Invention

[0006] The core of this invention lies in providing an approximate target V(r) potential distribution for a large number of ring electrodes using a small number of power supply buses. The optimization objective is to minimize the number of power supply buses and the number of external pins, while simultaneously constraining OPD error, boundary continuity, phase reset position, etc. It supports independent fine-tuning and measurement feedback updates for dual-chip / dual-layer components, achieving batch and individual consistency.

[0007] To solve the above problems, the present invention adopts the following technical solution.

[0008] The electrode-resistor network power supply system for the tunable liquid crystal lens includes: Concentric ring electrode array; A resistor network is electrically connected to multiple nodes of a concentric ring electrode array to form a node potential Vk. A small number of power supply buses are used to provide predetermined AC potential boundaries to the resistor network; Peripheral boundary potential electrodes are used to provide peripheral potential boundary conditions; The power supply system is configured to form an approximate target potential distribution V(r) within the effective aperture while satisfying manufacturability constraints, and to cooperate with the Fresnelized phase reset radius set r_z to suppress wavefront errors near the phase reset radius; The number of power supply buses M is much smaller than the number of ring electrodes N, and the optimization objective is to minimize the number of power supply buses and the number of external pins.

[0009] Furthermore, the number of power supply buses M is 2 to 8, and M is much smaller than N.

[0010] Furthermore, the resistor network is at least one of a radial ladder network, a spiral network, a partitioned network, or a multi-level network.

[0011] Furthermore, the resistor network contains a set of partitioned nodes, such that different partitions are matched with different V(r) subfunctions, and a smooth / transition structure is set at the partition boundaries to suppress voltage discontinuities.

[0012] Furthermore, the peripheral boundary potential electrode is set to a fixed boundary potential and is used to suppress edge wavefront warping.

[0013] Furthermore, the resistance value of the resistor network satisfies a preset manufacturability constraint, which includes at least one of the following: resistance value range, chip resistance range, and line width / line spacing constraint.

[0014] Furthermore, the resistor network includes an adjustable structure, which is used to change the effective resistance length by laser adjustment or controlled fusing to achieve closed-loop resistance correction.

[0015] Furthermore, it also includes a measurement-recharge module for measuring OPD(V) and updating network parameters or driving parameters to explicitly compensate for individual differences, where OPD(V) represents the optical path difference response obtained under a given driving voltage or voltage vector condition.

[0016] Furthermore, the measurement-reinjection module includes wavefront metrology and electrical metrology, and is based on a joint objective function. The network parameters θ are corrected, including the resistance values, partition connection relationships, and boundary potential settings. During recharge, θ is iteratively corrected based on wavefront measurement error, electrical deviation, and constraint penalty terms.

[0017] Furthermore, when the power supply system is used for dual orthogonal stacked adjustable lenses, it provides independent network parameters and independent fine-tuning interfaces for the two adjustable lenses to support differential calibration of polarization-insensitive stacks.

[0018] Furthermore, it also includes a traceability data unit for storing network topology version, resistance parameters, calibration version, and hash digest.

[0019] A method for generating an electrode-resistor network for a focusable liquid crystal lens includes the following steps: S1. Obtain the target OPD profile OPD_t(r) and reset the phase envelope to obtain the target phase Φ_t(r) or the target potential profile Vt(r); S2. Given manufacturable constraints and boundary conditions (including Surround boundary potentials), determine the number of power supply buses M and the network topology G; S3. Solve for the resistance allocation R so that the network output potential V_{G,R}(r) approximates Vt(r), and take at least one of the following as the optimization objective: minimum number of power supply buses and minimum number of external pins; S4. Output the fabricable resistor network layout parameters and driving boundary conditions; S5. Perform wavefront and electrical measurements on the sample to form traceability data units and perform backfeed correction on the parameters.

[0020] Furthermore, the phase envelope reset in step S1 satisfies:

[0021] Furthermore, a smoothing constraint is introduced near the phase reset radius {rz} to reduce voltage spikes. By introducing a smooth transition region near the phase reset radius and adding a potential difference penalty term Σ(ΔV_k)^2 between adjacent nodes to the optimization objective, voltage spikes are suppressed while satisfying the OPD error constraint.

[0022] Furthermore, in step S3, the objective function is minimized: Generate a network, where C(R) represents a resistance value that can create a constraint penalty term.

[0023] Furthermore, in step S3, Vt(r) is discretized into a set of link points {Vk}, and the resistance distribution is solved using the Kirchhoff equations. The specific solution process includes resetting the target OPD, inversely calculating V(r), discretizing to link points, solving for network parameters, manufacturing adjustments, and reflow.

[0024] Furthermore, in step S3, the peripheral boundary potential Vs and the network resistance R are jointly optimized to reduce edge wavefront error.

[0025] Furthermore, the layout parameters output in step S4 include: resistor bar width / length, nominal chip resistor value, adjustment window, and power supply bus and pad layout.

[0026] Furthermore, in step S5, Φ(r) is obtained through wavefront measurement, and the error ΔPhi(r) = Φ(r) - Φ_t(r) is used to back-calculate the network parameter correction amount ΔR.

[0027] Furthermore, the physical closed-loop correction of ΔR is achieved by adjusting the local resistance length using laser trimming.

[0028] Furthermore, when outputting network layout parameters, a correlation table of partitioning strategy and phase reset strategy is also output to make manufacturing and calibration repeatable.

[0029] Furthermore, traceability data units are used for batch normalization, ensuring that the error between different batches of samples at the same target refractive power is less than a preset threshold.

[0030] Furthermore, it also includes generating AC drive boundary conditions under the premise of satisfying |Vk|≤Vmax and zero DC constraint, so as to realize the approximate target potential distribution of a large number of ring electrodes with a small number of power supply buses, thereby reducing the number of pins, wiring complexity and manufacturing risk.

[0031] Compared with the prior art, the advantages of this invention are: (1) Use a small number of power supply buses to provide an approximate target V(r) potential distribution for a large number of ring electrodes; (2) The optimization objective is to use at least one of the following: the minimum number of power supply buses and the minimum number of external pins. At the same time, constraints are placed on OPD error, boundary continuity, phase reset position, etc. (3) Supports partitioning / multi-level networks / multi-port power supply to adapt to hundreds to thousands of rings; (4) Supports independent fine-tuning and measurement reflow update of dual-chip / dual-layer to achieve batch and individual consistency. Attached Figure Description

[0032] Figure 1 This is a schematic diagram of the target OPD and the OPD after Fresnel reset in this invention; Figure 2 This is a schematic diagram of the radial voltage profile V(r) derived from the OPD target according to the present invention; Figure 3 This is a schematic diagram of the concentric ring electrode layout and a small number of bus / peripheral boundaries of the present invention; Figure 4 This is a schematic diagram of the resistor network topology of the present invention; Figure 5 This is a comparative schematic diagram of the independent ring-by-ring drive and the resistor network + few bus power supply of the present invention; Figure 6 This is a schematic diagram of the design process from optical target to resistive network of the present invention; Figure 7 This is a schematic diagram of the equivalent circuit / simulation model (SPICE abstract) of the present invention; Figure 8 This is a schematic diagram illustrating the convergence of resistor network parameter optimization according to the present invention; Figure 9This is a comparative schematic diagram of OPD reconstruction implemented by the resistor network of the present invention; Figure 10 This is a schematic diagram of the independent parameter adjustment of the dual-layer / dual-piece adjustable focus unit of the present invention; Figure 11 This is a schematic diagram of the manufacturing / adjustment process of the resistor network and electrode layout of the present invention; Figure 12 This is a simulated SEM diagram of the present invention (example resistor trace / ring electrode edge texture). Detailed Implementation

[0033] The technical solutions will now be clearly and completely described with reference to the accompanying drawings in the embodiments of the present invention.

[0034] First implementation method: like Figures 3-4 An electrode-resistor network power supply system for a focusable liquid crystal lens includes: a concentric ring electrode array; a resistor network electrically connected to multiple nodes of the concentric ring electrode array to form a node potential Vk; a small number of power supply buses for providing predetermined AC potential boundaries to the resistor network; and peripheral boundary potential electrodes for providing peripheral potential boundary conditions. in, Figure 3 A schematic diagram of a concentric ring electrode layout with a small number of buses / peripheral boundaries. This example shows 12 ring regions, but it can actually be 36 regions / 910 rings, as shown below. Figure 12 This is a simulated SEM image of the resistor traces and the texture of the ring electrode edge.

[0035] The power supply system is configured to form an approximate target potential distribution V(r) within the effective aperture while satisfying manufacturability constraints, and to cooperate with the Fresnelized phase reset radius set r_z to suppress wavefront errors near the phase reset radius; The number of power supply buses M is much smaller than the number of ring electrodes N, and the optimization objective is to minimize the number of power supply buses and the number of external pins. The number of power supply buses M is 2 to 8, and M is much smaller than N.

[0036] The resistor network is at least one of the following: radial ladder network, spiral network, partitioned network, or multi-level network.

[0037] The resistor network contains a set of partitioned nodes, such that different partitions are matched with different V(r) subfunctions, and a smooth / transition structure is set at the partition boundary to suppress voltage discontinuities; the peripheral boundary potential electrode is set as a fixed boundary potential and is used to suppress edge wavefront warping, and the peripheral boundary potential electrode can also be set as a synchronous boundary potential; the resistance value of the resistor network meets the preset manufacturability constraints, which include at least one of the following: resistance value range, sheet resistance range, and line width / line spacing constraints.

[0038] The resistor network includes an adjustable structure, which is used to change the effective resistance length via laser adjustment or controlled fusing to achieve closed-loop resistance correction. Specifically... Figure 11 If a thin-film resistor with a surface area of ​​rhos (unit: Omega / square) and an aspect ratio of L / W is used, then: R≈ρ_s\frac{L}{W}, laser trimming can achieve closed-loop resistance correction by fine-tuning the effective length\L\ or the slot geometry.

[0039] The power supply system also includes a measurement-feedback module for measuring OPD(V) and updating network or drive parameters to explicitly compensate for individual differences, where OPD(V) represents the optical path difference response obtained under a given drive voltage or voltage vector.

[0040] Furthermore, the measurement-reinjection module includes wavefront metrology and electrical metrology, and is based on a joint objective function. The network parameters θ are corrected, including the resistance values, partition connection relationships, and boundary potential settings. During recharge, θ is iteratively corrected based on wavefront measurement error, electrical deviation, and constraint penalty terms.

[0041] like Figure 10 When the power supply system is used for dual orthogonal stacked adjustable lenses, it provides independent network parameters and independent fine-tuning interfaces for the two adjustable lenses to support differentiated calibration of polarization-insensitive stacks. Specifically, for the total OPD of a two-layer cell: k1 and k2 can be used as gain / scaling parameters to extend the range or compensate for temperature drift.

[0042] The power supply system also includes a traceability data unit for storing network topology version, resistance parameters, calibration version, and hash digest.

[0043] like Figure 6 A method for generating an electrode-resistor network for a focusable liquid crystal lens includes the following steps: S1. Obtain the target OPD profile OPD_t(r) and reset the phase envelope to obtain the reset target phase Φ_t(r) or target potential profile Vt(r); Regarding the process from target refractive power to target OPD: for an axisymmetric target (thin lens approximation) with an equivalent refractive power Phit, the target phase is:

[0044] like Figure 1The diagrams illustrate OPD_t(r) and OPD_{mod}(r), and demonstrate Fresnel phase reset (reset height H):

[0045] S2. Given the manufacturable constraints and boundary conditions (including the potential of the surrounding boundary), determine the number of power supply buses M and the network topology G; S3. Solve for the resistance allocation R so that the network output potential V_{G,R}(r) approximates Vt(r), and take at least one of the following as the optimization objective: minimum number of power supply buses and minimum number of external pins; Specifically, the optimization focuses on "minimum bus size + OPD error constraint": First, the objective is defined as minimizing the node potential error:

[0046] Then, regularization and manufacturability constraints (resistance range, chip resistors, line width / spacing, etc.) are introduced:

[0047] Simultaneously, if the total number of collinear lines M is one of the optimization objectives, a hierarchical strategy can be used:

[0048] Figure 5 A comparison is given between independent loop-by-loop driving and a low-bus approach. Specifically, in the diagram, approach A represents independent loop-by-loop driving, while approach B represents a resistor network with a small number of power supply buses. These examples illustrate that, under similar OPD error constraints, approach B can significantly reduce external pins and routing complexity. Figure 7 This illustrates the equivalent circuit / simulation model (SPICE abstraction). Figure 8 This illustrates the convergence of resistor network parameter optimization; Figure 9 The diagram illustrates the comparison of OPD reconstruction implemented using a resistor network.

[0049] S4. Output the fabricable resistor network layout parameters and driving boundary conditions; S5. Perform wavefront and electrical measurements on the sample to form traceability data units and perform backfeed correction on the parameters.

[0050] In step S1, the phase envelope reset satisfies: A smoothing constraint is introduced near the phase reset radius set {rz} to reduce voltage spikes.

[0051] Specifically, if there is a sudden change in the target OPD near the phase reset radius, a voltage spike will appear in the directly calculated V(r). This scheme introduces a phase reset smooth transition region in step S1 and adds a smoothing penalty term to the potential difference between adjacent nodes in the network solution in step S2, thereby constraining the maximum value of ΔV_k = V_{k+1} - V_k. The feasible optimization objective can be written as min_{θ} ||V_net(r;θ)-V_target(r)||_2^2 + λ_1 Σ_k(ΔV_k)^2 + λ_2 C(R), where λ_1 and λ_2 are weighting coefficients. By increasing the transition width near the reset, refining the distribution of adjacent resistors, and using partitioned connection methods, voltage spikes can be reduced while satisfying the OPD error constraint.

[0052] In step S3, the objective function is minimized: Generate a network, where C(R) represents a resistance value that can create a constraint penalty term.

[0053] In step S3, Vt(r) is discretized into a set of link points {Vk}, and the resistance distribution is solved using the Kirchhoff equations. The specific solution process includes resetting the target OPD, inversely calculating V(r), discretizing to link points, solving for network parameters, manufacturing adjustments, and reflow.

[0054] The target OPD reset has already been described above.

[0055] (1) such as Figure 2 The specific process of finding V(r) is as follows:

[0056] If the calibration yields a monotonic mapping Δn eff =f(V), then the inverse function is given:

[0057] (2) Discretization to the node: The process from continuous V(r) to the node Vk in the loop is as follows: Let the ring boundary 0 = r0 <r1<...<r N =R, discrete approximation: Where k=1,2…N, at the layout level, V k Corresponding ring electrode E k The node potential.

[0058] (3) Regarding the resistive network model: the nodal equations and boundary conditions are as follows: Treating the nodes as network nodes, the resistive connections form the admittance matrix G(R). For internal nodes without independent injection current, KCL is satisfied:

[0059] If the power supply bus node set is mathematical{B}, its potential is applied by the drive circuit V. b Peripheral boundary electrodes can serve as fixed boundary V sur Therefore, the entire network can be written as:

[0060] In step S3, the peripheral boundary potential Vs and the network resistance R are jointly optimized to reduce edge wavefront error.

[0061] The layout parameters output in step S4 include: resistor bar width / length, chip resistor nominal value, adjustment window, and power supply bus and pad layout.

[0062] In step S5, Φ(r) is obtained through wavefront measurement, and the error ΔPhi(r) = Φ(r) - Φ_t(r) is used to back-calculate the network parameter correction amount ΔR.

[0063] The physical closed-loop correction of ΔR is achieved by adjusting the local resistance length through laser trimming; when outputting network layout parameters, the association table of partitioning strategy and phase reset strategy is also output to make manufacturing and calibration repeatable; the traceability data unit is used for batch normalization so that the error of different batches of samples under the same target refractive power is less than the preset threshold.

[0064] The resistor network generation method also includes generating AC drive boundary conditions under the premise of satisfying |Vk|≤Vmax and zero DC constraint, so as to realize the approximate target potential distribution of a large number of ring electrodes with a small number of power supply buses, thereby reducing the number of pins, wiring complexity and manufacturing risk.

[0065] In addition, to implement the above-mentioned resistance network generation method and system, this embodiment may optionally include a non-transitory computer-readable storage medium and an electronic device with the storage medium. The electronic device also includes a processor, and the storage medium stores computer program instructions. When the instructions are executed by the processor, they are used to implement the resistance network generation and backfeed method, and output network layout parameters and traceability data units. The electronic device further includes a communication interface with a wavefront metering device, an electrical metering device, or a production line controller for transmitting data and audit logs in the manufacturing-calibration-adjustment closed loop.

[0066] The above description is merely a preferred embodiment of the present invention; it encompasses all the protection scope of the present invention. Any equivalent substitutions or modifications made by those skilled in the art within the technical scope disclosed in the present invention, based on the technical solutions and improved concepts of the present invention, should be covered within the protection scope of the present invention.

Claims

1. An electrode-resistor network power supply system for a focusable liquid crystal lens, characterized in that, include: Concentric ring electrode array; A resistor network, electrically connected to multiple nodes of a concentric ring electrode array to form a node potential V k ; A small number of power supply buses are used to provide predetermined AC potential boundaries to the resistor network; Peripheral boundary potential electrodes are used to provide peripheral potential boundary conditions; The power supply system is configured to form an approximate target potential distribution V(r) within the effective aperture while satisfying manufacturability constraints, and to cooperate with the Fresnelized phase reset radius set r_z to suppress wavefront errors near the phase reset radius; The number of power supply buses M is much smaller than the number of ring electrodes N, and the optimization objective is to minimize the number of power supply buses and the number of external pins.

2. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, The number of power supply buses M is 2 to 8, and M is much smaller than N.

3. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, The resistor network is at least one of a radial ladder network, a spiral network, a partitioned network, or a multi-level network.

4. The electrode-resistor network power supply system for the adjustable-focus liquid crystal lens according to claim 1, characterized in that, The resistor network includes a set of partitioned nodes, such that different partitions are matched with different V(r) subfunctions, and a smooth / transition structure is set at the partition boundaries to suppress voltage discontinuities.

5. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, The peripheral boundary potential electrode is set to a fixed boundary potential and is used to suppress edge wavefront warping.

6. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, The resistance value of the resistor network satisfies a preset manufacturability constraint, which includes at least one of the following: resistance value range, chip resistance range, and line width / line spacing constraint.

7. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, The resistor network includes an adjustable structure, which is used to change the effective resistance length by laser adjustment or controlled melting to achieve closed-loop resistance correction.

8. The electrode-resistor network power supply system for the adjustable-focus liquid crystal lens according to claim 1, characterized in that, It also includes a measurement-feedback module for measuring OPD(V) and updating network or driving parameters to explicitly compensate for individual differences, where OPD(V) represents the optical path difference response obtained under a given driving voltage or voltage vector.

9. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 8, characterized in that, The measurement-reinjection module includes wavefront metrology and electrical metrology, and is based on a joint objective function. The network parameters θ are corrected, including resistance values, partition connection relationships, and boundary potential settings. During recharge, θ is iteratively corrected based on wavefront measurement error, electrical deviation, and constraint penalty terms.

10. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, When the power supply system is used for dual orthogonal stacked adjustable lenses, it provides independent network parameters and independent fine-tuning interfaces for the two adjustable lenses to support differential calibration of polarization-insensitive stacks.

11. The electrode-resistor network power supply system for the adjustable focus liquid crystal lens according to claim 1, characterized in that, It also includes a traceability data unit for storing network topology version, resistance parameters, calibration version, and hash digest.

12. A method for generating an electrode-resistor network for a focusable liquid crystal lens, characterized in that, Includes the following steps: S1. Obtain the target OPD profile OPD_t(r) and reset the phase envelope to obtain the target phase Φ_t(r) or the target potential profile V. t (r); S2. Given the manufacturability constraints and boundary conditions, determine the number of power supply buses M and the network topology G; S3. Solve for the resistance distribution R so that the network output potential V_{G,R}(r) is approximately V t (r), and take at least one of the following as the optimization objective: minimum number of power supply buses and minimum number of external pins; S4. Output the fabricable resistor network layout parameters and driving boundary conditions; S5. Perform wavefront and electrical measurements on the sample to form traceability data units and perform backfeed correction on the parameters.

13. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, In step S1, the phase envelope reset satisfies: And in phase reset radius {r z A smoothing constraint is introduced near the voltage spike to reduce voltage spikes.

14. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, In step S3, the objective function is minimized: Generate a network, where C(R) represents a resistance value that can create a constraint penalty term.

15. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, In step S3, V t (r) Discretize into a set of node points {V k The resistance distribution is solved using the Kirchhoff equations. The specific solution process includes resetting the target OPD, inversely calculating V(r), discretizing to the link point, solving the network parameters, manufacturing adjustment, and reflow.

16. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, In step S3, the potential V of the surrounding boundary is... s The network resistance R is jointly optimized to reduce edge wavefront error.

17. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, The layout parameters output in step S4 include: resistor bar width / length, chip resistor nominal value, adjustment window, and power supply bus and pad layout.

18. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, In step S5, Φ(r) is obtained through wavefront measurement, and the error ΔPhi(r) = Φ(r) - Φ_t(r) is used to back-calculate the network parameter correction amount ΔR.

19. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, It also includes physical closed-loop correction of ΔR by adjusting the local resistance length using laser trimming.

20. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, When outputting network layout parameters, the association table of partitioning strategy and phase reset strategy is also output to make manufacturing and calibration repeatable.

21. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, The traceability data unit is used for batch normalization, so that the error of different batches of samples under the same target refractive power is less than a preset threshold.

22. The method for generating an electrode-resistor network for a focusable liquid crystal lens according to claim 12, characterized in that, This also includes satisfying |V k |≤V max AC driving boundary conditions are generated under the premise of zero DC constraint.

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