Large model whole graph operator precision verification method and device, medium and equipment

Abstract

The invention discloses a large model whole graph operator precision verification method and device, a medium and equipment. The method comprises the following steps: unifying whole-graph operator calculation graphs of a target platform and a current platform, so that the number of operator nodes and the number of data nodes of the target platform and the current platform are the same; running the computational graph on the target platform, and obtaining an initial input data node of the target platform and a first intermediate data node of each block node in the computational graph; operating the initial input data node and the first intermediate data node as input data nodes of the current platform, and acquiring a second intermediate data node of the current platform; comparing the first intermediate data node and the second intermediate data node of the block nodes corresponding to the target platform and the current platform, and determining the precision of each block node of the target platform; and according to the precision of each block node and a preset error, positioning the block node with wrong precision of the current platform.

Description

A method, apparatus, medium, and equipment for verifying the accuracy of large-scale graph operators. Technical Field

[0001] This invention relates to the field of large model operator accuracy verification technology, and more specifically, to a method, apparatus, medium, and device for large model whole graph operator accuracy verification. Background Technology

[0002] As large-scale models become increasingly common, their operator implementations vary widely. To verify whether a self-implemented large-scale model has any issues with its operators and whether the error meets requirements, a precision comparison method is needed. This involves running a large model on a target platform and the same large model on the current chip platform. The outputs of the large models on the target platform and the current platform are labeled output1 and output2, respectively. If the error between output1 and output2 is within a certain range (e.g., 0.0001), it indicates that all operator implementations of the large model on the current platform are working correctly. If the error between output1 and output2 is too large, the precision requirement is not met, and it is necessary to investigate which operator implementation in the current large model has a precision problem. Currently, large-scale model operator precision verification methods only support precision comparison of the last operator in the entire large model graph. If the precision comparison fails, i.e., the error is too large, it is difficult to determine which operator in the entire graph has a problem, presenting a technical challenge of difficult localization. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this invention provides a method, apparatus, medium, and device for verifying the accuracy of large-scale graph operators.

[0004] According to one aspect of the present invention, a method for verifying the accuracy of large model graph operators is provided, comprising:

[0005] Unify the whole graph operator computation graph of the target platform and the current platform so that the number of operator nodes and the number of data nodes are the same on both platforms.

[0006] Run the computation graph on the target platform to obtain the initial input data nodes of the target platform and the first intermediate data nodes of each block node in the computation graph;

[0007] Run the program with the initial input data node and the first intermediate data node as the input data nodes of the current platform, and obtain the second intermediate data node of the current platform.

[0008] The accuracy of each block node of the target platform is determined by comparing the first and second intermediate data nodes of the block nodes corresponding to the target platform and the current platform.

[0009] Based on the accuracy of each block node and the preset error, locate the block node with incorrect accuracy in the current platform.

[0010] Optionally, the computation graph is run on the target platform to obtain the initial input data nodes and the first intermediate data nodes of each block node of the target platform, including:

[0011] The computation graph is divided into blocks according to a preset parameterization method to obtain multiple block nodes of the computation graph;

[0012] Run multiple block nodes on the target platform to obtain the initial input data node of the target platform and the first intermediate data node of each block node.

[0013] Optionally, a block node includes one or more operators.

[0014] Optionally, the first and second intermediate data nodes of the block nodes corresponding to the target platform and the current platform are compared to determine the accuracy of each block node of the target platform, including:

[0015] Customize the block node of interest in the current platform;

[0016] The accuracy of the block node of interest is determined by comparing the second intermediate data node of the current platform with the first intermediate data node of the corresponding block node in the target platform.

[0017] Optionally, based on the precision of each block node and a preset error, the block nodes with erroneous precision in the current platform are located, including:

[0018] If the accuracy of each node of interest meets the preset error, the accuracy of the current platform is determined to meet the requirements.

[0019] If the accuracy of a node of interest does not meet the preset error, locate the node of interest with the incorrect accuracy.

[0020] According to another aspect of the present invention, a large model graph operator accuracy verification device is provided, comprising:

[0021] The unified module is used to unify the whole graph operator computation graph of the target platform and the current platform, so that the number of operator nodes and the number of data nodes are the same on the target platform and the current platform.

[0022] The first running module is used to run the computation graph on the target platform and obtain the initial input data nodes of the target platform and the first intermediate data nodes of each block node in the computation graph.

[0023] The second running module is used to run the initial input data node and the first intermediate data node as the input data node of the current platform, and to obtain the second intermediate data node of the current platform.

[0024] The comparison module is used to compare the first and second intermediate data nodes of the block nodes corresponding to the target platform and the current platform to determine the accuracy of each block node of the target platform.

[0025] The positioning module is used to locate the block nodes with incorrect accuracy on the current platform based on the accuracy of each block node and the preset error.

[0026] According to another aspect of the present invention, a computer-readable storage medium is provided, the storage medium storing a computer program for performing the methods described in any of the above aspects of the present invention.

[0027] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising: a processor; a memory for storing executable instructions of the processor; the processor being configured to read the executable instructions from the memory and execute the instructions to implement the method described in any of the preceding aspects of the present invention.

[0028] Therefore, the method proposed in this invention divides the entire image of a large model into blocks according to custom rules, supports all blocks of the large model to perform a precision comparison with all blocks of the target platform at one time, and quickly locates which block of the entire image of the large model has a precision problem. Attached Figure Description

[0029] Exemplary embodiments of the present invention can be more fully understood by referring to the following figures:

[0030] Figure 1 is a flowchart illustrating the accuracy verification method for large model graph operators provided in an exemplary embodiment of the present invention;

[0031] Figure 2 is a flowchart illustrating an exemplary embodiment of the present invention for a graph optimization, cross-cutting, and automated accuracy comparison method based on operator granularity.

[0032] Figure 3 is a flowchart illustrating a block-granular graph optimization, cross-cutting, and automated accuracy comparison method provided by an exemplary embodiment of the present invention.

[0033] Figure 4 is a schematic diagram of the structure of a large model graph operator accuracy verification device provided in an exemplary embodiment of the present invention.

[0034] Figure 5 shows the structure of an electronic device provided by an exemplary embodiment of the present invention. Detailed Implementation

[0035] Hereinafter, exemplary embodiments according to the present invention will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments of the present invention. It should be understood that the present invention is not limited to the exemplary embodiments described herein.

[0036] It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of the invention.

[0037] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of the present invention are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them.

[0038] It should also be understood that in the embodiments of the present invention, "multiple" can refer to two or more, and "at least one" can refer to one, two or more.

[0039] It should also be understood that any component, data or structure mentioned in the embodiments of the present invention can generally be understood as one or more unless explicitly defined or given contrary instructions in the context.

[0040] Furthermore, the term "and / or" in this invention is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this invention generally indicates that the preceding and following related objects have an "or" relationship.

[0041] It should also be understood that the description of the various embodiments in this invention emphasizes the differences between the various embodiments, and the similarities or similarities can be referred to each other. For the sake of brevity, they will not be described in detail.

[0042] At the same time, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn according to actual scale.

[0043] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0044] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, they should be considered part of the specification.

[0045] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0046] The embodiments of this invention can be applied to electronic devices such as terminal devices, computer systems, and servers, and can operate together with a wide range of other general-purpose or special-purpose computing system environments or configurations. Well-known examples of terminal devices, computing systems, environments, and / or configurations suitable for use with electronic devices such as terminal devices, computer systems, and servers include, but are not limited to: personal computer systems, server computer systems, thin clients, thick clients, handheld or laptop devices, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputer systems, mainframe computer systems, and distributed cloud computing environments including any of the above systems, etc.

[0047] Electronic devices such as terminal devices, computer systems, and servers can be described in the general context of computer system executable instructions (such as program modules) executed by a computer system. Typically, program modules can include routines, programs, object programs, components, logic, data structures, etc., which perform specific tasks or implement specific abstract data types. Computer systems / servers can be implemented in distributed cloud computing environments, where tasks are executed by remote processing devices linked through communication networks. In distributed cloud computing environments, program modules can reside on local or remote computing system storage media, including storage devices.

[0048] Exemplary methods

[0049] Figure 1 is a flowchart illustrating a method for verifying the accuracy of large-scale graph operators according to an exemplary embodiment of the present invention. This embodiment can be applied to electronic devices. As shown in Figure 1, the method 100 for verifying the accuracy of large-scale graph operators includes the following steps:

[0050] Step 101: Unify the whole graph operator computation graph of the target platform and the current platform so that the number of operator nodes and the number of data nodes are the same for the target platform and the current platform;

[0051] Step 102: Run the computation graph on the target platform to obtain the initial input data nodes of the target platform and the first intermediate data nodes of each block node in the computation graph;

[0052] Step 103: Run the initial input data node and the first intermediate data node as the input data nodes of the current platform to obtain the second intermediate data node of the current platform;

[0053] Step 104: Compare the first and second intermediate data nodes of the block nodes corresponding to the target platform and the current platform to determine the accuracy of each block node of the target platform.

[0054] Step 105: Based on the accuracy of each block node and the preset error, locate the block node with incorrect accuracy in the current platform.

[0055] Specifically, existing technologies only support precision comparison of the last operator in a large model graph. If the precision comparison fails (the error is too large), it is difficult to determine which operator in the entire graph is faulty, making localization very challenging. This invention proposes a method for verifying the precision of operators in a large model graph, specifically including the following steps:

[0056] In step 101, the target platform and the current platform are unified to the same computation graph, ensuring that the target platform and the current platform graphs are the same, and the number of operator nodes and data nodes are the same.

[0057] The computation graph is an IR graph. IR (Intermediate Representation) is a network structure used in deep learning to represent computation graphs.

[0058] In steps 102 and 103, the intermediate calculation results of all operators based on the target platform (each operator node and data node has a unique ID) are used as the input of the current platform, that is, the leaf nodes of the current platform.

[0059] The current platform's graph is optimized into a three-layer network structure. The intermediate results and initial input data of the target platform are used as the first layer of the current platform graph, the second layer is all operators, and the third layer is the output results of all operators.

[0060] In step 104, the current platform runs the entire graph once, outputting the accuracy errors of all block nodes and each block node of the target platform.

[0061] In one embodiment of the present invention, when the partitioned block nodes are single operators, as shown in Figure 2, it is a schematic diagram of a graph optimization, cross-cutting, and automated accuracy comparison method based on operator granularity. The specific implementation is as follows:

[0062] 1. Unify the target platform and the current platform to the same computation graph, ensuring that the target platform and the current platform graph are the same, and that the number of operator nodes and the number of data nodes are the same.

[0063] 2. Graph optimization, cross-cutting, and automated accuracy comparison methods based on operator granularity (Figure 2 only shows 4 operator nodes, but in reality there are many, such as 100,000 operator nodes).

[0064] 2.1 Extract the intermediate data and initial input data output by the target platform operator nodes as the overall input data nodes of the current platform, as shown in the yellow data nodes 1, 2, 3, and 4 in the figure.

[0065] 2.2 Parameterize and customize the required operator nodes. By default, all operator nodes can be selected, or you can customize and select the operator nodes you need to focus on, and send them to the graph engine through parameters.

[0066] Each operator in the graph has a unique ID. By default, op1, op2, op3, and op4 in the graph are selected operator nodes.

[0067] 2.3 Graph Engine: Reconstructing the current platform graph structure, the graph engine receives all operators from 2.2 and compresses the large model graph into a three-layer network structure. The first layer contains all data nodes of the "target platform," the second layer contains all operator nodes, and the third layer contains all operator output nodes. If necessary, all output nodes can be merged into a tuple of nodes.

[0068] 2.4 Compare the accuracy of the target platform node operators and the current platform node operators in a single batch.

[0069] for example:

[0070] Target platform data node 2 vs. current platform data node 11;

[0071] Target platform data node 3 vs. current platform data node 22;

[0072] Target platform data node 4 vs. current platform data node 33;

[0073] Target platform data node 5 vs current platform data node 44.

[0074] Output the accuracy comparison results of the above four sets of data at once. If the errors all meet the requirements, then the implementation of the four operators is fine. If one set fails the accuracy comparison (large error), then the implementation of that operator for the entire image is problematic. Accuracy comparison is performed using root mean square error or similarity.

[0075] Therefore, the method proposed in this invention supports all operators of a large model, performs a precision comparison with all operators of the target platform at once, and quickly locates which operator implementation of the entire large model graph has a problem.

[0076] In another embodiment of the present invention, when the divided block nodes are multiple operators, as shown in Figure 3, it is a schematic diagram of the block-granular graph optimization, cross-operation, and automated accuracy comparison method, and the specific implementation is as follows:

[0077] 1. Unify the target platform and the current platform to the same computation graph, ensuring that the target platform and the current platform graph are the same, and that the number of operator nodes and the number of data nodes are the same.

[0078] 2. Block-level graph optimization, cross-cutting, and automated accuracy comparison methods:

[0079] 2.1 Extract the intermediate data output from the target platform block nodes and use it as the input data nodes for the blocks of the current platform's overall graph, as shown in yellow data nodes 1 and 3 in Figure 3.

[0080] 2.2 Parameterized customization of required block nodes: By default, all block nodes can be selected, or you can customize to select the block nodes you want to focus on and send them to the graph engine through parameters;

[0081] Each block in the diagram has a unique ID. By default, op11 and op22 are one block, and op33 and op44 are another block.

[0082] Define the precision operators you need to view and send them to the graph engine as parameters. Parameterization can be done by splitting blocks according to unique IDs 2, 4, 6, 8, 10, or by splitting blocks according to 0, 3, 6, 9, or by splitting blocks according to custom operator nodes 1, 8, 11.

[0083] 2.3 Graph Engine: Reconstructing the current platform graph structure:

[0084] The graph engine receives all block IDs from version 2.2 and compresses the large model graph into a three-layer network structure. The first layer contains all data nodes of the "target platform," the second layer contains all block nodes, and the third layer contains the output nodes of all block nodes. If necessary, all output nodes can be merged into a single tuple.

[0085] 2.4 Perform a one-time batch comparison of the precision of the target platform block nodes and the current platform block nodes;

[0086] for example:

[0087] Target platform data node 3 vs. current platform data node 333;

[0088] Target platform data node 5 vs. current platform data node 555;

[0089] Output the accuracy comparison results of the two sets of data at once. If the errors meet the requirements, then the implementation of both blocks in the figure is fine. If one set fails the accuracy comparison (large error), then the implementation of that block in the whole figure is problematic.

[0090] Therefore, the method proposed in this invention divides the entire graph of a large model into blocks (including multiple operators) according to custom rules, supports all blocks of the large model to perform a precision comparison with all blocks of the target platform at one time, and quickly locates which block of the entire graph of the large model has a precision problem.

[0091] The large model whole graph operator accuracy verification method proposed in this invention can be applied to large model inference and training scenarios. It can verify the implementation accuracy of the Nth operator or the first N operators in the whole graph in one go and quickly identify which node in the whole graph has a problem.

[0092] Exemplary device

[0093] Figure 4 is a schematic diagram of the structure of a large model graph operator accuracy verification device provided in an exemplary embodiment of the present invention. As shown in Figure 4, the device 400 includes:

[0094] The unification module 410 is used to unify the whole graph operator computation graph of the target platform and the current platform, so that the number of operator nodes and the number of data nodes are the same for the target platform and the current platform.

[0095] The first running module 420 is used to run the computation graph on the target platform and obtain the initial input data nodes of the target platform and the first intermediate data nodes of each block node in the computation graph.

[0096] The second running module 430 is used to run the initial input data node and the first intermediate data node as the input data node of the current platform, and to obtain the second intermediate data node of the current platform.

[0097] The comparison module 440 is used to compare the first intermediate data node and the second intermediate data node of the block node corresponding to the target platform and the current platform to determine the accuracy of each block node of the target platform.

[0098] The positioning module 450 is used to locate the block nodes with incorrect accuracy on the current platform based on the accuracy of each block node and the preset error.

[0099] Optionally, the first operating module 420 includes:

[0100] The slicing submodule is used to slice the computation graph into blocks according to a preset parameterization method and obtain multiple block nodes of the computation graph;

[0101] The Run submodule is used to run multiple block nodes on the target platform and obtain the initial input data node of the target platform and the first intermediate data node of each block node.

[0102] Optionally, a block node includes one or more operators.

[0103] Optionally, the comparison module 440 includes:

[0104] Define a submodule to customize the block of interest node in the current platform;

[0105] The comparison submodule is used to compare the second intermediate data node of the block node of interest in the current platform with the first intermediate data node of the corresponding block node in the target platform to determine the accuracy of the block node of interest.

[0106] Optionally, the positioning module 450 includes:

[0107] The determination submodule is used to determine whether the accuracy of the current platform meets the requirements when the accuracy of each node of interest meets the preset error.

[0108] The positioning submodule is used to locate the incorrectly positioned block of interest when the accuracy of the block of interest does not meet the preset error.

[0109] Exemplary electronic devices

[0110] Figure 5 illustrates the structure of an electronic device provided in an exemplary embodiment of the present invention. As shown in Figure 5, the electronic device 50 includes one or more processors 51 and a memory 52.

[0111] The processor 51 may be a central processing unit (CPU) or other form of processing unit with data processing and / or instruction execution capabilities, and may control other components in the electronic device to perform desired functions.

[0112] The memory 52 may include one or more computer program products, which may include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory may include, for example, random access memory (RAM) and / or cache memory. The non-volatile memory may include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program instructions may be stored on the computer-readable storage medium, and the processor 51 may execute the program instructions to implement the methods of the software programs of the various embodiments of the present invention described above, and / or other desired functions. In one example, the electronic device may also include an input device 53 and an output device 54, these components being interconnected via a bus system and / or other forms of connection mechanisms (not shown).

[0113] In addition, the input device 53 may also include, for example, a keyboard, a mouse, etc.

[0114] The output device 54 can output various information to the outside. The output device 54 may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, etc.

[0115] Of course, for simplicity, Figure 5 only shows some of the components of the electronic device that are relevant to the present invention, omitting components such as buses, input / output interfaces, etc. In addition, the electronic device may include any other suitable components depending on the specific application.

[0116] Exemplary computer program products and computer-readable storage media

[0117] In addition to the methods and apparatus described above, embodiments of the present invention may also be computer program products, which include computer program instructions that, when executed by a processor, cause the processor to perform the steps in the methods according to various embodiments of the present invention described in the "Exemplary Methods" section above.

[0118] The computer program product can be written in any combination of one or more programming languages ​​to perform the operations of the embodiments of the present invention. The programming languages ​​include object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's computing device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0119] Furthermore, embodiments of the present invention may also be computer-readable storage media storing computer program instructions thereon, which, when executed by a processor, cause the processor to perform the steps of the methods according to various embodiments of the present invention described in the "Exemplary Methods" section above.

[0120] The computer-readable storage medium may be any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or any combination thereof. More specific examples (a non-exhaustive list) of readable storage media include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof.

[0121] The basic principles of the present invention have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in the present invention are merely examples and not limitations, and should not be considered as essential features of each embodiment of the present invention. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the present invention to the necessity of employing the aforementioned specific details.

[0122] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For system embodiments, since they largely correspond to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0123] The block diagrams of devices, systems, devices, and systems involved in this invention are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, systems, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0124] The methods and systems of the present invention may be implemented in many ways. For example, they may be implemented by software, hardware, firmware, or any combination of software, hardware, and firmware. The above-described order of steps for the methods is for illustrative purposes only, and the steps of the methods of the present invention are not limited to the order specifically described above unless otherwise specifically stated. Furthermore, in some embodiments, the present invention may also be implemented as a program recorded on a recording medium, the program comprising machine-readable instructions for implementing the methods according to the present invention. Thus, the present invention also covers recording media storing programs for performing the methods according to the present invention.

[0125] It should also be noted that in the systems, apparatus, and methods of the present invention, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered equivalents of the present invention. The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the invention. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of the invention. Therefore, the invention is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.

[0126] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the invention to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.

Claims

1. A method for verifying the accuracy of large-scale graph operators, characterized in that, include: The computation graph of the whole graph operator is unified between the target platform and the current platform, so that the number of operator nodes and the number of data nodes are the same for the target platform and the current platform; Run the computation graph on the target platform to obtain the initial input data nodes of the target platform and the first intermediate data nodes of each block node in the computation graph; Run the initial input data node and the first intermediate data node as the input data nodes of the current platform to obtain the second intermediate data node of the current platform; The first intermediate data node and the second intermediate data node of the block node corresponding to the target platform and the current platform are compared to determine the accuracy of each block node of the target platform; based on the accuracy of each block node and the preset error, the block node of the current platform with incorrect accuracy is located.

2. The method according to claim 1, characterized in that, Running the computation graph on the target platform and obtaining the initial input data nodes and the first intermediate data nodes of each block node of the target platform includes: dividing the computation graph into blocks according to a preset parameterization method to obtain multiple block nodes of the computation graph; running multiple block nodes on the target platform and obtaining the initial input data nodes and the first intermediate data nodes of each block node of the target platform.

3. The method according to claim 2, characterized in that, The block node includes one or more operators.

4. The method according to claim 1, characterized in that, The accuracy of each block node of the target platform is determined by comparing the first intermediate data node and the second intermediate data node of the block node corresponding to the target platform and the current platform, including: defining the block node of interest in the current platform; and comparing the second intermediate data node of the block node of interest in the current platform with the first intermediate data node of the corresponding block node in the target platform to determine the accuracy of the block node of interest.

5. The method according to claim 4, characterized in that, Based on the accuracy of each block node and the preset error, the block node with incorrect accuracy of the current platform is located, including: when the accuracy of each block node of interest meets the preset error, the accuracy of the current platform is determined to meet the requirements; when the accuracy of a block node of interest does not meet the preset error, the block node of interest with incorrect accuracy is located.

6. A device for verifying the accuracy of large-scale model graph operators, characterized in that, include: A unified module is used to unify the whole graph operator computation graph of the target platform and the current platform, so that the number of operator nodes and the number of data nodes are the same for the target platform and the current platform. The first running module is used to run the computation graph on the target platform and obtain the initial input data nodes of the target platform and the first intermediate data nodes of each block node in the computation graph. The second running module is used to run the initial input data node and the first intermediate data node as the input data node of the current platform, and to obtain the second intermediate data node of the current platform; The comparison module is used to compare the first intermediate data node and the second intermediate data node of the block node corresponding to the target platform and the current platform to determine the accuracy of each block node of the target platform. The positioning module is used to locate the block nodes with incorrect accuracy of the current platform based on the accuracy of each block node and the preset error.

7. The apparatus according to claim 6, characterized in that, The first running module includes: a block-slicing submodule, used to slice the computation graph into blocks according to a preset parameterization method and obtain multiple block nodes of the computation graph; and a running submodule, used to run multiple block nodes on the target platform and obtain the initial input data node of the target platform and the first intermediate data node of each block node.

8. The apparatus according to claim 7, characterized in that, The block node includes one or more operators.

9. A computer-readable storage medium, characterized in that, The storage medium stores a computer program for performing the method described in any one of claims 1-5.

10. An electronic device, characterized in that, The electronic device includes: a processor; a memory for storing executable instructions of the processor; the processor being configured to read the executable instructions from the memory and execute the instructions to implement the method according to any one of claims 1-5.

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