SSPC integral protection circuit based on high-speed operational amplifier

Abstract

The invention discloses an SSPC integral protection circuit based on a high-speed operational amplifier. The SSPC integral protection circuit comprises a control circuit, a driving circuit, a power supply circuit, an acquisition circuit and an integral protection circuit, the input end of the control circuit is used for receiving an external control signal, and the output end of the control circuit is connected to the control end of the driving circuit; a power path of the driving circuit is connected in series in a load power supply loop, and a current sampling end of the driving circuit is connected to an input end of the acquisition circuit; the output end of the acquisition circuit is connected to the input end of the integral protection circuit; the protection action output end of the integral protection circuit is in feedback connection with the input end of the control circuit and is used for turning off the driving circuit when a fault occurs; and the power supply circuit provides a working power supply for each circuit module. According to the invention, the problem that the current SSPC power distribution equipment is not timely enough to deal with the load short circuit and the problem that the two states of capacitive load power-on and load short circuit cannot be distinguished are solved.

Description

An SSPC integration protection circuit based on high-speed operational amplifiers Technical Field

[0001] This invention relates to an SSPC integration protection circuit based on a high-speed operational amplifier. Background Technology

[0002] Solid-state power controllers (SSPCs), as core components of modern power distribution systems, have gradually replaced traditional mechanical relays and circuit breakers due to their advantages such as being contactless, having a long lifespan, fast response, and low electromagnetic interference. Their core protection functions, especially load short-circuit and overcurrent protection, are directly related to the safety and reliability of the entire power supply system.

[0003] Current mainstream SSPC protection schemes mostly rely on software algorithms implemented by microcontrollers (MCUs), such as I²T inverse-time protection. This scheme samples the current in real time through software and calculates the thermal accumulation effect based on a mathematical model to determine whether to trigger protection. However, this technical approach has inherent limitations: First, its protection speed is limited by the MCU's sampling period, computing power, and program scheduling delay. In the event of a severe instantaneous short circuit, the response speed may not meet the requirements of applications with extremely high reliability. Second, the stable execution of the software algorithm is highly dependent on the MCU's operating environment. Under complex conditions of strong electromagnetic interference (EMI), the program may malfunction or the sampled data may be distorted, leading to protection failure or false triggering, reducing the system's robustness. Furthermore, traditional software protection logic struggles to accurately distinguish between "legitimate inrush current when a capacitive load is powered on" and "real short-circuit fault current," easily leading to false protection due to the former, affecting the normal startup of the equipment.

[0004] Therefore, the industry urgently needs a pure hardware protection solution that does not rely on software, has a faster response speed, stronger anti-interference ability, and can effectively identify surge currents, in order to improve the protection performance and system stability of SSPC in highly reliable and dynamic electrical environments such as aerospace and special vehicles. Summary of the Invention

[0005] The purpose of this invention is to address the shortcomings of existing SSPC power distribution systems in terms of short-circuit design by providing an SSPC integral protection circuit with a high-speed operational amplifier that features high stability, rapid response, and strong anti-interference capability.

[0006] The technical solution of this invention is as follows: An SSPC integral protection circuit based on a high-speed operational amplifier, comprising a control circuit, a drive circuit, a power supply circuit, a data acquisition circuit, and an integral protection circuit; the input terminal of the control circuit is used to receive external control signals, and its output terminal is connected to the control terminal of the drive circuit; the power path of the drive circuit is connected in series in the load power supply circuit, and its current sampling terminal is connected to the input terminal of the data acquisition circuit; the output terminal of the data acquisition circuit is connected to the input terminal of the integral protection circuit; the protection action output terminal of the integral protection circuit is fed back to the input terminal of the control circuit, used to shut down the drive circuit in case of a fault; the power supply circuit provides operating power to each circuit module.

[0007] The control circuit includes a drive-type optocoupler P1. The input side of the drive-type optocoupler P1 receives an external control signal, and its output side is used to provide an isolated drive signal to the drive circuit. The protection action output terminal of the integral protection circuit is connected to the input side of the drive-type optocoupler P1 to pull down the control signal.

[0008] The driving circuit includes at least power MOSFETs Q1 and Q2 and a sampling resistor R10. The gates of the power MOSFETs Q1 and Q2 are controlled by the control circuit, their sources are grounded through the sampling resistor R10, and their drains are connected to the load power supply. The voltage across the sampling resistor R10 is output to the acquisition circuit as a load current sampling signal.

[0009] The acquisition circuit includes a linear isolation device U4 and a first-stage operational amplifier U1A. The input side of the linear isolation device U4 is connected to the current sampling terminal of the driving circuit, and its output side is connected to the amplification circuit composed of the first-stage operational amplifier U1A. The output of the amplification circuit is filtered to generate a voltage signal proportional to the load current.

[0010] The integral protection circuit includes: a comparison integration unit, used to compare the voltage signal output by the acquisition circuit with a first reference voltage and integrate the error signal output by the comparison; a threshold comparison unit, used to compare the integrated voltage output by the comparison integration unit with a second reference voltage; and a protection execution unit, which, in response to the output of the threshold comparison unit, generates the protection action signal when the integrated voltage exceeds the second reference voltage.

[0011] The comparison integration unit includes a second operational amplifier U1B and an active integration circuit composed of a third operational amplifier U2A; the non-inverting input terminal of the second operational amplifier U1B receives the output voltage of the acquisition circuit, the inverting input terminal receives the first reference voltage, and its output terminal is connected to the input terminal of the active integration circuit.

[0012] The active integrator circuit includes an integrating resistor R24 ​​and an integrating capacitor C16; the output terminal of the second operational amplifier U1B is connected to the inverting input terminal of the third operational amplifier U2A through the integrating resistor R24, and the integrating capacitor C16 is connected between the inverting input terminal and the output terminal of the third operational amplifier U2A.

[0013] The threshold comparison unit is composed of a fourth operational amplifier U3A, whose non-inverting input receives the integrated voltage output by the comparison integration unit, and whose inverting input receives the second reference voltage.

[0014] The protection execution unit includes a trigger IC1 and a switching device U5; the input terminal of the trigger IC1 is connected to the output terminal of the threshold comparison unit, and its output terminal drives the switching device U5 to turn on or off, so as to control whether to pull the input terminal of the control circuit to a low level.

[0015] The circuit is implemented entirely in hardware and can complete the entire process from current sampling and integration to protection shutdown without the need for software intervention.

[0016] The beneficial effects of this invention are as follows: It achieves nanosecond-level high-speed hardware protection response. This invention uses a fully analog circuit to implement the protection logic. Signal processing and judgment are completed instantaneously by a high-speed operational amplifier and an external RC network, completely eliminating sampling delay, calculation delay, and program interruption response time in software protection schemes. From the detection of the overcurrent signal to the output protection action, the entire process is a hardware-level response, with typical action times reaching microseconds or even nanoseconds. This greatly shortens the duration of short-circuit fault current and effectively protects downstream loads and power switches.

[0017] It possesses excellent anti-interference and high reliability: By eliminating the digital software component, this circuit is unaffected by the risk of program corruption, data errors, or system crashes caused by electromagnetic interference. Its protection threshold is determined by a high-precision resistor voltage divider network and a reference source, and the integration time constant is set by stable RC components. Its performance is unaffected by external electromagnetic environment fluctuations, and it can still stably and reliably perform protection functions in complex EMC environments, demonstrating extremely strong system robustness.

[0018] This invention achieves accurate differentiation between surge currents and genuine short-circuit faults in capacitive loads: The core of this invention lies in utilizing a hardware integrator circuit to accumulate overcurrent signals over time. When a capacitive load is powered on, although the surge current amplitude may exceed the short-circuit protection threshold, its duration is extremely short. The integrated output voltage does not reach the trigger threshold of the subsequent comparator, and the circuit will not malfunction. However, in the case of a genuine, continuous short-circuit fault, the overcurrent signal will be fully integrated, thus rapidly triggering the protection. This feature fundamentally solves the problem of false alarms in traditional solutions. Attached Figure Description

[0019] Figure 1 is a schematic diagram of the control circuit.

[0020] Figure 2 is a schematic diagram of the acquisition circuit.

[0021] Figure 3 is a schematic diagram of the power supply circuit.

[0022] Figures 4 and 5 are schematic diagrams of the integral protection circuit. Detailed Implementation

[0023] The present invention provides an SSPC integral protection circuit based on a high-speed operational amplifier, which consists of a control circuit, a drive circuit, a power supply circuit, a data acquisition circuit, and an integral protection circuit.

[0024] As shown in Figure 1, the control circuit consists of resistor R2, resistor R5, driver optocoupler P1, and capacitor C6. Pin 1 of resistor R2 is connected to VCC of the DC 3.3V power supply, pin 2 of resistor R2 is connected to pin 2 of the driver optocoupler and the control signal CT+, pin 1 of resistor R5 is connected to pin 3 of the driver optocoupler and the control signal CT-, pin 2 of resistor R5 is connected to the positive terminal of the DC 3.3V power supply, pin 1 of capacitor C6 is connected to GND of DC 15V, pin 2 of capacitor C6 is connected to VCC of DC 15V, pin 5 of the driver optocoupler is connected to GND of DC 15V, and pins 6 / 7 of the driver optocoupler are connected to pin 1 of R1 / R3 of driver circuit 2.

[0025] As shown in Figure 1, the driving circuit consists of resistors R1, R3, R4, R10, MOSFETs Q1 / Q2, and diode D1. Pins 1 of resistors R1, R3, and R4 are connected to each other. Pin 2 of resistor R1 is connected to pin 1 of MOSFET Q1. Pin 2 of resistor R3 is connected to pin 1 of MOSFET Q2. Pin 2 of resistor R4 is connected to GND (DC15V), pin 2 of resistor R10, and pin 2 of diode D1. Pins 2 to 8 of MOSFETs Q1 and Q2 are connected to pin 1 of resistor R10. Pin 9 of both MOSFETs Q1 and Q2 is connected to VCC (DC28V). Pins 1 / 3 of diode D1 is connected to GND (DC15V).

[0026] As shown in Figure 3, the power supply circuit consists of capacitors C1, C2, C3, C4, C5, C7, C18, and C19, power module N1, reference chip V1, and reference chip V2. Pin 1 of capacitors C1 and C2 is connected to VCC (DC28V) and pin 2 of power module N1. Pin 2 of capacitors C1 and C2 is connected to GND (DC28V) and pin 1 of power module N1. Pin 1 of capacitors C3, C4, C5, and C18 is connected to VCC (DC15V), pin 5 of power module N1, and pin 3 of reference chips V1 and V2. Pin 2 of capacitors C3, C4, C5, and C18 is connected to GND (DC15V) and pin 3 of power module N1. Pin 4 of capacitor C19 is connected to pin 2 of reference chip V1 and pin 1 of reference chip V2. Pin 1 of capacitor C7 is connected to pin 2 of reference chip V1 and VCC (DC 5V). Pin 2 of capacitor C7 is connected to pin 1 of reference chip V1 and GND (DC 15V). Pin 1 of capacitor C19 is connected to pin 2 of reference chip V2 and VCC (DC 3.3V). Pin 2 of capacitor C19 is connected to pin 1 of reference chip V2 and GND (DC 3.3V). As shown in Figure 2, the acquisition circuit consists of resistors R7, R8, R9, R11, R12, and R13, capacitors C8, C9, C10, C11, C12, and C13, linear optocoupler U4, and operational amplifier. The amplifier U1A consists of: pin 1 of resistor R8 is connected to pin 1 of R10 in the drive circuit; pin 2 of resistor R8 is connected to pin 2 of linear optocoupler U4; pin 1 of resistor R12 is connected to pin 2 of R10 in drive circuit 2; pin 2 of resistor R12 is connected to pin 3 of linear optocoupler U4; pins 1 of capacitors C10 and C11 are connected to VCC (DC 5V) and pin 1 of linear optocoupler U4; pins 2 of capacitors C10 and C11 are connected to GND (DC 15V) and pin 4 of linear optocoupler U4; pins 1 of capacitors C90 and C12 are connected to VCC (DC 3.3V) and pin 8 of linear optocoupler U4; pins 2 of capacitors C90 and C12 are connected to GND (DC 3.3V) and pin 8 of linear optocoupler U4. Pin 5 of U4 is connected; pin 1 of resistor R7 is connected to pin 7 of linear optocoupler U4; pin 2 of resistor R7 is connected to pin 3 of operational amplifier U1A; pin 1 of resistor R11 is connected to pin 6 of linear optocoupler U4; pin 2 of resistor R11 is connected to pin 2 of operational amplifier U1A and pin 1 of resistor R13; pin 2 of resistor R13 is connected to pin 1 of operational amplifier U1A and pin 1 of resistor R9; pin 8 of operational amplifier U1A is connected to VCC of DC 3.3V and pin 1 of capacitor C8; pin 4 of operational amplifier U1A is connected to GND of DC 3.3V; pin 2 of resistor R9 is connected to pin 1 of capacitor C13 and pin 1 of R20 in the integration protection circuit; pin 2 of capacitor C13 is connected to DC 3.3V.The 3V GND is connected; as shown in Figures 4 and 5, the integration protection circuit consists of resistors R14~R34, capacitors C14, C15, and C16, operational amplifiers U1B, U2, and U3, trigger IC1, and field-effect transistor U5; pin 1 of resistor R20 is connected to pin 2 of resistor R9 in acquisition circuit 4 and pin 1 of capacitor C13; pin 2 of resistor R20 is connected to pin 5 of operational amplifier U1B and pin 1 of resistor R17; pin 2 of resistor R17 is connected to DC 3.3V GND; pin 1 of resistor R27 is connected to DC 5V VCC; pin 2 of resistor R27 is connected to pin 1 of resistor R31 and pin 1 of resistor R28; pin 2 of resistor R31 is connected to DC 3.3V GND; pin 2 of resistor R28 is connected to pin 1 of resistor R34 and pin 6 of operational amplifier U1B; operational amplifier U1... Pin 7 of B is connected to pin 1 of resistor R24 ​​and pin 2 of resistor R34. Pin 2 of resistor R24 ​​is connected to pin 1 of resistor R33, pin 1 of capacitor C16, and pin 2 of operational amplifier U2A. Pin 1 of resistor R19 is connected to pin 3 of operational amplifier U2A. Pin 2 of resistor R19 is connected to GND (DC 3.3V). Pin 1 of resistor R21, pin 2 of resistor R33, pin 2 of capacitor C16, and pin 2 of operational amplifier U2A are also connected. Pin 1 of the operational amplifier U2A is connected to VCC (DC5V), pin 4 of the operational amplifier U2A is connected to GND (DC5V), pin 2 of resistor R21, pin 1 of resistor R32, and pin 6 of operational amplifier U2B are connected, pin 2 of resistor R32, pin 1 of resistor R16, and pin 7 of operational amplifier U2B are connected, pin 1 of resistor R14, and pin 5 of operational amplifier U2B are connected, and pin 2 of resistor R14 is connected to DC3V.Connect the 3V GND to pin 3. Connect pin 2 of resistor R16 to pin 3 of operational amplifier U3A. Connect pins 2 of resistors R25 and R30 to pin 2 of operational amplifier U3A. Connect pin 1 of resistor R25 to VCC of DC5V. Connect pin 1 of resistor R30 to GND of DC5V. Connect pin 1 of capacitor C14 to pin 5 of operational amplifier U3A. Connect pin 2 of capacitor C14 to GND of DC5V. Connect pin 1 of operational amplifier U3A to pins 2 of resistors R18 and R26, and pin 1 of trigger IC1. Connect pin 1 of resistor R18 to VCC of DC5V. Connect pin 1 of resistor R26 to GND of DC5V and I... Pin 4 of capacitor C1 is connected to the ground plane. Pin 2 of IC1 is connected to pin 2 of resistor R15. Pin 7 of IC1 is connected to pin 1 of resistor R22. Pin 6 of IC1 is connected to pin 1 of resistor R23. Pin 8 of IC1 is connected to pins 2 of resistor R22, pin 2 of resistor R23, and VCC of DC5V. Pin 5 of IC1 is connected to pin 1 of resistor R29, pin 1 of capacitor C15, and pins 2 / 4 of MOSFET U5. Pin 2 of capacitor C15 is connected to GND of DC5V and pin 2 of resistor R29. Pins 1 / 3 of MOSFET U5 is connected to GND of DC5V. Pins 5-8 of MOSFET U5 are connected to pin 2 of P1 of the drive-type optocoupler in control circuit 1 and pin 2 of resistor R2.

[0027] The main function of the control circuit is to isolate and amplify the drive signal, and to convert the DC 3.3V control signal with no drive capability into a drive signal with a maximum drive current of 3A and a DC 15V voltage through optocoupler P1.

[0028] The main function of the drive circuit is to limit the current of the DC 15V drive signal input from the control circuit 1, and then drive the field-effect transistor through the current-limited DC 15V drive signal. After the field-effect transistor is turned on, the power current directly drives the load through the sampling resistor R10, thereby supplying power to the load. Diode D1 is a freewheeling diode. When the load is normally turned off, if there is still residual charge in the load, it will be released through this diode. The main function of the power supply circuit is to provide power to various components, such as providing a DC 3.3V pull-up power supply for the control signal CT+, a DC 15V power supply for the optocoupler P1, a DC 5V / DC 3.3V power supply for the linear optocoupler U4, and a DC 5V power supply for the operational amplifiers U1 / U2 / U2 and the trigger IC1.

[0029] The main function of the acquisition circuit is to convert the load drive current into voltage through the sampling resistor R10, and then input the differential voltage of the sampling resistor to the input terminal of the linear optocoupler U4 through the resistors R8 / R12. The linear optocoupler U4 isolates and amplifies the acquired differential voltage and inputs it into the amplifier circuit composed of U1A. The U1A circuit amplifies the acquired voltage again, and after filtering by R9 / C13, the voltage value can be input to the integration protection circuit.

[0030] The main function of the integration protection circuit is as follows: The voltage value output from the acquisition circuit is input to the positive terminal of the circuit composed of U1B. Simultaneously, the VCC 5V voltage is divided to a specified value by resistors R27 / R31 and input to the negative terminal of the U1B circuit. The voltage after processing by operational amplifier U1B is a DC voltage less than 3.3V. This voltage is then input to the integrating circuit composed of U2A. The charging and discharging speed and output value of this integrating circuit can be adjusted by regulating resistors R24 / R33 and capacitor C16. After passing through current-limiting resistor R21, the voltage is input to the inverting circuit composed of U2B. This circuit can adjust the output voltage value by regulating resistor R32. The voltage value output from U2B is current-limited by resistor R16 and input to the positive terminal of operational amplifier U3A. The VCC 5V voltage is divided by resistors R25 and R30 and input to the negative terminal of operational amplifier U3A. Finally, the comparator composed of operational amplifier U3A compares these two voltages and outputs VCC. 5V or GND, the output of operational amplifier U3A is received by trigger IC1. When trigger IC1 detects that the output of operational amplifier U3A is at the specified level, trigger IC1 is activated and outputs VCC 5V voltage to drive field-effect transistor U5. After field-effect transistor U5 is turned on, it will pull down the control signal CT+, thereby turning off the control signal and realizing the short circuit protection function.

Claims

1. An SSPC integration protection circuit based on a high-speed operational amplifier, characterized in that: It includes a control circuit, a drive circuit, a power supply circuit, a data acquisition circuit, and an integral protection circuit. The input terminal of the control circuit is used to receive external control signals, and its output terminal is connected to the control terminal of the drive circuit. The power path of the drive circuit is connected in series in the load power supply circuit, and its current sampling terminal is connected to the input terminal of the data acquisition circuit. The output terminal of the data acquisition circuit is connected to the input terminal of the integral protection circuit. The protection action output terminal of the integral protection circuit is fed back to the input terminal of the control circuit, and is used to shut down the drive circuit in case of a fault. The power supply circuit provides operating power to each circuit module.

2. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 1, characterized in that: The control circuit includes a drive-type optocoupler P1. The input side of the drive-type optocoupler P1 receives an external control signal, and its output side is used to provide an isolated drive signal to the drive circuit. The protection action output terminal of the integral protection circuit is connected to the input side of the drive-type optocoupler P1 to pull down the control signal.

3. The SSPC integration protection circuit according to claim 1, characterized in that: The driving circuit includes at least power MOSFETs Q1 and Q2 and a sampling resistor R10. The gates of the power MOSFETs Q1 and Q2 are controlled by the control circuit, their sources are grounded through the sampling resistor R10, and their drains are connected to the load power supply. The voltage across the sampling resistor R10 is output to the acquisition circuit as a load current sampling signal.

4. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 1, characterized in that: The acquisition circuit includes a linear isolation device U4 and a first-stage operational amplifier U1A. The input side of the linear isolation device U4 is connected to the current sampling terminal of the driving circuit, and its output side is connected to the amplification circuit composed of the first-stage operational amplifier U1A. The output of the amplification circuit is filtered to generate a voltage signal proportional to the load current.

5. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 1, characterized in that: The integral protection circuit includes: a comparison integration unit, used to compare the voltage signal output by the acquisition circuit with a first reference voltage and integrate the error signal output by the comparison; a threshold comparison unit, used to compare the integrated voltage output by the comparison integration unit with a second reference voltage; and a protection execution unit, which, in response to the output of the threshold comparison unit, generates the protection action signal when the integrated voltage exceeds the second reference voltage.

6. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 5, characterized in that: The comparison integration unit includes a second operational amplifier U1B and an active integration circuit composed of a third operational amplifier U2A; the non-inverting input terminal of the second operational amplifier U1B receives the output voltage of the acquisition circuit, the inverting input terminal receives the first reference voltage, and its output terminal is connected to the input terminal of the active integration circuit.

7. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 6, characterized in that: The active integrator circuit includes an integrating resistor R24 ​​and an integrating capacitor C16; the output terminal of the second operational amplifier U1B is connected to the inverting input terminal of the third operational amplifier U2A through the integrating resistor R24, and the integrating capacitor C16 is connected between the inverting input terminal and the output terminal of the third operational amplifier U2A.

8. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 5, characterized in that: The threshold comparison unit is composed of a fourth operational amplifier U3A, whose non-inverting input receives the integrated voltage output by the comparison integration unit, and whose inverting input receives the second reference voltage.

9. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 8, characterized in that: The protection execution unit includes a trigger IC1 and a switching device U5; the input terminal of the trigger IC1 is connected to the output terminal of the threshold comparison unit, and its output terminal drives the switching device U5 to turn on or off, so as to control whether to pull the input terminal of the control circuit to a low level.

10. The SSPC integration protection circuit based on a high-speed operational amplifier according to claim 1, characterized in that: The circuit is implemented entirely in hardware and can complete the entire process from current sampling and integration to protection shutdown without the need for software intervention.

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