Laminated electronic device

Abstract

The laminated electronic device includes a capacitor, a ground conductor layer, a conductor layer that constitutes at least a portion of the capacitor in cooperation with the ground conductor layer, a structure, and a laminated body. The structure includes a columnar conductor having a first end and a second end located on opposite sides to each other in a stacking direction. The first end is connected with the grounding conductor layer. The second end is not connected to another conductor that constitutes a component other than the capacitor and the structure. The columnar conductor is disposed between the conductor layer and the side surface of the laminate.

Description

Technical Field

[0001] This disclosure relates to a stacked electronic device having a capacitor composed of conductive layers. Background Technology

[0002] In recent years, the market has demanded miniaturization and space-saving in small mobile communication devices, as well as miniaturization of the bandpass filters used in these devices. As a bandpass filter suitable for miniaturization, a laminated bandpass filter is known, which comprises multiple stacked dielectric layers and multiple conductor layers.

[0003] As a bandpass filter, for example, an LC bandpass filter composed of an inductor and a capacitor is used. Japanese Patent Application Publication No. 2024-23011 discloses a filter device comprising: a laminate formed by stacking multiple dielectric layers; a ground electrode; and a first resonator formed by connecting an inductor and a capacitor in parallel. The first resonator includes a first via constituting an inductor and a capacitor electrode connected to the first via. The capacitor electrode overlaps with the ground electrode, and the capacitor electrode and the ground electrode constitute a capacitor.

[0004] The characteristics of a bandpass filter can be adjusted, for example, by the capacitance of a capacitor and the inductance of an inductor. In the case of a bandpass filter constructed of a laminate, the capacitance of the capacitor can be adjusted, for example, by the size of the capacitor conductor layers constituting the capacitor.

[0005] The capacitor conductor layer can effectively function as a distributed constant circuit. Therefore, depending on the shape of the capacitor conductor layer, the characteristics of the bandpass filter may deviate from the desired characteristics due to factors such as the inductive component of the capacitor conductor layer. Thus, when adjusting the capacitance of the capacitor, it is necessary to adjust the shape of the capacitor conductor layer while maintaining the desired capacitance. However, due to limitations in the structure of the laminate, it is difficult to adjust the shape of the capacitor conductor layer. Consequently, it is sometimes impossible to achieve the desired characteristics.

[0006] The aforementioned problems are not limited to bandpass filters, but also apply to all stacked electronic devices that contain capacitors made of conductive layers. Summary of the Invention

[0007] (a) Technical problems to be solved

[0008] One of the objectives of this disclosure is to provide a multilayer electronic device that, in a multilayer electronic device including a capacitor composed of conductor layers, can balance structural limitations and characteristic adjustments.

[0009] (II) Technical Solution

[0010] A stacked electronic device according to one embodiment of this disclosure includes: a first capacitor; a first ground conductor layer connected to a grounding element; a first capacitor conductor layer that cooperates with the first ground conductor layer to form at least a portion of the first capacitor; a first structure made of conductors; and a stack for integrating the first capacitor, the first ground conductor layer, the first capacitor conductor layer, and the first structure, comprising a plurality of stacked dielectric layers. The first structure includes at least one first columnar conductor extending in a direction parallel to the stacking direction of the plurality of dielectric layers, and having a first end and a second end located opposite each other in the stacking direction. The first end is connected to the first ground conductor layer. The stack also includes other conductors for constituting at least one component other than the first capacitor and the first structure. No other conductor is connected to the second end. The stack has: a first surface and a second surface located at both ends in the stacking direction; a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the first surface and the second surface. The first side surface and the second side surface face opposite each other. The third side surface and the fourth side surface face opposite each other. At least one first columnar conductor is disposed between the first capacitor conductor layer and the first side surface.

[0011] (III) Beneficial Effects

[0012] In the stacked electronic device of this disclosure, at least one first end of at least one first pillar-shaped conductor of the first structure is connected to a first ground conductor layer. Additionally, at least one first pillar-shaped conductor is disposed between a first capacitor conductor layer and a first side surface. Thus, according to this disclosure, a stacked electronic device capable of balancing structural limitations and characteristic adjustments can be realized.

[0013] Other objects, features, and advantages of this disclosure will become fully apparent from the following description. Attached Figure Description

[0014] Figure 1 This is a circuit diagram illustrating the circuit structure of a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0015] Figure 2 This is a perspective view showing the appearance of a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0016] Figure 3 This is a perspective view of a stack of stacked electronic devices illustrating an exemplary embodiment of the present disclosure.

[0017] Figures 4A to 4C This is an explanatory diagram showing the pattern formation surfaces of the first to third dielectric layers in a stack of a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0018] Figures 5A to 5CThis is an explanatory diagram showing the pattern formation surface of the fourth to sixth dielectric layers in a stack of a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0019] Figures 6A to 6C This is an explanatory diagram showing the pattern formation surface of the seventh to ninth dielectric layers in a stack of a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0020] Figure 7A as well as Figure 7B This is an explanatory diagram showing the pattern formation surfaces of the tenth and eleventh dielectric layers in a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0021] Figure 7C This is an explanatory diagram showing the pattern formation surfaces of the twelfth to fourteenth dielectric layers in a stack of a stacked electronic device according to an exemplary embodiment of the present disclosure.

[0022] Figures 8A to 8C This is an explanatory diagram showing the pattern formation surfaces of the fifteenth to seventeenth dielectric layers in a stack of a multilayer electronic device according to an exemplary embodiment of the present disclosure.

[0023] Figure 9A as well as Figure 9B This is an explanatory diagram showing the pattern formation surfaces of the eighteenth and nineteenth dielectric layers in a laminated electronic device according to an exemplary embodiment of the present disclosure.

[0024] Figure 10 This is a perspective view of the interior of a stack of multilayer electronic devices according to an exemplary embodiment of the present disclosure.

[0025] Figure 11 This is a side view of the interior of a stack of laminated electronic devices according to an exemplary embodiment of the present disclosure.

[0026] Figure 12 It is a characteristic diagram representing the attenuation characteristics of each model obtained through simulation. Detailed Implementation

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. First, referring to... Figure 1 The structure of a stacked electronic device (hereinafter referred to simply as electronic device) 1 according to an exemplary embodiment of the present disclosure will be described. Figure 1 This is a circuit diagram illustrating the circuit structure of electronic device 1 according to an exemplary embodiment.

[0028] Electronic device 1 includes a first signal terminal 2, a second signal terminal 3, inductors L1, L2, L3, and L4, and capacitors C1, C2, C3, C4, C5, C6, C7, and C8. The first signal terminal 2 and the second signal terminal 3 are terminals used for signal input or output, respectively. That is, when a signal is input to the first signal terminal 2, a signal is output from the second signal terminal 3. Conversely, when a signal is input to the second signal terminal 3, a signal is output from the first signal terminal 2.

[0029] Inductors L1 to L4 and capacitors C1 to C8 are arranged in the circuit structure between the first signal terminal 2 and the second signal terminal 3. Inductors L1 to L4 and capacitors C1 to C8 constitute a bandpass filter that selectively allows signals of frequencies within a specified passband to pass through. Therefore, electronic device 1 can also be said to possess a bandpass filter including inductors L1 to L4 and capacitors C1 to C8. Furthermore, in this application, the phrase "in the circuit structure" refers to the arrangement in the circuit diagram, not the arrangement in the physical structure.

[0030] Inductors L1, L2, and L3 are arranged in this order from the first signal terminal 2 to the second signal terminal 3 in the circuit structure. One end of inductor L1 is connected to the first signal terminal 2. One end of inductor L3 is connected to the second signal terminal 3.

[0031] One end of capacitor C1 is connected to one end of inductor L1. One end of capacitor C2 is connected to one end of inductor L2. One end of capacitor C3 is connected to one end of inductor L3. The other end of each of inductors L1-L3 and capacitors C1-C3 is connected to ground.

[0032] One end of capacitor C4 is connected to one end of inductor L1. One end of capacitor C5 is connected to the other end of capacitor C4. One end of capacitor C6 is connected to the other end of capacitor C5. One end of capacitor C7 is connected to the other end of capacitor C6. The other end of capacitor C7 is connected to one end of inductor L3. One end of inductor L2 is connected to the junction of capacitors C5 and C6.

[0033] One end of inductor L4 is connected to the junction of capacitors C4 and C5. The other end of inductor L4 is connected to the junction of capacitors C6 and C7. Capacitor C8 is connected in parallel with respect to inductor L4.

[0034] Next, refer to Figure 2 as well as Figure 3 The other structures of electronic device 1 will be described. Figure 2 This is a three-dimensional view showing the appearance of electronic device 1. Figure 3 This is a three-dimensional diagram representing the stacked structure of electronic device 1.

[0035] Electronic device 1 includes a laminate 50. The laminate 50 includes multiple stacked dielectric layers and multiple conductors (multiple conductor layers and multiple vias). The laminate 50 is used to integrate a first signal terminal 2, a second signal terminal 3, inductors L1 to L4, and capacitors C1 to C8. Inductors L1 to L4 and capacitors C1 to C8 are constructed using multiple conductor layers.

[0036] The laminate 50 has: a first surface 50A and a second surface 50B located at both ends of the stacking direction T of the plurality of dielectric layers; and four side surfaces 50C to 50F connecting the first surface 50A and the second surface 50B. Side surfaces 50C and 50D face opposite sides to each other, and side surfaces 50E and 50F also face opposite sides to each other. Side surfaces 50C to 50F may be perpendicular to the first surface 50A and the second surface 50B.

[0037] Here, as Figure 2 as well as Figure 3 As shown, the X, Y, and Z directions are defined. The X, Y, and Z directions are orthogonal to each other. In an exemplary embodiment, a direction parallel to the stacking direction T is designated as the Z direction. Furthermore, a direction opposite to the X direction is designated as the -X direction, a direction opposite to the Y direction as the -Y direction, and a direction opposite to the Z direction as the -Z direction. Additionally, the statement "when viewed from a specified direction (e.g., the stacking direction T)" means viewing the object from a separate position along the specified direction or a direction parallel to the specified direction.

[0038] like Figure 3 As shown, the first surface 50A is located at the end of the laminate 50 in the -Z direction. The first surface 50A is also the bottom surface of the laminate 50. The second surface 50B is located at the end of the laminate 50 in the Z direction. The second surface 50B is also the top surface of the laminate 50. The side surface 50C is located at the end of the laminate 50 in the -X direction. The side surface 50D is located at the end of the laminate 50 in the X direction. The side surface 50E is located at the end of the laminate 50 in the -Y direction. The side surface 50F is located at the end of the laminate 50 in the Y direction.

[0039] like Figure 2 as well as Figure 3 As shown, the electronic device 1 also includes electrodes 111, 112, 113, 114, 115, and 116 disposed on a first surface 50A of the laminate 50. Compared to side surface 50F, electrodes 111, 112, and 113 are arranged in this order along the X direction closer to side surface 50E. Compared to side surface 50E, electrodes 114, 115, and 116 are arranged in this order along the -X direction closer to side surface 50F.

[0040] Electrode 111 corresponds to the first signal terminal 2, and electrode 113 corresponds to the second signal terminal 3. Therefore, the first signal terminal 2 and the second signal terminal 3 are disposed on the first surface 50A of the laminate 50. Electrodes 112, 114, 115, and 116 are respectively connected to the grounding component.

[0041] The electronic device 1 also includes a shielding conductor 80, which is made of conductor and integrated relative to the laminate 50. The shielding conductor 80 includes: a first conductor portion 80E disposed on a side surface 50E of the laminate 50; and a second conductor portion 80F disposed on a side surface 50F of the laminate 50. In an exemplary embodiment, in particular, the first conductor portion 80E covers the entire or substantially the entire side surface 50E. The second conductor portion 80F covers the entire or substantially the entire side surface 50F.

[0042] The shielding conductor 80 further includes: a conductor portion 80B disposed on a second surface 50B of the laminate 50; a conductor portion 80C disposed on a side surface 50C of the laminate 50; and a conductor portion 80D disposed on a side surface 50D of the laminate 50. In an exemplary embodiment, in particular, the conductor portion 80B covers the entire second surface 50B. The conductor portion 80C covers the entire or substantially the entire side surface 50C. The conductor portion 80D covers the entire or substantially the entire side surface 50D.

[0043] The shielding conductor 80 may also comprise multiple stacked metal layers. In this case, it is preferable that the first conductor portion 80E, the second conductor portion 80F, and the conductor portions 80B, 80C, and 80D are continuous. That is, it is preferable that the first conductor portion 80E and the second conductor portion 80F are both connected to the conductor portions 80B, 80C, and 80D.

[0044] The shielding conductor 80 is electrically connected to electrodes 114, 115, and 116. The laminate 50 includes a plurality of conductors that electrically connect the shielding conductor 80 to electrodes 114, 115, and 116.

[0045] Next, refer to Figures 4A to 9B An example of the plurality of dielectric layers and the plurality of conductors constituting the laminate 50 will be described. In this example, the laminate 50 includes nineteen dielectric layers. Hereinafter, these nineteen dielectric layers will be referred to as the first to the nineteenth dielectric layers from bottom to top. In addition, the first to the nineteenth dielectric layers will be indicated by reference numerals 51 to 69 in the accompanying drawings.

[0046] exist Figures 4A to 9AIn the diagram, multiple circles represent multiple vias. Multiple vias are formed in each of the dielectric layers 51 to 69. Each via is formed by filling the holes with conductive paste. Each via is connected to an electrode, a conductor layer, or another via. In the following description, the connection relationships between each via and the electrode, conductor layer, or other via are explained in the case of stacked dielectric layers 51 to 69. Figures 4A to 9A In the figure, specific through holes among multiple through holes are marked with reference numerals.

[0047] Figure 4A This indicates the patterned surface of the first dielectric layer 51. Electrodes 111 to 116 are formed on the patterned surface of the dielectric layer 51.

[0048] exist Figure 4A In the figure, two through holes marked with reference numeral 51T7 are connected to electrode 116. Furthermore, in the following description, the through hole marked with reference numeral 51T7 will be simply referred to as through hole 51T7. Additionally, other through holes marked with reference numerals besides through hole 51T7 are also described in the same manner as through hole 51T7. Figure 4A The two through holes 51T8 shown are connected to the electrode 115. Figure 4A The two through holes 51T9 shown are connected to the electrode 114.

[0049] Figure 4B This indicates the patterning surface of the second dielectric layer 52. Conductor layers 521, 522, 523, and 524 are formed on the patterning surface of the dielectric layer 52. Two through-holes 51T7... Figure 4B The two through holes 52T1b shown are as follows Figure 4B The two through holes 52T7 shown are connected to the conductor layer 522. The two through holes 51T8 are connected to... Figure 4B The two through holes 52T8 are connected as shown. The two through holes 51T9... Figure 4B The two through holes 52T3b shown are as follows Figure 4B The two through holes 52T9 shown are connected to the conductor layer 524.

[0050] Figure 4C This indicates the patterning surface of the third dielectric layer 53. Ground conductor layers 531, 532, and 533 are formed on the patterning surface of the dielectric layer 53. Ground conductor layer 532 is connected to ground conductor layers 531 and 533. Figure 4C In the diagram, dashed lines represent the boundaries between grounding conductor layer 531 and grounding conductor layer 532, and the boundaries between grounding conductor layer 532 and grounding conductor layer 533, respectively. One of the grounding conductor layers 531 and 533 corresponds to the "first grounding conductor layer" of this disclosure, and the other of the grounding conductor layers 531 and 533 corresponds to the "second grounding conductor layer" of this disclosure.

[0051] Two through holes 52T7 and Figure 4C The two through holes 53T5 shown are connected to the grounding conductor layer 531. The two through holes 52T8 and... Figure 4C The two through holes 53T2b shown are connected to the grounding conductor layer 532. The two through holes 52T9 and... Figure 4C The two through holes 53T6 shown are connected to the grounding conductor layer 533. The two through holes 52T1b and two through holes 52T3b are respectively connected to... Figure 4C The two through holes 53T1b and two through holes 53T3b shown are connected.

[0052] Figure 5A This indicates the pattern formation surface of the fourth dielectric layer 54. Two vias 53T1b, two vias 53T2b, two vias 53T3b, two vias 53T5, and two vias 53T6 are respectively connected to… Figure 5A The two through holes 54T1b, two through holes 54T2b, two through holes 54T3b, two through holes 54T5, and two through holes 54T6 shown are connected.

[0053] Figure 5B This indicates the patterning surface of the fifth dielectric layer 55. Conductor layers 551, 552, 553, 554, and 555 are formed on the patterning surface of the dielectric layer 55. Figure 5B The two through holes 55T1a, two through holes 55T2a, and two through holes 55T3a shown are connected to conductor layers 552, 555, and 553, respectively. Two through holes 54T5 and... Figure 5B The two through holes 55T5 shown are connected to the conductor layer 551. The two through holes 54T6 and... Figure 5B The two through holes 55T6 shown are connected to the conductor layer 554. The two through holes 54T1b, two through holes 54T2b, and two through holes 54T3b are respectively connected to... Figure 5B The two through holes 55T1b, two through holes 55T2b and two through holes 55T3b shown are connected.

[0054] Figure 5C This indicates the pattern formation surface of the sixth dielectric layer 56. Two through-holes 55T1a, two through-holes 55T1b, two through-holes 55T2a, two through-holes 55T2b, two through-holes 55T3a, two through-holes 55T3b, two through-holes 55T5, and two through-holes 55T6 are respectively connected to… Figure 5C The two through holes 56T1a, two through holes 56T1b, two through holes 56T2a, two through holes 56T2b, two through holes 56T3a, two through holes 56T3b, two through holes 56T5, and two through holes 56T6 shown are connected.

[0055] Figure 6AThis indicates the patterning surface of the seventh dielectric layer 57. Conductor layers 571, 572, 573, and 574 are formed on the patterning surface of dielectric layer 57. Two vias 56T5 and... Figure 6A The two through holes 57T5 shown are connected to the conductor layer 571. The two through holes 56T6 and... Figure 6A The two through holes 57T6 shown are connected to the conductor layer 574. The two through holes 56T1a, two through holes 56T1b, two through holes 56T2a, two through holes 56T2b, two through holes 56T3a, and two through holes 56T3b are respectively connected to… Figure 6A The two through holes 57T1a, two through holes 57T1b, two through holes 57T2a, two through holes 57T2b, two through holes 57T3a and two through holes 57T3b shown are connected.

[0056] Figure 6B This indicates the patterning surface of the eighth dielectric layer 58. A conductor layer 581 is formed on the patterning surface of the dielectric layer 58. Two vias 57T1a, two vias 57T1b, two vias 57T2a, two vias 57T2b, two vias 57T3a, two vias 57T3b, two vias 57T5, and two vias 57T6 are respectively connected to… Figure 6B The two through holes 58T1a, two through holes 58T1b, two through holes 58T2a, two through holes 58T2b, two through holes 58T3a, two through holes 58T3b, two through holes 58T5, and two through holes 58T6 shown are connected.

[0057] Figure 6C This indicates the patterning surface of the ninth dielectric layer 59. Conductor layers 591, 592, 593, and 594 are formed on the patterning surface of the dielectric layer 59. Figure 6C The through holes 59T4a and 59T4b shown are connected to conductor layers 592 and 593, respectively. The two through holes 58T5 and... Figure 6C The two through holes 59T5 shown are connected to the conductor layer 591. The two through holes 58T6 and... Figure 6C The two through holes 59T6 shown are connected to the conductor layer 594. The two through holes 58T1a, two through holes 58T1b, two through holes 58T2a, two through holes 58T2b, two through holes 58T3a, and two through holes 58T3b are respectively connected to… Figure 6C The two through holes 59T1a, two through holes 59T1b, two through holes 59T2a, two through holes 59T2b, two through holes 59T3a and two through holes 59T3b shown are connected.

[0058] Figure 7AThis indicates the patterning surface of the tenth dielectric layer 60. Conductor layers 601, 602, and 603 are formed on the patterning surface of the dielectric layer 60. Two vias 59T1b and... Figure 7A The two through holes 60T1b shown are connected to the conductor layer 601. The two through holes 59T2b and... Figure 7A The two through-holes 60T2b shown are connected to the conductor layer 602. The two through-holes 59T3b and... Figure 7A The two through holes 60T3b shown are connected to the conductor layer 603. The two through holes 59T1a, 59T2a, 59T3a, 59T5, and 59T6 are respectively connected to... Figure 7A The two through holes 60T1a, two through holes 60T2a, two through holes 60T3a, two through holes 60T5, and two through holes 60T6 shown are connected. Through holes 59T4a and 59T4b are respectively connected to... Figure 7A The through holes 60T4a and 60T4b shown are connected.

[0059] Conductor layers 601, 603 and the second conductor portion 80F of shielding conductor 80 (refer to) Figure 2 The conductor layer 602 is connected to the first conductor portion 80E of the shielding conductor 80 (see reference). Figure 2 )connect.

[0060] Figure 7B This indicates the patterned surface of the eleventh dielectric layer 61. Conductor layers 611 and 614 are formed on the patterned surface of dielectric layer 61. Two vias 60T5 and two vias 60T6 are connected to conductor layers 611 and 614, respectively. Two vias 60T1a, two vias 60T1b, two vias 60T2a, two vias 60T2b, two vias 60T3a, and two vias 60T3b are connected to... Figure 7B The two through holes 61T1a, two through holes 61T1b, two through holes 61T2a, two through holes 61T2b, two through holes 61T3a, and two through holes 61T3b shown are connected. Through holes 60T4a and 60T4b are respectively connected to... Figure 7B The through holes 61T4a and 61T4b shown are connected.

[0061] Figure 7CThe diagram indicates the patterned surfaces of the twelfth to fourteenth dielectric layers 62-64. Two through-holes 61T1a, 61T1b, 61T2a, 61T2b, 61T3a, and 61T3b are respectively connected to two through-holes 62T1a, 62T1b, 62T2a, 62T2b, 62T3a, and 62T3b formed in dielectric layer 62. Through-holes 61T4a and 61T4b are respectively connected to through-holes 62T4a and 62T4b formed in dielectric layer 62. Furthermore, in dielectric layers 62-64, adjacent through-holes with the same reference numerals are interconnected.

[0062] Figure 8A This indicates the patterned surface of the fifteenth dielectric layer 65. A conductor layer 651 is formed on the patterned surface of the dielectric layer 65. The conductor layer 651 has a first end and a second end located at both ends along its long side. A via 62T4a formed in the dielectric layer 64 is connected to a portion near the first end of the conductor layer 651. A via 62T4b formed in the dielectric layer 64 is connected to a portion near the second end of the conductor layer 651.

[0063] The two vias 62T1a, two vias 62T1b, two vias 62T2a, two vias 62T2b, two vias 62T3a, and two vias 62T3b formed in the dielectric layer 64 are respectively connected to... Figure 8A The two through holes 65T1a, two through holes 65T1b, two through holes 65T2a, two through holes 65T2b, two through holes 65T3a and two through holes 65T3b shown are connected.

[0064] Figure 8B This indicates the pattern formation surface of the sixteenth dielectric layer 66. Two vias 65T1a, two vias 65T1b, two vias 65T2a, two vias 65T2b, two vias 65T3a, and two vias 65T3b are respectively connected to… Figure 8B The two through holes 66T1a, two through holes 66T1b, two through holes 66T2a, two through holes 66T2b, two through holes 66T3a and two through holes 66T3b shown are connected.

[0065] Figure 8C This indicates the patterning surface of the seventeenth dielectric layer 67. Conductor layers 671, 672, and 673 are formed on the patterning surface of dielectric layer 67. Two vias 66T1b and... Figure 8C The two through holes 67T1b shown are connected to the conductor layer 671. The two through holes 66T2b and... Figure 8C The two through-holes 67T2b shown are connected to the conductor layer 672. The two through-holes 66T3b and... Figure 8C The two through holes 67T3b shown are connected to the conductor layer 673. The two through holes 66T1a, two through holes 66T2a, and two through holes 66T3a are respectively connected to... Figure 8C The two through holes 67T1a, two through holes 67T2a and two through holes 67T3a shown are connected.

[0066] Conductor layers 671, 673 and the second conductor portion 80F of shielding conductor 80 (refer to) Figure 2 The conductor layer 672 is connected to the first conductor portion 80E of the shielding conductor 80 (see reference). Figure 2 )connect.

[0067] Figure 9A This indicates the patterning surface of the eighteenth dielectric layer 68. Conductor layers 681, 682, and 683 are formed on the patterning surface of the dielectric layer 68. Conductor layer 681 has a first end and a second end located at both ends of its long side. Conductor layer 682 has a first end and a second end located at both ends of its long side. Conductor layer 683 has a first end and a second end located at both ends of its long side.

[0068] Compared to the second conductor portion 80F of the shielding conductor 80, the first end of conductor layer 681, the second end of conductor layer 682, and the first end of conductor layer 683 are located closer to the first conductor portion 80E of the shielding conductor 80. Figure 9A The second end of conductor layer 681, the first end of conductor layer 682, and the second end of conductor layer 683 are located closer to the second conductor portion 80F of shielding conductor 80 than the first conductor portion 80E of shielding conductor 80. Figure 9A (Lower side position).

[0069] Two through holes 67T1a and Figure 9A The two through holes 68T1a shown are connected to a portion near the first end of the conductor layer 681. The two through holes 67T1b and... Figure 9A The two through holes 68T1b shown are connected to a portion near the second end of the conductor layer 681. The two through holes 67T2a and... Figure 9A The two through holes 68T2a shown are connected to a portion near the first end of the conductor layer 682. The two through holes 67T2b and... Figure 9A The two through holes 68T2b shown are connected to a portion near the second end of the conductor layer 682. The two through holes 67T3a and... Figure 9A The two through holes 68T3a shown are connected to a portion near the first end of the conductor layer 683. The two through holes 67T3b and... Figure 9A The two through holes 68T3b shown are connected to the portion near the second end of the conductor layer 683.

[0070] Figure 9B This indicates the patterning surface of the nineteenth dielectric layer 69. Conductor layers 691, 692, and 693 are formed on the patterning surface of the dielectric layer 69. Conductor layer 691 has a first end and a second end located at both ends of its long side. Conductor layer 692 has a first end and a second end located at both ends of its long side. Conductor layer 693 has a first end and a second end located at both ends of its long side.

[0071] Compared to the second conductor portion 80F of the shielding conductor 80, the first end of the conductor layer 691, the second end of the conductor layer 692, and the first end of the conductor layer 693 are located closer to the first conductor portion 80E of the shielding conductor 80. Figure 9B The second end of conductor layer 691, the first end of conductor layer 692, and the second end of conductor layer 693 are located closer to the second conductor portion 80F of shielding conductor 80 than the first conductor portion 80E of shielding conductor 80. Figure 9B (Lower side position).

[0072] Two through-holes 68T1a are connected to the vicinity of the first end of conductor layer 691. Two through-holes 68T1b are connected to the vicinity of the second end of conductor layer 691. Two through-holes 68T2a are connected to the vicinity of the first end of conductor layer 692. Two through-holes 68T2b are connected to the vicinity of the second end of conductor layer 692. Two through-holes 68T3a are connected to the vicinity of the first end of conductor layer 693. Two through-holes 68T3b are connected to the vicinity of the second end of conductor layer 693.

[0073] Figure 3 The stack 50 shown is constructed by stacking the first to nineteenth dielectric layers 51 to 69 in such a way that the patterned surface of the first dielectric layer 51 becomes the first surface 50A of the stack 50, and the surface of the nineteenth dielectric layer 69 opposite to the patterned surface becomes the second surface 50B of the stack 50.

[0074] Figure 10 This refers to the interior of the laminate 50, which consists of the first to nineteenth dielectric layers 51-69. For example... Figure 10 As shown, inside the laminate 50, there are laminated... Figures 4A to 9B The diagram shows multiple conductor layers and multiple vias.

[0075] Below, on Figure 1 The circuit components of the electronic device 1 shown are similar to Figures 4A to 9BThe correspondence of the internal components of the stack 50 shown is explained. Conductor layers 681 and 691 and vias 52T1b, 53T1b, 54T1b, 55T1a, 55T1b, 56T1a, 56T1b, 57T1a, 57T1b, 58T1a, 58T1b, 59T1a, 59T1b, 60T1a, 60T1b, 61T1a, 61T1b, 62T1a, 62T1b, 65T1a, 65T1b, 66T1a, 66T1b, 67T1a, 67T1b, 68T1a, 68T1b constitute at least a portion of the inductor L1.

[0076] Conductor layers 682 and 692 and vias 53T2b, 54T2b, 55T2a, 55T2b, 56T2a, 56T2b, 57T2a, 57T2b, 58T2a, 58T2b, 59T2a, 59T2b, 60T2a, 60T2b, 61T2a, 61T2b, 62T2a, 62T2b, 65T2a, 65T2b, 66T2a, 66T2b, 67T2a, 67T2b, 68T2a, and 68T2b constitute at least a portion of inductor L2.

[0077] Conductor layers 683 and 693 and vias 52T3b, 53T3b, 54T3b, 55T3a, 55T3b, 56T3a, 56T3b, 57T3a, 57T3b, 58T3a, 58T3b, 59T3a, 59T3b, 60T3a, 60T3b, 61T3a, 61T3b, 62T3a, 62T3b, 65T3a, 65T3b, 66T3a, 66T3b, 67T3a, 67T3b, 68T3a, 68T3b constitute at least a portion of inductor L3.

[0078] The conductor layer 651 and the vias 59T4a, 59T4b, 60T4a, 60T4b, 61T4a, 61T4b, 62T4a, and 62T4b constitute at least a portion of the inductor L4.

[0079] Grounding conductor layer 531, conductor layer 552, and dielectric layers 53 and 54 between these conductor layers constitute at least a portion of capacitor C1. Grounding conductor layer 532, conductor layer 555, and dielectric layers 53 and 54 between these conductor layers constitute at least a portion of capacitor C2. Grounding conductor layer 533, conductor layer 553, and dielectric layers 53 and 54 between these conductor layers constitute at least a portion of capacitor C3.

[0080] Conductor layers 552 and 572, and dielectric layers 55 and 56 between these conductor layers, constitute at least a portion of capacitor C4. Conductor layers 555 and 572, and dielectric layers 55 and 56 between these conductor layers, constitute at least a portion of capacitor C5. Conductor layers 555 and 573, and dielectric layers 55 and 56 between these conductor layers, constitute at least a portion of capacitor C6. Conductor layers 553 and 573, and dielectric layers 55 and 56 between these conductor layers, constitute at least a portion of capacitor C7. Conductor layers 572, 573, 581, 592, and 593, and dielectric layers 57 and 58 between these conductor layers, constitute at least a portion of capacitor C8.

[0081] Next, refer to Figures 1 to 11 The structural features of the electronic device 1 according to an exemplary embodiment will be described. Figure 11 This is a side view showing the interior of the laminate 50. As described above, the laminate 50 includes capacitors C1 and C3. Conductor layer 552 cooperates with ground conductor layer 531 to form at least a portion of capacitor C1. Conductor layer 553 cooperates with ground conductor layer 533 to form at least a portion of capacitor C3. Ground conductor layers 531 and 533 are not directly connected to shielding conductor 80.

[0082] The laminate 50 further includes structures 11 and 12, each made of conductors. Structures 11 and 12 are integrated into the laminate 50. Compared to side 50D, structure 11 is positioned closer to side 50C and is connected to ground conductor layer 531. Compared to side 50C, structure 12 is positioned closer to side 50D and is connected to ground conductor layer 533.

[0083] No conductor may be placed between structure 11 and side 50C. No conductor may be placed between structure 12 and side 50D.

[0084] Here, a columnar structure consisting of one or more through holes is referred to as a columnar conductor. In the case where the columnar conductor consists of multiple through holes, the through holes are connected in series. The columnar conductor extends in a direction parallel to the stacking direction T. Structures 11 and 12 each contain at least one columnar conductor.

[0085] In an exemplary embodiment, structure 11 includes a plurality of columnar conductors T5 as at least one columnar conductor, the plurality of columnar conductors T5 being arranged in a direction orthogonal to the stacking direction T. Figure 10 as well as Figure 11In the example shown, the plurality of columnar conductors T5 are two columnar conductors T5 arranged in a direction parallel to the Y direction. The dimensions of the two columnar conductors T5 in their respective stacking direction T can be the same or different from each other. Furthermore, the number of at least one columnar conductor in structure 11 is not limited to two; it can also be one or more than three.

[0086] Two columnar conductors T5 are connected in series through through-holes 53T5, 54T5, 55T5, 56T5, 57T5, 58T5, 59T5, and 60T5. Furthermore, each columnar conductor T5 has a first end T5a and a second end T5b located opposite each other in the stacking direction T. The first end T5a is connected to the ground conductor layer 531. The conductor layer of structure 11 (described later) is connected to the second end T5b, but no other conductors are connected to it. In the exemplary embodiment, in particular, no other conductors for constituting capacitor C1 or at least one other component of structure 11 are connected to the second end T5b.

[0087] Additionally, in an exemplary embodiment, structure 12 includes a plurality of columnar conductors T6 as at least one columnar conductor, the plurality of columnar conductors T6 being arranged in a direction orthogonal to the stacking direction T. Figure 10 as well as Figure 11 In the example shown, the plurality of cylindrical conductors T6 are two cylindrical conductors T6 arranged in a direction parallel to the Y direction. The dimensions of the two cylindrical conductors T6 in their respective stacking direction T can be the same or different from each other. Furthermore, the number of at least one cylindrical conductor in the structure 12 is not limited to two; it can also be one or more than three.

[0088] Two columnar conductors T6 are connected in series through through-holes 53T6, 54T6, 55T6, 56T6, 57T6, 58T6, 59T6, and 60T6. Furthermore, each of the two columnar conductors T6 has a third end T6a and a fourth end T6b located opposite each other in the stacking direction T. The third end T6a is connected to the ground conductor layer 533. The conductor layer of structure 12 (described later) is connected to the fourth end T6b, but no other conductors are connected to it. In the exemplary embodiment, in particular, no other conductors used to form capacitor C3 or at least one other component of structure 12 are connected to the fourth end T6b.

[0089] Structure 11 may further include at least one conductor layer connected to at least one columnar conductor. In an exemplary embodiment, structure 11 includes conductor layers 551, 571, 591, and 611 as at least one conductor layer. Conductor layers 551, 571, 591, and 611 are all connected to two columnar conductors T5. In particular, conductor layer 611 is connected to the second end T5b of each of the two columnar conductors T5.

[0090] Structure 12 may further include at least one conductor layer connected to at least one columnar conductor. In an exemplary embodiment, structure 12 includes conductor layers 554, 574, 594, and 614 as at least one conductor layer. Conductor layers 554, 574, 594, and 614 are all connected to two columnar conductors T6. In particular, conductor layer 614 is connected to the fourth end T6b of each of the two columnar conductors T6.

[0091] Next, the relationship between structures 11 and 12 and grounding conductor layers 531 and 533 will be explained. Grounding conductor layers 531 and 533 are connected to the grounding element via at least one of electrodes 114, 115, and 116, which are connected to the grounding element. In an exemplary embodiment, in particular, grounding conductor layer 531 is connected to the grounding element via electrode 116, two through-holes 51T7, conductor layer 522, and two through-holes 52T7. Grounding conductor layer 533 is connected to the grounding element via electrode 114, two through-holes 51T9, conductor layer 524, and two through-holes 52T9.

[0092] Furthermore, grounding conductor layers 531 and 533 are connected to grounding conductor layer 532. Grounding conductor layer 532 is connected to the grounding element via electrode 115, two through holes 51T8, and two through holes 52T8. Therefore, it can also be said that grounding conductor layer 531 is connected to the grounding element via grounding conductor layers 532 and 533. Similarly, it can also be said that grounding conductor layer 533 is connected to the grounding element via grounding conductor layers 531 and 532.

[0093] Compared to the second surface 50B, the grounding conductor layers 531 and 533 are respectively positioned closer to the first surface 50A. Structure 11 is disposed between the grounding conductor layer 531 and the second surface 50B. Structure 12 is disposed between the grounding conductor layer 533 and the second surface 50B.

[0094] Next, the relationship between structures 11 and 12 and capacitors C1 and C3 will be explained. At least a portion of the conductor layer 552 constituting capacitor C1 is electrically connected to the electrode 111 corresponding to the first signal terminal 2 via a plurality of through-holes and the conductor layer 521. That is, the conductor layer 552 is electrically connected to the first signal terminal 2. Figure 11 As shown, two columnar conductors T5 are disposed between conductor layer 552 and side surface 50C.

[0095] The conductor layer 553, which constitutes at least a portion of the capacitor C3, is electrically connected to the electrode 113 corresponding to the second signal terminal 3 via a plurality of through-holes and the conductor layer 523. That is, the conductor layer 553 is electrically connected to the second signal terminal 3. Two columnar conductors T6 are disposed between the conductor layer 553 and the side surface 50D.

[0096] Next, features related to inductors L1 to L4 will be described. Inductors L1 to L3 are arranged in this order from side 50C of the laminate 50 toward side 50D of the laminate 50. Viewed from the lamination direction T, inductor L4 is configured to overlap with inductor L2. Furthermore, inductors L1 to L4 are disposed between structure 11 and structure 12. In an exemplary embodiment, in particular, structure 11 is disposed between inductor L1 and side 50C. Structure 12 is disposed between inductor L3 and side 50D.

[0097] The inductor L1 comprises: two first cylindrical conductors formed by through-holes 55T1a, 56T1a, 57T1a, 58T1a, 59T1a, 60T1a, 61T1a, 62T1a, 65T1a, 66T1a, and 67T1a; two second cylindrical conductors formed by through-holes 52T1b, 53T1b, 54T1b, 55T1b, 56T1b, 57T1b, 58T1b, 59T1b, 60T1b, 61T1b, 62T1b, 65T1b, 66T1b, 67T1b, and 68T1b; and a conductor layer 681 connecting the two first cylindrical conductors and the two second cylindrical conductors. The inductor L1 is wound around an axis extending in a direction orthogonal to the stacking direction T. Inductor L1 also includes a conductor layer 691 and through-holes 68T1a and 68T1b connecting conductor layer 681 and conductor layer 691.

[0098] The two second cylindrical conductors of inductor L1 are connected to the second conductor portion 80F of shielding conductor 80 via conductor layers 601, 671 (see reference). Figure 2 )connect.

[0099] The inductor L2 comprises: two first cylindrical conductors formed by through-holes 55T2a, 56T2a, 57T2a, 58T2a, 59T2a, 60T2a, 61T2a, 62T2a, 65T2a, 66T2a, and 67T2a; two second cylindrical conductors formed by through-holes 53T2b, 54T2b, 55T2b, 56T2b, 57T2b, 58T2b, 59T2b, 60T2b, 61T2b, 62T2b, 65T2b, 66T2b, and 67T2b; and a conductor layer 682 connecting the two first cylindrical conductors and the two second cylindrical conductors. The inductor L2 is wound around an axis extending in a direction orthogonal to the stacking direction T. Inductor L2 also includes conductor layer 692 and vias 68T2a and 68T2b connecting conductor layer 682 and conductor layer 692.

[0100] The two second columnar conductors of inductor L2 are connected to the first conductor portion 80E of shielding conductor 80 via conductor layers 602, 672 (see reference). Figure 2 )connect.

[0101] The inductor L3 includes: two first cylindrical conductors formed by through-holes 55T3a, 56T3a, 57T3a, 58T3a, 59T3a, 60T3a, 61T3a, 62T3a, 65T3a, 66T3a, and 67T3a; two second cylindrical conductors formed by through-holes 52T3b, 53T3b, 54T3b, 55T3b, 56T3b, 57T3b, 58T3b, 59T3b, 60T3b, 61T3b, 62T3b, 65T3b, 66T3b, and 67T3b; and a conductor layer 683 connecting the two first cylindrical conductors and the two second cylindrical conductors. The inductor L3 is wound around an axis extending in a direction orthogonal to the stacking direction T. Inductor L3 also includes conductor layer 693 and vias 68T3a and 68T3b connecting conductor layer 683 and conductor layer 693.

[0102] The two second columnar conductors of inductor L3 are connected to the second conductor portion 80F of shielding conductor 80 via conductor layers 603, 673 (see reference). Figure 2 )connect.

[0103] Inductor L1 has an opening surrounded by two first cylindrical conductors, two second cylindrical conductors, and a conductor layer 681. Inductor L2 has an opening surrounded by two first cylindrical conductors, two second cylindrical conductors, and a conductor layer 682. Inductor L3 has an opening surrounded by two first cylindrical conductors, two second cylindrical conductors, and a conductor layer 683. Inductors L1 to L3 can be configured such that the openings of inductors L1, L2, and L3 overlap when viewed from the X direction.

[0104] Structure 11 can be configured to overlap with the opening of inductor L1 when viewed from the X direction. Structure 12 can be configured to overlap with the opening of inductor L3 when viewed from the X direction.

[0105] Inductor L4 includes: a first cylindrical conductor formed by through-holes 59T4a, 60T4a, 61T4a, and 62T4a; a second cylindrical conductor formed by through-holes 59T4b, 60T4b, 61T4b, and 62T4b; and a conductor layer 651 connecting the first cylindrical conductor and the second cylindrical conductor. Inductor L4 is wound around an axis extending in a direction orthogonal to the stacking direction T. Inductor L4 can be configured to intersect with the opening of inductor L2.

[0106] Next, the operation and effects of the electronic device 1 according to the exemplary embodiment will be explained. The electronic device 1 according to the exemplary embodiment includes a bandpass filter comprising inductors L1 to L4 and capacitors C1 to C8. In a bandpass filter, there are cases where it is required to increase the pass attenuation in a specific frequency region higher than the passband of the bandpass filter (for example, a frequency region including a frequency four times the center frequency of the passband). However, if the conductor layer constituting the inductors L1 to L4 and capacitors C1 to C8 functions as a distributed constant circuit, there are cases where it is not possible to sufficiently increase the attenuation in the aforementioned specific frequency region.

[0107] During their research, the inventors of this application discovered that the shape of the ground conductor layer 531 constituting at least a portion of capacitor C1 and the shape of the ground conductor layer 533 constituting at least a portion of capacitor C3 affect the pass-through attenuation in the aforementioned specific frequency region. Specifically, it was found that by decreasing or increasing the shape of the ground conductor layers 531 and 533, the pass-through attenuation in the aforementioned specific frequency region can be increased. However, when decreasing the shape of the ground conductor layers 531 and 533, it is not possible to sufficiently increase the pass-through attenuation in the aforementioned specific frequency region while maintaining other characteristics of the bandpass filter. Furthermore, due to the limitation on the size of the laminate 50, it is not possible to sufficiently increase the shape of the ground conductor layers 531 and 533.

[0108] In this regard, the electronic device 1 of the exemplary embodiment includes structures 11 and 12 made of conductors. As described above, the first end T5a of each of the two columnar conductors T5 of structure 11 is connected to the ground conductor layer 531. At the second end T5b of each of the two columnar conductors T5, no other conductor is connected except to the conductor layer 611 of structure 11. That is, in the exemplary embodiment, structure 11 is not used as wiring and can be considered as part of the ground conductor layer 531. Similarly, the third end T6a of each of the two columnar conductors T6 of structure 12 is connected to the ground conductor layer 533. At the fourth end T6b of each of the two columnar conductors T6, no other conductor is connected except to the conductor layer 614 of structure 12. That is, in the exemplary embodiment, structure 12 is not used as wiring and can be considered as part of the ground conductor layer 533.

[0109] Two columnar conductors T5 are disposed between conductor layer 552 and side surface 50C, wherein conductor layer 552 cooperates with ground conductor layer 531 to form at least a portion of capacitor C1. Two columnar conductors T6 are disposed between conductor layer 553 and side surface 50D, wherein conductor layer 553 cooperates with ground conductor layer 533 to form at least a portion of capacitor C3. Thus, according to the exemplary embodiment, both structural limitations and characteristic adjustments can be achieved. The effect will now be explained using simulation results.

[0110] In the simulation, models from the embodiments and comparative examples are used. The model of the embodiments is a model of electronic device 1 according to an exemplary implementation. In the model of the embodiments, the passband of electronic device 1 is designed to cover a frequency region of 7.7 GHz to 8.2 GHz.

[0111] The comparative example model is a model of the electronic device of the comparative example. The structure of the electronic device of the comparative example is the same as that of the electronic device 1 of the exemplary embodiment, except that structures 11 and 12 are not provided.

[0112] In the simulation, the attenuation characteristics between the first signal terminal 2 and the second signal terminal 3 were determined for the model of the embodiment and the model of the comparative example, respectively.

[0113] Figure 12 This is a characteristic plot representing the attenuation characteristics of each model. Figure 12 In the graph, the horizontal axis represents frequency, and the vertical axis represents attenuation. Additionally, in... Figure 12 In the figures, the curve labeled 91 represents the attenuation characteristics in the model of the embodiment. The curve labeled 92 represents the attenuation characteristics in the model of the comparative example.

[0114] according to Figure 12 It is evident that in a specific frequency region encompassing four times the center frequency of the passband, the pass attenuation in the embodiment model (curve 91) is greater than the pass attenuation in the comparative example model (curve 92). The simulation results demonstrate that, according to the exemplary implementation, both structural limitations and characteristic adjustments can be accommodated.

[0115] Furthermore, this disclosure is not limited to the exemplary embodiments described above, and various modifications can be made. For example, as long as the structure of this disclosure satisfies the requirements of the claims, it is not limited to increasing the pass attenuation in a specific frequency region, and can be applied to electronic devices with various circuit structures in which the ground conductor layer can function as a distributed constant circuit to achieve the desired characteristics.

[0116] Alternatively, one of structures 11 and 12 may be omitted. Furthermore, the number and position of the columnar conductors and conductor layers included in each of structures 11 and 12 are not limited to the examples shown in the exemplary embodiments, and can be arbitrary. For example, the number of conductor layers included in each of structures 11 and 12 may be three or less, or five or more.

[0117] Furthermore, the electronic device 1 of this disclosure can also replace structures 11 and 12, or have other structures connected to other conductor layers besides structures 11 and 12. The structure of the other structures is the same as that of structures 11 and 12. The other structures can increase the pass-through attenuation of a specific frequency region containing a frequency four times the center frequency of the passband, or increase the pass-through attenuation of other specific frequency regions not containing a frequency four times the center frequency of the passband.

[0118] Alternatively, the grounding conductor layers 531 and 533 may be positioned closer to the second surface 50B than the first surface 50A. In this case, structure 11 may also be positioned between the grounding conductor layer 531 and the first surface 50A. Structure 12 may also be positioned between the grounding conductor layer 533 and the first surface 50A.

[0119] Alternatively, grounding conductor layers 531 and 533 may not be connected to grounding conductor layer 532.

[0120] As described above, a stacked electronic device according to one embodiment of the present disclosure includes: a first capacitor; a first ground conductor layer connected to a grounding element; a first capacitor conductor layer that cooperates with the first ground conductor layer to form at least a portion of the first capacitor; a first structure made of conductors; and a stack for integrating the first capacitor, the first ground conductor layer, the first capacitor conductor layer, and the first structure, comprising a plurality of stacked dielectric layers. The first structure includes at least one first columnar conductor extending in a direction parallel to the stacking direction of the plurality of dielectric layers, and having a first end and a second end located opposite each other in the stacking direction. The first end is connected to the first ground conductor layer. The stack also includes other conductors for constituting at least one component other than the first capacitor and the first structure. No other conductor is connected to the second end. The stack has: a first surface and a second surface located at both ends in the stacking direction; a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the first surface and the second surface. The first side surface and the second side surface face opposite each other. The third side surface and the fourth side surface face opposite each other. At least one first columnar conductor is disposed between the first capacitor conductor layer and the first side surface.

[0121] In a stacked electronic device according to one embodiment of this disclosure, the first ground conductor layer may be disposed closer to the first surface than the second surface. A first structure may be disposed between the first ground conductor layer and the second surface.

[0122] In addition, in a stacked electronic device according to one embodiment of the present disclosure, at least one first columnar conductor may be a plurality of first columnar conductors arranged in a direction orthogonal to the stacking direction.

[0123] In addition, in a stacked electronic device according to one embodiment of the present disclosure, the first structure may further include at least one conductor layer connected to at least one first columnar conductor.

[0124] In addition, a stacked electronic device according to one embodiment of the present disclosure may further include a bandpass filter, the bandpass filter including a first capacitor and at least one inductor integrated with the stack.

[0125] Additionally, one embodiment of the stacked electronic device of this disclosure may further include: a second capacitor; a second ground conductor layer connected to a grounding element; a second capacitor conductor layer that cooperates with the second ground conductor layer to form at least a portion of the second capacitor; and a second structure made of conductors. The second capacitor, the second ground conductor layer, the second capacitor conductor layer, and the second structure may be integrated with the stack. The second structure may include at least one second columnar conductor extending in a direction parallel to the stacking direction and having a third end and a fourth end located opposite each other in the stacking direction. The third end may be connected to the second ground conductor layer. At least one component may not include the second capacitor and the second structure. No other conductor may be connected to the fourth end. At least one second columnar conductor may be disposed between the second capacitor conductor layer and one of the second side, the third side, and the fourth side.

[0126] In addition, a stacked electronic device according to one embodiment of the present disclosure may also include an inductor disposed between the first structure and the second structure.

[0127] Additionally, one embodiment of the stacked electronic device disclosed herein may further include a signal terminal disposed on the first surface and used for signal input or output. A first capacitor conductor layer may be electrically connected to the signal terminal.

[0128] Additionally, one embodiment of the stacked electronic device disclosed herein may further include a shielding conductor, which is composed of conductors and is integrated with respect to the stack. The shielding conductor may cover a first side, a second side, a third side, and a fourth side.

[0129] Based on the foregoing description, various methods and variations of this disclosure can be implemented. Therefore, within the scope equivalent to the claims, this disclosure can also be implemented in ways other than the exemplary embodiments described above.

Claims

1. A stacked electronic device, characterized in that, have: First capacitor; The first grounding conductor layer is connected to the grounding component; A first capacitor conductor layer, which cooperates with the first ground conductor layer to form at least a portion of the first capacitor; The first structure is composed of conductors; as well as A laminate for integrating the first capacitor, the first ground conductor layer, the first capacitor conductor layer, and the first structure, comprising multiple stacked dielectric layers. The first structure includes at least one first columnar conductor extending in a direction parallel to the stacking direction of the plurality of dielectric layers, and having a first end and a second end located on opposite sides of each other in the stacking direction. The first end is connected to the first grounding conductor layer. The laminate also includes other conductors that form at least one component other than the first capacitor and the first structure. The other conductor is not connected at the second end. The laminate has: a first surface and a second surface located at both ends of the lamination direction; a first side surface, a second side surface, a third side surface, and a fourth side surface connecting the first surface and the second surface. The first side and the second side face opposite directions. The third side and the fourth side face opposite directions. The at least one first columnar conductor is disposed between the first capacitor conductor layer and the first side surface.

2. The stacked electronic device according to claim 1, characterized in that, Compared to the second surface, the first grounding conductor layer is positioned closer to the first surface. The first structure is disposed between the first grounding conductor layer and the second surface.

3. The stacked electronic device according to claim 1, characterized in that, The at least one first columnar conductor is a plurality of first columnar conductors arranged in a direction orthogonal to the stacking direction.

4. The stacked electronic device according to claim 1, characterized in that, The first structure further includes at least one conductor layer connected to the at least one first columnar conductor.

5. The stacked electronic device according to claim 1, characterized in that, It also includes a bandpass filter, which comprises the first capacitor and at least one inductor integrated with the laminate.

6. The stacked electronic device according to claim 5, characterized in that, It also has: Second capacitor; The second grounding conductor layer is connected to the grounding component; The second capacitor conductor layer, in conjunction with the second ground conductor layer, constitutes at least a portion of the second capacitor; as well as The second structure is composed of conductors. The second capacitor, the second grounding conductor layer, the second capacitor conductor layer, and the second structure are integrated with the laminate. The second structure includes at least one second columnar conductor extending in a direction parallel to the stacking direction, and having a third end and a fourth end located on opposite sides of each other in the stacking direction. The third end is connected to the second grounding conductor layer. The at least one constituent element does not include the second capacitor and the second structure. The other conductors are not connected at the fourth end. The at least one second columnar conductor is disposed between the second capacitor conductor layer and one of the second side, the third side, and the fourth side.

7. The stacked electronic device according to claim 6, characterized in that, It also includes an inductor disposed between the first structure and the second structure.

8. The stacked electronic device according to claim 1, characterized in that, It also includes signal terminals, which are disposed on the first surface and used for signal input or output. The first capacitor conductor layer is electrically connected to the signal terminal.

9. The stacked electronic device according to any one of claims 1 to 8, characterized in that, It also includes a shielding conductor, which is composed of conductors and is integrated with respect to the laminate. The shielding conductor covers the first side, the second side, the third side, and the fourth side.

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